Chip design rule inspection result processing method, device and equipment

Abstract

The invention provides a processing method, device and equipment for a chip design rule check result, and the method comprises the steps: building an inclusion relation multi-way tree according to a hierarchical physical design result, carrying out the traversal of the inclusion relation multi-way tree based on a depth-first strategy, obtaining a module list, and carrying out the processing of a chip design rule check result according to the module list and the inclusion relation multi-way tree. And determining a target module corresponding to the DRC result and a position coordinate of the DRC result in the target module. According to the DRC result sorting method and device, automatic sorting of the DRC results can be achieved, the position coordinates of the DRC results in the target module after sorting are obtained, and the efficiency and accuracy of DRC result sorting are improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method, device and apparatus for processing chip design rule checking results. Background Art

[0002] DRC (design rule check) is an important step in chip back-end design. By performing design rule checking, potential short circuits, open circuits, and adverse effects caused by violations of design rules can be physically verified. DRC results can indicate where rule violations exist in the chip.

[0003] In the prior art, engineers need to manually screen the DRC results, classify them according to factors such as the location, type, and cause of the DRC results, and analyze the DRC results of each category to locate and solve the problems that cause DRC violations.

[0004] However, in the early and middle stages of chip back-end design, due to the huge number of DRC violations, manual classification is inefficient, which affects the efficiency of back-end design. Summary of the invention

[0005] The purpose of this application is to provide a method, device and equipment for processing chip design rule checking results in view of the deficiencies in the above-mentioned prior art, so as to solve the problem of low efficiency of manual classification when the number of DRC violations is large in the prior art.

[0006] To achieve the above objectives, the technical solutions adopted in this application are as follows:

[0007] In a first aspect, the present application provides a method for processing chip design rule check results, the method comprising:

[0008] Establishing an inclusion relationship multi-branch tree according to the hierarchical physical design result, wherein the inclusion relationship multi-branch tree is used to characterize the inclusion relationship between each module in the hierarchical physical design result and the violation region with DRC violation, wherein the root node of the inclusion relationship multi-branch tree is the top-level module of the chip, and the child nodes of each node in the inclusion relationship multi-branch tree are each module included in the module corresponding to the node;

[0009] Traversing the inclusion relationship multitree based on a depth-first strategy to obtain a module list, wherein the list elements in the module list are respectively used to represent each module in the hierarchical physical design result, and each of the list elements is arranged from the bottom layer to the top layer according to the hierarchical order of the modules included in the chip;

[0010] According to the module list and the inclusion relationship multi-branch tree, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module are determined.

[0011] As a possible implementation method, the establishment of a multi-branch tree of inclusion relationships according to the hierarchical physical design results includes:

[0012] Pre-analyze the hierarchical physical design results, determine at least one violation region with DRC violation, and use each of the violation regions as a virtual module;

[0013] The inclusion relationship multi-branch tree is established according to the modules in the hierarchical physical design result and the virtual modules.

[0014] As a possible implementation, the establishing of the inclusion relationship multitree according to the modules in the hierarchical physical design result and the virtual modules includes:

[0015] Taking the top-level module as a parent node, determining the first module included in the top-level module, and taking the first module included in the top-level module as the first child node of the parent node;

[0016] Taking the first child node as a new parent node, determining a second module included in the module represented by the new parent node, and taking the second module as a second child node of the new parent node;

[0017] The second child node is used as the new parent node, and the above steps of determining the second module included in the module represented by the new parent node and using the second module as the second child node of the new parent node are repeated until all modules are added to the multi-branch tree, and the obtained multi-branch tree is used as the inclusion relationship multi-branch tree.

[0018] As a possible implementation, the inclusion relationship multitree is traversed based on a depth-first strategy to obtain a module list, including:

[0019] A. Traverse the inclusion relationship multitree starting from an initial leaf node, and use the initial leaf node, the sibling nodes of the initial leaf node, and the parent node of the initial leaf node as list elements of the module list;

[0020] B. Taking a child node at the same level as the initial leaf node as the first child node, traversing the inclusion relationship multi-branch tree starting from the first child node, and taking the first child node, the brother node of the first child node, and the parent node of the first child node as the list elements of the module list;

[0021] C. Taking a child node at the same level as the initial leaf node and the first child node as a new first child node, and repeatedly executing the step of traversing the inclusion relationship multi-branch tree starting from the first child node until the first child node has no child nodes at the same level, and taking the parent node of the initial leaf node as the new first child node;

[0022] D. Repeat steps B to C until all nodes in the inclusion relationship multitree are output as list elements of the module list.

[0023] As a possible implementation manner, determining the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the module list and the inclusion relationship multitree includes:

[0024] Matching the DRC result with the list elements in the module list in a preset order, and determining a target module corresponding to the DRC result, wherein the target module is a module represented by the list element matched by the DRC result;

[0025] According to the top-level position coordinates indicated by the DRC result, the target module and the inclusion relationship multi-branch tree, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module are determined.

[0026] As a possible implementation manner, matching the DRC result with the list elements in the module list in a preset order to determine the target module corresponding to the DRC result includes:

[0027] Starting from the first list element in the module list, read each list element in turn, and for the current list element read, perform character matching between the name of the current list element and the name of the DRC result;

[0028] If the matching degree between the name of the current list element and the name of the DRC result is greater than a preset threshold, the module indicated by the current list element is used as the target module; otherwise, the next list element of the current list element is read.

[0029] As a possible implementation manner, determining the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the top-level position coordinates indicated by the DRC result, the target module, and the inclusion relationship multitree includes:

[0030] According to the position level of the target module in the inclusion relationship multitree, the top-level position coordinates are mapped layer by layer to obtain the candidate position coordinates of the top-level position coordinates in the target module;

[0031] Determine whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module according to the boundary information of the target module and / or the wiring level of the target module;

[0032] If yes, the selected position coordinates are used as the position coordinates of the DRC result in the target module;

[0033] If not, then re-determine a new target module based on the position level of the target module in the inclusion relationship multi-tree, and determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module based on the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multi-tree.

[0034] As a possible implementation manner, mapping the top-level position coordinates layer by layer according to the position level of the target module in the inclusion relationship multitree to obtain the candidate position coordinates of the top-level position coordinates in the target module includes:

[0035] According to the position level of the target module in the inclusion relationship multitree, the top-level position coordinates are used as input parameters of the recursive module, and the recursive module recursively maps the top-level position coordinates layer by layer to obtain the candidate position coordinates in the target module.

[0036] As a possible implementation manner, determining whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module according to the boundary information of the target module and / or the wiring level of the target module includes:

[0037] Determine whether the coordinates of the to-be-selected position are within the area surrounded by the boundary information;

[0038] If so, determine whether the wiring level indicated by the DRC result matches the wiring level of the target module. If so, use the to-be-selected position coordinates as the position coordinates of the DRC result in the target module.

[0039] As a possible implementation manner, re-determining a new target module according to the position level of the target module in the inclusion relationship multitree, and determining the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multitree, includes:

[0040] Determine a current node corresponding to the target module in the inclusion relationship multitree;

[0041] The parent node of the current node is used as a candidate node, and the module corresponding to the candidate node is used as a new target module;

[0042] According to the position level of the candidate node in the inclusion relationship multi-branch tree, the top-level position coordinates are mapped layer by layer to obtain the intermediate position coordinates of the top-level position coordinates in the new target module;

[0043] Determine whether to use the intermediate position coordinates as the position coordinates of the DRC result in the new target module according to the boundary information of the new target module and / or the wiring level of the new target module;

[0044] If so, the intermediate position coordinates are used as the position coordinates of the DRC result in the new target module.

[0045] In a second aspect, the present application provides a device for processing chip design rule check results, the device comprising:

[0046] Establishing a module, including establishing an inclusion relationship multi-branch tree according to the structure of the chip, wherein the inclusion relationship multi-branch tree is used to characterize the inclusion relationship between the modules in the chip, the root node of the inclusion relationship multi-branch tree is the top-level module of the chip, and the child nodes of each node in the inclusion relationship multi-branch tree are the modules included in the module corresponding to the node;

[0047] A traversal module, used for traversing the inclusion relationship multitree based on a depth-first strategy to obtain a module list, wherein the list elements in the module list are respectively used to represent each module in the chip, and each of the list elements is arranged from the bottom layer to the top layer according to the hierarchical order of the modules in the chip;

[0048] A determination module is used to determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the module list and the inclusion relationship multi-branch tree.

[0049] As a possible implementation, the establishment module is specifically used for:

[0050] Pre-analyze the hierarchical physical design results, determine at least one violation region with DRC violation, and use each of the violation regions as a virtual module;

[0051] The inclusion relationship multi-branch tree is established according to the modules in the hierarchical physical design result and the virtual modules.

[0052] As a possible implementation, the establishment module is specifically used for:

[0053] Taking the top-level module as a parent node, determining the first module included in the top-level module, and taking the first module included in the top-level module as the first child node of the parent node;

[0054] Taking the first child node as a new parent node, determining a second module included in the module represented by the new parent node, and taking the second module as a second child node of the new parent node;

[0055] The second child node is used as the new parent node, and the above steps of determining the second module included in the module represented by the new parent node and using the second module as the second child node of the new parent node are repeated until all modules are added to the multi-branch tree, and the obtained multi-branch tree is used as the inclusion relationship multi-branch tree.

[0056] As a possible implementation, the traversal module is specifically used for:

[0057] A. Traverse the inclusion relationship multitree starting from an initial leaf node, and use the initial leaf node, the sibling nodes of the initial leaf node, and the parent node of the initial leaf node as list elements of the module list;

[0058] B. Taking a child node at the same level as the initial leaf node as the first child node, traversing the inclusion relationship multi-branch tree starting from the first child node, and taking the first child node, the brother node of the first child node, and the parent node of the first child node as the list elements of the module list;

[0059] C. Taking a child node at the same level as the initial leaf node and the first child node as a new first child node, and repeatedly executing the step of traversing the inclusion relationship multi-branch tree starting from the first child node until the first child node has no child nodes at the same level, and taking the parent node of the initial leaf node as the new first child node;

[0060] D. Repeat steps B to C until all nodes in the inclusion relationship multitree are output as list elements of the module list.

[0061] As a possible implementation manner, the determining module is specifically used for:

[0062] Matching the DRC result with the list elements in the module list in a preset order, and determining a target module corresponding to the DRC result, wherein the target module is a module represented by the list element matched by the DRC result;

[0063] According to the top-level position coordinates indicated by the DRC result, the target module and the inclusion relationship multi-branch tree, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module are determined.

[0064] As a possible implementation manner, the determining module is specifically used for:

[0065] Starting from the first list element in the module list, read each list element in turn, and for the current list element read, perform character matching between the name of the current list element and the name of the DRC result;

[0066] If the matching degree between the name of the current list element and the name of the DRC result is greater than a preset threshold, the module indicated by the current list element is used as the target module; otherwise, the next list element of the current list element is read.

[0067] As a possible implementation manner, the determining module is specifically used for:

[0068] According to the position level of the target module in the inclusion relationship multitree, the top-level position coordinates are mapped layer by layer to obtain the candidate position coordinates of the top-level position coordinates in the target module;

[0069] Determine whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module according to the boundary information of the target module and / or the wiring level of the target module;

[0070] If yes, the selected position coordinates are used as the position coordinates of the DRC result in the target module;

[0071] If not, then re-determine a new target module based on the position level of the target module in the inclusion relationship multi-tree, and determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module based on the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multi-tree.

[0072] As a possible implementation manner, the determining module is specifically used for:

[0073] According to the position level of the target module in the inclusion relationship multitree, the top-level position coordinates are used as input parameters of the recursive module, and the recursive module recursively maps the top-level position coordinates layer by layer to obtain the candidate position coordinates in the target module.

[0074] As a possible implementation manner, the determining module is specifically used for:

[0075] Determine whether the coordinates of the to-be-selected position are within the area surrounded by the boundary information;

[0076] If so, determine whether the wiring level indicated by the DRC result matches the wiring level of the target module. If so, use the to-be-selected position coordinates as the position coordinates of the DRC result in the target module.

[0077] As a possible implementation manner, the determining module is specifically used for:

[0078] Determine a current node corresponding to the target module in the inclusion relationship multitree;

[0079] The parent node of the current node is used as a candidate node, and the module corresponding to the candidate node is used as a new target module;

[0080] According to the position level of the candidate node in the inclusion relationship multi-branch tree, the top-level position coordinates are mapped layer by layer to obtain the intermediate position coordinates of the top-level position coordinates in the new target module;

[0081] Determine whether to use the intermediate position coordinates as the position coordinates of the DRC result in the new target module according to the boundary information of the new target module and / or the wiring level of the new target module;

[0082] If so, the intermediate position coordinates are used as the position coordinates of the DRC result in the new target module.

[0083] In a third aspect, an embodiment of the present application further provides an electronic device, comprising: a processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor communicates with the storage medium through the bus, and the processor executes the machine-readable instructions to perform the steps of the method for processing chip design rule check results as described in any one of the first aspects.

[0084] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method for processing chip design rule check results as described in any one of the first aspects are executed.

[0085] The beneficial effects of the present application are: by constructing a multi-branch tree of inclusion relationships that characterizes the inclusion relationships between modules and DRC violation regions according to the hierarchical physical design results, and generating a module list based on the multi-branch tree of inclusion relationships, and finally sorting the DRC results based on the module list and the multi-branch tree of inclusion relationships. Since the module list is generated based on a depth-first strategy, and the multi-branch tree of inclusion relationships can characterize the inclusion relationships between modules, when the user sorts the DRC results, he only needs to input the location coordinates of the DRC results, and the electronic device can sort from the bottom to the top based on the method of the present application according to the inclusion relationship between the modules based on a strategy of limited depth, so as to avoid the bottom DRC results from being mistakenly sorted to a high level, thereby ensuring that the sorting results are not repeated or omitted, and improving the accuracy and efficiency of DRC automatic sorting. And when the layout of the chip changes, it is only necessary to change the module information that has changed, so it also has good flexibility in the design process.

[0086] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0087] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0088] Figure 1 A flowchart of a method for processing chip design rule check results provided by an embodiment of the present application is shown;

[0089] Figure 2 A schematic diagram showing the location hierarchy of modules in a hierarchical physical design result provided by an embodiment of the present application is shown;

[0090] Figure 3 An example diagram of a multi-branch tree of inclusion relations provided in an embodiment of the present application is shown;

[0091] Figure 4 A flowchart of establishing a multi-branch tree of inclusion relationships provided by an embodiment of the present application is shown;

[0092] Figure 5 Another flowchart of establishing a multi-branch tree of inclusion relationships provided by an embodiment of the present application is shown;

[0093] Figure 6 A flowchart of generating a module list based on a multi-branch tree of inclusion relationships provided by an embodiment of the present application is shown;

[0094] Figure 7 A flow chart of determining a target module and position coordinates of a DRC result in the target module provided by an embodiment of the present application is shown;

[0095] Figure 8 A flow chart of determining a target module provided by an embodiment of the present application is shown;

[0096] Fig. 9 Another flow chart for determining the position coordinates of a target module and a DRC result in the target module provided by an embodiment of the present application is shown;

[0097] Fig.10 A flow chart of determining the position coordinates of a DRC result in a target module provided by an embodiment of the present application is shown;

[0098] Fig.11 Another flow chart for determining the position coordinates of the DRC result in the target module provided by an embodiment of the present application is shown;

[0099] Fig.12 A schematic diagram showing the structure of a device for processing chip design rule check results provided by an embodiment of the present application is shown;

[0100] Fig.13 A schematic structural diagram of an electronic device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0101] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0102] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0103] In the back-end design of the chip, after the design rule check, the DRC results need to be screened and sorted according to the location, type, and cause of the DRC results. Then, the existing problems can be analyzed and processed through the classified DRC results.

[0104] In the early and mid-term design stages, the number of DRC violations is generally high. In the prior art, backend engineers generally perform manual screening and classify DRC results according to their level and location. However, when there are a large number of DRC results, a large number of DRC results have the same violation cause and the same location of occurrence, which increases unnecessary workload for engineers. In addition, sorting errors are prone to occur during manual sorting. Therefore, how to quickly complete the automated sorting of a large number of DRC results has become a problem that needs to be solved.

[0105] The cause of a DRC result is usually related to its location, and the DRC result includes the location where it occurs. The name of the DRC result can indicate the level at which the DRC result occurs. Therefore, this application proposes that the layout and routing of each module can be determined in the physical design stage. After the physical design result is checked for design rules and the DRC result is obtained, the location and name information of the DRC result can be analyzed, and the DRC result can be sorted to the corresponding level, and the DRC result can be automatically labeled with the set cause to achieve automatic sorting of the DRC result. This improves the sorting efficiency and accuracy of the DRC results when a large number of DRC results appear in the early and mid-stage of chip design.

[0106] Next, the processing method of the chip design rule check result of the present application is described. The execution subject of the method can be an electronic device, such as Figure 1 As shown, the method includes:

[0107] S101. Establish an inclusion relationship multi-branch tree based on the hierarchical physical design results. The inclusion relationship multi-branch tree is used to characterize the inclusion relationship between each module in the hierarchical physical design results and the violation area where the DRC violation exists. The root node of the inclusion relationship multi-branch tree is the top-level module of the chip, and the child nodes of each node in the inclusion relationship multi-branch tree are the modules included in the module corresponding to the node.

[0108] The hierarchical physical design results may include the level of each module of the chip, the position of each module in each level, and the physical layer information contained in each module. Therefore, based on the hierarchical physical design results, a multi-branch tree of inclusion relationships that characterizes the inclusion relationships between modules can be determined and established. Among them, the modules of the chip may include macro unit modules and standard unit modules in the layout and routing stage, and may also include user-defined virtual modules. The design modules can span multiple levels in the chip, that is, a design module can exist in at least one level.

[0109] In the present application, the DRC results can be pre-analyzed, and the violation area with DRC violations is defined as a module, and the level of all DRC results in the area is used as the level of the module. The name of the module can be the cause of the error indicated by the DRC result. For example, the area where the number of bottom DRC or adjacent metal layer DRC violations exceeds 1000 can be determined within the range of 10um*10um, and the reasons for the large number of DRC violations in these locations are analyzed, such as the wrong unit placement direction, lack of filling units, or local winding difficulties caused by obstruction, etc. These areas are defined as a module, and the name of the module can be defined as the cause of the DRC violation.

[0110] like Figure 2 The figure is a schematic diagram of the inclusion relationship between modules in a hierarchical physical design result provided by the present application. The hierarchical physical design result includes multiple modules, and there is an inclusion relationship between the modules. If module A is in the area of ​​module B and the level of module A is included in the level of module B, then module B can be considered to include module A. Figure 2 The modules in include Top, blockA, blockB, blockA_1 and areas a, b, c, where areas a, b, c can be user-defined modules. Figure 2 , the Top module includes sub-modules blockA, blockB and area a, and blockA includes sub-module blockA_1.

[0111] The inclusion relationship multitree can represent the inclusion relationship between modules and submodules. A node in the inclusion relationship multitree represents a module. In a set of parent-child nodes in the multitree, the module represented by the child node is a submodule of the module represented by the parent node. A parent node can be connected to multiple child nodes, that is, a module can include multiple submodules. The root node in the inclusion relationship multitree can represent the top-level module in the hierarchical physical design result, for example, Figure 2 The modules in the hierarchical physical design results construct a multi-branch tree containing the relationship, and we can get Figure 3 The multitree shown, Figure 2 The module Top in includes submodules blockA, blockB and region a. In the multi-branch tree, node 1 represents module Top, node 2 represents module blockA, node 3 represents module blockB, and node 4 represents region a. Therefore, in Figure 3 Node 1 is the parent node of nodes 2, 3, and 4.

[0112] S102. Traverse the inclusion relationship multitree based on the depth-first strategy to obtain a module list, wherein the list elements in the module list are respectively used to represent each module in the hierarchical physical design result, and each list element is arranged from the bottom to the top according to the hierarchical order of the modules contained in the chip.

[0113] Based on the depth-first strategy, the inclusion relationship multi-branch tree is traversed upward layer by layer starting from the leaf node until the root node is traversed. Each node in the inclusion relationship multi-branch tree is output to a list in the order of traversal to obtain a module list.

[0114] When traversing a multitree containing relationships based on a depth-first strategy, in the first implementation, you can start traversing from the bottom-most left leaf node, output the currently traversed node as a list element, and after traversing the sibling nodes of the same level of the leaf node from left to right, use the parent node of the leaf node as the next list element, and then continue to traverse the next leaf node, the sibling nodes of the leaf node, and the parent node from left to right until the currently traversed node is the root node. Output the modules represented by each node in the order of traversal to obtain a module list. For example, Figure 3 The inclusion relationship multitree shown in the figure starts from the bottom leftmost leaf node b and the resulting module list can be expressed as {b, blockA_l, blockA, c, blockB, a, Top}. Each list element corresponds to a node in the inclusion relationship multitree and is represented as Figure 2 A module in the mid-level physical design results.

[0115] In the second implementation method, you can also start traversing from the rightmost leaf node at the bottom layer. After traversing the brother nodes of the leaf node from right to left, output the parent node of the leaf node as the next list element. Next, traverse the next leaf node that has not been traversed, the brother node of the next leaf node, and the parent node of the next leaf node from right to left, and output the modules corresponding to the nodes as a list element in sequence according to the traversal order until the root node is traversed to obtain the final module list.

[0116] It should be noted that the nodes in the inclusion relationship multitree are arranged according to the hierarchical order of the modules corresponding to the nodes in the hierarchical physical design results and the inclusion relationship. Therefore, after traversing the inclusion relationship multitree from the bottom to the top level, the list elements in the obtained module list are also arranged from the bottom to the top level according to the hierarchical order of the modules contained in the chip.

[0117] This application is only described as an optional implementation method of arranging from the bottom to the top. It should be understood that the list elements in the module list can also be arranged from the top to the bottom according to the hierarchical order of the modules included in the chip. Figure 3 At this time, we can start traversing from node 1, traverse the first child node of node 1, node 2. If the child node also includes child nodes, continue to traverse the child nodes. If not, traverse the next adjacent sibling node of node 2, node 3, and continue to traverse the child node of node 2, until the currently traversed child node is the last leaf node b. Output the modules represented by each node in the order of traversal to get the final module list.

[0118] S103: Determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the module list and the inclusion relationship multi-branch tree.

[0119] Optionally, the target module corresponding to the DRC result may be a module in which the DRC result occurs.

[0120] The list elements in the module list are arranged in sequence according to the module inclusion relationship and the hierarchical order between the modules. Therefore, by matching the DRC result in the module list, at least one module that coincides with the coordinates of the DRC result can be determined first. It should be understood that these modules should be modules with an inclusion relationship. At this time, the target module where the DRC result occurs can be determined based on the inclusion relationship multi-branch tree, and the coordinates of the DRC result are mapped to the target module to obtain the position coordinates of the DRC result in the target module.

[0121] The DRC result includes the plane position coordinates of the DRC result in the hierarchical physical design result. By matching the coordinates of the DRC result with each module in the module list in turn, it can be determined in which modules the DRC result is located.

[0122] Reference Figure 2 , the DRC result is represented by "X" in the figure, Figure 2 The "X" symbol in is located inside the modules blockA_l and blockA. At this time, it is not certain whether "X" belongs to the module blockA_l or the module blockA. We can further determine based on the inclusion relationship multi-branch tree to determine the target module where "X" occurs and the position coordinates of "X" in the target module.

[0123] After establishing a multi-branch tree containing the relationship and a module list, when performing DRC sorting, the user can input the location coordinates of the DRC results. The electronic device sorts the DRC results based on the location coordinates of the DRC results according to the method of the present application, maps the location coordinates of the DRC results to the target module, and outputs the location coordinates of the target module and the DRC results in the target module.

[0124] In the embodiment of the present application, a multi-branch tree of inclusion relationships that characterizes the inclusion relationships between modules and DRC violation regions is constructed according to the hierarchical physical design results, and a module list is generated based on the multi-branch tree of inclusion relationships, and finally the DRC results are sorted based on the module list and the multi-branch tree of inclusion relationships. Since the module list is generated based on a depth-first strategy, and the multi-branch tree of inclusion relationships can characterize the inclusion relationships between modules, when the user sorts the DRC results, he only needs to input the location coordinates of the DRC results, and the electronic device can sort from the bottom to the top based on the method of the present application according to the inclusion relationship between the modules based on a strategy of limited depth, so as to avoid the bottom DRC results from being mistakenly sorted to a high level, thereby ensuring that the sorting results are not repeated or omitted, and improving the accuracy and efficiency of DRC automatic sorting. And when the layout of the chip changes, it is only necessary to change the module information that has changed, so it also has good flexibility in the design process.

[0125] The following is a further explanation of the establishment of a multi-branch tree of inclusion relationships based on the hierarchical physical design results. Figure 4 As shown, the above step S101 includes:

[0126] S401 , pre-analyze hierarchical physical design results, determine at least one DRC violation region, and use each violation region as a virtual module.

[0127] The region where the DRC violation exists may be a region where the number of DRC results is greater than a preset number threshold. After the hierarchical physical design results are subjected to a design rule check, a sliding window may be used to slide at the bottom layer of the hierarchical physical design results to analyze the number of DRC violations and the causes of DRC violations in the current window. If the number of DRC results in the current window is greater than the preset number threshold, the region of the current window may be treated as a violation region where DRC violations exist, the name of the violation region may be defined as the cause of the error, and the violation region may be treated as a virtual module.

[0128] In another implementation, the location where the DRC result occurs can also be analyzed, and the area in the preset area of ​​the adjacent metal layer where the number of DRC violations is greater than the preset number threshold is taken as a violation area, and the violation area is taken as a virtual module. It should be understood that the metal layer of the violation area can be one or more layers.

[0129] For example, for areas within the range of 10um*10um where the number of DRC violations of the bottom layer or adjacent metal layer exceeds 1000, the reasons for the large number of DRC violations at these locations can be analyzed, such as incorrect unit placement direction, lack of filling units, or local winding difficulties due to blockage, etc. These areas are defined as fictitious modules of the first type of data structure, and the name of the module is the cause of the error.

[0130] It should be understood that when pre-analyzing the DRC results, it is not necessary to know the module to which each DRC result belongs. The cause analysis can be performed only on the area where the number of DRC results is large and concentrated, thereby defining at least one virtual module.

[0131] S402: Establish a multi-branch tree of inclusion relationships according to the modules in the hierarchical physical design results and the virtual modules.

[0132] The virtual module can be inside a module in the hierarchical physical design result as a submodule of the module. Based on the inclusion relationship between the virtual module and the module in the hierarchical physical design result, and the inclusion relationship between the modules in the hierarchical physical design result, a multi-branch tree of inclusion relationships can be established.

[0133] The following is a further explanation of establishing a multi-branch tree of inclusion relationships based on the modules in the hierarchical physical design results and the virtual modules. Figure 5 As shown, the above step S402 includes:

[0134] S501: Take the top-level module as a parent node, determine the first module included in the top-level module, and take the first module included in the top-level module as the first child node of the parent node.

[0135] The first module included in the top-level module may be a submodule included in the top-level module. The top-level module may include at least one submodule, and the submodule may be a module of the hierarchical physical design result or a virtual module determined in the above step S401.

[0136] It should be understood that the modules in the hierarchical physical design result are arranged in order of hierarchy, and by traversing the modules in the hierarchical physical design result from the top module layer by layer, the submodules of the top module can be determined based on the hierarchical relationship, position and physical layer information contained between the modules in the hierarchical physical design result. Specifically, all modules can be traversed layer by layer from top to bottom, and if the area and physical layer where the currently traversed module is located are included in the area and physical layer where the previous module is located, the current module can be used as a submodule of the previous module.

[0137] For example, refer to Figure 2 The top-level module is Top. Starting from the top-level module, traversing downward, if the module of the next level is located inside the top-level module area and the physical layer contained in the module is within the physical layer contained in the top-level module, then the module can be used as a submodule of the top-level module. Figure 2Top includes submodules blockA, blockB and virtual module a, so submodules blockA, blockB and virtual module a can be used as the first module included in the top-level module Top, and blockA, blockB and a can be used as the first child nodes of node 1 in the multi-branch tree.

[0138] S502: Take the first child node as a new parent node, determine the second module included in the module represented by the new parent node, and take the second module as a second child node of the new parent node.

[0139] After determining the first child node, the first child node can be used as a new parent node, and the modules in the hierarchical physical design result are traversed layer by layer, and the second module included in the module of the first child node is determined based on the location of the module and the physical layer included in the module.

[0140] If the module represented by the first child node does not contain the second module, for example Figure 2 The virtual module a in is a submodule of the top-level Top module. After the virtual module a is determined as the new parent node, the hierarchical physical design results are traversed to determine that the virtual module a has no submodules, and the virtual module a becomes a leaf node in the multi-branch tree.

[0141] Continue to refer to Figure 2 , the top-level Top module includes a submodule blockB. After adding node 3 representing blockB as the first child node to the multi-branch tree, the modules at the next level of module blockB in the hierarchical physical design results can be traversed to obtain submodule c of blockB, and submodule c is used as the second module, and node 7 representing module c is used as a second child node of blockB in the multi-branch tree.

[0142] S503, take the second child node as the new parent node, and repeat the above steps of determining the second module contained in the module represented by the new parent node, and taking the second module as the second child node of the new parent node, until all modules are added to the multi-branch tree, and take the obtained multi-branch tree as the inclusion relationship multi-branch tree.

[0143] All modules in the hierarchical physical design results are traversed hierarchically, and the inclusion relationship between the modules is determined in turn based on the location of the modules and the physical layers contained in the modules, and the modules are added as nodes to the inclusion relationship multitree. After all modules in the hierarchical physical design results are added to the multitree, the final multitree is used as the inclusion relationship multitree.

[0144] In another implementation, when traversing the modules in the hierarchical physical design results, if the module represented by the currently determined second child node does not contain a sub-module in the hierarchical physical design results, it can be considered that all modules have been added to the multi-branch tree. At this time, the obtained multi-branch tree can be used as an inclusion relationship multi-branch tree.

[0145] After obtaining the inclusion relationship multitree, we can traverse the inclusion relationship multitree based on the depth-first strategy to obtain the module list, such as Figure 6 As shown, the above step S102 includes:

[0146] S601, traverse the inclusion relationship multitree starting from the initial leaf node, and take the initial leaf node, the sibling nodes of the initial leaf node, and the parent node of the initial leaf node as list elements of the module list.

[0147] The initial leaf node may be the leftmost or rightmost leaf node in the inclusion relationship multitree. The sibling node of the initial leaf node may be the same node as the parent node of the initial leaf node. If the initial leaf node includes multiple sibling nodes, each sibling node may be output in sequence starting from the initial leaf node according to the arrangement order of the nodes in the inclusion relationship multitree.

[0148] Reference Figure 3 , the initial leaf node can be the leftmost node 5 at the bottom layer. The module b represented by node 5 is used as the first list element of the module list, and blockA_1 represented by node 6, the sibling node of node 5, and blockA represented by node 2, the parent node of node 5, are output as the second list element and the third list element respectively.

[0149] S602: Take the child node at the same level as the initial leaf node as the first child node, traverse the inclusion relationship multi-branch tree starting from the first child node, and take the first child node, the sibling node of the first child node, and the parent node of the first child node as the list elements of the module list.

[0150] If the initial leaf node includes multiple nodes at the same level, the next adjacent child node at the same level of the initial leaf node that is not output as a list element can be used as the first child node in a preset order. Figure 3 , the initial leaf node is node 5, the first child node can be the next unoutputted node of the same level, node 7, and node 7 is taken as the first child node. Since node 7 has no sibling nodes, node 7 and module blockB represented by node 7's parent node node 3 are output in sequence as list elements.

[0151] If the initial leaf node has no child node at the same level that is not output as a list element, the node at the adjacent previous level in the inclusion relationship multitree that is not output as a list element can be used as the first child node according to the preset traversal order.

[0152] S603, taking the child node at the same level as the initial leaf node and the first child node as the new first child node, and repeating the step of traversing the inclusion relationship multi-branch tree starting from the first child node until the first child node has no child nodes at the same level, and taking the parent node of the initial leaf node as the new first child node.

[0153] S602 - S603 are repeatedly executed until all nodes in the inclusion relationship multitree are output as list elements of the module list.

[0154] Continue to refer to Figure 3 After outputting node 7 and the module blockB represented by the parent node of node 7 as list elements, it is possible to determine the nodes at the same level as node 5 and node 7 that are not output as list elements. If there are child nodes that are not output as list elements, the child nodes are used as the new first child nodes.

[0155] Figure 3 If there are no unoutput nodes at the same level as node 5 and node 7, node 2, the parent node of node 5, can be used as the new first child node, and the sibling nodes of the first child node can be determined to include nodes 3 and 4. Since node 3 has been output as a list element, area a represented by node 4 is output as the next list element of blockB, and the module represented by the parent node of node 2 is output as the next list element of a.

[0156] If the node currently being output is the root node in the inclusion relationship multitree, the output of all nodes in the inclusion relationship multitree is completed, and the final output result is used as the module list.

[0157] The following is a further explanation of determining the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module based on the module list and the multi-branch tree of the inclusion relationship, such as Figure 7 As shown, the above step S103 includes:

[0158] S701. Match the DRC result with the list elements in the module list according to a preset order to determine the target module corresponding to the DRC result, where the target module is the module represented by the list element matched by the DRC result.

[0159] Optionally, the DRC result may be matched with the list elements one by one from the bottom layer to the top layer. If the DRC result matches the module represented by the current list element, the module represented by the current list element may be used as the target module corresponding to the DRC result.

[0160] In the first implementation, the target module that matches the DRC result may be a module that matches the position of the DRC result. Specifically, the coordinate position of the DRC result may be inside the target module. Figure 2 The DRC result represented by the "X" symbol in is matched one by one with the elements in the module list {b, blockA_l, blockA, c, blockB, a, top}. When blockA_l is matched, since the position coordinates of the DRC result "X" are inside blockA_l, blockA_l can be used as the target module of the DRC result "X".

[0161] In the second implementation, the name of the DRC result can also be matched with each module in the module list. The name of the DRC result generally includes the physical layer where the DRC result occurs. By matching the physical layer included in the DRC result name with the physical layer included in the module, the module containing all the physical layers of the DRC result can be used as the target module. Figure 2 The DRC result represented by the "X" symbol in the figure is matched one by one with the elements in the module list {b, blockA_l, blockA, c, blockB, a, top}. When blockA_l is matched, the physical layer blockA_l module of the DRC result "X" is included, so blockA_l can be used as the target module of the DRC result "X".

[0162] S702: Determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the top-level position coordinates indicated by the DRC result, the target module and the inclusion relationship multi-branch tree.

[0163] It is worth noting that what is determined in the above step S701 is only an initial target module, for example Figure 2 Based on the above S701 step, blockA_1 can be used as an initial target module. However, as a submodule of blockA, blockA_1 has a containment relationship in both the physical layer and the position coordinates, so the DRC result "X" may also be in the blockA module. Therefore, starting from the target module based on the top-level position coordinates indicated by the DRC result, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module can be determined based on the layer-by-layer mapping of the multi-tree of the containment relationship.

[0164] The following is a further description of the second implementation method of matching the DRC result with the list elements in the module list according to a preset order to determine the target module corresponding to the DRC result. Figure 8 As shown, the above step S701 includes:

[0165] S801. Starting from the first list element in the module list, read each list element in turn, and for the current list element read, perform character matching between the name of the current list element and the name of the DRC result.

[0166] S802: If the matching degree between the name of the current list element and the name of the DRC result is greater than a preset threshold, the module indicated by the current list element is used as the target module; otherwise, the next list element of the current list element is read.

[0167] The DRC result may include the physical layer information contained in the DRC result, and the name of the list element may also include the physical layer information contained in the module. By matching the name of the DRC result with the name of the list element, the module containing the DRC physical layer information can be determined as the target module of the DRC result.

[0168] If the matching degree between the name of the current list element and the name of the DRC result is greater than a preset threshold, the module represented by the current list element can be used as the target module of the DRC result. If the matching degree between the name of the current list element and the name of the DRC result is less than or equal to the preset threshold, continue to read the next list element and execute the above step S801. If the matching degree between the name of the current list element and the name of the DRC result is still less than or equal to the preset threshold when comparing to the last list element, the target module of the DRC result is determined as the top-level module.

[0169] After determining the target module, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module can be determined according to the top-level position coordinates indicated by the DRC result, the target module, and the multi-branch tree of the inclusion relationship, such as Fig. 9 As shown, the above step S702 includes:

[0170] S901. Map the top-level position coordinates layer by layer according to the position level of the target module in the inclusion relationship multitree to obtain the candidate position coordinates of the top-level position coordinates in the target module.

[0171] The top-level position coordinates refer to the position coordinates of the DRC result in the top-level module. By performing coordinate mapping on the position coordinates of the DRC result at the top level, the position coordinates of the DRC result in the module can be obtained.

[0172] As a possible implementation method, after determining the position level of the target module in the inclusion relationship multitree, the top-level position coordinates can be mapped to the target module. For example, the lower left corner of the top-level module can be used as the coordinate origin of the top-level coordinate system, and the lower left corner of the target module can be used as the coordinate origin of the target coordinate system. The position coordinates of the coordinate origin of the target coordinate system in the top-level coordinate system are determined, and a mapping relationship between the target coordinate system and the top-level coordinate system is established. Then, based on the mapping relationship, the top-level position coordinates are mapped to the target module to obtain the candidate position coordinates of the top-level position coordinates in the target module.

[0173] S902 : Determine whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module according to the boundary information of the target module and / or the wiring level of the target module.

[0174] Optionally, the wiring level of the target module may be a physical layer through which the devices and metal routing of the target module pass. The DRC result includes the physical level where the DRC result is located. Based on the physical level of the DRC result and the wiring level of the target module, it can be further determined whether the DRC result is located in the target module.

[0175] The boundary information of the target module may be the position coordinates of a preset point on the boundary of the target module, which is used to indicate the area occupied by the target module in the hierarchical physical design result. As an example, the boundary information of the target module may be the coordinate information of the boundary line of the plane area occupied by the target module in the top view of the hierarchical physical design result. The wiring level of the target module may indicate the physical layer contained in the target module.

[0176] S903: If yes, use the selected position coordinates as the position coordinates of the DRC result in the target module.

[0177] In the first implementation, whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module can be determined based on the boundary information of the target module. If the candidate position coordinates are within the area occupied by the target module, the candidate position coordinates are used as the position coordinates of the DRC result in the target module.

[0178] In the second implementation, it can be determined whether to use the selected position coordinates as the position coordinates of the DRC result in the target module based on the boundary information of the target module and the wiring level of the target module. If the selected position coordinates are inside the area occupied by the target module, and the wiring level of the target module includes the wiring level of the DRC result, the selected position coordinates can be used as the position coordinates of the DRC result in the target module.

[0179] In the third implementation, it can also be determined based on the wiring level of the target module whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module. If the wiring level of the target module includes the wiring level of the DRC result, the candidate position coordinates can be used as the position coordinates of the DRC result in the target module.

[0180] S904. If not, re-determine the new target module according to the position level of the target module in the inclusion relationship multi-tree, and determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multi-tree.

[0181] If the candidate position coordinates are not used as the position coordinates of the DRC result in the target module, it means that the DRC result does not belong to the target module at this time. Then, according to the position level of the target module in the inclusion relationship multi-tree, the module corresponding to the parent node of the target module in the inclusion relationship multi-tree can be used as the new target module, and the top-level position coordinates of the DRC result can be mapped to the new target module to obtain the candidate position coordinates of the DRC result in the new target module, and determine whether to use the new target module as the target module that the DRC result finally corresponds to based on the wiring level of the new target module, the boundary information of the new target module and the candidate position coordinates.

[0182] Reference Figure 3 As shown in the inclusion relationship multi-branch tree, if the target module determined based on the above steps S801-S802 is module b, after mapping the top-level position coordinates of the DRC result to module b, it is determined that the DRC result is not in module b based on the boundary information of module b, the wiring level of module b, and the candidate position coordinates (x1, y1) of the DRC result mapped to module b, then it can be determined according to Figure 3 The inclusion relationship multi-branch tree shown takes the module blockA corresponding to the parent node of module b as the new target module, and determines whether to use the candidate position coordinates as the target module of the DRC result based on the boundary information of module blockA, the wiring level of module blockA and the candidate position coordinates (x2, y2) mapped to the DRC result of module blockA. If so, the target module of the DRC result is determined to be module blockA, and the position coordinates (x2, y2) of the DRC result in module blockA are recorded.

[0183] It is worth noting that if the top-level position coordinates of the DRC results are mapped to the root node layer by layer based on the inclusion relationship multi-branch tree, and the target module of the DRC results and the position coordinates of the DRC results in the target module have not been determined, the DRC results can be classified into the top-level module.

[0184] The following is a further description of another implementation method of mapping the top-level position coordinates layer by layer according to the position level of the target module in the inclusion relationship multitree to obtain the candidate position coordinates of the top-level position coordinates in the target module. The above step S901 includes:

[0185] According to the position level of the target module in the multi-branch tree of the inclusion relationship, the top-level position coordinates are used as input parameters of the recursive module, and the candidate position coordinates of the top-level position coordinates in the target module are obtained by recursive mapping layer by layer through the recursive module.

[0186] The recursive module may be a recursive function, and the recursive module includes the relative position relationship between the modules and the inclusion relationship between the modules. After the top-level position coordinates are input as input parameters into the recursive module, the recursive module may map the top-level position coordinates to the target module based on the relative position relationship between the top-level module and the target module, and obtain the candidate position coordinates of the DRC result in the target module.

[0187] If the candidate position coordinates are not used as the position coordinates of the DRC result in the target module, the current candidate position coordinates can be used as the input parameters of the recursive module, and the recursive module will continue to recursively map the current candidate position coordinates to the next module of the current target module. The next module can be the module represented by the parent node of the current target module in the inclusion relationship multi-branch tree.

[0188] The following is a further explanation of the above-mentioned determination of whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module according to the boundary information of the target module and / or the wiring level of the target module, such as Fig.10 As shown, the above step S902 includes:

[0189] S1001. Determine whether the coordinates of the to-be-selected position are within the area surrounded by the boundary information.

[0190] S1002, if yes, determine whether the wiring level indicated by the DRC result matches the wiring level of the target module, and if yes, use the to-be-selected position coordinates as the position coordinates of the DRC result in the target module.

[0191] The wiring level indicated by the DRC result matches the wiring level of the target module, and the wiring level of the target module may include the wiring level indicated by the DRC result.

[0192] If the coordinates of the selected position are within the area surrounded by the boundary information, the wiring level indicated by the DRC result can be compared with the wiring level of the target module to see if they match. Exemplarily, assuming that the wiring level of the DRC result includes: physical layer 1, physical layer 2, and physical layer 3, and the wiring level of the target module includes physical layer 1, physical layer 2, physical layer 3, and physical layer 4, at this time, the wiring level of the target module includes the wiring level of the DRC result, then the coordinates of the selected position can be used as the position coordinates of the DRC result in the target module.

[0193] In another example, if the wiring levels of the DRC result include: physical layer 1, physical layer 2 and physical layer 3, and the wiring levels of the target module include physical layer 2, physical layer 3 and physical layer 4, the target module does not include "physical layer 1" of the DRC result. At this time, the candidate position coordinates are not used as the position coordinates of the DRC result in the target module, and the module represented by the parent node of the target module is required to be used as the new target module based on the inclusion relationship multi-branch tree, and the top-level position coordinates of the DRC result are mapped to the new target module to obtain new candidate position coordinates, and continue to determine whether to use the new candidate position coordinates as the position coordinates of the DRC result on the target module.

[0194] The following is a further explanation of the above-mentioned re-determining a new target module according to the position level of the target module in the inclusion relationship multi-tree, and determining the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multi-tree, such as Fig.11 As shown, the above step S904 includes:

[0195] S1101, determine the current node corresponding to the target module in the inclusion relationship multitree.

[0196] S1102: The parent node of the current node is used as a candidate node, and the module corresponding to the candidate node is used as a new target module.

[0197] As an example, if the target module is module b, refer to Figure 3 , the current node corresponding to module b in the inclusion relationship multitree is node b. At this time, the parent node of node b can be Figure 3 The node blockA in is taken as the candidate node, and the module blockA represented by the node blockA is taken as the new target module.

[0198] S1103 , according to the position level of the candidate node in the inclusion relationship multi-branch tree, the top-level position coordinates are mapped layer by layer to obtain the intermediate position coordinates of the top-level position coordinates in the new target module.

[0199] In the first implementation, the top-level position coordinates can be directly mapped to the new target module to obtain the middle position coordinates of the top-level position coordinates in the new target module. The mapping method can be based on a recursive module or construct a coordinate mapping relationship between the new target module and the top-level module and perform coordinate mapping. For example, after using module blockA as the new target module, the top-level position coordinates of the DRC result can be mapped to module blockA to obtain the middle position coordinates of the DRC result in module blockA.

[0200] In the second implementation, the candidate position coordinates in the target module in S1101 can be mapped to the new target module to obtain the middle position coordinates of the top position coordinates in the new target module. Exemplarily, after module blockA is used as the new target module, the candidate position coordinates of the DRC result in module b can be further mapped to module blockA to obtain the middle position coordinates of the DRC result in module blockA.

[0201] S1104 . Determine whether to use the intermediate position coordinates as the position coordinates of the DRC result in the new target module according to the boundary information of the new target module and / or the wiring level of the new target module.

[0202] S1105 , if yes, use the intermediate position coordinates as the position coordinates of the DRC result in the new target module.

[0203] If the boundary information of the new target module indicates that the middle position coordinates of the DRC result are within the area occupied by the target module, or the wiring level of the DRC result is included in the wiring level of the new target module, or the middle position coordinates of the DRC result are within the area occupied by the target module and the wiring level of the DRC result is included in the wiring level of the new target module, then the middle position coordinates can be used as the position coordinates of the DRC result in the new target module.

[0204] If the boundary information of the new target module indicates that the middle position coordinates of the DRC result are not within the area occupied by the target module, further judgment is not required on the wiring level of the target module and the DRC result, and the new target module is determined based on the inclusion relationship multi-branch tree. The steps for determining the new target module are the same as the above-mentioned S1101-S1103 steps, and are not elaborated in this application.

[0205] After all DRC results are classified into corresponding target modules and the position coordinates of each DRC result in the target module are obtained, the results of DRC classification can be output as a table so that the corresponding engineering personnel can handle the DRC violations of each module. Exemplarily, the following Table 1 is an example of the results obtained by DRC classification based on the method of the present application. Referring to Table 1, the method of the present application can sort the DRC results into corresponding modules and mark the number of DRCs of each module so that the engineering personnel handling the corresponding module can locate and repair the DRC results in a timely manner.

[0206] Table 1 Example of DRC sorting results

[0207] Module Name DRC Name count Total count DRC file path Top E1 3 8 Top.out blockA E1 2 8 blockA.out blockB E1 2 8 blockB.out

[0208] Fig.12 The structure diagram of a chip design rule checking result processing device provided by an embodiment of the present application is shown. Fig.12 The device includes an establishing module 1201, a traversing module 1202 and a determining module 1203.

[0209] Establishing module 1201, including establishing a multi-branch tree of inclusion relationship according to the structure of the chip, the multi-branch tree of inclusion relationship is used to represent the inclusion relationship between the modules in the chip, the root node of the multi-branch tree of inclusion relationship is the top module of the chip, and the child nodes of each node in the multi-branch tree of inclusion relationship are the modules included in the module corresponding to the node;

[0210] A traversal module 1202 is used to traverse the inclusion relationship multitree based on a depth-first strategy to obtain a module list, wherein the list elements in the module list are used to represent each module in the chip, and each list element is arranged from the bottom layer to the top layer according to the hierarchical order of the modules in the chip;

[0211] The determination module 1203 is used to determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the module list and the inclusion relationship multi-branch tree.

[0212] As a possible implementation, the establishment module 1201 is specifically used for:

[0213] Pre-analyze the hierarchical physical design results, determine at least one violation region with DRC violation, and treat each violation region as a virtual module;

[0214] A multi-branch tree of inclusion relationships is established based on the modules in the hierarchical physical design results and the virtual modules.

[0215] As a possible implementation, the establishment module 1201 is specifically used for:

[0216] Taking the top-level module as the parent node, determining the first module included in the top-level module, and taking the first module included in the top-level module as the first child node of the parent node;

[0217] Taking the first child node as a new parent node, determining a second module included in the module represented by the new parent node, and taking the second module as a second child node of the new parent node;

[0218] The second child node is used as the new parent node, and the above steps of determining the second module contained in the module represented by the new parent node and using the second module as the second child node of the new parent node are repeated until all modules are added to the multi-branch tree, and the obtained multi-branch tree is used as the inclusion relationship multi-branch tree.

[0219] As a possible implementation, the traversal module 1202 is specifically used for:

[0220] A. Traverse the inclusion relationship multitree starting from the initial leaf node, and take the initial leaf node, the sibling nodes of the initial leaf node, and the parent node of the initial leaf node as the list elements of the module list;

[0221] B. Take the child node of the same level as the initial leaf node as the first child node, traverse the inclusion relationship multi-branch tree starting from the first child node, and take the first child node, the sibling node of the first child node, and the parent node of the first child node as the list elements of the module list;

[0222] C. Take the child node at the same level as the initial leaf node and the first child node as the new first child node, and repeat the step of traversing the inclusion relationship multi-branch tree starting from the first child node until the first child node has no child nodes at the same level, and take the parent node of the initial leaf node as the new first child node;

[0223] D. Repeat steps B to C until all nodes in the inclusion relationship multitree are output as list elements of the module list.

[0224] As a possible implementation manner, the determination module 1203 is specifically configured to:

[0225] Matching the DRC result with the list elements in the module list in a preset order, and determining the target module corresponding to the DRC result, where the target module is the module represented by the list element matched by the DRC result;

[0226] According to the top-level position coordinates, the target module and the inclusion relationship multi-tree indicated by the DRC result, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module are determined.

[0227] As a possible implementation manner, the determination module 1203 is specifically configured to:

[0228] Starting from the first list element in the module list, read each list element in turn, and for the current list element read, perform character matching between the name of the current list element and the name of the DRC result;

[0229] If the matching degree between the name of the current list element and the name of the DRC result is greater than a preset threshold, the module indicated by the current list element is used as the target module, otherwise, the next list element of the current list element is read.

[0230] As a possible implementation manner, the determination module 1203 is specifically configured to:

[0231] According to the position level of the target module in the inclusion relationship multitree, the top-level position coordinates are mapped layer by layer to obtain the candidate position coordinates of the top-level position coordinates in the target module;

[0232] Determine whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module according to the boundary information of the target module and / or the wiring level of the target module;

[0233] If yes, the coordinates of the candidate position are used as the coordinates of the position of the DRC result in the target module;

[0234] If not, then re-determine the new target module based on the position level of the target module in the inclusion relationship multi-tree, and determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module based on the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multi-tree.

[0235] As a possible implementation manner, the determination module 1203 is specifically configured to:

[0236] According to the position level of the target module in the multi-branch tree of the inclusion relationship, the top-level position coordinates are used as input parameters of the recursive module, and the candidate position coordinates of the top-level position coordinates in the target module are obtained by recursive mapping layer by layer through the recursive module.

[0237] As a possible implementation manner, the determination module 1203 is specifically configured to:

[0238] Determine whether the coordinates of the selected position are within the area surrounded by the boundary information;

[0239] If so, determine whether the wiring level indicated by the DRC result matches the wiring level of the target module. If so, use the candidate position coordinates as the position coordinates of the DRC result in the target module.

[0240] As a possible implementation manner, the determination module 1203 is specifically configured to:

[0241] Determine the current node corresponding to the target module in the inclusion relationship multitree;

[0242] The parent node of the current node is used as the candidate node, and the module corresponding to the candidate node is used as the new target module;

[0243] According to the position level of the candidate node in the inclusion relationship multi-branch tree, the top-level position coordinates are mapped layer by layer to obtain the middle position coordinates of the top-level position coordinates in the new target module;

[0244] Determine whether to use the intermediate position coordinates as the position coordinates of the DRC result in the new target module according to the boundary information of the new target module and / or the wiring level of the new target module;

[0245] If so, the intermediate position coordinates are used as the position coordinates of the DRC result in the new target module.

[0246] The embodiment of the present application constructs a multi-branch tree of inclusion relationships that characterizes the inclusion relationships between modules and DRC violation regions according to the hierarchical physical design results, generates a module list based on the multi-branch tree of inclusion relationships, and finally sorts the DRC results based on the module list and the multi-branch tree of inclusion relationships. Since the module list is generated based on a depth-first strategy, and the multi-branch tree of inclusion relationships can characterize the inclusion relationships between modules, when the user sorts the DRC results, he only needs to input the location coordinates of the DRC results, and the electronic device can sort from the bottom to the top based on the method of the present application according to the inclusion relationship between the modules based on a strategy of limited depth, thereby avoiding the bottom DRC results from being incorrectly sorted to a high level, thereby ensuring that the sorting results are not repeated or omitted, and improving the accuracy and efficiency of DRC automatic sorting. And when the layout of the chip changes, it is only necessary to change the module information that has changed, so it also has good flexibility in the design process.

[0247] Fig.13 A structural schematic diagram of an electronic device 130 provided in an embodiment of the present application is shown, comprising: a processor 1301, a storage medium 1302 and a bus 1303, wherein the storage medium 1302 stores machine-readable instructions executable by the processor 1301, and when the electronic device runs the clock tree synthesis method as in the embodiment, the processor 1301 communicates with the storage medium 1302 via the bus 1303, and the processor 1301 executes the machine-readable instructions, and the processor 1301 executes the preamble of the method item to execute the steps in the method for processing the chip design rule check results as described above.

[0248] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon. The computer program is executed when a processor is running, and the processor executes the steps in the method for processing chip design rule check results as described above.

[0249] In the embodiment of the present application, the computer program can also execute other machine-readable instructions when run by the processor to execute other methods described in the embodiment. For the specific execution method steps and principles, please refer to the description of the embodiment, which will not be repeated here.

[0250] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0251] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0252] In addition, each functional unit in the embodiments provided in the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0253] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0254] It should be noted that similar numbers and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description and are not to be understood as indicating or implying relative importance.

[0255] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-mentioned embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-mentioned embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application. They should all be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A method for processing chip design rule checking results, characterized in that: include: Establishing an inclusion relationship multi-branch tree according to the hierarchical physical design result, wherein the inclusion relationship multi-branch tree is used to characterize the inclusion relationship between each module in the hierarchical physical design result and the violation region with DRC violation, wherein the root node of the inclusion relationship multi-branch tree is the top-level module of the chip, and the child nodes of each node in the inclusion relationship multi-branch tree are each module included in the module corresponding to the node; Traversing the inclusion relationship multitree based on a depth-first strategy to obtain a module list, wherein the list elements in the module list are respectively used to represent each module in the hierarchical physical design result, and each of the list elements is arranged from the bottom layer to the top layer according to the hierarchical order of the modules included in the chip; According to the module list and the inclusion relationship multitree, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module are determined.

2. The method according to claim 1, characterized in that: The step of establishing a multi-branch tree of inclusion relationships according to the hierarchical physical design results includes: Pre-analyzing the hierarchical physical design results, determining at least one violation region with a DRC violation, and using each of the violation regions as a virtual module; The inclusion relationship multi-branch tree is established according to the modules in the hierarchical physical design result and the virtual modules.

3. The method according to claim 2, characterized in that The step of establishing the inclusion relationship multitree according to the modules in the hierarchical physical design result and the virtual modules comprises: Taking the top-level module as a parent node, determining the first module included in the top-level module, and taking the first module included in the top-level module as the first child node of the parent node; Taking the first child node as a new parent node, determining a second module included in the module represented by the new parent node, and taking the second module as a second child node of the new parent node; The second child node is used as the new parent node, and the above steps of determining the second module included in the module represented by the new parent node and using the second module as the second child node of the new parent node are repeated until all modules are added to the multi-branch tree, and the obtained multi-branch tree is used as the inclusion relationship multi-branch tree.

4. The method according to claim 1, characterized in that: The inclusion relationship multitree is traversed based on the depth-first strategy to obtain a module list, including: A. Traverse the inclusion relationship multitree starting from an initial leaf node, and use the initial leaf node, the sibling nodes of the initial leaf node, and the parent node of the initial leaf node as list elements of the module list; B. Taking a child node at the same level as the initial leaf node as the first child node, traversing the inclusion relationship multi-branch tree starting from the first child node, and taking the first child node, the brother node of the first child node, and the parent node of the first child node as the list elements of the module list; C. Taking a child node at the same level as the initial leaf node and the first child node as a new first child node, and repeatedly executing the step of traversing the inclusion relationship multi-branch tree starting from the first child node until the first child node has no child nodes at the same level, and taking the parent node of the initial leaf node as the new first child node; D. Repeat steps B to C until all nodes in the inclusion relationship multitree are output as list elements of the module list.

5. The method according to claim 1, characterized in that The determining, according to the module list and the inclusion relationship multitree, a target module corresponding to the DRC result and a position coordinate of the DRC result in the target module includes: Matching the DRC result with the list elements in the module list in a preset order, and determining a target module corresponding to the DRC result, wherein the target module is a module represented by the list element matched by the DRC result; According to the top-level position coordinates indicated by the DRC result, the target module and the inclusion relationship multi-branch tree, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module are determined.

6. The method according to claim 5, characterized in that The matching the DRC result with the list elements in the module list in a preset order to determine the target module corresponding to the DRC result includes: Starting from the first list element in the module list, read each list element in turn, and for the current list element read, perform character matching between the name of the current list element and the name of the DRC result; If the matching degree between the name of the current list element and the name of the DRC result is greater than a preset threshold, the module indicated by the current list element is used as the target module; otherwise, the next list element of the current list element is read.

7. The method according to claim 5, characterized in that The determining, according to the top-level position coordinates indicated by the DRC result, the target module and the inclusion relationship multitree, the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module comprises: According to the position level of the target module in the inclusion relationship multitree, the top-level position coordinates are mapped layer by layer to obtain the candidate position coordinates of the top-level position coordinates in the target module; Determine whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module according to the boundary information of the target module and / or the wiring level of the target module; If yes, the selected position coordinates are used as the position coordinates of the DRC result in the target module; If not, then re-determine a new target module based on the position level of the target module in the inclusion relationship multi-tree, and determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module based on the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multi-tree.

8. The method according to claim 7, characterized in that The mapping of the top-level position coordinates layer by layer according to the position level of the target module in the inclusion relationship multitree to obtain the candidate position coordinates of the top-level position coordinates in the target module includes: According to the position level of the target module in the inclusion relationship multitree, the top-level position coordinates are used as input parameters of the recursive module, and the recursive module recursively maps the top-level position coordinates layer by layer to obtain the candidate position coordinates in the target module.

9. The method according to claim 7, characterized in that: The determining, according to the boundary information of the target module and / or the wiring level of the target module, whether to use the candidate position coordinates as the position coordinates of the DRC result in the target module includes: Determine whether the coordinates of the to-be-selected position are within the area surrounded by the boundary information; If so, determine whether the wiring level indicated by the DRC result matches the wiring level of the target module. If so, use the to-be-selected position coordinates as the position coordinates of the DRC result in the target module.

10. The method according to claim 7, characterized in that The step of re-determining a new target module according to the position level of the target module in the inclusion relationship multitree, and determining the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the top-level position coordinates indicated by the DRC result, the new target module and the inclusion relationship multitree, includes: Determine a current node corresponding to the target module in the inclusion relationship multitree; The parent node of the current node is used as a candidate node, and the module corresponding to the candidate node is used as a new target module; According to the position level of the candidate node in the inclusion relationship multi-branch tree, the top-level position coordinates are mapped layer by layer to obtain the intermediate position coordinates of the top-level position coordinates in the new target module; Determine whether to use the intermediate position coordinates as the position coordinates of the DRC result in the new target module according to the boundary information of the new target module and / or the wiring level of the new target module; If so, the intermediate position coordinates are used as the position coordinates of the DRC result in the new target module.

11. A chip design rule checking result processing device, characterized in that: include: Establishing a module, including establishing an inclusion relationship multi-branch tree according to the structure of the chip, wherein the inclusion relationship multi-branch tree is used to characterize the inclusion relationship between the modules in the chip, the root node of the inclusion relationship multi-branch tree is the top-level module of the chip, and the child nodes of each node in the inclusion relationship multi-branch tree are the modules included in the module corresponding to the node; A traversal module, used for traversing the inclusion relationship multitree based on a depth-first strategy to obtain a module list, wherein the list elements in the module list are respectively used to represent each module in the chip, and each of the list elements is arranged from the bottom layer to the top layer according to the hierarchical order of the modules in the chip; A determination module is used to determine the target module corresponding to the DRC result and the position coordinates of the DRC result in the target module according to the module list and the inclusion relationship multi-branch tree.

12. An electronic device, characterized in that: include: A processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the storage medium communicate through the bus, and the processor executes the machine-readable instructions to perform the steps of the method for processing chip design rule checking results as described in any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for processing chip design rule checking results as claimed in any one of claims 1 to 10 are executed.

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