Intelligent control relay driving power supply circuit and power battery

Abstract

The invention discloses an intelligent control relay driving power supply circuit and a power battery. The driving power supply circuit comprises a main negative relay adhesion detection circuit and a relay power supply circuit, wherein the main negative relay adhesion detection circuit comprises a main negative relay, an RC low-pass filter, an NMOS tube, an anti-reverse diode and an optocoupler switch; the relay power supply circuit comprises a D trigger chip, an AND gate integrated chip, a triode and a PMOS tube. The relay driving power supply circuit provided by the invention can realize adhesion self-inspection of the main negative relay, and realizes control of the relay driving power supply loop through a hardware circuit and software self-inspection according to a self-inspection result; when a relay fault or a negative electrode adhesion detection circuit fault occurs, a relay power supply loop can be effectively cut off, and relay closing caused by software errors is avoided logically from the circuit, so that a power battery high-voltage system is safely and effectively controlled, and dangerous working conditions such as short circuit, thermal runaway and large current impact of a high-voltage main loop are avoided.

Description

Technical Field

[0001] The invention relates to an intelligent control relay drive power supply circuit and a power battery, belonging to the technical field of power battery control. Background Art

[0002] Relays are widely used in the automotive industry. In the design of new energy electric vehicles, the power battery outputs high voltage by controlling the relay to close. With the improvement of automobile safety requirements, higher requirements are put forward for relay adhesion detection and control relay safe disconnection. Summary of the invention

[0003] The first object of the present invention is to provide an intelligent control relay drive power supply circuit, which realizes the on and off of the hardware circuit control relay drive power supply circuit according to the main negative relay control and the main negative adhesion detection results.

[0004] The second object of the present invention is to provide a power battery including the above-mentioned intelligent control relay drive power supply circuit.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows: In one aspect, the present invention provides an intelligent control relay drive power supply circuit, comprising a main negative relay adhesion detection circuit and a relay power supply circuit; The main negative relay adhesion detection circuit includes a main negative relay, an RC low-pass filter, an NMOS tube, an anti-reverse diode and an optocoupler switch; the RC low-pass filter is connected to a pin of the main negative relay through three anti-reverse diodes. The positive output end of the first anti-reverse diode is connected to the gate of the NMOS tube; the drain of the NMOS tube is connected to the input end of the optocoupler switch, and the output end of the optocoupler switch is connected to the relay power supply circuit; Performing a self-check on the adhesion of the main negative relay according to the closed state of the main negative relay and the voltage recovery signal of the RC low-pass filter; The relay power supply circuit includes a D flip-flop chip, an AND gate integrated chip, a transistor and a PMOS tube; the output pin of the optocoupler switch is connected to the input pin of the D flip-flop chip; the output end of the D flip-flop chip is connected to the input pin of the first AND gate integrated chip; the output pin of the first AND gate integrated chip is input to the input pin of the second AND gate integrated chip; the output pin of the second AND gate integrated chip is connected to the base of the transistor, and the collector of the transistor is connected to the gate of the PMOS tube; the source of the PMOS tube is connected to the power supply input voltage, and the drain of the MOS tube is connected to the relay power supply voltage; Another input pin of the D flip-flop chip and one input pin of the two AND gate integrated chips are both connected to the main negative relay drive enable signal; The relay drive power supply circuit is controlled according to the self-test result of the main negative relay adhesion detection circuit and the main negative relay drive enable signal.

[0006] Preferably, the output end of the positive electrode of the first anti-reverse diode is connected to the 5V voltage of the high-voltage module through the pull-up resistor R2 on the one hand, and is connected to the reference ground of the high-voltage module through the voltage-dividing resistor on the other hand; One end of the input end of the optocoupler switch is connected to the 5V voltage of the high-voltage module through a resistor R8, and the other end is connected to the drain of the NMOS tube. The source of the NMOS tube is connected to the module reference ground. On the one hand, the gate of the NMOS tube is connected to the voltage dividing resistor through a current limiting resistor R6, and on the other hand, the gate of the NMOS tube is connected to the high-voltage module reference ground through a pull-down resistor R7.

[0007] Preferably, a current limiting resistor R3 is provided between the third anti-reverse diode and the main negative relay; and the other pin of the main negative relay is connected to the high voltage ground of the power battery.

[0008] Preferably, one output pin of the optocoupler switch is connected to an input pin of the D trigger chip through a resistor R11 on the one hand, and is connected to a 5V voltage through a resistor R9 on the other hand; the other output pin of the optocoupler switch is connected to GND through a pull-down resistor R19.

[0009] Preferably, the emitter of the transistor is connected to GND, the collector of the transistor is connected to the gate of the PMOS tube through a current limiting resistor R12; the source of the PMOS tube is connected to the power supply input voltage through a voltage dividing resistor R14; a voltage dividing resistor R13 is connected in series between the gate and source of the PMOS tube; and the drain of the PMOS tube is connected to GND through voltage dividing resistors R16 and R18.

[0010] Preferably, a protective TVS is provided between the source and drain of the PMOS tube.

[0011] Preferably, a resistor R15 is provided between the power supply input voltage and the relay power supply voltage.

[0012] Preferably, the relay power supply circuit further includes a low-pass filter, and the low-pass filter is connected between the voltage-dividing resistors R16 and R18.

[0013] Preferably, the driving power supply mode of the driving power supply circuit includes: When the main negative relay is not closed or not adhered, the collected voltage is 1.4V through the RC low-pass filter, the NMOS is not conducting, the two pins of the output end of the optocoupler switch are not conducting, and the input pin 1 of the D flip-flop chip is high level; when the main negative relay drive enable signal is high level, the D flip-flop chip sets the output pin of the D flip-flop chip to high level when the input pin 2 changes from low level to high level; the two AND gate integrated core output pins are both high level, the transistor is saturated and turned on, so that the drain and source of the PMOS tube are turned on, so that the power supply input voltage is consistent with the power supply voltage output to the relay, providing voltage for the relay drive; when the relay drive is powered off, it is necessary to set the main negative relay drive enable signal to a low level and then perform a pulse flip; If the relay is not closed, the negative electrode adhesion detection circuit fails, causing the optocoupler switch to close, that is, the relay power supply voltage recovery signal detects that the voltage is low, and the D flip-flop chip input pin is low; when the main negative relay drive enable signal is high, the D flip-flop chip output pin is low, and the two AND gate integrated chip output pins are both low, the transistor T2 is cut off, so that the drain and source of the PMOS tube are not conducting, so that the power supply input voltage and the relay power supply voltage are not connected, and the relay driver provides a power supply voltage of 0V, which cannot drive the relay to close; If the relay is stuck, the negative electrode sticking detection circuit is normal, which causes the optocoupler switch to close, that is, the relay power supply voltage recovery signal detects that the voltage is low, and the D flip-flop chip input pin is low; when the main negative relay drive enable signal is high, the D flip-flop chip output pin is low, and the two AND gate integrated chip output pins are low, the transistor is cut off, so that the drain and source of the PMOS tube are not conducting, so that the power supply input voltage and the relay power supply voltage are not connected, and the relay driver provides a power supply voltage of 0V, which cannot drive the relay to close; If the relay is stuck, the negative electrode sticking detection circuit is abnormal, the NMOS and optocoupler switch are in the off state, that is, the input pin of the D flip-flop chip is at a high level; when the main negative relay drive enable signal is at a low level, the D flip-flop chip output is a low level, the first AND gate integrated chip output is a high level, and the second AND gate integrated chip output is a low level; the transistor is cut off, so that the drain and source of the PMOS tube are not conductive, so that the power supply input voltage and the relay power supply voltage are not connected, the relay drive provides a power supply voltage of 0V, and cannot drive the relay to close; when the main negative relay drive enable signal is at a high level, the relay power supply voltage recovery signal is used to detect whether the output pin of the optocoupler switch and the main negative relay drive enable signal level are both high and the time is greater than 1ms. If so, the main negative relay drive enable signal is set to a high level to cut off the drive relay power supply circuit.

[0014] On the other hand, the present invention provides a power battery relay drive circuit, including the above-mentioned intelligent control relay drive power supply circuit.

[0015] The beneficial effects of the present invention are: The relay drive power supply circuit provided by the present invention can realize self-check of main negative relay adhesion, and control the relay drive power supply circuit through hardware circuit and software according to the self-check result. When a relay failure or a negative electrode adhesion detection circuit failure occurs, the relay power supply circuit can be effectively cut off, thereby safely and effectively controlling the high-voltage system of the power battery and avoiding dangerous conditions such as short circuit, thermal runaway, and large current shock in the high-voltage main circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of a main negative relay adhesion detection circuit in an intelligent control relay drive power supply circuit provided by the present invention; Figure 2 A schematic diagram of a relay power supply circuit in the intelligent control relay drive power supply circuit provided by the present invention. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments and the accompanying drawings. Here, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but are not intended to limit the present invention.

[0018] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only structures and / or processing steps closely related to the solutions according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.

[0019] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, elements, steps or components, but does not exclude the presence or addition of one or more other features, elements, steps or components.

[0020] It should also be noted that, unless otherwise specified, the term “connection” herein may refer not only to a direct connection but also to an indirect connection with an intermediate.

[0021] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals represent the same or similar components, or the same or similar steps.

[0022] It should be emphasized here that the step marks mentioned below are not intended to limit the order of the steps, but it should be understood that the steps can be executed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be executed simultaneously.

[0023] The present invention provides an intelligent control relay drive power supply circuit, which is mainly divided into two parts: a main negative relay adhesion detection circuit and a relay power supply circuit, wherein the main negative relay adhesion detection circuit is a high-voltage module circuit part, and the relay power supply circuit is a low-voltage module circuit part.

[0024] See also Figure 1 In the present invention, the main negative relay adhesion detection circuit includes: a main negative relay (Relay NEG), an RC low-pass filter, an NMOS tube, an optocoupler switch, an anti-reverse diode and a current limiting resistor. Specifically, see Figure 1 The resistor R1 and the capacitor C1 are combined into an RC low-pass filter. The resistor R1 is connected to the anti-reverse diodes D1, D2 and D3 in sequence, and then connected to the pin 7 of the main negative relay RL1. The pin 6 of the main negative relay RL1 is connected to the module reference ground. The main negative relay rear end detection point harness is set at pin 7.

[0025] It should be noted that a current limiting resistor R3 is provided between the diode D3 and the main negative relay RL1 to prevent the negative voltage from impacting the diodes D2 and D3.

[0026] One branch of the positive electrode of the anti-reverse diode D1 is connected to the module 5V voltage through the pull-up resistor R2, and the other branch of the positive electrode of the anti-reverse diode D1 is connected to the reference ground of the high-voltage module through the resistors R4 and R5. The resistors R4 and R5 play a voltage dividing role.

[0027] The positive terminal of the light-emitting diode inside the optocoupler switch IC1 is connected to the module 5V voltage through the resistor R8, and the negative terminal is connected to the drain of the NMOS tube T1. The source of the NMOS tube T1 is connected to the reference ground of the high-voltage module. The gate of the NMOS tube T1 is connected between the resistor R4 and the resistor R5 through the resistor R6. The gate of the NMOS tube T1 is also connected to the reference ground of the high-voltage module through the resistor R7. The resistor R6 is used to limit the current to avoid impact on the NMOS tube T1, and the resistor R7 is used to stabilize the gate voltage of the NMOS tube T1.

[0028] When the NMOS tube T1 is turned on, the light emitting diode inside the optocoupler switch IC1 forms a loop, and the output terminals 6 and 4 of the optocoupler switch are turned on.

[0029] Based on the main negative relay adhesion detection circuit, whether the relay is adhered is determined by the different voltage states (5V, 1.4V) of the voltage sampling signal AN1 collected between the resistor R1 and the capacitor C1; when the main negative relay is adhered, the pins 6 and 7 of the main negative relay RL1 are in the on state, and the AN1 sampling voltage is 1.4V.

[0030] When the main negative relay RL1 is not closed, its pins 6 and 7 are disconnected. At this time, the anti-reverse diodes D1, D2, and R3 do not form a loop, and the voltage sampling signal AN1 collected between the resistor R1 and the capacitor C1 is a pull-up voltage 5VOCM_ISOD, that is, the AN1 sampling voltage is 5V. At this time, the R5 voltage division is greater than the gate-source pin turn-on voltage of the NMOS tube T1, the drain and source of the NMOS tube T1 are turned on, the optocoupler switch IC1 pins 1 and 2 form a loop, and the optocoupler switch IC1 pins 6 and 4 are turned on.

[0031] When the main negative relay RL1 is closed, its pins 6 and 7 are in the conducting state. At this time, the anti-reverse diodes D1, D2, and R3 form a loop, and the voltage sampled by the voltage sampling signal AN1 is the voltage drop of the diodes D2 and D3, that is, the AN1 sampling voltage is 1.4V. At this time, the R5 voltage division is less than the gate-source pin turn-on voltage of the NMOS tube T1, the drain and source of the NMOS tube T1 are not conducting, the optocoupler switch IC1 pins 1 and 2 do not form a loop, and the optocoupler switch IC1 pins 6 and 4 are not conducting.

[0032] See also Figure 2 In the present invention, the relay power supply module circuit includes: a low-pass filter, a D trigger chip IC2, an AND gate integrated chip IC3, an AND gate integrated chip IC4, a transistor T2, a PMOS tube T3, a protection TVS and a current limiting resistor, Specifically, see Figure 2 The output pin 6 of the optocoupler switch IC1 is connected to the input pin 1 of the D flip-flop chip IC2, the output pin 4 of the D flip-flop chip IC2 is connected to the input pin 1 of the AND gate integrated chip IC3, and the output pin 4 of the AND gate integrated chip IC3 is input to the input pin 1 of the AND gate integrated chip IC4.

[0033] The main negative relay driving enable signal Relay NEG EN is input to the input pin 2 of the D flip-flop chip IC2, the input pin 2 of the AND gate integrated chip IC3, and the input pin 2 of the AND gate integrated chip IC4.

[0034] The input pin 5 of the D flip-flop chip IC2 is connected to a 5V power supply, and the output pin 3 is connected to GND. The input pin 2 of the D flip-flop chip IC2 is connected to the negative relay drive enable signal. When the pin 2 changes from a low level to a high level, the level state of the input pin 1 of the D flip-flop chip IC2 is assigned to the output pin 4. Under other conditions, the state of the output pin 4 remains unchanged.

[0035] The output pin 4 of the AND gate integrated chip IC4 is connected to the base of the transistor T2, and the input pin 5 of the AND gate integrated chips IC3 and IC4 is connected to a 5V voltage. When the levels of pins 1 (B) and 2 (A) are the same, pin 4 (Y) outputs a 5V high level. When the levels of pins 1 (B) and 2 (A) are different, pin 4 (Y) outputs a 0V low level.

[0036] The emitter of the transistor T2 is connected to GND, the collector of the transistor T2 is connected to the gate of the PMOS tube T3 through the resistor R12, the source of the PMOS tube T3 is connected to the power input voltage Power input through the resistor R14, and the drain of the PMOS tube T3 is connected to the relay power supply voltage Power_Relay.

[0037] It should be noted that a resistor R13 is connected in series between the gate and source of the PMOS tube T3 , R12 is a current limiting resistor, and the voltage divider of R12 and R13 plays a role in controlling the voltage across the gate and source of T3 .

[0038] A protective TVS Z1 is provided between the source and drain of the PMOS tube T3 to prevent the reverse electromotive force of the relay coil from impacting the internal circuit. The drain of the PMOS tube T3 is connected to GND through resistors R16 and R18.

[0039] It should be noted that a resistor R15 is arranged between the power supply input voltage Power input and the relay power supply voltage Power_Relay to play the role of pull-up and current limiting, and R15, R16 and R18 form a voltage divider.

[0040] The resistor R17 and the capacitor C3 form a low-pass filter. In the low-pass filter, one end of the capacitor C3 is connected to GND, one end of the resistor R17 is connected to the capacitor C3, and the other end is connected between the resistors R18 and R16.

[0041] It should be noted that the output pin 4 of the optocoupler switch IC1 is also connected to GND through a resistor R19, the output pin 6 of the optocoupler switch IC1 is connected to a 5V voltage through a resistor R9, R9 is a pull-up resistor, and the output pin 6 of the optocoupler switch IC1 is connected to the input pin 1 of the D flip-flop chip IC2 through R11. The output pin 6 of the optocoupler switch IC1 is connected to the relay power supply voltage recovery signal MCU AN2 through R10, and R10 and C2 form a low-pass filter.

[0042] Based on the above relay drive power supply circuit, there are the following drive power supply situations: Case 1: When the main negative relay is not closed or not sticky, AN1 detects a voltage of about 1.4V, the voltage between the gate and source of NMOS T1 is less than the NMOS turn-on voltage, T1 is not conducting, the optocoupler switch IC1 pins 4 and 6 are not conducting, the pin 6 voltage is a pull-up voltage of 5V, and the D flip-flop chip IC2 input pin 1 is high. When the main negative relay drive enable signal is high, the D flip-flop chip IC2 sets the D flip-flop chip IC2 output pin 4 to high when the input pin 2 changes from low to high. The output pins 4 of the AND gate integrated chips IC3 and IC4 are both high. When the output pin 4 of the AND gate integrated chip IC4 is high, the transistor T2 is saturated and turned on, so that the drain and source of the PMOS tube are turned on, so that the power supply input voltage Powerinput is consistent with the input relay power supply voltage Power_Relay, providing voltage for the relay drive; when the relay drive is powered off, the main negative relay drive enable signal needs to be low and then a pulse flip is performed.

[0043] Case 2: If the relay is not closed, the negative electrode adhesion detection circuit fails, causing the optocoupler switch IC1 to close, that is, the relay power supply voltage recovery signal MCU AN2 detects that the voltage is low, and the D flip-flop chip IC2 input pin 1 is low. When the main negative relay drive enable signal is high, the D flip-flop chip IC2 output pin 4 is low, and the AND gate integrated chip IC3 and IC4 output pins are both low, the transistor T2 is cut off, so that the drain and source of the PMOS tube are not conducting, so that the power input voltage Power input and the relay power supply voltage Power_Relay are not connected, and the relay driver provides a power supply voltage of 0V, which cannot drive the relay to close.

[0044] Case 3: If the relay is stuck, the negative electrode sticking detection circuit is normal. This causes the optocoupler switch IC1 to close, i.e. the relay power supply voltage recovery signal MCU AN2 detects that the voltage is low, and the D flip-flop chip IC2 input pin 1 is low. When the main negative relay drive enable signal is high, the D flip-flop chip IC2 output pin 4 is low, and the AND gate integrated chip IC3 and IC4 output pins are both low, the transistor T2 is cut off, so that the drain and source of the PMOS tube are not conducting, so that the power input voltage Power input and the relay power supply voltage Power_Relay are not connected, and the relay driver provides a power supply voltage of 0V, which cannot drive the relay to close.

[0045] Case 4: If the relay is stuck, the negative electrode sticking detection circuit is abnormal, NMOS T1 and optocoupler switch IC1 are in the off state, that is, the input pin 1 of D flip-flop chip IC2 is at a high level. When the main negative relay drive enable signal is at a low level, the output of D flip-flop chip IC2 is at a low level, the output of AND gate integrated chip IC3 is at a high level, and the output of AND gate integrated chip IC4 is at a low level. Transistor T2 is cut off, so that the drain and source of the PMOS tube are not conductive, so that the power input voltage Power input and the relay power supply voltage Power_Relay are not connected, and the power supply voltage provided by the relay driver is 0V, and the relay cannot be driven to close; when the main negative relay drive enable signal is at a high level, MCU AN2 detects whether the optocoupler switch IC1 pin 6 and the main negative relay drive enable signal level are at a high level at the same time and the time is greater than 1ms. If so, the main negative relay drive enable signal is at a high level to cut off the drive relay power supply circuit.

[0046] It should be noted that the relay power supply voltage sampling signal MCU AN3 is collected between the low-pass filter resistor R17 and the capacitor C2. When there is no conduction between the drain and source of the PMOS tube T3, the sampling voltage of MCU AN3 is Power_Relay, but its driving current is too small to drive the relay. According to the sampling voltage of MCU AN3, the short-to-ground and open-circuit fault detection of Power_Relay can be realized.

[0047] According to the above description, when the controller issues a negative relay control pull-in instruction and the relay pulls in normally (i.e., there is no disconnection), the circuit allows the relay power supply circuit to work and output the relay drive voltage. If the relay disconnection or adhesion detection circuit fails at this time, the circuit does not allow the relay power supply circuit to output the relay drive voltage.

[0048] When the controller does not issue a negative relay control energizing command and the relay is not energized (i.e., no adhesion occurs), the circuit allows the relay power supply circuit to operate and output the relay drive voltage. If the relay is adhered or the adhesion detection circuit fails at this time, the circuit does not allow the relay power supply circuit to output the relay drive voltage.

[0049] Based on the above technical scheme, the relay drive power supply circuit provided by the present invention can realize the main negative relay adhesion self-test, and automatically control the relay drive power supply circuit through the hardware circuit according to the self-test result. When a relay failure or a negative electrode adhesion detection circuit failure occurs, the PMOS tube T3 can be used to effectively cut off the relay power supply circuit, thereby safely and effectively controlling the high-voltage system of the power battery and avoiding dangerous conditions such as short circuit, thermal runaway, and large current shock in the high-voltage main circuit.

[0050] It should be noted that the above-mentioned relay drive power supply circuit provided by the present invention can be applied to power batteries.

[0051] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. An intelligent control relay drive power supply circuit, characterized in that: It includes a main negative relay adhesion detection circuit and a relay power supply circuit; The main negative relay adhesion detection circuit includes a main negative relay, an RC low-pass filter, an NMOS tube, an anti-reverse diode and an optocoupler switch; the RC low-pass filter is connected to a pin of the main negative relay through three anti-reverse diodes. The positive output end of the first anti-reverse diode is connected to the gate of the NMOS tube; the drain of the NMOS tube is connected to the input end of the optocoupler switch, and the output end of the optocoupler switch is connected to the relay power supply circuit; Performing a self-check on the adhesion of the main negative relay according to the closed state of the main negative relay and the voltage recovery signal of the RC low-pass filter; The relay power supply circuit includes a D flip-flop chip, an AND gate integrated chip, a transistor and a PMOS tube; the output pin of the optocoupler switch is connected to the input pin of the D flip-flop chip; the output end of the D flip-flop chip is connected to the input pin of the first AND gate integrated chip; the output pin of the first AND gate integrated chip is input to the input pin of the second AND gate integrated chip; the output pin of the second AND gate integrated chip is connected to the base of the transistor, and the collector of the transistor is connected to the gate of the PMOS tube; the source of the PMOS tube is connected to the power supply input voltage, and the drain of the MOS tube is connected to the relay power supply voltage; Another input pin of the D flip-flop chip and another input pin of the two AND gate integrated chips are both connected to the main negative relay drive enable signal; The relay drive power supply circuit is controlled according to the self-test result of the main negative relay adhesion detection circuit and the main negative relay drive enable signal.

2. The intelligent control relay driving power supply circuit according to claim 1, characterized in that: The output end of the positive electrode of the first anti-reverse diode is connected to the 5V voltage of the high-voltage module through the pull-up resistor R2 on the one hand, and is connected to the reference ground of the high-voltage module through the voltage-dividing resistor on the other hand; One end of the input end of the optocoupler switch is connected to the 5V voltage of the high-voltage module through a resistor R8, and the other end is connected to the drain of the NMOS tube. The source of the NMOS tube is connected to the module reference ground. On the one hand, the gate of the NMOS tube is connected to the voltage dividing resistor through a current limiting resistor R6, and on the other hand, the gate of the NMOS tube is connected to the high-voltage module reference ground through a pull-down resistor R7.

3. The intelligent control relay driving power supply circuit according to claim 2, characterized in that: A current limiting resistor R3 is provided between the third anti-reverse diode and the main negative relay; another pin of the main negative relay is connected to the high voltage ground of the power battery.

4. The intelligent control relay driving power supply circuit according to claim 3, characterized in that: One output pin of the optocoupler switch is connected to an input pin of the D flip-flop chip through a resistor R11 on the one hand, and is connected to a 5V voltage through a resistor R9 on the other hand; the other output pin of the optocoupler switch is connected to GND through a pull-down resistor R19.

5. The intelligent control relay driving power supply circuit according to claim 4, characterized in that: The emitter of the transistor is connected to GND, and the collector of the transistor is connected to the gate of the PMOS tube through a current limiting resistor R12; the source of the PMOS tube is connected to the power supply input voltage through a voltage dividing resistor R14; a voltage dividing resistor R13 is connected in series between the gate and source of the PMOS tube; the drain of the PMOS tube is connected to GND through voltage dividing resistors R16 and R18.

6. The intelligent control relay driving power supply circuit according to claim 5, characterized in that: A protective TVS is provided between the source and drain of the PMOS tube.

7. The intelligent control relay driving power supply circuit according to claim 6, characterized in that: A resistor R15 is provided between the power supply input voltage and the relay power supply voltage.

8. The intelligent control relay driving power supply circuit according to claim 7, characterized in that: The relay power supply circuit further includes a low-pass filter, which is connected between the voltage-dividing resistors R16 and R18.

9. The intelligent control relay driving power supply circuit according to claim 7, characterized in that: The driving power supply mode of the driving power supply circuit includes: When the main negative relay is not closed or not adhered, the collected voltage is 1.4V through the RC low-pass filter, the NMOS is not conducting, the two pins of the output end of the optocoupler switch are not conducting, and the input pin 1 of the D flip-flop chip is high level; when the main negative relay drive enable signal is high level, the D flip-flop chip sets the output pin of the D flip-flop chip to high level when the input pin 2 changes from low level to high level; the two AND gate integrated core output pins are both high level, the transistor is saturated and turned on, so that the drain and source of the PMOS tube are turned on, so that the power supply input voltage is output to the relay power supply voltage consistent, providing voltage for the relay drive; when the relay drive is powered off, it is necessary to set the main negative relay drive enable signal to a low level and then perform a pulse flip; If the relay is not closed, the negative electrode adhesion detection circuit fails, causing the optocoupler switch to close, that is, the relay power supply voltage recovery signal detects that the voltage is low, and the D flip-flop chip input pin is low; when the main negative relay drive enable signal is high, the D flip-flop chip output pin is low, and the two AND gate integrated chip output pins are both low, the transistor T2 is cut off, so that the drain and source of the PMOS tube are not conducting, so that the power supply input voltage and the relay power supply voltage are not connected, and the relay driver provides a power supply voltage of 0V, which cannot drive the relay to close; If the relay is stuck, the negative electrode sticking detection circuit is normal, which causes the optocoupler switch to close, that is, the relay power supply voltage recovery signal detects that the voltage is low, and the D flip-flop chip input pin is low; when the main negative relay drive enable signal is high, the D flip-flop chip output pin is low, and the two AND gate integrated chip output pins are low, the transistor is cut off, so that the drain and source of the PMOS tube are not conducting, so that the power supply input voltage and the relay power supply voltage are not connected, and the relay driver provides a power supply voltage of 0V, which cannot drive the relay to close; If the relay is stuck, the negative electrode sticking detection circuit is abnormal, the NMOS and optocoupler switch are in the off state, that is, the input pin of the D flip-flop chip is at a high level; when the main negative relay drive enable signal is at a low level, the D flip-flop chip output is a low level, the first AND gate integrated chip output is a high level, and the second AND gate integrated chip output is a low level; the transistor is cut off, so that the drain and source of the PMOS tube are not conductive, so that the power supply input voltage and the relay power supply voltage are not connected, the relay drive provides a power supply voltage of 0V, and cannot drive the relay to close; when the main negative relay drive enable signal is at a high level, the relay power supply voltage recovery signal is used to detect whether the output pin of the optocoupler switch and the main negative relay drive enable signal level are both high and the time is greater than 1ms. If so, the main negative relay drive enable signal is set to a high level to cut off the drive relay power supply circuit.

10. A power battery, characterized in that: The intelligent control relay driving power supply circuit comprises the intelligent control relay driving power supply circuit as described in any one of claims 1 to 9.

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