Method of forming metal silicate layer for controlling threshold voltage

Abstract

Methods of forming a metal silicate layer for controlling a threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET) are disclosed. The method includes forming a metal silicate threshold adjustment layer on a substrate by contacting the substrate with a precursor comprising an organosilanol precursor or a silicon oxide precursor.

Description

Technical Field

[0001] The present disclosure relates generally to the field of semiconductor processing methods and related semiconductor structures, and to the field of device and integrated circuit fabrication. More specifically, the present disclosure relates to a method for forming a layer that allows control of the threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET), and to structures formed using such a method. Background Art

[0002] The reduction in size of semiconductor devices, such as complementary metal oxide semiconductor (CMOS) devices, has led to significant increases in the speed and density of integrated circuits. However, conventional device scaling techniques face significant challenges in future technology nodes. For example, one challenge is finding suitable gate stack materials, i.e., materials that form the device layer between the gate and the channel of a field effect transistor. A particular problem in this regard is controlling the threshold voltage of a field effect transistor. Therefore, improved methods for forming a threshold voltage adjustment layer (also called a "dipole layer") are needed.

[0003] Any discussion set forth in this section, including discussion of problems and solutions, has been included in the present disclosure merely to provide context for the present disclosure. Such discussion should not be construed as an admission that any or all information was known at the time the present invention was made, or constitutes prior art. Summary of the invention

[0004] This Summary may introduce some concepts in a simplified form that are further described below. This Summary is not intended to necessarily identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0005] Various embodiments of the present disclosure relate to methods of forming a metal silicate layer for controlling the threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET). Such threshold voltage control is provided by forming an ultra-thin dipole layer, particularly an ultra-thin dipole layer comprising a metal silicate. The dipole layer can be used in various applications, including forming a gate stack.

[0006] In more detail, next generation transistor device structures (e.g., MOSFETS, etc.) may require multiple threshold voltages (V th ) solution. th The demands of the devices will increase the need for dipole layers to fine tune the effective work function (eWF) of the device's gate stack. However, as device dimensions decrease and the subsequent thickness of the layers that make up the gate stack decreases, ultra-thin dipole layers will be required.

[0007] Therefore, in some embodiments of the present disclosure, the metal silicate dipole layer formed by the method of the present disclosure can be effectively operated to control / adjust the threshold voltage of the field effect transistor while using a metal silicate layer with an average layer thickness of less than 0.1 nanometers, and in some embodiments, such a metal silicate layer may not include a completely closed layer.

[0008] In addition, the present disclosure provides a general formula MSi x O y A metal silicate layer, wherein M is a metal element, Si is silicon, O is oxygen, and x and y represent the composition of the metal silicate layer. In addition, some embodiments of the present disclosure provide an improved method for forming such a metal silicate layer by eliminating the need for an additional oxidant (e.g., O2, H2O, etc.) during the formation of the metal silicate layer. For example, when an additional oxidant is used as a reactant in the formation of the metal silicate dipole layer, additional oxygen content may be introduced into the gate stack, resulting in a potential increase in the equivalent oxide thickness (EOT) and a subsequent loss in the electrical performance of the device structure.

[0009] According to an example of the present disclosure, a method for forming a metal silicate layer for controlling a threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET) is provided. The exemplary method includes placing a substrate in a reaction chamber, the substrate including a dielectric surface, performing a pre-deposition treatment on the dielectric surface to form a treated dielectric surface, and forming a metal silicate threshold voltage shift layer directly on the treated dielectric surface by contacting the treated dielectric surface with a precursor including a silicon oxide precursor or an organosilanol precursor.

[0010] In some embodiments, the dielectric surface comprises a silicon oxide surface.

[0011] In some embodiments, the pre-deposition treatment may include contacting the silicon oxide surface with a metal catalyst comprising a metal element selected from the group consisting of rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca, and Ba.

[0012] According to the example of the present disclosure, the organosilanol precursor may include an -OH group and an -OR group connected to a silicon atom, wherein R includes a straight or branched C1-C10 alkyl group. In such an example, the organosilanol precursor may include at least one alkoxy group and an -OH group connected to a silicon atom. In such an example, the organosilanol precursor may include three alkoxy groups and an -OH group connected to a silicon atom. In such an example, the organosilanol precursor may be selected from tri(tert-butoxy)silanol (TBS), tri(isopropoxy)silanol (TIS) and tri(tert-pentyloxy)silanol (TPS).

[0013] According to an example of the present disclosure, the silicon oxide precursor may include a silicon oxide having the general formula M(OSiR1R2R3) x L y A single source precursor of wherein M is a metal, and each of R1-R3 is independently selected from a C1-10 alkyl group or a C1-10 alkoxy group, wherein L is an organic ligand, and wherein y is equal to zero or greater than zero, and the sum of x and y is equal to the valence of the metal (M). In some embodiments, the silicon oxide precursor may have the general formula M[OSi(O t Bu)3]4, wherein M is a metal selected from Al, Ga, Ti, Hf and Zr.

[0014] According to an additional example of the present disclosure, a method of forming a metal silicate layer for controlling a threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET) is provided. The exemplary method includes placing a substrate in a reaction chamber, the substrate including a dielectric surface including a silicon oxide surface and / or a high-k dielectric surface, and depositing a metal silicate threshold voltage shifting layer directly on the dielectric surface by contacting the dielectric surface with a metal silicon oxide precursor, the metal silicon oxide precursor including a single source precursor having one or more silicon atoms, metal atoms, and oxygen atoms.

[0015] According to such an example, the metal silicon oxide precursor may have the general formula M(OSiR1R2R3) x L y , wherein M is a metal selected from the group consisting of rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca and Ba, and wherein each of R1-R3 is independently selected from a C1-10 alkyl group or a C1-10 alkoxy group, wherein L is an organic ligand, and wherein y is equal to zero or greater than zero, and the sum of x and y is equal to the valence of the metal.

[0016] In some embodiments, the metal silicon oxide precursor is a homoleptic silicon oxide precursor. In such embodiments, the homoleptic silicon oxide precursor may be selected from tetrakis(trimethylsilicon oxide)Zr and tetrakis(trimethylsilicon oxide)Hf.

[0017] In some embodiments, the silicon oxide compound is a heteroleptic silicon oxide precursor. In such embodiments, the heteroleptic silicon oxide compound may include an organic ligand (L), wherein L is selected from Cp (cyclopentadienyl) ligands, acac (acetylacetonate) ligands, and 2,2,6,6-tetramethylheptane-3,5-dioate (thd) ligands. In such embodiments, the heteroleptic silicon oxide precursor is selected from Zr bis (trimethylsilyl oxide) bis (thd) and Hf bis (trimethylsilyl oxide) bis (thd).

[0018] According to another example of the present disclosure, a method for depositing a threshold voltage shift layer on a dielectric surface is provided, wherein the threshold voltage shift layer has a chemical formula including a metal element, a silicon element, and an oxygen element, wherein a single source precursor including a metal silicon oxide precursor is used as a source of the metal element, the silicon element, and the oxygen element, and wherein the dielectric surface includes a silicon oxide surface and / or a high-k dielectric surface. In such an example, the metal silicon oxide precursor may have a general formula M[OSi(O t Bu3)]4, wherein M is a metal selected from Al, Ga, Ti, Hf and Zr. In such an example, the threshold voltage adjustment layer is selected from aluminum silicate, gallium silicate, titanium silicate, hafnium silicate and zirconium silicate.

[0019] Other technical features will be apparent to those skilled in the art from the following drawings, descriptions, and claims. These and other embodiments will become apparent to those skilled in the art from the following detailed description of certain embodiments with reference to the accompanying drawings. The present invention is not limited to any particular embodiment disclosed. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] To easily identify the discussion of any particular element or act, the most significant digit(s) in a reference number refers to the figure number in which the element is first introduced.

[0021] A more complete understanding of embodiments of the present disclosure may be obtained by referring to the detailed description and claims when considered in conjunction with the following illustrative drawings.

[0022] Figure 1 A method according to an exemplary embodiment of the present disclosure is shown; and

[0023] FIG. 2A to FIG. 2C An exemplary structure according to an embodiment of the present disclosure is shown.

[0024] FIG. 3A to FIG. 3C A further exemplary structure according to an embodiment of the present disclosure is shown.

[0025] It should be understood that the elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the size of some elements in the drawings may be exaggerated relative to other elements to help improve the understanding of the illustrated embodiments of the present disclosure. DETAILED DESCRIPTION

[0026] The descriptions of exemplary embodiments of methods, structures, devices, and apparatus provided below are merely exemplary and are for illustrative purposes only; the following descriptions are not intended to limit the scope of the present disclosure or the claims. Furthermore, the recitation of multiple embodiments having the described features is not intended to exclude other embodiments having additional features or other embodiments incorporating different combinations of the described features. For example, various embodiments are set forth as exemplary embodiments and may be recited in dependent claims. Unless otherwise indicated, the exemplary embodiments or components thereof may be combined or may be applied separately from each other.

[0027] As described in more detail below, various embodiments of the present disclosure provide methods for forming metal silicate layers suitable for various applications. For example, the exemplary methods can be used to form a dipole layer comprising a metal silicate suitable for metal oxide semiconductor (MOS) applications, such as in the formation of a complementary MOS (CMOS) device. For example, the metal silicate dipole layer can be used to form a logic device, a dynamic random access memory (DRAM), a three-dimensional NAND device. However, unless otherwise stated, the present invention is not necessarily limited to these examples.

[0028] As used herein, the terms "precursor" and "reactant" may refer to molecules (compounds or molecules containing a single element) that participate in a chemical reaction that produces another compound. A precursor generally comprises a moiety that is at least partially incorporated into the compound or element produced by the chemical reaction. The compound or element thus obtained may be deposited on a substrate. A reactant may be an element or compound that is not incorporated to a large extent into the resulting compound or element. In some cases, the term reactant may be used interchangeably with the term precursor.

[0029] As used herein, the term "organosilanol precursor" may refer to a compound or complex including an organic component, one or more silicon atoms, and an oxygen atom.

[0030] As used herein, the term "silicon oxide precursor" may refer to a compound or complex including an organic component and one or more silicon atoms, metal atoms, and oxygen atoms.

[0031] As used herein, the terms "layer" and "film" may refer to any continuous or discontinuous structure and material, such as a material formed and / or deposited by the methods disclosed herein. For example, a layer (or film) may include a two-dimensional material, a three-dimensional material, nanoparticles, or even a partial or complete molecular layer or a partial or complete atomic layer or atom and / or molecular clusters. A layer may include a material or layer having pinholes. A layer may be at least partially continuous. A layer may be patterned, such as subdivided, and may include multiple semiconductor devices.

[0032] As used herein, the term "substrate" may refer to any one or more underlying materials that can be used to form or can be formed on a device, circuit or film by a method according to an embodiment of the present invention. The substrate may include a bulk material, such as silicon (e.g., single crystal silicon), other IV group materials, such as germanium, or other semiconductor materials, such as II-VI or III-V semiconductor materials, and may include one or more layers covering or located below the bulk material. In addition, the substrate may include various features, such as depressions, protrusions, etc. formed in or on at least a portion of the substrate layer. For example, the substrate may include a bulk semiconductor material and an insulating or dielectric material layer covering at least a portion of the bulk semiconductor material. In addition, the term "substrate" may refer to any one or more underlying materials that can be used or on which a device, circuit or film can be formed. "Substrate" may be continuous or discontinuous; rigid or flexible; solid or porous. "Substrate" may be in any form, such as a powder, a plate or a workpiece. Plate-shaped substrates may include wafers of various shapes and sizes. The substrate may be made of materials such as silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride and silicon carbide. The continuous substrate can extend beyond the boundary of the processing chamber where the deposition process occurs, and can be moved through the processing chamber so that the process continues until the end of the substrate is reached. The continuous substrate can be provided by a continuous substrate feeding system, which allows the continuous substrate to be manufactured and output in any suitable form. Non-limiting examples of continuous substrates may include sheets, nonwoven films, rolls, foils, nets, flexible materials, a bundle of continuous filaments or fibers (i.e., ceramic fibers or polymer fibers). The continuous substrate may also include a carrier or thin sheet on which a non-continuous substrate is mounted. For example, the substrate may include a semiconductor material. The semiconductor material may include or be used to form one or more of the source, drain or channel regions of the device. The substrate may also include an interlayer dielectric (e.g., silicon oxide) and / or a high dielectric constant material layer covering the semiconductor material. In this article, a high dielectric constant material (or high-k dielectric material) is a material whose dielectric constant is greater than the dielectric constant of silicon dioxide.

[0033] As used herein, the terms "structure" and "semiconductor structure" may be or include a substrate as described herein. A structure may include a substrate and one or more layers overlying the substrate, such as one or more layers formed by a method according to the present disclosure. A structure may include or be used to form, for example, vias or lines in BEOL processing, or contacts or local interconnects in MEOL processing. A structure may also be used to form gate stacks, gate electrodes, layers in buried power rails in logic applications, and to form word lines or bit lines in advanced memory applications. A "structure" may also include fabricated and / or partially fabricated device structures, such as transistors, memory and / or logic elements.

[0034] In addition, in the present disclosure, any two numbers of a variable may constitute a feasible range of the variable, and any range indicated may include or exclude endpoints. In addition, any values ​​of the indicated variables (regardless of whether they are indicated with "about") may refer to exact values ​​or approximate values, and include equivalents, and may refer to average values, medians, representative values, majority values, etc. In addition, in the present disclosure, the terms "include", "consist of..." and "have" independently refer to "usually or broadly include", "comprise", "essentially consist of..." or "consist of..." in some embodiments. In the present disclosure, the meaning of any definition does not necessarily exclude common and customary meanings in some embodiments.

[0035] Turning now to the accompanying drawings, Figure 1 An exemplary method 100 is shown. The method 100 includes the steps of positioning a substrate including a dielectric surface within a reaction chamber (step 102), optionally performing a pre-deposition process on the dielectric surface (step 104), and forming a metal silicate threshold voltage shift layer on the dielectric surface (step 106).

[0036] During step 102, the substrate is positioned within a reaction chamber. The reaction chamber used during step 102 may be or include a reaction chamber of a chemical vapor deposition reactor system, which is configured to perform a chemical vapor deposition process or a cyclic deposition process. In some embodiments, the reaction chamber used during step 102 may be or include a reaction chamber of an atomic layer deposition reactor, which is configured to perform a cyclic deposition process, such as an atomic layer deposition process. In some embodiments, the reaction chamber used during step 102 may be or include a reaction chamber of a plasma enhanced atomic layer deposition reactor system. In some embodiments, the reaction chamber used during step 102 may be or include a reaction chamber of a plasma enhanced chemical vapor deposition reactor system.

[0037] The reaction chamber may be a stand-alone reaction chamber or part of a combination tool. The reaction chamber may include a substrate heater to heat the substrate to the substrate temperatures mentioned herein.

[0038] According to an example of the present disclosure, the substrate located within the reaction chamber during step 102 may include a dielectric layer. In such an example, the substrate includes a dielectric surface. In some embodiments, the dielectric layer may include silicon oxide and / or a high-k dielectric. In such an example, the substrate includes a silicon oxide surface and / or a high-k dielectric surface.

[0039] Figure 2AA portion of an exemplary substrate suitable for use as a substrate during step 102 is shown. Substrate 200 includes a semiconductor body 202 and a dielectric layer 204 disposed on semiconductor body 200. Dielectric layer 204 includes a dielectric surface 206. According to an example of the present disclosure, dielectric layer 204 may include a silicon oxide layer. In such an example, dielectric surface 206 is a silicon oxide surface. According to an example of the present disclosure, substrate 200 may form a portion of a partially fabricated semiconductor device structure, such as a field effect transistor. In such an example, a lower region of semiconductor body 202 adjacent to dielectric layer 204 may include a channel region of the semiconductor device structure.

[0040] Figure 3A A portion of an additional substrate suitable for use as a substrate during step 102 is shown. Substrate 300 includes a semiconductor body 302 and a dielectric layer 304 disposed on the semiconductor body. Dielectric layer 304 can be used as an interface dielectric layer. In such an example, the interface layer can include a silicon oxide layer. Substrate 300 includes a high dielectric layer 306 disposed on dielectric layer 304. High-k dielectric layer 306 includes dielectric surface 306. In such an example, dielectric surface 306 is a high-k dielectric surface. Exemplary high-k dielectric surfaces include, but are not limited to, hafnium oxide (HfO2), tantalum oxide (Ta2O5), zirconium oxide (ZrO2), titanium oxide (TiO2), hafnium silicate (HfSiO x ), aluminum oxide (Al2O3), lanthanum oxide (La2O3), and mixtures / stacks including one or more of such layers. According to examples of the present disclosure, substrate 300 may form a portion of a partially fabricated semiconductor device structure, such as a field effect transistor. In such examples, a lower region of semiconductor body 302 adjacent to dielectric layer 304 may include a channel region of the semiconductor device structure.

[0041] Once the substrate is positioned within the reaction chamber (step 102), method 100 ( Figure 1 ) may continue with an optional step of performing a pre-deposition treatment on the dielectric surface to form a treated dielectric surface (step 104). According to an example of the present disclosure, the optional pre-deposition treatment (or treatments) may include, but are not limited to, a cleaning treatment, a surface preparation treatment, a surface functionalization treatment, or a surface catalytic treatment.

[0042] According to an example of the present disclosure, the metal silicate layer of the present disclosure can be formed by performing a pre-deposition treatment on a dielectric surface on which the metal silicate layer is to be formed, and then contacting the treated surface with an organic silanol precursor or a silicon oxide precursor. Therefore, for the sake of clarity, the subsequent description includes "Part A", which details an embodiment of the present disclosure using an organic silanol precursor in the formation of a metal silicate layer, and "Part B", which details an embodiment of the present disclosure using a silicon oxide precursor in the formation of a metal silicate layer. In addition, "Part C" describes in detail the properties of a metal silicate layer formed by the method of the present disclosure and a structure including such a metal silicate layer.

[0043] Part A: Formation of Metal Silicates via Catalysis and Organosilanol Precursors

[0044] According to examples of the present disclosure, the metal silicate layer of the present disclosure can be formed by pre-treating the dielectric surface on which the metal silicate layer will be formed. In such examples, the dielectric surface can be treated with a metal catalyst. In such examples, the metal catalyst can provide a metal component for the metal silicate layer, that is, the metal element in the metal silicate layer is provided by the metal catalyst through catalysis of the dielectric surface. In other examples, the metal catalyst can simply act as a catalyst in the formation of the metal silicate, and the metal component of the metal silicate layer is not provided by the metal catalyst, but the metal component of the metal silicate layer can be provided by a separate metal-containing precursor.

[0045] According to an example of the present invention, once the treated dielectric surface is catalyzed by the metal catalyst, the method of the present invention may then contact the catalyzed surface with an organosilanol precursor to form a metal silicate layer, i.e., step 106 ( Figure 1 In such examples, the organosilanol precursor provides the silicon component and the oxygen component of the metal silicate layer.

[0046] Thus, according to some examples of the present disclosure, the substrate may include a silicon oxide surface (as shown in substrate 200 of FIG. 2 ). In such examples, the pre-deposition treatment may include surface catalysis. According to examples of the present disclosure, a catalyst is formed on the silicon oxide surface, for example, by contacting the surface with a catalyst compound or complex. Such a treated surface may be referred to herein as a "catalytic silicon oxide surface."

[0047] According to an example of the present disclosure, the catalyst is a metal catalyst. In some embodiments, the dielectric surface, such as a silicon oxide surface, is in contact with a metal catalyst, as described below. In some embodiments, the metal catalyst is a metal compound or metal complex comprising one or more of rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca and Ba. In some embodiments, the catalyst is a metal halide, an organometallic or a metal organic compound, comprising one or more of rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca and Ba. According to a further example of the present disclosure, the pre-deposition treatment in the dielectric surface may include contacting the dielectric surface (e.g., a silicon oxide surface) with a metal catalyst, the metal catalyst comprising a metal element selected from rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca and Ba.

[0048] In some embodiments, the catalyst is a compound comprising boron. In some embodiments, the catalyst is an alkyl aluminum, alkyl boron or alkyl zinc compound capable of reacting with a hydrophobic silicon oxide surface. For example, the catalyst may include trimethyl aluminum (TMA), triethyl boron (TEB) or diethyl zinc. In some embodiments, the catalyst comprises a compound having the formula MR x A 3-x A compound wherein x is an integer from 1 to 3, R is a C1-C5 alkyl ligand, M is a rare earth element, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca or Ba, and A is a halide, an alkylamine, an amino group, a silyl group or a derivative thereof. In some embodiments, R is a C1-C3 alkyl ligand. In some embodiments, R is a methyl group or an ethyl group. In some embodiments, M is boron. In some embodiments, the catalyst is ZnR x A 2-x , wherein x is an integer from 1 to 2, R is a C1-C5 alkyl ligand, and A is a halide, an alkylamine, an amino group, a silyl group, or a derivative thereof. In some such embodiments, R is a C1-C3 alkyl ligand. In some embodiments, R is a methyl group or an ethyl group.

[0049] In some embodiments, the metal catalyst is an aluminum catalyst comprising one or more of trimethylaluminum (TMA), dimethylaluminum chloride, aluminum trichloride (AlCl3), dimethylaluminum isopropoxide (DMAI), tri(tert-butyl)aluminum (TTBA), tri(isopropoxide)aluminum (TIPA), or triethylaluminum (TEA).

[0050] In some embodiments, the catalyst is a zirconium catalyst comprising one or more of bis(methylcyclopentadienyl)methyl(methoxy)zirconium (Zr(MeCp)2(Me)(OMe)), tetrakis(ethylmethylamino)zirconium (TEMAZ), ZrCp(NMe2)3, Zr(MeCp)2(Me)2, Zr(MeCp)2(OMe)2, or ZrCl4.

[0051] In some embodiments, the catalyst is a lanthanum catalyst, such as tri(isopropyl-cyclopentadienyl)lanthanum (La(iPrCp)3).

[0052] In some embodiments, the catalyst is a titanium catalyst, such as titanium isopropoxide (TTIP) or TiCl4.

[0053] In some embodiments, the catalyst is a gallium catalyst comprising one or more of the following: GaCl, GaCl3, (GaMe2NH2)3, Ga(acac)3, Ga(CpMe5), Ga(thd)3, Ga2(NMe2)6, GaEt3, GaMe2(O i Pr),GaMe2NH2, GaMe3 or GaMe3(CH3OCH2CH2NH t Bu).

[0054] In some embodiments, the catalyst is a hafnium catalyst comprising one or more of: HfCl4, Hf(NO3)4, bis(methylcyclopentadienyl)methyl(methoxy)hafnium (Hf(MeCp)2(Me)(OMe)), tetrakis(ethylmethylamino)hafnium (TEMAZ), HfCp(NMe2)3, Hf(MeCp)2(Me)2, or Hf(MeCp)2(OMe)2.

[0055] According to examples of the present disclosure, the catalyst can be provided to the reaction chamber in a single pulse or in a plurality of pulse sequences. In some embodiments, the catalyst is provided in a single long pulse or in a plurality of shorter pulses. Pulses can be provided sequentially. In some embodiments, the catalyst is provided in 1 to 25 pulses of 0.1 to 60 seconds. In some embodiments, the catalyst is provided in a single pulse of 0.1 to 60 seconds or 1 to 30 seconds or about 25 seconds. Between pulses, excess catalyst can be removed from the reaction space. For example, the reaction chamber can be evacuated and / or purged with an inert gas. Purge can be, for example, 1 to 30 seconds or longer. Purge means removing gas phase catalyst and / or gas phase byproducts (if any) from the reaction chamber, for example, by evacuating the reaction chamber with a vacuum pump and / or by replacing the gas in the reaction chamber with an inert gas. In some embodiments, the gas phase catalyst is removed from the substrate surface by moving the substrate from the reaction space containing the gas phase catalyst.

[0056] In some embodiments, during step 104, for example during the formation of the catalytic silicon oxide surface, the temperature of the substrate can be, for example, from 50°C to 500°C, or from 100°C to 300°C. In some embodiments, the substrate temperature is between 50°C and 400°C. In some embodiments, the substrate temperature is above 100°C, and the catalytic chemical is an alkyl aluminum compound, such as TMA. In some embodiments, the alkyl aluminum compound is dimethyl aluminum isopropoxide (DMAI), and the substrate temperature is 100°C to 400°C, or 100°C to 200°C, or 200°C to 400°C, or 250°C to 350°C. In some embodiments, the alkyl aluminum compound is dimethyl aluminum isopropoxide (DMAI), and the substrate temperature is 150°C. In some embodiments, the alkyl aluminum compound is dimethyl aluminum isopropoxide (DMAI), and the substrate temperature is 300°C. In some embodiments, the catalytic chemical is an alkyl boron compound, such as TEB, and the substrate temperature is between 50°C and 400°C, or between 100°C and 350°C, or between 100°C and 300°C. In some embodiments, the catalytic chemistry is an alkyl boron compound and the substrate temperature is above 100° C. In some embodiments, the deposition temperature is above 300° C. and the catalytic chemistry is TEB. The catalytic temperature can be selected based on the passivation layer used to allow a single deposition temperature to be used.

[0057] After completing the surface pretreatment step 104, the method 100 can continue with the step of forming a metal silicate layer on the treated dielectric surface (step 106), such as on the catalytic silicon oxide surface of the substrate 200 (FIG. 2). According to an example of the present disclosure, the step of forming the metal silicate layer on the dielectric surface includes contacting the treated dielectric surface with an organosilanol precursor. In such an example, the dielectric layer is a silicon oxide layer (substrate 200), and the dielectric surface has been catalyzed to form a catalytic silicon oxide surface. In such an example, the catalytic silicon oxide surface is subsequently contacted with an organosilanol precursor to form a metal silicate threshold shift layer on the catalytic silicon oxide surface.

[0058] According to examples of the present disclosure, the organosilanol precursor comprises an -OH group and an -OR group connected to a silicon atom, wherein R comprises a linear or branched C1-C10 alkyl group. In some embodiments, the organosilanol precursor comprises at least one alkoxy group and an -OH group connected to a silicon atom. In some embodiments, the organosilanol precursor comprises three alkoxy groups and an -OH group connected to a silicon atom. In some embodiments, the organosilanol precursor may include an alkoxysilanol. In such examples, the alkoxysilanol comprises a linear or branched, substituted or unsubstituted C1-C10 alkoxy group or a C1-C8 alkoxy group, and an OH-group connected to a silicon atom.

[0059] In some embodiments, the organosilanol precursor comprises one or more -OH groups directly connected to the silicon atom. In some embodiments, the organosilanol precursor may include, but is not limited to, alkoxysilanols, alkoxyalkylsilanols, and alkoxysilanediols. In some embodiments, the organosilanol precursor is selected from tri(tert-butoxy)silanol (TBS), tri(isopropoxy)silanol (TIS), and tri(tert-pentyloxy)silanol (TPS). A skilled technician may select a suitable silanol precursor to react with the catalytic silicon oxide dielectric surface on the substrate under the desired reaction conditions to form a metal silicate dipole layer silicon dioxide.

[0060] According to examples of the present disclosure, a single organosilanol pulse is provided to the reaction chamber. In some embodiments, a single organosilanol pulse is used to deposit a metal silicate dipole layer. According to other examples of the present disclosure, more than one silanol pulse is provided to the reaction chamber to form a metal silicate dipole layer. For example, the catalyst pulse may be followed by two, three or more organosilanol precursor pulses. In some embodiments, the catalyst pulse is followed by two organosilanol pulses. Each organosilanol precursor pulse may be separated by a purge step. In other embodiments, each organosilanol precursor pulse is provided after a predetermined time delay without an intermediate purge step. According to examples of the present disclosure, the organosilanol precursor is pulsed for a period of time between 0.05 and 400 seconds or between 0.1 and 400 seconds or between 1 and 180 seconds or between 30 and 180 seconds. The optimal pulse time can be determined by a skilled technician according to the specific circumstances.

[0061] In some embodiments, during step 106, i.e., during the formation of the metal silicate via the organosilanol precursor, the temperature of the substrate may be the same as the substrate temperature employed during step 104. In addition, the method 100 of forming a metal silicate layer via an organosilanol precursor may include: Figure 1 Additional process steps not shown in . According to an example of the present disclosure, the additional process steps may include additional chemical processes. In such an example, the additional process steps may include introducing an additional oxidant into the reaction chamber during the metal silicate formation process (step 106). In such an example, the additional oxidant may be introduced into the reaction chamber, overlapping at least some time with the introduction of the organosilanol precursor. Alternatively, the additional oxidant may be introduced into the reaction before and / or after the organosilanol precursor is introduced into the reaction chamber. According to a further example of the present disclosure, the additional process steps may include one or more post-deposition treatments of the metal silicate layer formed according to the method disclosed herein. In such an example, the metal silicate layer may be subjected to post-deposition treatments, including but not limited to thermal annealing, microwave annealing, plasma treatment, cleaning treatment, and surface treatment.

[0062] Part B: Formation of Metal Silicates from Silicon Oxide Precursors

[0063] According to further examples of the present disclosure, the metal silicate layer of the present disclosure can be formed by contacting the dielectric surface with a silicon oxide precursor. In such examples, the silicon oxide precursor comprises a single source precursor, wherein the term "single source precursor" can refer to a precursor that provides all constituent elements of the deposited layer. For example, the method of the present disclosure can form a metal silicate layer used as an ultra-thin dipole layer, the metal silicate layer having the general formula MSi x O y , where M is a metal element, Si is silicon, O is oxygen, and x and y represent the composition of the metal silicate layer. Therefore, embodiments of the present disclosure include methods for forming a metal silicate layer using a single source precursor comprising a metal element, a silicon element, and an oxygen element. In such examples, further oxidation may not be required to form the desired metal silicate. In other examples, an additional oxidation step may be performed by introducing an oxidant into the reaction chamber.

[0064] Thus, according to some examples of the present disclosure, the substrate includes a dielectric surface, which includes a silicon oxide surface and / or a high-k dielectric surface. In some embodiments, the dielectric surface includes a high-k dielectric surface, as shown in substrate 300 of FIG. 2. In such an example, method 100 ( Figure 1 The optional pre-deposition treatment (step 104) of the dielectric surface may include one or more of a cleaning treatment, a surface preparation treatment, a surface functionalization treatment, or a surface catalytic treatment. According to another example of the present disclosure, the step of forming a metal silicate threshold voltage shift layer on the dielectric surface includes contacting the dielectric surface with a silicon oxide precursor. In such an example, the dielectric surface may be pre-treated by step 104, or the pre-treatment step 104 may be omitted.

[0065] According to examples of the present disclosure, after completing the optional surface pre-treatment (step 104), method 100 may continue with the step of forming a metal silicate layer on the treated surface (step 106), such as the treated silicon oxide surface 206 (FIG. 2) of substrate 200 or the optional treated high-k dielectric surface 308 (FIG. 3) of substrate 300. In some embodiments of the present disclosure, forming the metal silicate threshold shift layer on the dielectric surface includes contacting the dielectric surface with a precursor comprising a silicon oxide precursor. In some embodiments of the present disclosure, the silicon oxide precursor comprises a metal silicon oxide precursor.

[0066] In some embodiments, during step 106 , ie, during the formation of the metal silicate via the silicon oxide precursor, the temperature of the substrate may be the same as the substrate temperature employed during step 104 .

[0067] According to an example of the present disclosure, the silicon oxide precursor includes a single source precursor. In such an example, the silicon oxide precursor includes a metal silicon oxide precursor. In some embodiments, the metal silicon oxide precursor includes a single source precursor including one or more silicon atoms, metal atoms, and oxygen atoms. In some embodiments, the metal silicon oxide precursor includes a single source precursor having the general formula M(OSiR1R2R3) x L y A single source precursor of wherein M is a metal, and each of R1-R3 is independently selected from a C1-10 alkyl group or a C1-10 alkoxy group, wherein L is an organic ligand, and wherein y is equal to zero or greater than zero, and the sum of x and y is equal to the valence of the metal (M). In some embodiments, the metal (M) is selected from rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca, and Ba. In some embodiments, the metal (M) is selected from Al, Ga, Ti, Hf, and Zr. In some embodiments, the metal (M) is Al. In some embodiments, the metal (M) is Hf. In some embodiments, the metal (M) is Ga.

[0068] In some embodiments, the silicon oxide precursor is a metal silicon oxide precursor. In such an example, the metal silicon oxide precursor may include a homoleptic silicon oxide precursor. In such an embodiment, the homoleptic silicon oxide precursor includes a metal oxide having the general formula M(OSiR1R2R3): x A single source precursor of , wherein M is a metal, and each of R1-R3 is independently selected from C1-10 alkyl or C1-10 alkoxy, and x is equal to the valence of the metal (M). In some embodiments, the metal (M) is selected from rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca and Ba. In some embodiments, the metal (M) is selected from Al, Ga, Ti, Hf and Zr. In some embodiments, the metal (M) is Al. In some embodiments, the metal (M) is Ga. In some embodiments, the metal (M) is Hf. In some embodiments of the present disclosure, the homogeneous silicon oxide precursor is selected from tetrakis(trimethylsilicon oxide)Zr and tetrakis(trimethylsilicon oxide)Hf.

[0069] In some embodiments, the silicon oxide precursor is a metal silicon oxide precursor. In such an example, the metal silicon oxide precursor may include a heteroleptic silicon oxide precursor. In such an example, the heteroleptic silicon oxide precursor has the general formula M(OSiR1R2R3) x L y, wherein M is a metal, and each of R1-R3 is independently selected from C1-10 alkyl or C1-10 alkoxy, wherein L is an organic ligand, and wherein y is greater than zero, and the sum of x and y is equal to the valence of the metal (M). In such embodiments, the metal (M) is selected from rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca and Ba. In some embodiments, the metal (M) is selected from Al, Ga, Ti, Hf and Zr. In some embodiments, the metal (M) is Al. In some embodiments, the metal (M) is Hf. In such examples, the metal silicon oxide precursor may include an organic ligand (L), wherein L is selected from Cp (cyclopentadienyl) ligands, acac (acetylacetonate) ligands and 2,2,6,6-tetramethylheptane-3,5-dione (thd) ligands. In some embodiments, L is a tetramethylheptane-3,5-dioate (thd) ligand. In such an embodiment, the heteroleptic silicon oxide precursor is selected from Zr-bis(trimethylsilyl oxide)-bis(thd) and Hf-bis(trimethylsilyl oxide)-bis(thd).

[0070] According to a further example of the present disclosure, the metal silicon oxide precursor may include a metal silicon oxide having a general formula M[OSi(O t Bu3)]4, wherein M is a metal selected from rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca and Ba. In some embodiments, the metal (M) is selected from Al, Ga, Ti, Hf and Zr. In some embodiments, the metal (M) is Al. In some embodiments, the metal (M) is Ga. In some embodiments, the metal (M) is Hf. In some embodiments, the metal silicon oxide precursor comprises Zr[OSi(O t In some embodiments, the metal silicon oxide precursor includes Hf[OSi(O t Bu)3]4.

[0071] According to examples of the present disclosure, a single silicon oxide precursor pulse is provided to the reaction chamber. In some embodiments, a single silicon oxide precursor pulse is used to deposit a metal silicate layer directly on a dielectric surface. According to other examples of the present disclosure, more than one silicon oxide precursor pulse is provided to the reaction chamber to form a metal silicate layer. Each silicon oxide precursor pulse may be separated by a purge step. In other embodiments, each silicon oxide precursor pulse is provided after a predetermined time delay without an intermediate purge step. According to examples of the present disclosure, the silicon oxide precursor pulse is continued for a time period between 0.05 and 400 seconds, or between 0.1 and 400 seconds, or between 1 and 180 seconds, or between 30 and 180 seconds. The optimal pulse time can be determined by a skilled technician according to the specific circumstances.

[0072] According to a further example of the present disclosure, the method 100 of forming a metal silicate layer via a silicon oxide precursor may include: Figure 1 Such additional process steps not shown in the description may be the same or similar to those described in “Part A” with reference to the metal silicate formation method using an organosilanol precursor, and thus, for the sake of brevity, such additional process will not be repeated here.

[0073] Section C: Exemplary Metal Silicate Layer Properties and Structures Including Metal Silicate Layers

[0074] According to an example of the present disclosure, the metal silicate formed by the method disclosed herein can be used as a metal silicate having the general formula MSi x O y A threshold adjustment layer of wherein M is a metal element, Si is silicon, O is oxygen, and x and y represent the composition of the metal silicate layer. In some embodiments, the metal (M) is selected from rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca, and Ba. In some embodiments, the metal (M) is selected from Al, Ga, Ti, Hf, and Zr. In some embodiments, the metal (M) is Al. In some embodiments, the metal (M) is Ga. In some embodiments, the metal (M) is Hf. In some embodiments, the metal silicate layer is selected from aluminum silicate, gallium silicate, titanium silicate, hafnium silicate, and zirconium silicate.

[0075] According to examples of the present disclosure, the metal silicate layer of the present disclosure is formed on the dielectric surface with an average layer thickness of less than 1.0Å, or less than 0.9Å, or less than 0.8Å, or less than 0.7Å, or less than 0.6Å, or less than 0.5Å, or less than 0.4Å, or less than 0.3Å, or less than 0.2Å. In some examples, the metal silicate layer is formed on the dielectric surface with an average layer thickness of between 0.1Å and 1Å, or between 0.2Å and 0.9Å, or between 0.3Å and 0.8Å, or between 0.4Å and 0.7Å, or between 0.5Å and 0.6Å. In some embodiments of the present disclosure, the metal silicate layer of the present disclosure may be formed as a continuous layer. In some embodiments of the present disclosure, the metal silicate layer may be formed as a discontinuous (i.e., non-continuous) layer.

[0076] According to a further example of the present disclosure, Figure 2B The structure 400 including the substrate 200 is shown after forming a metal silicate layer 402 on the silicon oxide surface. Although the metal silicate layer 402 is illustrated as a continuous layer, it should be understood that the metal silicate layer 402 can be discontinuous. As shown, in such an example, the metal silicate layer 402 is directly disposed on the silicon oxide surface of the silicon oxide layer 204. In addition, Figure 2CA structure 500 is shown including a complete gate stack formed on the metal silicate layer 402. The gate stack is completed by adding a high-k dielectric layer 502 disposed on the threshold adjustment layer 402 and a gate electrode 504 disposed on the high-k dielectric layer 502, according to an example of the present disclosure.

[0077] According to additional examples of the present disclosure, Figure 3B The structure 600 including the substrate 300 after forming a metal silicate layer 602 on the high-k dielectric surface is shown. Although the metal silicate layer 602 is illustrated as a continuous layer, it should be understood that the metal silicate layer 602 can be discontinuous. As shown, in such an example, the metal silicate layer 602 is directly disposed on the high-k dielectric surface of the high-k dielectric layer 306. In addition, Figure 3C A structure 700 is shown including a complete gate stack formed on a metal silicate layer 602. The gate stack is completed by adding a gate electrode layer 702 disposed on the threshold adjust layer 602, according to an example of the present disclosure.

[0078] The exemplary embodiments disclosed above do not limit the scope of the present invention, as these embodiments are merely examples of embodiments of the present invention, and the scope of the present invention is defined by the appended claims and their legal equivalents. Any equivalent embodiments are within the scope of the present invention. In fact, various modifications of the present disclosure, such as alternative useful combinations of the described elements, in addition to those shown and described herein, will become apparent to those skilled in the art from the description. Such modifications and embodiments are also intended to fall within the scope of the appended claims.

Claims

1. A method for forming a metal silicate layer for controlling a threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET), the method comprising the following steps: placing a substrate in a reaction chamber, the substrate comprising a dielectric surface; performing a pre-deposition treatment on the dielectric surface to form a treated dielectric surface, and A metal silicate threshold voltage shifting layer is formed directly on the treated dielectric surface by contacting the treated dielectric surface with a precursor comprising a silicon oxide precursor or an organosilanol precursor.

2. The method according to claim 1, wherein: The dielectric surface includes a silicon oxide surface.

3. The method according to claim 2, wherein: The pre-deposition treatment includes contacting the silicon oxide surface with a metal catalyst, the metal catalyst comprising a metal element selected from the group consisting of rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca, and Ba.

4. The method according to any one of claims 1 to 3, wherein: The organosilanol precursor comprises an -OH group and an -OR group attached to a silicon atom, wherein R comprises a linear or branched C1-C10 alkyl group.

5. The method according to any one of claims 1 to 4, wherein: The organosilanol precursor includes at least one alkoxy group and an -OH group attached to a silicon atom.

6. The method according to any one of claims 1 to 5, wherein: The organosilanol precursor comprises three alkoxy groups and an -OH group attached to a silicon atom.

7. The method according to any one of claims 1 to 6, wherein: The organosilanol precursor is selected from tri(tert-butoxy)silanol (TBS), tri(isopropoxy)silanol (TIS) and tri(tert-pentyloxy)silanol (TPS).

8. The method according to claim 1, wherein: The silicon oxide precursor includes a general formula M(OSiR1R2R3) x L y A single source precursor wherein M is a metal and each of R1-R3 is independently selected from a C1-10 alkyl group or a C1-10 alkoxy group, wherein L is an organic ligand, and wherein y is equal to zero or greater than zero, and the sum of x and y is equal to the valence of the metal (M).

9. The method according to claim 8, wherein: The silicon oxide precursor has the general formula M[OSi(O t Bu)3]4, wherein M is a metal selected from Al, Ga, Ti, Hf and Zr.

10. A method for forming a metal silicate layer for controlling a threshold voltage of a metal oxide semiconductor field effect transistor (MOSFET), the method comprising the steps of: placing a substrate in a reaction chamber, the substrate comprising a dielectric surface, the dielectric surface comprising a silicon oxide surface and / or a high-k dielectric surface; as well as A metal silicate threshold voltage shifting layer is deposited directly on the dielectric surface by contacting the dielectric surface with a metal silicon oxide precursor comprising a single source precursor comprising one or more silicon atoms, metal atoms, and oxygen atoms.

11. The method according to claim 10, wherein: The metal silicon oxide precursor has the general formula M(OSiR1R2R3) x L y , wherein M is a metal selected from the group consisting of rare earth elements, Zr, Al, Ga, Ti, Mg, Hf, Ta, V, Nb, Sr, Ca, and Ba, and wherein each of R1-R3 is independently selected from a C1-10 alkyl group or a C1-10 alkoxy group, wherein L is an organic ligand, and wherein y is equal to zero or greater than zero, and the sum of x and y is equal to the valence of the metal (M).

12. The method according to claim 11, wherein: The metal silicon oxide precursor is a homoleptic silicon oxide precursor.

13. The method according to claim 12, wherein: The homoleptic silicon oxide precursor is selected from tetrakis(trimethylsilicon oxide)Zr and tetrakis(trimethylsilicon oxide)Hf.

14. The method according to claim 11, wherein: The silicon oxide precursor is a heteroleptic silicon oxide precursor.

15. The method according to claim 14, wherein: The heteroleptic silicon oxide precursor comprises an organic ligand (L), wherein L is selected from Cp (cyclopentadienyl) ligand, acac (acetylacetonate) ligand and 2,2,6,6-tetramethylheptane-3,5-dioate (thd) ligand.

16. The method according to claim 15, wherein: The heteroleptic silicon oxide precursor is selected from Zr bis(trimethylsilicon oxide)bis(thd) and Hf bis(trimethylsilicon oxide)bis(thd).

17. A method for depositing a threshold voltage shift layer on a dielectric surface by a deposition process, the threshold voltage shift layer having a chemical formula comprising a metal element, a silicon element, and an oxygen element, wherein: A single source precursor including a metal silicon oxide precursor is used as a source of metal elements, silicon elements, and oxygen elements, and wherein the dielectric surface includes a silicon oxide surface and / or a high-k dielectric surface.

18. The method according to claim 17, wherein: The metal silicon oxide precursor includes a general formula M[OSi(O t Bu3)]4 compound, wherein M is a metal selected from Al, Ga, Ti, Hf and Zr.

19. The method according to claim 18, wherein: The threshold voltage adjustment layer is selected from aluminum silicate, gallium silicate, titanium silicate, hafnium silicate and zirconium silicate.

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