A method for fabricating metallized blind vias without plugging them

By plating copper, gold, and copper in the metallized blind vias, combined with resin filling and multi-step etching, the problem of adhesive flow into the vias is solved, ensuring the conductivity and reliability of the circuit board, making it suitable for electronic devices.

CN119653640BActive Publication Date: 2025-11-14珠海杰赛科技有限公司 +2
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Patent Information

Application Number
CN202411439185.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-15
Publication Date
2025-11-14
Estimated Expiration
2044-10-15

AI Technical Summary

Technical Problem

In the existing technology, it is difficult to manufacture metallized blind holes without resin plugging. During lamination, the semi-cured adhesive flows into the hole, causing blockage and making it impossible to insert pins.

Method used

By sequentially plating a metallized copper layer, a gold layer, and an additional copper layer inside the hole, and then filling the hole with resin to prevent adhesive from flowing in, and by multi-step engraving and back drilling, conductivity and reliable connection are ensured.

Benefits of technology

It achieves high-quality, reliable circuit board connections, saves costs, and is suitable for various electronic devices and application needs.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention discloses a method for fabricating a non-pluggable metallized blind via, comprising the following steps: Step 1: Take a first daughter board and a second daughter board, drill a first hole on the second daughter board, sequentially plate a metallized copper layer, a gold plating layer, and an additional copper plating layer on the surface of the first hole, and then fill it with resin; Step 2: Fabricate circuitry on the second daughter board; Step 3: Laminate the first daughter board, a prepreg, and the second daughter board to form a mother board; Step 4: Drill a second hole on the mother board, perform copper plating on the second hole, and plate copper on the surface of the mother board; Step 5: Fabricate circuitry on the mother board; Step 6: Plate a tin layer on the surface of the mother board and the second hole; Step 7: Perform alkaline etching on the mother board obtained in Step 6 and back-drill to remove the resin; Step 8: Perform external light imaging on the mother board obtained in Step 7 to expose the first hole; Step 9: Perform alkaline etching on the mother board obtained in Step 8 until the gold plating layer inside the first hole is exposed; Step 10: Remove the dry film used for external light imaging in Step 8.
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Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, and in particular to a method for manufacturing unplugged metallized blind vias. Background Technology

[0002] This invention mainly solves the problem of the difficulty in manufacturing metallized blind holes without resin plugging. Conventional manufacturing methods cannot avoid the flow of prepreg adhesive into the holes during lamination, which leads to hole blockage and ultimately makes it impossible to insert pins into the holes. Summary of the Invention

[0003] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes a method for manufacturing non-plugging metallized blind vias, which can prevent the adhesive of the prepreg from flowing into the vias during lamination.

[0004] A method for fabricating a non-plugging metallized blind via according to a first aspect embodiment of the present invention includes:

[0005] Step 1: Take the first daughter board and the second daughter board, drill the first hole on the second daughter board, and plate the surface of the first hole with a metallized copper layer, a gold layer and an additional copper layer in sequence. Then, fill the first hole with resin to form a resin block.

[0006] Step 2: Fabricate the circuitry on the second daughterboard;

[0007] Step 3: Place the prepreg between the first sub-board and the second sub-board, with the circuit layer of the second sub-board attached to the prepreg, and then laminate the first sub-board, the prepreg, and the second sub-board to form the motherboard;

[0008] Step 4: Drill a second hole in the motherboard, perform copper plating on the second hole to obtain the first copper layer, and at the same time, plate copper on the surface of the motherboard to obtain the second copper layer;

[0009] Step 5: Fabricate circuitry on both sides of the motherboard using external light imaging;

[0010] Step 6: Apply a tin plating layer to the surfaces of the motherboard and the second hole;

[0011] Step 7: Perform alkaline etching on the motherboard obtained in Step 6 to etch out the circuit, and use back drilling to drill open the second copper layer at the opening of the first hole and remove the resin.

[0012] Step 8: Perform external light imaging on the motherboard obtained in Step 7 to expose the first hole;

[0013] Step 9: Perform alkaline etching on the motherboard obtained in Step 8 until the gold plating layer in the first hole is exposed.

[0014] Step 10: Remove the dry film used in step 8 for external light imaging.

[0015] According to an embodiment of the present invention, a method for fabricating unplugged metallized blind vias has at least the following beneficial effects: By sequentially plating copper, gold, and copper on the first via to protect the copper wall, good conductivity and reliable connection of the inner wall of the first via are ensured, and the etching time does not need to be overly calculated during subsequent alkaline etching, saving costs; copper plating on the second via and copper plating on the motherboard surface contribute to conductivity; alkaline etching and other processing steps ensure precise and reliable circuit paths and connections on the circuit board; resin filling of the vias prevents PP glue from flowing into the vias, and laminating multiple sub-boards to form a motherboard helps to achieve complex circuit layouts and component distributions, thereby improving the functionality and performance of the circuit board; the final step of removing the dry film used to fabricate the circuit helps to remove the cover layer used to protect specific areas, ensuring the final appearance and function of the circuit board; in general, these steps combined can provide high-quality, reliable, and high-performance printed circuit boards suitable for various electronic devices and application requirements.

[0016] According to some embodiments of the present invention, the external light imaging includes exposure, development and etching processes.

[0017] According to some embodiments of the present invention, in step one, the thickness of the copper plating layer on the first hole is greater than 150 μm.

[0018] According to some embodiments of the present invention, in step seven, the diameter of the back drill hole is 0.075 mm smaller on one side than the diameter of the first hole.

[0019] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0020] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0021] Figure 1 This is a schematic diagram of drilling holes in the second sub-board according to an embodiment of the present invention;

[0022] Figure 2 This is a schematic diagram of copper plating in the first hole according to an embodiment of the present invention;

[0023] Figure 3 This is a schematic diagram of gold plating on the first or second hole in an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of copper plating added to the first or second sub-board in an embodiment of the present invention;

[0025] Figure 5 This is a schematic diagram of resin plugging the first or second sub-plate according to an embodiment of the present invention;

[0026] Figure 6 This is a schematic diagram of the etching of the circuitry on the first or second sub-board according to an embodiment of the present invention;

[0027] Figure 7 This is a schematic diagram of the motherboard lamination according to an embodiment of the present invention;

[0028] Figure 8 This is a schematic diagram of drilling holes in the motherboard according to an embodiment of the present invention;

[0029] Figure 9 This is a schematic diagram of the metallization of the second hole in the mother plate according to an embodiment of the present invention;

[0030] Figure 10 This is a schematic diagram of applying dry film to the motherboard according to an embodiment of the present invention;

[0031] Figure 11 This is a schematic diagram of copper-tin plating on the motherboard according to an embodiment of the present invention;

[0032] Figure 12 This is a schematic diagram of motherboard circuit etching according to an embodiment of the present invention;

[0033] Figure 13 This is a schematic diagram of back drilling of blind holes in the motherboard according to an embodiment of the present invention;

[0034] Figure 14 This is a schematic diagram of the motherboard film application according to an embodiment of the present invention;

[0035] Figure 15 This is a schematic diagram of the motherboard etching according to an embodiment of the present invention;

[0036] Figure 16 This is a schematic diagram of the motherboard unmolding process according to an embodiment of the present invention. Detailed Implementation

[0037] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the invention.

[0038] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0039] In the description of this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0040] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0041] Reference Figures 1 to 16 A method for fabricating a non-plugging metallized blind via, comprising:

[0042] Step 1: Take the first daughter board 100 and the second daughter board 200, drill the first hole 210 on the second daughter board 200, and plate the surface of the first hole 210 sequentially with a metallized copper layer 211, a gold plating layer 212 and an additional copper plating layer 213, and then insert resin into the first hole 210 to form a resin block 214.

[0043] Step 2: Fabricate the circuitry on the second daughterboard 200;

[0044] Step 3: Place the prepreg 400 between the first sub-board 100 and the second sub-board 200, with the circuit layer of the second sub-board 200 attached to the prepreg 400, and then laminate the first sub-board 100, the prepreg 400 and the second sub-board 200 to form the motherboard 300.

[0045] Step 4: Drill a second hole 310 on the motherboard 300, perform copper plating on the second hole 310 to obtain the first copper layer 311, and at the same time, plate copper on the surface of the motherboard 300 to obtain the second copper layer 312.

[0046] Step 5: Fabricate circuitry on both sides of the motherboard 300 using external light imaging;

[0047] Step 6: Apply a tin plating layer 313 to the surface of the motherboard 300 and the second hole 310;

[0048] Step 7: Perform alkaline etching on the motherboard 300 obtained in Step 6 to etch out the circuit. Use back drilling to drill open the second copper layer 312 at the opening of the first hole 210 and remove the resin.

[0049] Step 8: Perform external light imaging on the mother plate 300 obtained in Step 7 to expose the first hole 210;

[0050] Step 9: Perform alkaline etching on the motherboard 300 obtained in Step 8 until the gold plating layer 212 inside the first hole 210 is exposed.

[0051] Step 10: Remove the dry film used in step 8 for external light imaging.

[0052] By sequentially plating copper, gold, and copper onto the first hole 210, good conductivity and reliable connection of the inner wall of the first hole 210 are ensured. This eliminates the need for excessive calculation of etching time during subsequent alkaline etching, saving costs. Plating copper onto the second hole 310 and copper onto the surface of the motherboard 300 contributes to conductivity. Alkaline etching and other processing steps ensure precise and reliable circuit paths and connections on the circuit board. Resin-filled holes and lamination of multiple daughterboards to form the motherboard 300 facilitate complex circuit layouts and component distributions, thereby improving the functionality and performance of the circuit board. The final step of removing the dry film from the circuit fabrication process helps remove the cover layer used to protect specific areas, ensuring the final appearance and function of the circuit board. In summary, these steps combined provide a high-quality, reliable, and high-performance printed circuit board suitable for a wide range of electronic devices and applications.

[0053] In some embodiments, external light imaging includes exposure, development, and etching processes.

[0054] In some embodiments, in step one, the thickness of the copper plating layer 213 of the first hole 210 is greater than 150 μm.

[0055] In some embodiments, in step seven, the diameter of the back drill hole is 0.075 mm smaller on one side than the diameter of the first hole 210.

[0056] In some embodiments, the first hole 210 is made in the inner layer, which reduces the problem of limited copper plating capacity when copper is plated in the hole. After the first hole 210 is made in the inner layer, resin is filled to avoid the problem of PP glue entering the hole. Before filling the first hole 210 with resin in the inner layer, gold is plated first and then thick copper is plated to avoid the problem that the back drill cannot completely clean the resin in the hole and that the copper under the gold is etched during etching.

[0057] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A method for fabricating a non-plugging metallized blind via, characterized in that, include: Step 1: Take the first sub-board (100) and the second sub-board (200), drill the first hole (210) on the second sub-board (200), and plate the surface of the first hole (210) sequentially with a metallized copper layer (211), a gold plating layer (212) and an additional copper plating layer (213), and then insert resin into the first hole (210) to form a resin block (214); Step 2: Fabricate the circuitry on the second sub-board (200); Step 3: Place the prepreg (400) between the first sub-board (100) and the second sub-board (200), with the circuit layer of the second sub-board (200) attached to the prepreg (400), and then laminate the first sub-board (100), the prepreg (400) and the second sub-board (200) to form the motherboard (300); Step 4: Drill a second hole (310) on the motherboard (300), perform copper plating on the second hole (310) to obtain a first copper layer (311), and at the same time, plate copper on the surface of the motherboard (300) to obtain a second copper layer (312). Step 5: Fabricate circuitry on both sides of the motherboard (300) using external light imaging; Step 6: Apply a tin plating layer (313) to the surfaces of the motherboard (300) and the second hole (310); Step 7: Perform alkaline etching on the motherboard (300) obtained in Step 6 to etch out the circuit, and use back drilling to drill open the second copper layer (312) at the opening of the first hole (210) and remove the resin. Step 8: Perform external light imaging on the mother plate (300) obtained in step 7 to expose the first hole (210); Step 9: Perform alkaline etching on the motherboard (300) obtained in step 8 until the gold plating layer (212) in the first hole (210) is exposed; Step 10: Remove the dry film used in step 8 for external light imaging.

2. The method for fabricating a non-plugging metallized blind via according to claim 1, characterized in that, The external light imaging includes exposure, development, and etching processes.

3. The method for fabricating a non-plugging metallized blind via according to claim 1, characterized in that, In step one, the thickness of the copper plating layer (213) of the first hole (210) is greater than 150 μm.

4. The method for fabricating a non-plugging metallized blind via according to claim 1, characterized in that, In step seven, the diameter of the back drill hole is 0.075 mm smaller on one side than the diameter of the first hole (210).

Citation Information

Patent Citations

  • Method for processing PCB with step groove

    CN103391682A

  • Machining method of metalized blind hole with high thickness-diameter ratio

    CN113347810A