Preparation method of silicon carbide field effect power transistor integrated with Schottky diode

Abstract

The invention belongs to the technical field of semiconductor power devices, relates to a novel silicon carbide power device metal contact preparation method, and particularly provides a preparation method of a silicon carbide field effect power transistor integrated with a Schottky diode, which is used for simplifying the preparation process, reducing the preparation cost and shortening the manufacturing period. The method is especially suitable for large-scale industrial production. In the preparation process of the device electrode, a Schottky contact hole and a grid electrode contact hole are manufactured by using a mask through a one-time etching process, ohmic contact is realized above a source electrode by using nickel metal through a photoetching plate, and Schottky contact is formed above a Schottky region and a grid electrode by using titanium metal through a photoetching plate. According to the invention, good performance of ohmic contact and Schottky contact can be ensured, the manufacturing cost is saved in large-scale production, and the manufacturing period of the device is also reduced at the same time.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor power devices, relates to a method for preparing a novel metal contact of a silicon carbide power device, and specifically provides a method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode. Background Art

[0002] As one of the most popular third-generation semiconductor materials, silicon carbide's process manufacturing technology is developing rapidly and is gradually being commercialized in some high-temperature and high-pressure fields. Field-effect transistor power devices with integrated Schottky diodes have attracted much attention due to their excellent reverse recovery performance and superior characteristics of suppressing bipolar degradation of devices. In the manufacture of silicon carbide power devices, the annealing temperature of ohmic contacts is 950℃~1050℃, while the formation temperature of Schottky contacts is only 400~600℃. In the prior art, the lead-out of each electrode of the device requires photolithography and etching processes with multiple masks of different shapes to form contact holes. For field-effect transistor power devices with integrated Schottky diodes, Schottky contact holes, source ohmic contact holes and gate contact holes need to be etched. If each electrode contact hole is made using a separate mask, it will inevitably lead to high costs and long manufacturing cycles in the industrial large-scale production process. Summary of the invention

[0003] The object of the present invention is to provide a method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode, so as to simplify the preparation process, reduce the preparation cost, shorten the manufacturing cycle, and is particularly suitable for large-scale industrial production.

[0004] To achieve the above object, the technical solution adopted by the present invention is:

[0005] A method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode, characterized in that it comprises the following steps:

[0006] Step 1: Using the oxide layer as a patterned shielding layer, implanting lightly doped ions of the first conductivity type on the silicon carbide substrate to form lightly doped regions of the first conductivity type on both sides of the silicon carbide substrate.

[0007] Step 2: shielding the first conductive type lightly doped region with an oxide layer again, performing second conductive type lightly doped ion implantation on the silicon carbide substrate, and forming a second conductive type well region in the middle of the first conductive type lightly doped region on both sides;

[0008] Step 3. Using a self-aligned process to grow an ion implantation mask, a mask is formed on the oxide layer and the two side regions on the second conductive type well region in step 2, and first conductive type heavily doped ions are implanted on the second conductive type well region to form a first conductive type active region in the middle region on the second conductive type well region;

[0009] Step 4. Using the oxide layer as a patterned shielding layer again, implanting heavily doped ions of the second conductivity type into the second conductivity type well region to form a second conductivity type active region adjacent to the left side of the first conductivity type active region, and the left side of the second conductivity type active region is adjacent to the first conductivity type lightly doped region;

[0010] Step 5. Annealing the device in step 4 at 1700° C.;

[0011] Step 6. Depositing an oxide layer on the device surface, the oxide layer covers a portion of the right side of the second conductivity type active region, the first conductivity type well region on the right side of the second conductivity type active region, and the first conductivity type lightly doped region on the right side, and then depositing a polysilicon gate on the oxide layer;

[0012] Step 7. Deposit an oxide layer again on the device surface to cover the entire device;

[0013] Step 8. Using the first mask, etching the oxide layer through a photolithography process to form an ohmic contact window above the first conductivity type active area and the second conductivity type active area;

[0014] Step 9. Depositing metal nickel in the ohmic contact window by electron beam evaporation process to form a metal nickel layer, wherein the metal nickel layer forms ohmic contact with the first conductive type active region and the second conductive type active region;

[0015] Step 10. Annealing the device in step 9 at 950° C. to 1050° C.;

[0016] Step 11. Use a second mask to etch the oxide layer through a photolithography process to form a Schottky contact window above the first conductivity type lightly doped region 4 on the left side and a gate contact window above the polysilicon gate;

[0017] Step 12. Using the first mask again, depositing metal titanium on the metal nickel layer to form a metal titanium layer, the metal titanium layer and the metal nickel layer form an ohmic contact; using the second mask again, depositing metal titanium in the Schottky contact window and the gate contact window to form a metal titanium layer, the metal titanium layer and the first conductive type lightly doped region form a Schottky contact, and the metal titanium layer and the polysilicon gate form an ohmic contact;

[0018] Step 13. Anneal the device in step 12 at 400-600° C. to obtain a silicon carbide field effect power transistor with an integrated Schottky diode.

[0019] Furthermore, the oxide layer is deposited using a low pressure chemical vapor deposition (LPCVD) process.

[0020] Furthermore, the metal nickel layer and the metal titanium layer are deposited by electron beam evaporation process.

[0021] Based on the above technical solution, the beneficial effects of the present invention are:

[0022] The present invention provides a method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode. In the process of preparing the device electrode, a Schottky contact hole and a gate contact hole are made by using a mask plate through a single etching process. Ohmic contact is achieved above the source electrode by using a photomask and nickel metal. Schottky contact is formed above the Schottky region and the gate by using a photomask and titanium metal. Good performance of both the ohmic contact and the Schottky contact can be ensured, and in large-scale production, not only the manufacturing cost is saved, but also the manufacturing cycle of the device is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 The schematic diagram is a theoretical structure diagram of a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0024] Figure 2 The figure is a schematic diagram of the actual structure of the silicon carbide field effect power transistor with integrated Schottky diode in the present invention.

[0025] Figure 3 The figure is a flow chart of step 1 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0026] Figure 4 The figure is a flow chart of step 2 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0027] Figure 5 The figure is a flow chart of step 3 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0028] Figure 6 The figure is a flow chart of step 4 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0029] Figure 7 The figure is a flow chart of step 6 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0030] Figure 8The figure is a flow chart of step 7 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0031] Fig. 9 The figure is a flow chart of step 8 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0032] Fig.10 The figure is a flow chart of step 9 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0033] Fig.11 The figure is a flow chart of step 11 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention.

[0034] Fig.12 The figure is a flow chart of step 12 of the method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode in the present invention. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and beneficial effects of the present invention more clear, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0036] This embodiment provides a method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode. The theoretical structure of the silicon carbide field effect power transistor is as follows: Figure 1 As shown, the actual structure of the silicon carbide field effect power transistor prepared in this embodiment is as follows Figure 2 As shown, it specifically includes: a silicon carbide substrate 5, a metallized drain 6 arranged below the silicon carbide substrate, a first conductivity type lightly doped region 4 and a first conductivity type well region 7 arranged above the silicon carbide substrate, and the first conductivity type well region is arranged between two first conductivity type lightly doped regions, a first conductivity type active region 2 and a second conductivity type active region 3 arranged in the first conductivity type well region, and a metal source and a polysilicon gate; the second conductivity type active region is adjacently arranged on the left side of the first conductivity type active region, and is adjacently arranged to the first conductivity type lightly doped region on the left side, the first conductivity type active region 2 and the second conductivity type active region 3 are arranged in the first conductivity type well region. A nickel metal layer 10 is arranged across the second conductive type active area 3 to form an ohmic contact, a titanium metal layer 20 is arranged on the first conductive type lightly doped area on the left and on the nickel metal layer 10 as a metallized source 8, and the first conductive type lightly doped area on the left forms a Schottky contact with the titanium metal layer; an oxide layer 1 is arranged on other areas on the second conductive type active area 3 and on the first conductive type well area on its right side, and on the first conductive type lightly doped area on the right side, a polysilicon gate 9 is arranged on the oxide layer 1, a titanium metal layer is arranged on the polysilicon gate 9 as a metallized gate, and the polysilicon gate forms an ohmic contact with the titanium metal layer.

[0037] Specifically, the method for preparing the above-mentioned silicon carbide field effect power transistor with integrated Schottky diode comprises the following steps:

[0038] Step 1. Using the oxide layer as a patterned shielding layer, perform first conductivity type lightly doped ion implantation on the silicon carbide substrate to form first conductivity type lightly doped regions on both sides of the silicon carbide substrate, such as Figure 3 As shown;

[0039] Step 2. Use the oxide layer to shield the first conductive type lightly doped region again, perform second conductive type lightly doped ion implantation on the silicon carbide substrate, and form a second conductive type well region between the first conductive type lightly doped regions on both sides, such as Figure 4 As shown;

[0040] Step 3. Use a self-aligned process to grow an ion implantation mask. In step 2, a mask 11 is formed on the oxide layer and the two side regions of the second conductive type well region. The mask is made of oxide or polysilicon. The first conductive type heavily doped ions are implanted on the second conductive type well region to form a first conductive type active region in the middle region of the second conductive type well region. Figure 5 As shown;

[0041] Step 4. The oxide layer is used as a patterned shielding layer again, and second conductivity type heavily doped ions are implanted on the second conductivity type well region to form a second conductivity type active region adjacent to the left side of the first conductivity type active region, and the left side of the second conductivity type active region is adjacent to the first conductivity type lightly doped region, such as Figure 6 As shown;

[0042] Step 5. Annealing the device in step 4 at 1700° C. to activate the impurities and perform lattice repair after all ion implantation is completed;

[0043] Step 6. A low pressure chemical vapor deposition (LPCVD) process is used to deposit an oxide layer 1 on the device surface, the oxide layer covers a portion of the right side of the second conductive type active region 3, the first conductive type well region on the right side of the second conductive type active region 3, and the first conductive type lightly doped region on the right side, and then a polysilicon gate 9 is deposited on the oxide layer, as shown in FIG. Figure 7 As shown;

[0044] Step 7. Use low pressure chemical vapor deposition (LPCVD) process to deposit an oxide layer on the device surface again to cover the entire device. The oxide layer has high purity, uniform thickness and good step coverage. Figure 8 As shown;

[0045] Step 8. Use the first mask 30 to etch the oxide layer through a photolithography process to form an ohmic contact window above the first conductive type active area 2 and the second conductive type active area 3. Fig. 9 As shown;

[0046] Step 9. Use electron beam evaporation process to deposit metal nickel on the ohmic contact window to form a metal nickel layer. Fig.10 As shown;

[0047] Step 10. Annealing the device in step 9 at 950° C. to 1050° C., so that the metal nickel layer forms a low-resistance ohmic contact electrode with the first conductive type active region 2 and the second conductive type active region 3;

[0048] Step 11. Use the second mask 31 to etch the oxide layer through a photolithography process to form a Schottky contact window above the first conductivity type lightly doped region 4 on the left side and a gate contact window above the polysilicon gate. Fig.11 As shown; in the silicon carbide process, the ideal metal for Schottky contact is titanium, and the metal of the gate contact hole and the ohmic contact hole can also be connected with titanium. Therefore, in order to reduce the production cost, the Schottky contact layer and the gate contact layer are prepared at the same time in the process design;

[0049] Step 12. Use the first mask 30 and the second mask 31 again, and use the electron beam evaporation process to deposit metal titanium in the Schottky contact window and the gate contact window to form a metal titanium layer. The metal titanium layer forms a Schottky contact with the first conductive type lightly doped region, and the metal titanium layer forms an ohmic contact with the polysilicon gate; the first mask 30 and the second mask 31 are used in combination to form the effect of the third mask 32, such as Fig.12 As shown;

[0050] Step 13. Anneal the device in step 12 at 400-600° C. to obtain a silicon carbide field effect power transistor with an integrated Schottky diode.

[0051] In this embodiment, the first conductive type region is an N-type impurity doped region, and the second conductive type region is a P-type impurity doped region; it should be noted that in other embodiments, the first conductive type region may be a P-type impurity doped region, and the second conductive type region corresponds to an N-type impurity doped region.

[0052] The above description is only a specific implementation mode of the present invention. Any feature disclosed in this specification, unless otherwise stated, can be replaced by other alternative features that are equivalent or have similar purposes; all the disclosed features, or all the steps in the methods or processes, except for mutually exclusive features and / or steps, can be combined in any way.

Claims

1. A method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode, characterized in that: The following steps are involved: Step 1: Using the oxide layer as a patterned shielding layer, implanting lightly doped ions of the first conductivity type on the silicon carbide substrate to form lightly doped regions of the first conductivity type on both sides of the silicon carbide substrate. Step 2. Use the oxide layer again to shield the first conductive type lightly doped region, perform second conductive type lightly doped ion implantation on the silicon carbide substrate, and form a second conductive type well region in the middle of the first conductive type lightly doped region on both sides; Step 3. Using a self-aligned process to grow an ion implantation mask, a mask is formed on the oxide layer and the two side regions on the second conductive type well region in step 2, and first conductive type heavily doped ions are implanted on the second conductive type well region to form a first conductive type active region in the middle region on the second conductive type well region; Step 4. Using the oxide layer as a patterned shielding layer again, implanting heavily doped ions of the second conductivity type into the second conductivity type well region to form a second conductivity type active region adjacent to the left side of the first conductivity type active region, and the left side of the second conductivity type active region is adjacent to the first conductivity type lightly doped region; Step 5. Annealing the device in step 4 under a preset temperature condition; Step 6. Depositing an oxide layer on the device surface, the oxide layer covers a portion of the right side of the second conductivity type active region, the first conductivity type well region on the right side of the second conductivity type active region, and the first conductivity type lightly doped region on the right side, and then depositing a polysilicon gate on the oxide layer; Step 7. Deposit an oxide layer again on the device surface to cover the entire device; Step 8. Using the first mask, etching the oxide layer through a photolithography process to form an ohmic contact window above the first conductivity type active area and the second conductivity type active area; Step 9. Depositing metal nickel in the ohmic contact window by electron beam evaporation process to form a metal nickel layer, wherein the metal nickel layer forms ohmic contact with the first conductive type active region and the second conductive type active region; Step 10. Annealing the device in step 9 under a preset temperature condition; Step 11. Use a second mask to etch the oxide layer through a photolithography process to form a Schottky contact window above the first conductivity type lightly doped region 4 on the left side and a gate contact window above the polysilicon gate; Step 12. Using the first mask again, depositing metal titanium on the metal nickel layer to form a metal titanium layer, the metal titanium layer and the metal nickel layer form an ohmic contact; using the second mask again, depositing metal titanium in the Schottky contact window and the gate contact window to form a metal titanium layer, the metal titanium layer and the first conductive type lightly doped region form a Schottky contact, and the metal titanium layer and the polysilicon gate form an ohmic contact; Step 13. Anneal the device in step 12 under preset temperature conditions to obtain a silicon carbide field effect power transistor with an integrated Schottky diode.

2. The method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode according to claim 1, characterized in that: The annealing temperature in step 5 is 1700°C.

3. The method for preparing a silicon carbide field effect power transistor with an integrated Schottky diode according to claim 1, characterized in that: The annealing temperature in step 10 is 950°C to 1050°C.

4. The method for preparing a silicon carbide field effect power transistor with integrated Schottky diode according to claim 1, characterized in that: The annealing temperature in step 13 is 400-600°C.

5. The method for preparing a silicon carbide field effect power transistor with integrated Schottky diode according to claim 1, characterized in that: The oxide layer is deposited using a low pressure chemical vapor deposition (LPCVD) process.

6. The method for preparing a silicon carbide field effect power transistor with integrated Schottky diode according to claim 1, characterized in that: The metal nickel layer and the metal titanium layer are deposited by electron beam evaporation process.

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