Method for improving passivation effect of tubular PECVD (Plasma Enhanced Chemical Vapor Deposition) deposited intrinsic amorphous silicon film

Abstract

The invention relates to a method for improving the passivation effect of a tubular PECVD (Plasma Enhanced Chemical Vapor Deposition) intrinsic amorphous silicon film, and belongs to the technical field of solar cell manufacturing. Comprising the following steps: depositing a back intrinsic amorphous silicon layer on the back of a crystalline silicon substrate; replacing a deposition surface, a graphite boat and a deposition process cavity, and depositing a front intrinsic amorphous silicon layer on the front of the crystalline silicon substrate; a doping layer deposition process cavity is replaced, and an N-type doping layer is deposited on the front face of the front face intrinsic amorphous silicon layer; carrying out light soaking, and repairing the damaged intrinsic amorphous silicon thin film in the atmospheric environment; depositing a P-type doping layer on the back surface of the back intrinsic amorphous silicon layer; preparing a front transparent conductive film layer and a back transparent conductive film layer; and preparing front and back metal electrodes. Light soaking is introduced in the sheet turning process after deposition of the back intrinsic amorphous silicon layer, the front intrinsic amorphous silicon layer and the N-type doping layer is completed, the passivation effect of the intrinsic amorphous silicon layer damaged due to exposure in the atmospheric environment is repaired, and the photoelectric conversion efficiency of the cell is improved.

Description

Technical Field

[0001] The invention relates to the technical field of solar cell manufacturing, and in particular to a method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon film. Background Art

[0002] Heterojunction solar cells (HJT) are a new type of solar cell technology that combines the advantages of crystalline silicon cells and thin-film cells. It achieves higher photoelectric conversion efficiency by depositing amorphous silicon thin films on crystalline silicon. The advantages of heterojunction technology are its high efficiency, high stability and low temperature coefficient. These characteristics enable heterojunction solar cells to maintain high performance in high temperature environments, while showing excellent stability in long-term operation. In addition, the manufacturing process of heterojunction cells is simpler, which helps to reduce production costs and improve production efficiency. As the technology continues to mature, heterojunction solar cells have broad application prospects. They are not only suitable for traditional photovoltaic power stations, but also can be used in building integrated photovoltaics (BIPV), portable electronic devices, aerospace and other fields. With the growth of global demand for renewable energy, heterojunction technology is expected to occupy an important position in the future photovoltaic market.

[0003] Like traditional solar cells, to improve the photoelectric conversion efficiency of heterojunction solar cells, it is necessary to consider reducing the optical and electrical losses of heterojunction solar cells, and it is necessary to improve the three main characterization parameters of the solar cell: open circuit voltage (Voc), short-circuit current (Isc), and fill factor (FF). Among them, the high Voc of heterojunction solar cells is due to the excellent passivation effect of high-quality intrinsic amorphous silicon film (ia-Si:H) on the surface of single-crystal silicon wafers. Due to the presence of a large number of dangling bonds on the surface of the crystalline silicon substrate, minority carriers excited by light are easily captured by dangling bonds after reaching the surface, resulting in surface recombination, which limits the open circuit voltage of the photovoltaic cell and also reduces the fill factor of the cell, resulting in reduced efficiency of the solar cell. Inhibiting surface recombination through a surface passivation layer has become a prerequisite for obtaining high-efficiency solar cells. Depositing hydrogen-rich ia-Si:H films on the front and back sides of silicon wafers can effectively hydrogenate dangling bonds and reduce surface defects, inhibiting surface recombination of minority carriers, thereby significantly increasing minority carrier lifetime, improving the open circuit voltage and fill factor of photovoltaic cells, and ultimately improving cell efficiency.

[0004] At present, the equipment used for depositing hydrogenated amorphous silicon thin films in heterojunction solar cells is mainly plate-type PECVD. The main problems of plate-type PECVD are that the vacuum chamber is large, which leads to high equipment prices; the equipment is large in size, with high costs for factory services and automation, and occupies a large area; the flat substrate has a small production capacity for a single device. Plate-type PECVD is one of the main factors currently limiting the large-scale mass production of heterojunction solar cells.

[0005] Tubular PECVD has the advantages of small footprint and higher production capacity. It increases the production capacity of a single device while reducing the equipment footprint, increases the utilization rate of the plant, and reduces the overall cost. Therefore, using tubular PECVD to deposit amorphous silicon layers can increase the production capacity of amorphous silicon layer deposition, reduce production costs, and promote the rapid development of heterojunction solar cells. When using tubular PECVD to deposit amorphous silicon layers, the intrinsic amorphous silicon film and the doped layer film need to be deposited in different process reaction chambers, respectively. The reaction chambers are in the atmospheric environment. After the intrinsic amorphous silicon film is deposited, it is exposed to the atmospheric environment, which will affect the passivation effect of the intrinsic layer, resulting in an increase in the recombination rate of the single crystal silicon surface, limiting the open circuit voltage of the photovoltaic cell, and also reducing the fill factor of the photovoltaic cell, affecting the photoelectric conversion efficiency of the cell. Therefore, developing a simple, efficient, and low-cost method to improve the passivation effect of the intrinsic amorphous silicon film deposited by tubular PECVD is of great significance for promoting the development of heterojunction solar cells. Summary of the invention

[0006] In order to solve the above technical problems, the present invention provides a method for improving the passivation effect of intrinsic amorphous silicon thin film deposited by tubular PECVD. The technical solution of the present invention is as follows:

[0007] A method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film, comprising:

[0008] S1, selecting a single crystal silicon wafer, and texturing it to form a pyramid structure as a crystalline silicon substrate;

[0009] S2, depositing a back intrinsic amorphous silicon layer on the back side of the crystalline silicon substrate;

[0010] S3, replacing the deposition surface, replacing the graphite boat and the deposition process chamber, and depositing a front intrinsic amorphous silicon layer on the front side of the crystalline silicon substrate;

[0011] S4, replacing the doping layer deposition process chamber, and depositing an N-type doping layer on the front side of the front intrinsic amorphous silicon layer;

[0012] S5, after the N-type doping layer is deposited, light immersion is performed to repair the intrinsic amorphous silicon film damaged in the atmospheric environment;

[0013] S6, depositing a P-type doped layer on the back side of the back intrinsic amorphous silicon layer;

[0014] S7, preparing a front transparent conductive thin film layer and a back transparent conductive thin film layer on the front side of the N-type doped layer and the back side of the P-type doped layer respectively;

[0015] S8, preparing a front metal electrode and a back metal electrode on the front side of the front transparent conductive film layer and on the back side of the back transparent conductive film layer, respectively.

[0016] Optionally, the light soaking comprises:

[0017] A continuous band light source with a wavelength range of 380-1060nm is used to irradiate the crystalline silicon substrate on which the N-type doped layer is deposited, the illumination intensity is 50-150sun, the illumination time is controlled at 60-150s, and the temperature is controlled at 150-240℃.

[0018] Optionally, the single crystal silicon wafer is an N-type single crystal silicon wafer with a thickness of 40-160 um.

[0019] Optionally, the size of the velvet surface of the pyramid structure is controlled to be 0.5-10um.

[0020] Optionally, when S2 deposits the back intrinsic amorphous silicon layer and S3 deposits the front intrinsic amorphous silicon layer, the flow rate of silane is controlled at 600-2500sccm, the dilution ratio of hydrogen to silane is 5-100:1, the thickness of the front intrinsic amorphous silicon layer and the back intrinsic amorphous silicon layer are both controlled at 4-9nm, the microstructure factor is 20%-70%, and the hydrogen content is 18%-60%.

[0021] Optionally, the N-type doped layer is N-type amorphous silicon, N-type microcrystalline silicon or N-type microcrystalline silicon oxide;

[0022] For N-type amorphous silicon, the dilution ratio of hydrogen to silane is 5-20:1, the doping ratio of phosphine to silane is 3%-5%, and the thickness is 5-9nm;

[0023] For N-type microcrystalline silicon, the dilution ratio of hydrogen to silane is 100-400:1, the doping ratio of phosphine to silane is 3%-5%, and the thickness is 10-15nm;

[0024] For N-type microcrystalline silicon oxide, the dilution ratio of hydrogen to silane is 100-400:1, the doping ratio of phosphine to silane is 3%-5%, the ratio of carbon dioxide to silane is 0.5-1.5, and the thickness is 10-20nm.

[0025] Optionally, the P-type doped layer is P-type amorphous silicon or P-type microcrystalline silicon;

[0026] For P-type amorphous silicon, the ratio of hydrogen to silane is 5-20:1, the doping ratio of borane to silane is 2%-4%, and the thickness is 9-15nm;

[0027] For P-type microcrystalline silicon, the ratio of hydrogen to silane is 250-400:1, the doping ratio of borane to silane is 0.2%-0.5%, and the thickness is 25-35nm.

[0028] Optionally, the front transparent conductive film layer and the back transparent conductive film layer are both made of one or any combination of ITO, IWO, and AZO, and have a thickness of 90-120 nm.

[0029] Optionally, the number of main grids of the front metal electrode and the back metal electrode is 0-28, the number of fine grids is 40-160, and the fine grid line width is 15-60 μm.

[0030] Optionally, the light immersion is completed in a light immersion device, which includes a process chamber, a heating lamp tube is installed at the top entrance of the process chamber, a lighting mechanism is installed in the middle of the top of the process chamber, a cooling fan is installed at the top outlet of the process chamber, two conveying rollers are installed on both sides of the bottom of the process chamber, a grid-shaped conveyor belt is provided on the two conveying rollers, and a heating lamp tube is also installed at the bottom entrance of the process chamber.

[0031] All the above optional technical solutions can be combined arbitrarily, and the present invention does not provide detailed descriptions of the structures after the combinations.

[0032] By means of the above scheme, the beneficial effects of the present invention are as follows:

[0033] By introducing light immersion during the flipping process after the deposition of the back intrinsic amorphous silicon layer, the front intrinsic amorphous silicon layer and the N-type doped layer, the passivation effect of the intrinsic amorphous silicon layer destroyed by exposure to the atmospheric environment is repaired, thereby improving the photoelectric conversion efficiency of heterojunction solar cells.

[0034] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a flow chart of a method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film provided by an embodiment of the present invention.

[0036] Figure 2 Schematic diagram of the structure of the light immersion device in an embodiment of the present invention.

[0037] Figure 3 yes Figure 2 Bottom view after cutting through the middle.

[0038] Figure 4 yes Figure 2 A top view after cutting through the middle. DETAILED DESCRIPTION

[0039] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0040] like Figure 1 As shown, the method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film provided by the embodiment of the present invention comprises:

[0041] S1, select a single crystal silicon wafer, and texture it to form a pyramid structure as a crystalline silicon substrate.

[0042] In a specific implementation, the single crystal silicon wafer is an N-type single crystal silicon wafer with a thickness of 40-160 um. The pyramid structure is prepared by using KOH and a texturing additive, and the size of the texturing surface is 0.5-10 um.

[0043] S2, depositing a back intrinsic amorphous silicon layer on the back side of the crystalline silicon substrate.

[0044] In a specific embodiment, the back intrinsic amorphous silicon layer is a composite structure. When S2 is used to deposit the back intrinsic amorphous silicon layer, the flow rate of silane is controlled at 600-2500sccm, the dilution ratio of hydrogen to silane is 5-100:1, the thickness of the front intrinsic amorphous silicon layer and the back intrinsic amorphous silicon layer are both controlled at 4-9nm, the microstructure factor is 20%-70%, and the hydrogen content is 18%-60%.

[0045] S3, replacing the deposition surface, replacing the graphite boat and the deposition process chamber, and depositing a front intrinsic amorphous silicon layer on the front side of the crystalline silicon substrate.

[0046] In a specific embodiment, the front intrinsic amorphous silicon layer deposited on the front side is a composite structure. When S3 deposits the front intrinsic amorphous silicon layer, the flow rate of silane is controlled at 600-2500sccm, the dilution ratio of hydrogen to silane is 5-100:1, the thickness of the front intrinsic amorphous silicon layer and the back intrinsic amorphous silicon layer are both controlled at 4-9nm, the microstructure factor is 20%-70%, and the hydrogen content is 18%-60%.

[0047] S4, replacing the doping layer deposition process chamber of the tubular PECVD, and depositing an N-type doping layer on the front side of the front intrinsic amorphous silicon layer.

[0048] In a specific embodiment, the N-type doped layer is N-type amorphous silicon, N-type microcrystalline silicon or N-type microcrystalline silicon oxide; for N-type amorphous silicon, the dilution ratio of hydrogen to silane is 5-20:1, the doping ratio of phosphine to silane is 3%-5%, and the thickness is 5-9nm; for N-type microcrystalline silicon, the dilution ratio of hydrogen to silane is 100-400:1, the doping ratio of phosphine to silane is 3%-5%, and the thickness is 10-15nm; for N-type microcrystalline silicon oxide, the dilution ratio of hydrogen to silane is 100-400:1, the doping ratio of phosphine to silane is 3%-5%, the ratio of carbon dioxide to silane is 0.5-1.5, and the thickness is 10-20nm.

[0049] S5, after the N-type doping layer is deposited, light immersion is performed to repair the intrinsic amorphous silicon film damaged in the atmospheric environment.

[0050] Specifically, in the implementation process of the present invention, tubular PECVD is used to deposit the intrinsic amorphous silicon layer and the doping layer. Since the atmosphere is between different process reaction chambers, after the intrinsic amorphous silicon is deposited, the process chamber needs to be changed to deposit the doping layer, which is exposed to the atmosphere and affects the passivation effect of the intrinsic amorphous silicon layer. Therefore, the embodiment of the present invention repairs the intrinsic amorphous silicon layer by light immersion to ensure the passivation effect of the intrinsic amorphous silicon layer.

[0051] In a specific embodiment, the light immersion includes: using a continuous band light source with a wavelength range of 380-1060nm to irradiate the crystalline silicon substrate on which the N-type doped layer is deposited, the light intensity is 50-150sun, the illumination time is controlled at 60-150s, and the temperature is controlled at 150-240℃.

[0052] In a specific embodiment, the light immersion is performed in a light immersion device, such as Figures 2 to 4 As shown, the light immersion device includes a process chamber 10, a heating lamp tube 11 is installed at the top entrance of the process chamber 10, a lighting mechanism 12 is installed in the middle of the top of the process chamber 10, a cooling fan 13 is installed at the top exit of the process chamber 10, two conveying rollers 14 are installed at both sides of the bottom of the process chamber 10, and a grid-shaped conveyor belt 15 is sleeved on the two conveying rollers 14. A heating lamp tube 11 is also installed at the bottom entrance of the process chamber 10. The temperature of the process chamber 10 is controlled at 150-240°C by the heating lamp tube 11. The crystalline silicon substrate on which the N-type doped layer is deposited is irradiated by emitting light with a wavelength range of 380-1060nm through the lighting mechanism 12, and the light intensity is controlled to be 50-150sun.

[0053] S6, depositing a P-type doped layer on the back side of the back intrinsic amorphous silicon layer.

[0054] In a specific embodiment, the P-type doped layer is P-type amorphous silicon or P-type microcrystalline silicon; for P-type amorphous silicon, the ratio of hydrogen to silane is 5-20:1, the doping ratio of borane to silane is 2%-4%, and the thickness is 9-15nm; for P-type microcrystalline silicon, the ratio of hydrogen to silane is 250-400:1, the doping ratio of borane to silane is 0.2%-0.5%, and the thickness is 25-35nm.

[0055] S7, preparing a front transparent conductive film layer and a back transparent conductive film layer on the front side of the N-type doped layer and the back side of the P-type doped layer respectively.

[0056] In a specific embodiment, the front transparent conductive film layer and the back transparent conductive film layer can be prepared by a physical chemical vapor deposition (PVD) method, or by a plasma (RPD) method. The front transparent conductive film layer and the back transparent conductive film layer are one or any combination of ITO (indium tin oxide), IWO (tungsten-doped indium oxide), and AZO (aluminum-doped zinc oxide), and are formed under the three atmospheres of argon, hydrogen, and oxygen, and the thickness is 90-120nm.

[0057] S8, preparing a front metal electrode and a back metal electrode on the front side of the front transparent conductive film layer and on the back side of the back transparent conductive film layer, respectively.

[0058] In a specific embodiment, the front metal electrode and the back metal electrode are prepared by, but not limited to, screen printing, inkjet printing, electroplating, etc. The number of main grids of the front metal electrode and the back metal electrode is 0-28, the number of fine grids is 40-160, and the fine grid line width is 15-60 μm.

[0059] In order to verify the beneficial effects of the method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film provided in the embodiment of the present invention, Comparative Example 1, Comparative Example 2, Example 1 and Example 2 are provided below to prepare heterojunction solar cells.

[0060] Comparative Example 1: Plate-type PECVD is used to deposit an intrinsic amorphous silicon layer and a doped layer. The film deposition sequence is rear intrinsic amorphous silicon layer i(p) → front intrinsic amorphous silicon layer i(n) → N-type doped layer → P-type doped layer. The specific implementation scheme is as follows:

[0061] 1. Place an N-type single crystal silicon wafer with a thickness of 110μm and a size of 166mm*166mm in an alkaline solution (KOH) for cleaning to reduce defects and impurities introduced by the unclean surface of the silicon wafer and reduce carrier recombination losses at the heterojunction interface; perform texturing in an alkaline solution (KOH) and a texturing additive to form a 3μm pyramid-shaped velvet surface on the surface of the silicon wafer, reduce reflectivity, and increase short-circuit current.

[0062] 2. After texturing and cleaning, the N-type single crystal silicon wafer is subjected to plate PECVD to deposit the intrinsic amorphous silicon layer i(p) on the back side. SiH4 / H2 is used for deposition, the hydrogen dilution ratio is 15-30:1, and the deposited film thickness is 5nm.

[0063] 3. The front intrinsic amorphous silicon layer i(n) is deposited by plate-type PECVD, the H2 dilution ratio is 5:1, and the deposited film thickness is 5 nm.

[0064] 4. Deposit an N-type doped layer by plate PECVD. The N-type doped layer is a microcrystalline silicon oxide film and is deposited by doping PH3 in SiH4 / H2 / CO2. The hydrogen dilution ratio is 300:1, the phosphine doping ratio is 4%, the ratio of carbon dioxide to silane is 1:1, and the deposited film thickness is 15nm.

[0065] 5. The P-type doped layer is deposited by plate PECVD. The P-type doped layer is a P-type microcrystalline silicon film, which is deposited by doping BH6 in SiH4 / H2. The hydrogen dilution ratio is 300:1, the borane doping ratio is 0.3%, and the deposited film thickness is 25nm.

[0066] 6. The front transparent conductive film layer and the back transparent conductive film layer are deposited by physical vapor deposition (PVD). The deposition target material of the transparent conductive film layer is ITO (indium tin oxide), and the deposition film thickness is 100 nm.

[0067] 7. The front metal electrode and the back metal electrode are formed by screen printing. The number of main grids of the front metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 90, and the width is 0.05mm; the number of main grids of the back metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 120, and the width is 0.05mm.

[0068] 8. Sintering makes good ohmic contact between metal and silicon.

[0069] 9. Test the electrical performance of the battery.

[0070] Comparative Example 2: Tubular PECVD is used to deposit an intrinsic amorphous silicon layer and a doped layer. The film deposition sequence is rear intrinsic amorphous silicon layer i(p) → front intrinsic amorphous silicon layer i(n) → N-type doped layer → P-type doped layer. The specific implementation scheme is as follows:

[0071] 1. Place an N-type single crystal silicon wafer with a thickness of 110μm and a size of 166mm*166mm in an alkaline solution (KOH) for cleaning to reduce defects and impurities introduced by the unclean surface of the silicon wafer and reduce carrier recombination losses at the heterojunction interface; perform texturing in an alkaline solution (KOH) and a texturing additive to form a 3μm pyramid-shaped velvet surface on the surface of the silicon wafer, reduce reflectivity, and increase short-circuit current.

[0072] 2. After texturing and cleaning, the N-type single crystal silicon wafer is subjected to the deposition of the back intrinsic amorphous silicon layer i(p) by tubular PECVD, using SiH4 / H2 for deposition, with a hydrogen dilution ratio of 15 to 30:1, and a deposited film thickness of 5nm.

[0073] 3. The front intrinsic amorphous silicon layer i(n) is deposited by tubular PECVD, the H2 dilution ratio is 5:1, and the deposited film thickness is 5nm.

[0074] 4. The N-type doped layer is deposited by tubular PECVD. The N-type doped layer is a microcrystalline silicon oxide film, which is deposited by doping PH3 in SiH4 / H2 / CO2. The hydrogen dilution ratio is 300:1, the phosphine doping ratio is 4%, the ratio of carbon dioxide to silane is 1:1, and the deposited film thickness is 15nm.

[0075] 5. The P-type doped layer is deposited by tubular PECVD. The P-type doped layer is a P-type microcrystalline silicon film, which is deposited by doping BH6 in SiH4 / H2. The hydrogen dilution ratio is 300:1, the borane doping ratio is 0.3%, and the deposited film thickness is 25nm.

[0076] 6. The front transparent conductive film layer and the back transparent conductive film layer are deposited by physical vapor deposition (PVD). The deposition target material of the transparent conductive film layer is ITO (indium tin oxide), and the deposition film thickness is 100 nm.

[0077] 7. The front metal electrode and the back metal electrode are formed by screen printing. The number of main grids of the front metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 90, and the width is 0.05mm; the number of main grids of the back metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 120, and the width is 0.05mm.

[0078] 8. Sintering makes good ohmic contact between metal and silicon.

[0079] 9. Test the electrical performance of the battery.

[0080] Example 1: Use tubular PECVD to deposit an intrinsic amorphous silicon layer and a doped layer. The film deposition order is the back intrinsic amorphous silicon layer i(p) → front intrinsic amorphous silicon layer i(n) → N-type doped layer → P-type doped layer. After the i(p) → i(n) → N-type doped layer is deposited, a light soak is performed to repair the intrinsic amorphous silicon layer. The specific implementation plan is as follows:

[0081] 1. Place an N-type single crystal silicon wafer with a thickness of 110μm and a size of 166mm*166mm in an alkaline solution (KOH) for cleaning to reduce defects and impurities introduced by the unclean surface of the silicon wafer and reduce carrier recombination losses at the heterojunction interface; perform texturing in an alkaline solution (KOH) and a texturing additive to form a 3μm pyramid-shaped velvet surface on the surface of the silicon wafer, reduce reflectivity, and increase short-circuit current.

[0082] 2. After texturing and cleaning, the N-type single crystal silicon wafer is subjected to tubular PECVD for back-side intrinsic amorphous silicon layer i(p) deposition. SiH4 / H2 is used for deposition, the hydrogen dilution ratio is 15-30:1, and the deposited film thickness is 5nm. After the back-side intrinsic amorphous silicon layer i(p) deposition is completed, it is necessary to replace the deposition surface, replace the graphite boat and the deposition process chamber, and expose it to the atmospheric environment for 3-7min.

[0083] 3. Deposition of the front intrinsic amorphous silicon layer i(n) is performed by tubular PECVD, the H2 dilution ratio is 5:1, and the deposition film thickness is 5nm; after the deposition of the front intrinsic amorphous silicon layer is completed, there is no need to replace the deposition surface and the graphite boat, and it is directly switched to the doping layer deposition process chamber, exposed to the atmospheric environment for 2-5 minutes, and then the N-type doping layer is deposited;

[0084] 4. The N-type doped layer is deposited by tubular PECVD. The N-type doped layer is a microcrystalline silicon oxide film, which is deposited by doping PH3 in SiH4 / H2 / CO2. The hydrogen dilution ratio is 300:1, the phosphine doping ratio is 4%, the ratio of carbon dioxide to silane is 1:1, and the deposited film thickness is 15nm.

[0085] After the deposition of the N-type doped layer is completed, it is necessary to replace the deposition surface, replace the graphite boat and the deposition process chamber, and expose them to the atmospheric environment for 3-7 minutes. Therefore, after turning over and before putting into a new graphite boat, enter the light immersion device at a light intensity of 80 suns and a temperature of 200°C for 120 seconds of infrared light (780-1060nm) immersion to repair the intrinsic amorphous silicon layers i(n) and i(p).

[0086] 5. The P-type doped layer is deposited by tubular PECVD. The P-type doped layer is a P-type microcrystalline silicon film, which is deposited by doping BH6 in SiH4 / H2. The hydrogen dilution ratio is 300:1, the borane doping ratio is 0.3%, and the deposited film thickness is 25nm.

[0087] 6. The front transparent conductive film layer and the back transparent conductive film layer are deposited by physical vapor deposition (PVD). The deposition target material of the transparent conductive film layer is ITO (indium tin oxide), and the deposition film thickness is 100 nm.

[0088] 7. The front metal electrode and the back metal electrode are formed by screen printing. The number of main grids of the front metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 90, and the width is 0.05mm; the number of main grids of the back metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 120, and the width is 0.05mm.

[0089] 8. Sintering makes good ohmic contact between metal and silicon.

[0090] 9. Test the electrical performance of the battery.

[0091] Example 2: Use tubular PECVD to deposit an intrinsic amorphous silicon layer and a doped layer. The film deposition order is the back intrinsic amorphous silicon layer i(p) → front intrinsic amorphous silicon layer i(n) → N-type doped layer → P-type doped layer. After the i(p) → i(n) → N-type doped layer is deposited, a light soak is performed to repair the intrinsic amorphous silicon layer. The specific implementation plan is as follows:

[0092] 1. Place an N-type single crystal silicon wafer with a thickness of 110μm and a size of 166mm*166mm in an alkaline solution (KOH) for cleaning to reduce defects and impurities introduced by the unclean surface of the silicon wafer and reduce carrier recombination losses at the heterojunction interface; perform texturing in an alkaline solution (KOH) and a texturing additive to form a 3μm pyramid-shaped velvet surface on the surface of the silicon wafer, reduce reflectivity, and increase short-circuit current.

[0093] 2. After texturing and cleaning, the N-type single crystal silicon wafer is subjected to tubular PECVD for back-side intrinsic amorphous silicon layer i(p) deposition. SiH4 / H2 is used for deposition, the hydrogen dilution ratio is 15-30:1, and the deposited film thickness is 5nm. After the back-side intrinsic amorphous silicon layer i(p) deposition is completed, it is necessary to replace the deposition surface, replace the graphite boat and the deposition process chamber, and expose it to the atmospheric environment for 3-7min.

[0094] 3. Deposition of the front intrinsic amorphous silicon layer i(n) is performed by tubular PECVD, the H2 dilution ratio is 5:1, and the deposition film thickness is 5nm; after the deposition of the front intrinsic amorphous silicon layer is completed, there is no need to replace the deposition surface and the graphite boat, and it is directly switched to the doping layer deposition process chamber, exposed to the atmospheric environment for 2-5 minutes, and then the N-type doping layer is deposited;

[0095] 4. The N-type doped layer is deposited by tubular PECVD. The N-type doped layer is a microcrystalline silicon oxide film, which is deposited by doping PH3 in SiH4 / H2 / CO2. The hydrogen dilution ratio is 300:1, the phosphine doping ratio is 4%, the ratio of carbon dioxide to silane is 1:1, and the deposited film thickness is 15nm.

[0096] After the deposition of the N-type doped layer is completed, it is necessary to replace the deposition surface, replace the graphite boat and the deposition process chamber, and expose them to the atmospheric environment for 3-7 minutes. Therefore, after turning over and before putting into a new graphite boat, enter the light immersion device at a light intensity of 80 suns and a temperature of 200°C for 120 seconds of visible light (380-780nm) immersion to repair the intrinsic amorphous silicon layers i(n) and i(p).

[0097] 5. The P-type doped layer is deposited by tubular PECVD. The P-type doped layer is a P-type microcrystalline silicon film, which is deposited by doping BH6 in SiH4 / H2. The hydrogen dilution ratio is 300:1, the borane doping ratio is 0.3%, and the deposited film thickness is 25nm.

[0098] 6. The front transparent conductive film layer and the back transparent conductive film layer are deposited by physical vapor deposition (PVD). The deposition target material of the transparent conductive film layer is ITO (indium tin oxide), and the deposition film thickness is 100 nm.

[0099] 7. The front metal electrode and the back metal electrode are formed by screen printing. The number of main grids of the front metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 90, and the width is 0.05mm; the number of main grids of the back metal electrode is 9, the width is 0.1mm, which is the welding point main grid, the number of fine grids is 120, and the width is 0.05mm.

[0100] 8. Sintering makes good ohmic contact between metal and silicon.

[0101] 9. Test the electrical performance of the battery.

[0102] The electrical properties of the heterojunction batteries prepared in Comparative Example 1, Comparative Example 2, Example 1 and Example 2 are compared, and the comparison results are shown in Table 1.

[0103] Table 1

[0104]

[0105] By comparing Comparative Example 1 and Comparative Example 2, it can be seen that compared with plate-type PECVD, the photoelectric conversion efficiency of the heterojunction solar cell obtained by depositing the intrinsic amorphous silicon layer and the doping layer by tubular PECVD is reduced by 0.17%, mainly because the intrinsic amorphous silicon layer is damaged, resulting in a decrease in Voc and FF; Examples 1 and 2 repair the passivation ability of the intrinsic amorphous silicon layer damaged by the atmospheric environment through light immersion of light sources of different wavelengths, and the photoelectric conversion efficiency is greatly improved. Compared with the solar cell deposited by plate-type PECVD, the electrical performance is basically the same. Compared with the infrared light band, the light energy in the visible light band is stronger, which is more conducive to the repair of the electrical performance of the solar cell.

[0106] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the technical principles of the present invention, and these improvements and modifications should also be regarded as within the scope of protection of the present invention.

Claims

1. A method for improving the passivation effect of intrinsic amorphous silicon thin films deposited by tubular PECVD, characterized in that: include: S1, selecting a single crystal silicon wafer, and texturing it to form a pyramid structure as a crystalline silicon substrate; S2, depositing a back intrinsic amorphous silicon layer on the back side of the crystalline silicon substrate; S3, replacing the deposition surface, replacing the graphite boat and the deposition process chamber, and depositing a front intrinsic amorphous silicon layer on the front side of the crystalline silicon substrate; S4, replacing the doping layer deposition process chamber, and depositing an N-type doping layer on the front side of the front intrinsic amorphous silicon layer; S5, after the N-type doping layer is deposited, light immersion is performed to repair the intrinsic amorphous silicon film damaged in the atmospheric environment; S6, depositing a P-type doped layer on the back side of the back intrinsic amorphous silicon layer; S7, preparing a front transparent conductive thin film layer and a back transparent conductive thin film layer on the front side of the N-type doped layer and the back side of the P-type doped layer respectively; S8, preparing a front metal electrode and a back metal electrode on the front side of the front transparent conductive film layer and on the back side of the back transparent conductive film layer, respectively.

2. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The light soaking includes: A continuous band light source with a wavelength range of 380-1060nm is used to irradiate the crystalline silicon substrate on which the N-type doped layer is deposited, the illumination intensity is 50-150sun, the illumination time is controlled at 60-150s, and the temperature is controlled at 150-240℃.

3. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The single crystal silicon wafer is an N-type single crystal silicon wafer with a thickness of 40-160um.

4. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The size of the velvet surface of the pyramid structure is controlled to be 0.5-10um.

5. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: When S2 deposits the back intrinsic amorphous silicon layer and S3 deposits the front intrinsic amorphous silicon layer, the flow rate of silane is controlled at 600-2500sccm, the dilution ratio of hydrogen to silane is 5-100:1, the thickness of the front intrinsic amorphous silicon layer and the back intrinsic amorphous silicon layer are both controlled at 4-9nm, the microstructure factor is 20%-70%, and the hydrogen content is 18%-60%.

6. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The N-type doped layer is N-type amorphous silicon, N-type microcrystalline silicon or N-type microcrystalline silicon oxide; For N-type amorphous silicon, the dilution ratio of hydrogen to silane is 5-20:1, the doping ratio of phosphine to silane is 3%-5%, and the thickness is 5-9nm; For N-type microcrystalline silicon, the dilution ratio of hydrogen to silane is 100-400:1, the doping ratio of phosphine to silane is 3%-5%, and the thickness is 10-15nm; For N-type microcrystalline silicon oxide, the dilution ratio of hydrogen to silane is 100-400:1, the doping ratio of phosphine to silane is 3%-5%, the ratio of carbon dioxide to silane is 0.5-1.5, and the thickness is 10-20nm.

7. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The P-type doped layer is P-type amorphous silicon or P-type microcrystalline silicon; For P-type amorphous silicon, the ratio of hydrogen to silane is 5-20:1, the doping ratio of borane to silane is 2%-4%, and the thickness is 9-15nm; For P-type microcrystalline silicon, the ratio of hydrogen to silane is 250-400:1, the doping ratio of borane to silane is 0.2%-0.5%, and the thickness is 25-35nm.

8. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The front transparent conductive film layer and the back transparent conductive film layer are both one or any combination of ITO, IWO, and AZO, and the thickness is 90-120nm.

9. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The number of main grids of the front metal electrode and the back metal electrode is 0-28, the number of fine grids is 40-160, and the width of the fine grid line is 15-60 μm.

10. The method for improving the passivation effect of tubular PECVD deposited intrinsic amorphous silicon thin film according to claim 1, characterized in that: The light immersion is completed in a light immersion device, which comprises a process cavity (10), a heating lamp tube (11) is installed at the top entrance of the process cavity (10), a lighting mechanism (12) is installed in the middle of the top of the process cavity (10), a cooling fan (13) is installed at the top exit of the process cavity (10), two conveying rollers (14) are installed at both sides of the bottom of the process cavity (10), a grid-shaped conveyor belt (15) is sleeved on the two conveying rollers (14), and a heating lamp tube (11) is also installed at the bottom entrance of the process cavity (10).

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