Failure unit analysis method for non-associated grouped memory

Abstract

The invention provides a non-associated grouped memory failure unit analysis method, which comprises the following steps of: firstly, obtaining position information of all memory failure units through a chip tester to form a fault bitmap; secondly, grouping all fault units in the fault bitmap based on a grouping principle according to position information characteristics in the fault bitmap to form a multi-fault group and a single-fault group; performing repair analysis on the fault unit in each group on the basis of a repair principle of the memory failure unit, and judging whether the failure unit of the memory chip can be repaired or not; and if the failure unit of the memory chip can be repaired, giving a repair solution. According to the non-association grouping type memory failure unit analysis method, all the failure units of the memory chip are divided into the multi-failure group and the single-failure group which are mutually independent, and then the redundancy repair scheme of each failure group is analyzed and searched independently, so that redundancy resources can be distributed more reasonably; and the repair efficiency of the memory failure unit is effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for analyzing failure units of a non-associative grouped memory. Background Art

[0002] The development of deep submicron technology in semiconductor manufacturing has not only increased the integration scale of memory devices but also increased the probability of memory defects. Memory is an indispensable component of many modern electronic devices and can be categorized as DRAM (dynamic random access memory) and Flash memory. DRAM memory primarily consists of an array of memory cells, each of which can only store one valid bit of data. Its performance is crucial to the proper functioning of the entire memory device.

[0003] Chip testers are specialized machines used to verify that semiconductor chips meet performance standards. They play a crucial role in chip design and manufacturing. Chip testers can typically test a variety of chips, with memory chips being the primary target. The test program analyzes the chip's performance based on its characteristics, thereby ensuring the production yield of memory chips.

[0004] Memory repair analysis methods are an important component of repairing memory failures. The partial circuits used to repair failed unit circuits are called redundant unit circuits. Redundant units are generally divided into row redundant units and column redundant units, which are used to replace failed memory units detected by chip testers. With the increasing integration of memory chips, the problem of redundant repair solutions for failed memory units has become more complex. When the number of failed units is large and the distribution is relatively scattered, exhaustive search-based repair solutions are no longer applicable because they search for redundant repair solutions by listing failed units one by one, which inevitably consumes a large amount of redundant analysis time. At the same time, in other redundant repair solutions, only a portion of redundant units may be needed to complete the repair of all failed memory units, while replacing an entire redundant row or column may result in a waste of redundant resources.

[0005] Considering that all memory failure units can be repaired using limited redundant rows and columns, and addressing the low efficiency of existing memory failure unit analysis methods, a non-associative grouping analysis method is proposed, which can find redundant repair solutions for memory failure units in a relatively short time, thereby obtaining the optimal solution for repairing memory failure units. Summary of the Invention

[0006] The object of the present invention is to provide a non-associative group-based memory failure unit analysis method to address the above-mentioned deficiencies in the prior art.

[0007] To achieve the above object, the present invention adopts the following technical solutions:

[0008] A non-associative grouped memory failure unit analysis method comprises the following steps:

[0009] S1. Detect the performance of the memory chip by running test vectors on a chip tester, obtain the location information of all failed memory cells, and form a fault bitmap;

[0010] S2. Based on the basic principle of fault grouping and the location information characteristics of different failed units in the fault bitmap, all the fault units in the fault bitmap are grouped to form multi-fault groups and single-fault groups;

[0011] S3. Perform repair analysis on the faulty units in each group based on the repair principle of the failed memory unit to determine whether the failed unit of the memory chip can be repaired;

[0012] S4. If the failed unit of the memory chip can be repaired, a repair solution is provided.

[0013] Furthermore, the fault bitmap described in step S1 is a rectangular table having a structure similar to that of a memory cell array, and the table contains location information of all failed cells and redundant rows and columns of the memory that can be used for repair. Each failed cell in the fault bitmap includes a horizontal coordinate and a vertical coordinate, i.e., an X address and a Y address.

[0014] Furthermore, the basic principle of the fault grouping described in step S2 includes: dividing all fault cells in the fault bitmap into a multi-fault group and a single-fault group; the multi-fault group refers to a set of multiple fault cells that do not have the same row address or column address as the fault cells in other fault groups; the single-fault group refers to a single fault cell that does not share a row address or column address with other faults; the set of fault cells in the multi-fault group and the set of fault cells in the single-fault group are respectively expressed by the following equations (1) and (2):

[0015] M={…F ij …} (1)

[0016] S={f ij} (2)

[0017] In formulas (1) and (2): F ij Represents the fault unit in the multi-fault group set; f ij represents the faulty unit in the single fault group set; i and j represent the horizontal and vertical coordinates of the faulty unit respectively.

[0018] Furthermore, the repair principle of the memory failure unit described in step S3 includes: if the sum of the number of fault groups is greater than the sum of the number of redundant rows and redundant columns that can be used for repair, then the memory failure unit is determined to be unrepairable; during the repair process, the multiple fault groups in the memory fault bitmap are repaired first, and then the single fault groups are repaired.

[0019] Furthermore, step S4 is specifically implemented by the following steps:

[0020] S41, modeling a single multi-fault group, connecting the faulty units on the same line in the multi-fault group, and constructing a multi-fault group model;

[0021] S42: Based on the location information of each faulty unit in the multi-fault group, count the number of faulty rows Nfr and the number of faulty columns Nfc in the multi-fault group pattern as the number of redundant unit rows or redundant unit columns required to repair the multi-fault group, and form a repair solution table for the multi-fault group;

[0022] S43. Repeat the above steps to obtain a repair solution table for each multi-fault group;

[0023] S44. Reasonably allocate redundant resources based on the repair solution table to generate a final memory failure unit repair solution: After obtaining the repair solution for each multi-fault group, use the remaining redundant units to repair the single-fault group.

[0024] It can be seen from the above technical solution that the present invention is based on a non-associative grouped memory failure unit analysis method, which divides all the failure units of the memory chip into independent multi-fault groups and single-fault groups, and then separately analyzes and searches for redundant repair solutions for each failure group, so that each failure group can find a repair solution for the failure unit in parallel; it can more reasonably allocate redundant resources and effectively improve the repair efficiency of the memory failure unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 1. It is a schematic flow chart of the steps of the non-associative grouped memory failure unit analysis method of the present invention;

[0026] Figure 2 is a schematic diagram of a memory failure unit and a redundant unit;

[0027] Figure 3 It is a schematic diagram of the fault grouping of the memory corresponding to the fault bitmap;

[0028] Figure 4 is a schematic diagram of the fault group pattern;

[0029] Figure 5 This is a schematic diagram of the redundant repair solution analysis. DETAILED DESCRIPTION

[0030] A preferred embodiment of the present invention is described in detail below with reference to the accompanying drawings.

[0031] like Figure 1 The non-associative grouped memory failure unit analysis method shown includes the following steps:

[0032] S1. Detect the performance of the memory chip by running the test vectors on the chip tester, obtain the location information of all failed memory cells, and form a fault bitmap.

[0033] like Figure 2 As shown, the fault bitmap described in this preferred embodiment is a rectangular table with a structure similar to a memory cell array. The table contains the location information of all failed cells and the redundant rows and columns of the memory that can be used for repair. Each failed cell in the fault bitmap includes a horizontal coordinate and a vertical coordinate, namely, an X address and a Y address.

[0034] S2. Based on the location information features of different failed units in the fault bitmap and the basic principle of fault grouping, all the fault units in the fault bitmap are grouped to form multi-fault groups and single-fault groups.

[0035] Specifically, such as Figure 3 The basic principles of fault grouping for multiple fault groups 1, 2, and 3 and single fault group 1 are as follows:

[0036] dividing all fault units in the fault bitmap into multiple fault groups and single fault groups;

[0037] The multi-fault group refers to a set of multiple fault cells that do not have the same row address or column address as the fault cells in other fault groups. Based on this principle, the fault cells with the same row or column in the fault bitmap are grouped together to form several multi-fault group sets.

[0038] The single fault group refers to a single fault unit that does not share a row address or a column address with other faults. Based on this principle, fault units in the fault bitmap that do not have the same row or column address as any other fault units are found to form several single fault group sets.

[0039] The set of faulty units in the multi-fault group and the set of faulty units in the single-fault group are respectively expressed by the following equations (1) and (2):

[0040] M={…F ij …} (1)

[0041] S={f ij} (2)

[0042] In formulas (1) and (2): F ijRepresents the fault unit in the multi-fault group set; f ij represents the faulty unit in the single fault group set; i and j represent the horizontal and vertical coordinates of the faulty unit respectively.

[0043] S3. Perform repair analysis on the faulty units in each group based on the repair principle of the failed memory unit to determine whether the failed unit of the memory chip can be repaired;

[0044] The repair principles of the memory failure unit described in this preferred embodiment include:

[0045] If the sum of the number of fault groups is greater than the sum of the number of redundant rows and columns that can be repaired, the failed memory cell is determined to be unrepairable and the repair process is terminated in advance, thus avoiding wasting redundancy analysis time.

[0046] In the repair process, the multiple fault groups in the memory fault bitmap are repaired first, and then the single fault groups are repaired.

[0047] S4. If the failed unit of the memory chip can be repaired, a repair solution is provided.

[0048] The basic idea of ​​the repair solution is to repair the multi-fault group first, and then use the remaining redundant units to repair the single-fault group. In the specific operation, the step S4 is specifically implemented by the following steps:

[0049] S41, modeling a single multi-fault group, connecting the faulty units on the same line in the multi-fault group, and constructing a multi-fault group model;

[0050] S42: Based on the location information of each faulty unit in the multi-fault group, count the number of faulty rows Nfr and the number of faulty columns Nfc in the multi-fault group pattern as the number of redundant unit rows or redundant unit columns required to repair the multi-fault group, and form a repair solution table for the multi-fault group;

[0051] S43. Repeat the above steps to obtain a repair solution table for each multi-fault group;

[0052] S44. Reasonably allocate redundant resources based on the repair solution table to generate a final memory failure unit repair solution: After obtaining the repair solution for each multi-fault group, use the remaining redundant units to repair the remaining single-fault groups.

[0053] For Figure 3 The fault grouping diagram of a certain storage is shown in FIG. The multi-fault group pattern constructed by the fault grouping is as follows: Figure 4 The corresponding repair solution table is shown as Figure 5 shown by Figure 3It can be seen that four redundant columns and three redundant rows are used to repair all the faulty units in the figure. Considering the number of faulty rows Nfr and faulty columns Nfc in each fault group, the final repair plan is: multiple fault group 1 is repaired by three redundant columns, multiple fault group 2 is repaired by two redundant rows, multiple fault group 3 is repaired by one redundant row, and the single fault group is repaired by the last remaining redundant column. Based on this, all the failed units in the memory are repaired.

[0054] The above-described embodiments are merely descriptions of preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should fall within the scope of protection determined by the claims of the present invention.

Claims

1. A non-associative group-based memory failure unit analysis method, characterized in that: The following steps are involved: S1. Detect the performance of the memory chip by running the test vectors on the chip tester, obtain the location information of all failed memory cells, and form a fault bitmap; S2. According to the location information characteristics of different failed units in the fault bitmap, based on the basic principle of fault grouping, all the fault units in the fault bitmap are grouped to form multiple fault groups and single fault groups; S3, based on the repair principle of the failed unit of the memory, perform repair analysis on the failed unit in each group to determine whether the failed unit of the memory chip can be repaired; S4. If the failed unit of the memory chip can be repaired, a repair solution is provided.

2. The non-associative grouped memory failure unit analysis method according to claim 1, characterized in that: The fault bitmap described in step S1 is a rectangular table having a structure similar to that of a memory cell array, and the table contains the location information of all failed cells and redundant rows and columns of the memory that can be used for repair. Each failed cell in the fault bitmap includes a horizontal coordinate and a vertical coordinate, i.e., an X address and a Y address.

3. The non-associative grouped memory failure unit analysis method according to claim 1, characterized in that: The basic principle of fault grouping described in step S2 includes: dividing all fault cells in the fault bitmap into a multi-fault group and a single-fault group; the multi-fault group refers to a set of multiple fault cells that do not have the same row address or column address as the fault cells in other fault groups; the single-fault group refers to a single fault cell that does not share a row address or column address with other faults; the set of fault cells in the multi-fault group and the set of fault cells in the single-fault group are respectively expressed by the following equations (1) and (2): M={… F ij …} (1) S={f ij } (2) In formula (1) and (2): F ij represents the faulty unit in the multi-fault group set; f ij represents the faulty unit in the single fault group set; i and j represent the horizontal and vertical coordinates of the faulty unit respectively.

4. The non-associative grouped memory failure unit analysis method according to claim 1, characterized in that: The repair principle of the memory failure unit described in step S3 includes: if the sum of the number of fault groups is greater than the sum of the number of redundant rows and columns that can be used for repair, it is determined that the memory failure unit cannot be repaired; during the repair process, the multiple fault groups in the memory fault bitmap are repaired first, and then the single fault group is repaired.

5. The non-associative grouped memory failure unit analysis method according to claim 1, characterized in that: The step S4 is specifically implemented by the following steps: S41, modeling a single multi-fault group, connecting the faulty units on the same line in the multi-fault group, and constructing a multi-fault group model; S42, according to the location information of each faulty unit in the multi-fault group, count the number of faulty rows Nfr and the number of faulty columns Nfc in the multi-fault group pattern as the number of redundant unit rows or redundant unit columns required to repair the multi-fault group, and form a repair solution table for the multi-fault group; S43, repeat the above steps to obtain a repair solution table for each multi-fault group; S44. Reasonably allocate redundant resources based on the repair solution table to generate a final memory failure unit repair solution: After obtaining the repair solution for each multi-fault group, use the remaining redundant units to repair the single-fault group.

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