Double avalanche junction SPAD device and preparation method thereof

Abstract

The invention discloses a double avalanche junction SPAD device and a preparation method thereof, and relates to the technical field of semiconductor device processing technology, the method comprises the following steps: providing a first doping type substrate with a specific doping concentration, the substrate comprising an epitaxial layer; performing doping of a second doping type on the epitaxial layer to form a first region, and forming a first avalanche junction region by the first region and the epitaxial layer; performing ion implantation of the first doping type on the epitaxial layer above the first region to form a second region, and forming a second avalanche junction region by the second region and the first region; and performing doping of the first doping type on the epitaxial layer above the second region to form an anode lead-out region of the second avalanche junction region.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor device processing, and in particular relates to a double avalanche junction SPAD device and a preparation method thereof. Background Art

[0002] In the field of semiconductor optoelectronic components, single photon avalanche photodiodes (SPADs) are widely used in optical communications, laser radar, light detection and measurement systems due to their high sensitivity and low noise. The performance of single photon avalanche photodiodes depends largely on the avalanche multiplication region inside them, namely the PN junction region, which can produce a carrier multiplication effect under the action of a strong electric field, thereby improving the photoelectric conversion efficiency.

[0003] However, the traditional single-photon avalanche photodiode design usually contains only one PN junction region for avalanche breakdown. Although this design can achieve the basic avalanche multiplication effect, it has certain limitations in photon utilization efficiency. Since there is only one avalanche region, when the incident photon energy is low or the light intensity is weak, the probability of triggering avalanche breakdown will be significantly reduced, thus affecting the overall efficiency of photoelectric conversion.

[0004] Specifically, the PN junction in a traditional SPAD forms a sufficiently high electric field under a specific bias voltage by precisely controlling the doping concentration and thickness, so that the photogenerated carriers undergo collision ionization when crossing the depletion region, thereby triggering avalanche multiplication. However, due to the limitations of a single PN junction structure, it is often difficult to achieve the optimal photon absorption efficiency and avalanche triggering efficiency at the same time. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a double avalanche junction SPAD device and a preparation method thereof in view of the deficiencies in the above-mentioned prior art, so as to solve the technical problem that when there is only one avalanche region and the incident photon energy is low or the light intensity is weak, the probability of triggering avalanche breakdown will be significantly reduced, thereby affecting the overall efficiency of photoelectric conversion.

[0006] The present invention adopts the following technical solutions: A method for preparing a double avalanche junction SPAD device, characterized in that it comprises the following steps: S1, providing a first doping type substrate with a specific doping concentration, the substrate comprising an epitaxial layer; S2, doping the epitaxial layer with a second doping type to form a first region, wherein the first region and the epitaxial layer form a first avalanche junction region; S3, performing ion implantation of a first doping type into the epitaxial layer above the first region to form a second region, wherein the second region and the first region form a second avalanche junction region; S4. Doping the epitaxial layer with a first doping type above the second region to form an anode lead-out region of a second avalanche junction region.

[0007] Preferably, the doping concentration of the first doping type substrate is 1×10 14 cm -3 ~1×10 15 cm -3 .

[0008] Preferably, an ion implantation process is performed above the first region, using a dopant of the same first doping type as that of the substrate, and the dopant is implanted into the epitaxial layer to form a second region with a specific doping concentration in the epitaxial layer.

[0009] Preferably, the doping concentration of the second region is 1×10 16 cm -3 ~5×10 17 cm -3 .

[0010] Preferably, the ion implantation concentration of the second region is the same as the doping concentration of the epitaxial layer.

[0011] Preferably, the epitaxial layer is doped above the second region with a dopant of the first doping type, with a doping concentration greater than that of the second region.

[0012] Preferably, by adjusting the depth of ion implantation, the avalanche voltages of the first avalanche junction region and the second avalanche junction region are made equal.

[0013] Preferably, the anode voltage of the second avalanche junction region is fixed to 0V, and the cathode voltage of the second avalanche junction region is scanned incrementally from 0V according to a preset step length until avalanche occurs in the second avalanche junction region, thereby obtaining an avalanche voltage of the second avalanche junction region; The anode voltage of the second avalanche junction region is fixed to 0V, the anode voltage of the first avalanche junction region is fixed to a value less than the avalanche voltage of the second avalanche junction region, and the cathode voltage of the first avalanche junction region is scanned incrementally from 0V according to a preset step size until avalanche occurs in the first avalanche junction region, thereby obtaining the avalanche voltage of the first avalanche junction region; The voltage of the anode of the second avalanche junction region is adjusted so that the anode voltage of the second avalanche junction region is the voltage difference between the avalanche voltage of the first avalanche junction region and the avalanche voltage of the second avalanche junction region, so that the avalanche voltages of the first avalanche junction region and the second avalanche junction region are the same.

[0014] Another technical solution of the present invention is a double avalanche junction SPAD device, comprising: A first doping type substrate, a first doping type epitaxial layer disposed on the first doping type substrate, a second doping type first region disposed on the first doping type epitaxial layer, a first doping type second region disposed on the first region; and a first doping type third region disposed on the second region; The first doping type epitaxial layer and the second doping type first region form a first avalanche junction region; The first region of the second doping type and the second region of the first doping type form a second avalanche junction region; The third region of the first doping type is an anode extraction region of the second avalanche junction region.

[0015] Preferably, the first avalanche junction region and the second avalanche junction region share a common cathode, the anode of the first avalanche junction region is led out from the substrate layer, the anode of the first avalanche junction region is connected to the ground voltage, and the anode of the second avalanche junction region is connected to a low voltage; the first avalanche junction region and the second avalanche junction region share a common cathode connected to a high voltage.

[0016] Compared with the prior art, the present invention has at least the following beneficial effects: A method for preparing a double avalanche junction SPAD device, firstly introducing N-type doping into a P-type epitaxial layer, and then performing another layer of P-type doping to construct a unique PN-Ppei three-layer structure junction, which is specially designed to enhance the occurrence area of ​​the avalanche effect. Different from the single PN junction commonly used as the avalanche region in the prior art, the present invention not only retains the traditional PN junction by regulating and optimizing the doping process, but also forms an N-Ppei junction underneath, both of which can effectively participate in the avalanche breakdown process; so that the semiconductor device can achieve avalanche breakdown at the two PN junction interfaces at the same time, and by independently or collaboratively regulating the anode potential of the two junction regions to different levels, the avalanche breakdown voltage and the internal electric field are precisely controlled, and the purpose of avalanche of the double junctions is achieved at the same time. This double avalanche junction structure significantly improves the absorption and utilization efficiency of photons while maintaining the same photosensitive area, thereby greatly increasing the possibility and stability of avalanche triggering.

[0017] Furthermore, a concentration of 1×10 14 cm -3 ~1×10 15 cm -3 The lightly doped substrate epitaxial concentration increases the lateral resistivity of the epitaxial layer.

[0018] Furthermore, an ion implantation process is performed above the first region, and a dopant having the same doping type as the first doping type of the substrate is used to implant the dopant into the epitaxial layer, thereby forming a 1×10 18 cm -3 ~1×10 19 cm-3 The second region of the doping concentration forms the first anode region for the avalanche region Furthermore, the ion implantation concentration of the second region is the same as the doping concentration of the epitaxial layer, so that the avalanche voltage and the electric field state of the upper and lower avalanche junctions are the same.

[0019] Furthermore, the epitaxial layer is doped with a dopant of the first doping type above the second region, with a doping concentration greater than that of the second region, to form a surface low-resistance metal and semiconductor contact region of the first avalanche junction, thereby providing an anode bias voltage for the first avalanche junction.

[0020] Furthermore, by adjusting the depth of ion implantation, the avalanche voltages of the first avalanche junction region and the second avalanche junction region are made equal, thereby reducing the diversity of bias conditions when the device is in use.

[0021] The present invention provides a method for preparing a SPAD device and a device, wherein the device comprises a double avalanche junction capable of absorbing multiplied blue-green light and a near-infrared band, thereby solving the problem in the prior art that there is only one avalanche region and that the multiplied blue-green light and the near-infrared band cannot be absorbed simultaneously and efficiently, thereby improving the overall efficiency of photoelectric conversion of the entire wavelength band of photons.

[0022] In summary, the method of the present invention not only solves the problem of low photon utilization efficiency in traditional technologies, but also brings a performance leap in the fields of photoelectric detection, optical signal amplification, etc. by introducing the double avalanche junction mechanism.

[0023] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings to be used in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 It is a schematic diagram of the preparation method of the present invention; FIG2 is a schematic cross-sectional view of a SPAD device during the preparation of a double avalanche junction SPAD device according to the present invention, wherein (a) is, (b) is, (c) is, (d) is, and (e) is; a) is a schematic diagram of an epitaxial layer, (b) is a cathode ion implantation process, (c) is a first avalanche junction anode ion adjustment layer implantation, (d) is a first avalanche junction anode ion implantation, and (e) is a metal interconnection process; Figure 3 A schematic diagram of a voltage adjustment circuit of a SPAD device provided in an embodiment of the present invention; Figure 4 A schematic cross-sectional view of a double avalanche junction SPAD device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "one side", "one end", "one side" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0028] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0029] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0030] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0031] It should be further understood that the term "and / or" used in the present description and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0032] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0033] The present invention provides a double avalanche junction SPAD device and a preparation method thereof, firstly introducing N-type doping into the P-type epitaxial layer, and then performing another layer of P-type doping to construct a unique PN-Ppei three-layer structure junction, which is specially designed to enhance the occurrence area of ​​the avalanche effect. Different from the single PN junction commonly used as the avalanche region in the prior art, the present application not only retains the traditional PN junction by regulating and optimizing the doping process, but also forms an N-Ppei junction underneath, both of which can effectively participate in the avalanche breakdown process, ensuring that the double avalanche junction can simultaneously and efficiently trigger avalanche multiplication, thereby significantly improving the photon utilization efficiency and avalanche triggering probability without increasing the photosensitive area, and solving the problem of low photon utilization efficiency in the prior art.

[0034] See also Figure 1 The present invention provides a method for preparing a double avalanche junction SPAD device, comprising the following steps: S1, providing a first doping type substrate with a specific doping concentration, the substrate comprising an epitaxial layer; Referring to FIG. 2 (a), in the semiconductor manufacturing process, a substrate 201 of a first doping type with a specific doping concentration is first provided. This substrate serves as the basis of the entire device, and its doping type is determined according to requirements, for example, it can be P-type or N-type, depending on the functional requirements of the subsequent device. On this basis, the substrate further includes an epitaxial layer 202, which is formed on the surface of the substrate by epitaxial growth technology, and its crystal structure, composition and thickness are precisely controlled to meet specific performance requirements.

[0035] In particular, for the SPAD device manufacturing method of this embodiment, the first doping type substrate provided needs to have a specific doping concentration, which is accurately calculated and experimentally verified, and is intended to provide the best electrical performance basis for the subsequent double avalanche junction structure. At the same time, the epitaxial layer not only helps to form a high-quality interface, but also can adjust the depletion region width of the device to a certain extent, thereby optimizing the conditions for the occurrence of the avalanche multiplication effect.

[0036] S2, doping the epitaxial layer with a second doping type to form a first region, where the doping concentration of the first region is 1×10 16 cm -3 ~5×10 18 cm -3 , the first region and the epitaxial layer form a first avalanche junction region; Please refer to FIG. 2 (b), the epitaxial layer 202 is subjected to a specific type of doping treatment, which is different from the first doping type of the substrate and is referred to as the second doping type. Impurities of the second doping type are introduced into the epitaxial layer through a doping process (such as ion implantation, diffusion, etc.), thereby forming a first region 203 with a clear doping concentration and distribution characteristics above the substrate. By adjusting the doping concentration, depth and distribution, the electrical properties of the first region 203 can be controlled to optimize the conditions for the occurrence of the avalanche multiplication effect. The first region interacts with the epitaxial layer to form a first avalanche (or avalanche multiplication) junction region, which can trigger the avalanche multiplication effect of carriers under certain conditions.

[0037] S3, implanting ions of the first doping type into the epitaxial layer above the first region to form a second region, wherein the doping concentration of the first region is 1×10 15 cm -3 ~5×10 16 cm -3 , the second region and the first region form a second avalanche junction region; Referring to FIG. 2 (c), a precisely controlled ion implantation process is performed above the first region 203. In this process, a dopant of the same doping type as the first doping type of the substrate (for example, if the substrate is P-type, a P-type dopant is also used) is used, and the dopant is implanted into a certain depth of the epitaxial layer by setting ion beam parameters (such as energy, dose, and angle), thereby forming a second region 204 with a specific doping concentration in the epitaxial layer.

[0038] For the second region, the embodiment of the present application uses ion implantation technology to introduce specific dopants, and pays special attention to two key parameters: ion implantation concentration and ion implantation depth.

[0039] First, regarding the ion implantation concentration, it is set to be the same as the original doping concentration of the epitaxial layer. The purpose of this step is to ensure continuity in doping concentration between the second region and the epitaxial layer, thereby avoiding interface effects caused by concentration mutations, which may have an adverse effect on the avalanche breakdown characteristics. By precisely controlling the parameters of the ion implanter such as beam current, energy, and implantation time, it is possible to ensure that the ion implantation concentration reaches a preset value and matches the doping concentration of the epitaxial layer.

[0040] Secondly, in order to make the avalanche voltage of the first avalanche junction region and the second avalanche junction region as equal as possible, special attention is paid to the control of the ion implantation depth. The avalanche voltage is the critical voltage when the avalanche breakdown phenomenon occurs, which is jointly affected by the junction doping concentration distribution and the junction width. Therefore, by adjusting the depth of ion implantation, the junction width of the PN junction formed between the second region and the epitaxial layer can be changed, thereby affecting its avalanche voltage. In order to achieve the avalanche voltage of the two avalanche junction regions to be as equal as possible, a method combining ion implantation simulation software and experimental verification can be used. By simulating the doping concentration distribution and electric field distribution of the PN junction at different implantation depths, the change trend of the avalanche voltage can be predicted. Then, during the experiment, the depth parameters of the ion implantation are adjusted according to the simulation results, and the adjustment effect is verified by actually measuring the avalanche voltage. After multiple iterations and optimizations, the optimal ion implantation depth can be finally found so that the avalanche voltage of the two avalanche junction regions reaches or is close to being equal.

[0041] During the preparation of the semiconductor device, after the epitaxial layer is doped, a region 203 having a different doping type from the substrate and the original epitaxial layer is formed. Since there is an obvious difference in doping type (for example, PN or NP) between the first region 203 and the second region 204, a PN junction is naturally formed between the two regions, namely, the second avalanche junction region.

[0042] The second avalanche junction region is a key component in semiconductor avalanche photoelectric elements. It can form a high electric field region under an appropriate external voltage, so that photogenerated carriers are impact-ionized in this region, thereby triggering an avalanche multiplication effect. By controlling the doping concentration, interface quality and geometric dimensions of the first and second regions, the electrical properties of the second avalanche junction region can be optimized, and its photon utilization efficiency and avalanche triggering probability can be improved.

[0043] S4. Doping the epitaxial layer with a first doping type is performed above the second region to form an anode lead-out region of a second avalanche junction region.

[0044] Referring to FIG. 2( d ), a doping operation is performed on the epitaxial layer above the formed second region to form an anode lead-out region 205 of the second avalanche junction region.

[0045] First, it is necessary to clearly define the boundary of the second region 204 and determine the specific location above it for doping. Use a dopant of the first doping type with a doping concentration greater than the doping concentration of the second region. Ion implantation equipment can be used to accelerate and implant the selected ions of the first doping type into the region defined by the photolithography process. During the ion implantation process, parameters such as beam intensity, implantation energy, and implantation time need to be precisely controlled to ensure that the doping concentration and depth reach the desired target. The anode of the second avalanche junction region is drawn from the region 205.

[0046] Please refer to FIG. 2( e ), the first avalanche junction region and the second avalanche junction region share a cathode, and the anode of the first avalanche junction region is drawn out from the substrate layer.

[0047] In order to make the avalanche voltages of the first avalanche junction region and the second avalanche junction region the same, so that the two avalanche junctions can trigger avalanches simultaneously, the ion implantation depth of the second region is adjusted as described above to make the avalanche voltages of the first avalanche junction region and the second avalanche junction region as equal as possible.

[0048] See also Figure 3 The embodiment of the present application can also use the following avalanche voltage adjustment method to adjust the avalanche voltage of the first avalanche junction region and the second avalanche junction region to be exactly the same.

[0049] The passive quenching reset circuit is used as an example for schematic illustration. The principle of the active quenching reset circuit is similar and will not be described here. The adjustment circuit includes: A first avalanche junction region, a second avalanche junction region and a quenching resistor Rq.

[0050] Wherein, the first avalanche junction region and the second avalanche junction region share a common cathode; The anode of the first avalanche junction region is connected to a ground voltage (GND), and the anode of the second avalanche junction region is connected to a low voltage (VL); The first avalanche junction region and the second avalanche junction region have a common cathode connected to a high voltage (VH).

[0051] The avalanche voltage of the first avalanche junction region is adjusted to be the same as the avalanche voltage of the second avalanche junction region by the following method, which is as follows: The anode voltage (VL) of the second avalanche junction region is fixed to 0V as the reference potential; using a voltage source or voltage scanning equipment, the cathode voltage of the second avalanche junction region is scanned incrementally from 0V according to a preset step size (such as 0.1V, 0.01V, etc.). During the scanning process, monitor the current changes through the avalanche junction region. When the current suddenly increases sharply, it indicates that avalanche breakdown occurs. At this time, the corresponding cathode voltage is the avalanche voltage of the second avalanche junction region. Record the avalanche voltage value for subsequent use.

[0052] Similarly, the anode voltage of the second avalanche junction region is kept unchanged at 0V. The anode voltage of the first avalanche junction region is set to 1 / 2 of the avalanche voltage of the second avalanche junction region (this is an initial setting, which is intended to avoid directly triggering the avalanche of the first avalanche junction during the scanning process). In a specific embodiment, as long as the avalanche voltage value of the first avalanche junction is set to be smaller than the avalanche voltage value of the second avalanche junction, it is ensured that the avalanche of the first avalanche junction will not be directly triggered. Using the same voltage scanning equipment, the cathode voltage of the first avalanche junction region is scanned incrementally from 0V. Monitor the current change, and when the current increases sharply, record the cathode voltage at this time as the avalanche voltage of the first avalanche junction region.

[0053] Based on the two avalanche voltage values ​​obtained in the previous step, calculate the voltage difference between them.

[0054] The anode voltage of the second avalanche junction region is adjusted to be equal to the first avalanche voltage value minus the avalanche voltage value of the second avalanche junction region (i.e., the anode voltage of the second avalanche junction region = the avalanche voltage of the first avalanche junction region - the avalanche voltage of the second avalanche junction region). Through such adjustment, theoretically, the two avalanche junction regions can simultaneously undergo avalanche breakdown at the same cathode voltage, thereby achieving avalanche voltage matching.

[0055] Through the above avalanche voltage adjustment method, the avalanche voltages of the two avalanche junction regions can be accurately measured and adjusted to ensure that they have similar performance characteristics under the same operating conditions. This is of great significance for improving the overall performance, stability and reliability of semiconductor devices.

[0056] In summary, the embodiment of the present invention performs the first ion implantation on the front surface of the first wafer (i.e., the side facing the light source), and this implantation uses an N-type dopant to form the desired doped region inside the wafer, and this region (the first region) will serve as part of the first avalanche junction. By controlling the energy, dose, and angle of the ion implantation, it is ensured that the doped region has an ideal concentration distribution and depth. Subsequently, the wafer is flipped to a back-illuminated state, that is, the original front surface becomes facing away from the light source. Under the back-illuminated condition, the wafer is implanted with a second ion implantation, and this implantation uses the same N-type dopant and implantation parameters (including energy, dose, and angle) as the first one. The purpose of this is to ensure that a doped region (the fourth region) that is completely consistent with the first avalanche junction in the ion implantation state is also formed on the other side of the wafer (i.e., near the back surface), and this region will serve as part of the second avalanche junction.

[0057] See also Figure 4 , a double avalanche junction SPAD device, comprising: A substrate 201 of a first doping type (such as P-type) is covered with an epitaxial layer 202 of the same type (P-type); this basic structure provides a stable platform for subsequent doping and formation of functional regions.

[0058] On the epitaxial layer 202, a first region 203 of a second doping type (such as N-type) is first formed by a specific doping process (such as ion implantation or diffusion). The first region 203 and the epitaxial layer 202 form a first avalanche junction region; Subsequently, the first doping type (P-type) is again doped on the first region to form a second region 204 ; The ion implantation concentration of the second region 204 is set to be the same as the original doping concentration of the epitaxial layer. Due to the difference in doping types, a PN junction, ie, a second avalanche junction region, is formed between the first region and the second region.

[0059] A doping operation is performed on the epitaxial layer 202 above the formed second region 204 to form an anode extraction region of the second avalanche junction region.

[0060] A dopant of the first doping type is used, and the doping concentration is greater than the doping concentration of the second region; ion implantation equipment can be used to accelerate the selected ions of the first doping type and implant them into the region defined by the photolithography process.

[0061] The anode of the second avalanche junction region is led out from the region; the first avalanche junction region and the second avalanche junction region share a cathode, and the anode of the first avalanche junction region is led out from the substrate layer.

[0062] By adjusting the depth of ion implantation, the implantation depth of the second region is changed, thereby affecting its avalanche voltage. The avalanche voltages of the first avalanche junction region and the second avalanche junction region are equal.

[0063] The first avalanche junction region and the second avalanche junction region share a cathode; the anode of the first avalanche junction region is connected to a ground voltage (GND), and the anode of the second avalanche junction region is connected to a low voltage (VL); the first avalanche junction region and the second avalanche junction region share a cathode connected to a high voltage (VH). The avalanche voltage of the first avalanche junction region and the avalanche voltage of the second avalanche junction region can be adjusted to be the same by the following method, as follows: Fix the anode voltage (VL) of the second avalanche junction region to 0V as the reference potential. Use a voltage source or voltage scanning equipment to scan the cathode voltage of the second avalanche junction region from 0V in increments according to a preset step size (such as 0.1V, 0.01V, etc.). During the scanning process, monitor the current changes through the avalanche junction region. When the current suddenly increases sharply, it indicates that avalanche breakdown has occurred. At this time, the corresponding cathode voltage is the avalanche voltage of the second avalanche junction region. Record the avalanche voltage value for subsequent use.

[0064] Similarly, the anode voltage of the second avalanche junction region is kept unchanged at 0V. The anode voltage of the first avalanche junction region is set to 1 / 2 of the avalanche voltage of the second avalanche junction region (this is an initial setting, which is intended to avoid directly triggering the avalanche of the first avalanche junction during the scanning process). In a specific embodiment, as long as the avalanche voltage value of the first avalanche junction is set to be smaller than the avalanche voltage value of the second avalanche junction, it is ensured that the avalanche of the first avalanche junction will not be directly triggered. Using the same voltage scanning equipment, the cathode voltage of the first avalanche junction region is scanned incrementally from 0V. Monitor the current change, and when the current increases sharply, record the cathode voltage at this time as the avalanche voltage of the first avalanche junction region.

[0065] Based on the two avalanche voltage values ​​obtained in the previous step, calculate the voltage difference between them.

[0066] The anode voltage of the second avalanche junction region is adjusted to be equal to the first avalanche voltage value minus the avalanche voltage value of the second avalanche junction region (i.e., the anode voltage of the second avalanche junction region = the avalanche voltage of the first avalanche junction region - the avalanche voltage of the second avalanche junction region). Through such adjustment, theoretically, the two avalanche junction regions can simultaneously undergo avalanche breakdown at the same cathode voltage, thereby achieving avalanche voltage matching.

[0067] In summary, the present invention provides a single-photon avalanche photodiode and a preparation method thereof, and constructs a double avalanche junction photoelectric element of a PNP structure by optimizing and adjusting the ion implantation process; and in this manufacturing process, different bias states are used for the P-type region to ensure that the double avalanche junction region can synchronously and efficiently achieve an avalanche multiplication effect when responding to photon excitation, thereby significantly improving the photon utilization efficiency and the probability of avalanche triggering.

[0068] The above contents are only for explaining the technical idea of ​​the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.

Claims

1. A method for preparing a double avalanche junction SPAD device, characterized in that: The following steps are involved: S1, providing a first doping type substrate with a specific doping concentration, the substrate comprising an epitaxial layer; S2, doping the epitaxial layer with a second doping type to form a first region, wherein the first region and the epitaxial layer form a first avalanche junction region; S3, performing ion implantation of a first doping type into the epitaxial layer above the first region to form a second region, wherein the second region and the first region form a second avalanche junction region; S4. Doping the epitaxial layer with a first doping type above the second region to form an anode lead-out region of a second avalanche junction region.

2. The method for preparing a double avalanche junction SPAD device according to claim 1, characterized in that: The doping concentration of the first doping type substrate is 1×10 14 cm -3 ~1×10 15 cm -3 .

3. The method for preparing a double avalanche junction SPAD device according to claim 1, characterized in that: An ion implantation process is performed above the first region, and a dopant having the same first doping type as that of the substrate is used to implant the dopant into the epitaxial layer, thereby forming a second region having a specific doping concentration in the epitaxial layer.

4. The method for preparing a double avalanche junction SPAD device according to claim 3, characterized in that: The doping concentration of the second doping type substrate is 5×10 16 cm -3 ~5×10 17 cm -3 .

5. The method for preparing a double avalanche junction SPAD device according to claim 3, characterized in that: The ion implantation concentration of the second region is the same as the doping concentration of the epitaxial layer.

6. The method for preparing a double avalanche junction SPAD device according to claim 1, characterized in that: The epitaxial layer is doped over the second region with a dopant of the first doping type at a concentration greater than the doping concentration of the second region.

7. The method for preparing a double avalanche junction SPAD device according to claim 1, characterized in that: By adjusting the depth of ion implantation, the avalanche voltages of the first avalanche junction region and the second avalanche junction region are made equal.

8. The method for preparing a double avalanche junction SPAD device according to claim 7, characterized in that: The anode voltage of the second avalanche junction region is fixed to 0V, and the cathode voltage of the second avalanche junction region is scanned incrementally from 0V according to a preset step length until avalanche occurs in the second avalanche junction region, thereby obtaining an avalanche voltage of the second avalanche junction region; The anode voltage of the second avalanche junction region is fixed to 0V, the anode voltage of the first avalanche junction region is fixed to a value less than the avalanche voltage of the second avalanche junction region, and the cathode voltage of the first avalanche junction region is scanned incrementally from 0V according to a preset step size until avalanche occurs in the first avalanche junction region, thereby obtaining the avalanche voltage of the first avalanche junction region; The voltage of the anode of the second avalanche junction region is adjusted so that the anode voltage of the second avalanche junction region is the voltage difference between the avalanche voltage of the first avalanche junction region and the avalanche voltage of the second avalanche junction region, so that the avalanche voltages of the first avalanche junction region and the second avalanche junction region are the same.

9. A double avalanche junction SPAD device, characterized in that: Prepared according to the method according to any one of claims 1 to 8, comprising: A first doping type substrate, a first doping type epitaxial layer disposed on the first doping type substrate, a second doping type first region disposed on the first doping type epitaxial layer, a first doping type second region disposed on the first region; and a first doping type third region disposed on the second region; The first doping type epitaxial layer and the second doping type first region form a first avalanche junction region; The first region of the second doping type and the second region of the first doping type form a second avalanche junction region; The third region of the first doping type is an anode extraction region of the second avalanche junction region.

10. The double avalanche junction SPAD device according to claim 9, characterized in that: The first avalanche junction region and the second avalanche junction region share a cathode, the anode of the first avalanche junction region is led out from the substrate layer, the anode of the first avalanche junction region is connected to the ground voltage, and the anode of the second avalanche junction region is connected to a low voltage; the first avalanche junction region and the second avalanche junction region share a cathode connected to a high voltage.

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