An on-chip tunable non-uniform quantization analog-to-digital converter based on memristors

Abstract

This invention relates to the field of analog-to-digital converter (ADC) technology, specifically to an on-chip adjustable non-uniform quantization ADC based on memristors. It includes a memristor array unit, an input signal conversion circuit, an output signal control conversion circuit, and an on-chip adjustment circuit. The input signal conversion circuit connects the original input signal and a reference voltage, performing amplitude conversion between the input signal and the reference voltage. The memristor array unit receives the converted input signal and the reference voltage, and divides the reference voltage to form multiple reference voltage nodes. The output signal control conversion circuit connects the multiple reference voltage nodes and outputs a digital signal in bus form. The on-chip adjustment circuit selects and adjusts the memristor array unit. Through this method, non-uniform quantization of data is achieved, and quantization noise is effectively reduced.

Description

Technical Field

[0001] This invention relates to the field of analog-to-digital converter technology, and more particularly to an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors. Background Technology

[0002] An analog-to-digital converter (ADC) is a device that quantizes analog signals to digital signals, serving as a bridge between real-world signals and digital signals. ADCs mainly include various types such as FLASH, SAR, and Sigma-Delta ADCs, each with different application scenarios and levels of precision. Among them, Flash ADCs are low-precision, high-speed analog-to-digital converters. If a smaller quantization interval is needed to improve resolution, the number of voltage divider resistors, comparators, and flip-flops increases exponentially. Therefore, as resolution increases, Flash ADCs suffer from drawbacks such as large chip area and high power consumption. Although Flash ADCs have these disadvantages, they only require one comparison to quantize an analog signal, while other types of ADCs, such as SAR ADCs, typically require N comparisons to produce an N-bit quantized result. Additionally, Sigma-Delta ADCs can achieve high precision through multiple orders and high oversampling rates, but their response time is longer.

[0003] Traditional ADCs mostly use uniform quantization, where the sampled reference signal is evenly distributed across the measurement range. However, in some applications, the signal is not evenly distributed but concentrated in a certain part of the measurement range. If uniform quantization is used, it will result in higher quantization noise in the data-dense areas, while in the data-sparse areas, although the quantization noise is low, the amount of data is also small. For example, audio signals are mainly small-amplitude signals and low-information noise. Using uniform quantization will result in a coarser reconstruction of the small-amplitude signals, while the relatively small number of high-amplitude signals will be assigned more quantization levels, resulting in a lower signal-to-noise ratio in the final signal. Summary of the Invention

[0004] The purpose of this invention is to provide an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, which solves the problem that traditional ADCs using uniform quantization result in coarse reproduction of signals with small amplitudes, and relatively few signals with high amplitudes are assigned more quantization levels, leading to a low signal-to-noise ratio in the final signal.

[0005] To achieve the above objectives, the present invention employs an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, comprising a memristor array unit, an input signal conversion circuit, an output signal control conversion circuit, and an on-chip adjustment circuit. The memristor array unit is connected to the input signal conversion circuit, and the output signal control conversion circuit and the on-chip adjustment circuit are respectively connected to the memristor array unit.

[0006] The input signal conversion circuit is used to connect the original input signal and the reference voltage, and to convert the amplitude of the input signal and the reference voltage.

[0007] The memristor array unit is used to receive the converted input signal and reference voltage, and divide the reference voltage to form multiple reference voltage nodes;

[0008] The output signal control conversion circuit is used to connect multiple reference voltage nodes and output digital signals in the form of a bus.

[0009] The on-chip adjustment circuit is used to select and adjust the memristor array unit.

[0010] The memristor array unit comprises multiple memristors connected in series.

[0011] The number of memristors is 2. N N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors.

[0012] The output signal control conversion circuit includes a comparator array unit, a D flip-flop array unit, and a digital encoder.

[0013] The comparator array unit is used to connect to the input voltage, compare the reference voltage node with the input voltage, and convert the input voltage into a temperature code.

[0014] The D flip-flop array unit is used to transmit the temperature code under the control of a clock signal;

[0015] The digital encoder is used to receive temperature codes, convert them into binary codes, and output them via a bus.

[0016] The comparator array unit includes 2 N -1 comparator;

[0017] The D flip-flop array unit includes 2 N -1 D flip-flops.

[0018] The on-chip adjustment circuit includes a gating array unit and an address gating unit. The gating array unit is connected to the memristor array unit, and the address gating unit is connected to the gating array unit.

[0019] The gating array unit includes 2 N +1 MOSFET.

[0020] This invention discloses an on-chip adjustable non-uniform quantization analog-to-digital converter (ADC) based on memristors. The input signal conversion circuit connects the original input signal and a reference voltage, performing amplitude conversion between them. The memristor array unit receives the converted input signal and reference voltage, and divides the reference voltage to form multiple reference voltage nodes. The output signal control conversion circuit connects the multiple reference voltage nodes and outputs a digital signal in bus form. The on-chip adjustment circuit performs gating adjustment on the memristor array unit. Through the on-chip adjustment circuit, fine-tuning of the resistance value of the memristor array unit is achieved, mitigating to some extent the problem of non-uniform quantization interval caused by the offset of a non-ideal comparator. Simultaneously, the ADC can be adjusted to different quantization types when facing different types of signals, applying appropriate quantization intervals to signals of different amplitudes. This not only reduces quantization noise in the main signal region of interest through non-uniform quantization but also increases the reusability and flexibility of the ADC. Furthermore, after performing non-uniform quantization, different types of digital-to-analog converters can be used to perform a certain degree of nonlinear mapping, thereby realizing nonlinear calculations. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a block diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors according to the present invention.

[0023] Figure 2 This is a schematic diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors according to the present invention.

[0024] Figure 3 This is a circuit schematic diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors according to the present invention.

[0025] Figure 4 This is a quantization result diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor according to Embodiment 1 of the present invention.

[0026] Figure 5 This is a schematic diagram of the quantization interval of an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, according to Embodiment 2 of the present invention.

[0027] Figure 6This is a quantization result diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor according to Embodiment 2 of the present invention.

[0028] Figure 7 This is a schematic diagram of the quantization interval of an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, according to Embodiment 3 of the present invention.

[0029] Figure 8 This is a quantization result diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor according to Embodiment 3 of the present invention.

[0030] Figure 9 This is a schematic diagram of the quantization interval of an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, according to Embodiment 4 of the present invention.

[0031] Figure 10 This is a quantization result diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor according to Embodiment 4 of the present invention.

[0032] Figure 11 This is a quantization result diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor according to Embodiment 5 of the present invention.

[0033] Figure 12 This is a quantization result diagram of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor according to Embodiment 6 of the present invention.

[0034] 100 - Memristor array unit, 200 - Input signal conversion circuit, 300 - Output signal control conversion circuit, 301 - Comparator array unit, 302 - D flip-flop array unit, 303 - Digital encoder, 400 - On-chip adjustment circuit, 401 - Strobe array unit, 402 - Address strobe. Detailed Implementation

[0035] Please see Figures 1-3 ,in Figure 1 This is a block diagram of an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors. Figure 2 This is a schematic diagram of an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors. Figure 3 This is the circuit schematic of an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors.

[0036] This invention provides an on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, including a memristor array unit 100, an input signal conversion circuit 200, an output signal control conversion circuit 300, and an on-chip adjustment circuit 400. The memristor array unit 100 is connected to the input signal conversion circuit 200, and the output signal control conversion circuit 300 and the on-chip adjustment circuit 400 are respectively connected to the memristor array unit 100.

[0037] The input signal conversion circuit 200 is used to connect the original input signal and the reference voltage, and to convert the amplitude of the input signal and the reference voltage.

[0038] The memristor array unit 100 is used to receive the converted input signal and reference voltage, and to divide the reference voltage to form multiple reference voltage nodes.

[0039] The output signal control conversion circuit 300 is used to connect multiple reference voltage nodes and output digital signals in the form of a bus.

[0040] The on-chip adjustment circuit 400 is used to select and adjust the memristor array unit 100.

[0041] In this embodiment, the input signal conversion circuit 200 connects the original input signal and the reference voltage, and performs amplitude conversion between the input signal and the reference voltage; the memristor array unit 100 receives the converted input signal and the reference voltage, and divides the reference voltage to form multiple reference voltage nodes; the output signal control conversion circuit 300 connects to the multiple reference voltage nodes and outputs a digital signal in bus form; the on-chip adjustment circuit 400 performs gating adjustment on the memristor array unit 100; through the on-chip adjustment circuit 400, the resistance value of the memristor array unit 100 can be finely adjusted, which alleviates the problem of uneven quantization interval caused by the offset of the non-ideal comparator to a certain extent; at the same time, when facing different types of signals, the analog-to-digital converter can be adjusted to different quantization types, and appropriate quantization intervals can be applied to signals with different amplitudes. This not only reduces quantization noise in the main signal region of interest through non-uniform quantization, but also increases the reusability and flexibility of the analog-to-digital converter; in addition, after performing non-uniform quantization, different types of digital-to-analog converters can be used to perform a certain degree of nonlinear mapping function, thereby realizing nonlinear calculation.

[0042] Furthermore, the memristor array unit 100 comprises multiple memristors connected in series.

[0043] Furthermore, the number of memristors is 2. N N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors.

[0044] In this embodiment, the number of memristors is 2. N N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, and the top electrode of the memristor array unit 100 serves as the input terminal and the bottom electrode serves as the output terminal, such as... Figure 3 As shown, the 2nd NThe input terminals of the memristors are connected to a reference voltage VREF, and the output terminal of the first memristor unit is connected to ground via switch S1; when switch S1 is closed, the memristor array unit 100 divides the reference voltage VREF, from the first to the second... N Each memristor unit connects to a node that leads to a voltage divider.

[0045] Furthermore, the output signal control conversion circuit 300 includes a comparator array unit 301, a D flip-flop array unit 302, and a digital encoder 303;

[0046] The comparator array unit 301 is used to connect to the input voltage, compare the reference voltage node with the input voltage, and convert the input voltage into a temperature code.

[0047] The D flip-flop array unit 302 is used to transmit the temperature code under the control of a clock signal;

[0048] The digital encoder 303 is used to receive temperature codes, convert the temperature codes into binary codes, and output them via a bus.

[0049] Furthermore, the comparator array unit 301 includes 2 N -1 comparator;

[0050] The D flip-flop array unit 302 includes 2 N -1 D flip-flops.

[0051] In this embodiment, the comparator array unit 301 is connected to the input voltage, compares the reference voltage node with the input voltage, and converts the input voltage into a temperature code; the D flip-flop array unit 302 transmits the temperature code under the control of a clock signal; the digital encoder 303 receives the temperature code, converts it into a binary code, and outputs it via a bus; wherein the comparator array unit 301 includes 2 N -1 comparator, the D flip-flop array unit 302 includes 2 N -1 D flip-flop. Each comparator is connected to a corresponding D flip-flop; the positive input of each comparator is connected to the input voltage VIN, the negative input of the i-th comparator is connected to the n-th stage voltage divider, and the output of the i-th comparator is connected to the D terminal of the i-th D flip-flop. The i-th comparator compares the n-th stage voltage divider with the input voltage, quantizes the input voltage into a temperature code, and outputs it to the i-th D flip-flop, i=1,2,...,2 N-1; The clock terminal of each D flip-flop is connected to the clock signal CLK, and the Q output terminal is connected to the digital encoder 303. Under the control of the clock signal, the i-th D flip-flop transmits the temperature code output by the i-th comparator to the digital encoder 303; The digital encoder 303 converts the temperature code into a binary code and outputs it through a bus.

[0052] Furthermore, the on-chip adjustment circuit 400 includes a gating array unit 401 and an address gating unit 402. The gating array unit 401 is connected to the memristor array unit 100, and the address gating unit 402 is connected to the gating array unit 401.

[0053] Furthermore, the gating array unit 401 includes 2 N +1 MOSFET.

[0054] In this embodiment, the gating array unit 401 includes 2 N +1 of the aforementioned MOSFETs, the input terminal of the j-th memristor is connected to the drain of the j-th MOSFET, and the output terminal is connected to the drain of the (j+1)-th MOSFET, where j=1,2,...,2 N The first MOS transistor to the second N +1 The source of the MOSFET is sequentially and alternately connected to the control terminal VA and the control terminal VB; the first MOSFET to the second N The gates of all +1 of the MOS transistors are connected to the output bus of the address selector 402.

[0055] The specific process of selecting and adjusting any one of the memristors in the memristor array unit 100 through the address selector 402 is as follows:

[0056] With switch S1 open, the address signal is input to the address selector 402, which selects the MOS transistors at both ends of the memristor, so that the memristor array unit 100 is connected to the control terminal VA and the control terminal VB through the MOS transistors at both ends; the resistance value of the memristor is adjusted through the control terminal VA and the control terminal VB.

[0057] The current resistance value is calculated by applying a read voltage through control terminals VA and VB and then adjusting control terminals VA or VB to apply a write pulse based on the difference between the current resistance value and the target resistance value.

[0058] The above process is repeated until the resistance of the memristor array unit 100 reaches the target resistance value. During the repetition, the amplitude of the write pulse is gradually reduced to precisely adjust the memristor unit.

[0059] The input signal conversion circuit 200 includes two proportional amplifiers and a sample-and-hold circuit. The two proportional amplifiers amplify or reduce the input voltage VIN and the reference voltage VREF by the same ratio. After scaling, the input voltage is input to the comparator array unit 301 after passing through the sample-and-hold circuit. The scaled reference voltage is input to the memristor array unit 100.

[0060] In this embodiment, the first, second... second... N The order of +1 is based on the direction of the ground-to-input voltage VIN and the reference voltage VREF in the circuit, that is... Figure 3 The text is presented in a right-to-left order.

[0061] Based on the aforementioned non-uniform quantization analog-to-digital converter, for the non-uniform quantization process, the resistance values ​​of the memristors in the memristor array unit 100 need to be adjusted on-chip to allow different quantization intervals to be used for signals of different amplitudes. For example, in specific application scenarios where the accuracy of small-amplitude signals is of greater concern, i.e., a small quantization interval is used for small-amplitude signals, the lower-order memristors in the memristor array unit 100 are adjusted to a low-resistance state, and the higher-order memristors in the memristor array unit 100 are adjusted to a high-resistance state. Specifically, the on-chip adjustment of the quantization interval is configured as follows:

[0062] Keep switch S1 open to put the memristor into read / write mode. An address signal is input to the address selector 402, which selects the MOS transistors connected to the memristor. For example, for the j-th memristor, the address selector 402 selects both the j-th and (j+1)-th MOS transistors. The j-th memristor is read / written via control terminals VA and VB. This allows control over the relative magnitude of the signals at both ends to increase or decrease the memristor's resistance. Furthermore, by applying a read voltage and measuring the output current, the adjusted resistance state can be determined, thus enabling precise resistance control. Taking the lowest-order memristor in the memristor array unit 100 as an example, the address of the memristor is input. After decoding the address, the address selector 402 pulls the <1:0> port signals of the bus high, thereby turning on the MOS transistors connected to the lowest-order memristor. The top electrode of the memristor is connected to the VB terminal through the first MOSFET, and the bottom electrode is connected to the VA terminal through the second MOSFET. To adjust the memristor to a low resistance state to achieve a small quantization interval, a read voltage that does not change the memristor's state is applied. The current resistance state is calculated based on the read current. If the memristor's resistance is greater than the desired resistance, the VA terminal is grounded, and a pulse signal is input from the VB terminal to lower the resistance value. After adjustment, the current state is detected again by the read voltage. If the memristor's resistance is less than the desired resistance, the VB terminal is grounded, and a pulse signal is input from the VA terminal to raise the resistance value. After adjustment, the current state is detected again by the read voltage. This process is repeated until the resistance is adjusted to the desired value. Furthermore, this process is repeated, and each memristor is adjusted using the address selector 402 until all memristors in the memristor array unit 100 are adjusted to the target state.

[0063] The final result generated by the aforementioned non-uniform quantization analog-to-digital converter uses a small quantization interval for some amplitude signals, and the binary codes of the quantized output are still uniformly distributed. Therefore, during signal restoration, the signal should be restored using a non-uniform quantization interval. For example, after obtaining the final binary output, a lookup table for the corresponding binary code to analog value should be configured according to the resistance state of the memristor array in the non-uniform quantization device at that time, mapping the quantized binary code back to the original analog value, thereby realizing the final sampling to non-uniform quantization and signal restoration process. Specifically, the conversion process from non-uniform quantization digital code to analog signal is as follows: First, the input binary digital code is converted into a decimal number. Since this binary code is converted from thermometer code in the non-uniform quantization device, the decimal number can be one-to-one with the temperature code, that is, the decimal number corresponds to which comparator's final output signal is high level due to the input signal, and the decimal number is recorded as the activation number; The resistance value of the memristor array unit 100 or the ratio of the resistance of the memristor array unit 100 is input or stored in the non-uniform quantization device in an array format. In the quantization digital-to-analog signal conversion device, the total resistance from the input terminal to ground is obtained by summing the resistance values ​​of the memristor array unit 100. Using a decimal number as a reference, the summation of indices from zero to the activation number is divided by the total resistance of the memristor array. This yields the proportion of the resistance value from the input voltage to ground corresponding to the reference level to the total resistance value, thus reconstructing the corresponding analog signal. For each reconstructed analog voltage except for zero level and full scale, the quantization interval is increased by half to reduce quantization noise generated during the quantization process. If signal reconstruction is not required, for example, if an analog signal is input to this non-uniform quantization analog-to-digital converter and subjected to a non-linear activation operation similar to that of neurons in a neural network, then the final mapping of the non-uniform quantization-generated digital code back to the original analog signal is unnecessary. A traditional equal-interval digital-to-analog converter can be directly used to convert the non-uniformly quantized digital code into an analog signal, resulting in a non-linearly quantized signal. In other words, under different non-uniform quantization configurations, this non-uniform quantization analog-to-digital converter can achieve a certain degree of non-linear calculation during the quantization process.

[0064] The beneficial effects of the present invention will be further explained below with reference to the accompanying drawings and embodiments.

[0065] Example 1

[0066] This embodiment provides a 4-bit memristor-based on-chip adjustable non-uniform quantization analog-to-digital converter, configured in uniform quantization mode, to quantize linear signals as follows: Figure 4 As shown in the figure, the analog-to-digital converter can be adjusted to a uniform quantization mode, where all bits use the same quantization interval.

[0067] Example 2

[0068] This embodiment provides a 4-bit memristor-based on-chip adjustable non-uniform quantization analog-to-digital converter, configured to use a small quantization interval for small-amplitude signals and a large quantization interval for large-amplitude signals in a non-uniform quantization state. The quantization interval for linear signals is as follows: Figure 5 As shown, the quantization result for the linear signal is as follows: Figure 6 As shown in the figure, small signals have a relatively small quantization interval compared to large signals, and are allocated more quantization bits. That is, the analog-to-digital converter can be adjusted to use a small quantization interval for small amplitude signals and a large quantization interval for large amplitude signals.

[0069] Example 3

[0070] This embodiment provides a 4-bit memristor-based on-chip adjustable non-uniform quantization analog-to-digital converter, configured to use a large quantization interval for small-amplitude signals and a small quantization interval for large-amplitude signals in a non-uniform quantization state. The quantization interval for linear signals is as follows: Figure 7 As shown, the quantization result for the linear signal is as follows: Figure 8 As shown in the figure, small signals have a relatively large quantization interval compared to large signals, and are allocated fewer quantization bits. That is, the analog-to-digital converter can be adjusted to use a large quantization interval for small-amplitude signals and a small quantization interval for large-amplitude signals.

[0071] Example 4

[0072] This embodiment provides a 4-bit memristor-based on-chip adjustable non-uniform quantization analog-to-digital converter, configured to use a large quantization interval for small-amplitude and large-amplitude signals, and a small quantization interval for intermediate-amplitude signals, with the quantization interval for linear signals as follows: Figure 9 As shown, the quantization result for the linear signal is as follows: Figure 10 As shown in the figure, medium-amplitude signals have a relatively small quantization interval and more quantization bits compared to large and small signals. That is, the analog-to-digital converter can be adjusted to use a large quantization interval for small and large signals, and a small quantization interval for medium-amplitude signals.

[0073] Example 5

[0074] This embodiment provides a 4-bit memristor-based on-chip adjustable non-uniform quantization analog-to-digital converter, configured in uniform quantization mode, to quantize a superimposed sinusoidal signal as follows: Figure 11 As shown in the figure, uniform quantization applies uniform quantization to all parts of the sinusoidal signal.

[0075] Example 6

[0076] This embodiment provides a 4-bit memristor-based on-chip adjustable non-uniform quantization analog-to-digital converter, configured to use a large quantization interval for small-amplitude signals and a small quantization interval for large-amplitude signals in a non-uniform quantization state. The quantization result of the superimposed sine wave signal is as follows: Figure 12 As shown in the figure, the analog-to-digital converter configured with non-uniform quantization has a small quantization interval for large amplitude signals of interest and a large quantization interval for small amplitude signals, resulting in higher quantization accuracy in the larger amplitude signal region.

[0077] In this invention, non-uniform quantization allows for flexible changes in the quantization method to reduce quantization distortion for different types of signals. Flash ADCs using non-uniform resistance partitioning are common, but their resistances are usually determined at the initial design stage to partition the non-uniform quantization intervals, making on-chip adjustment impossible for different application scenarios. Memristors are the fourth type of passive electronic device besides resistors, capacitors, and inductors. The resistance value of a memristor is related to the current flowing through it; therefore, by applying a certain voltage or current signal, the resistance value of the memristor can be adjusted to a specific state. Practical memristors have various conduction mechanisms, including anion migration, cation migration, electronic effects, and thermal effects. Taking ion migration memristors as an example, under the influence of an applied voltage, metal ions or oxygen holes migrate and gradually form or break conductive channels in the resistive switching layer between the top and bottom electrodes of the memristor, achieving switching between high and low resistance states. By applying limiting current and pulse signals, the resistance value can be precisely adjusted by controlling the thickness and number of conductive channels. An ideal memristor can achieve continuous adjustment of conductance or resistance value with the write signal. In addition to ion migration memristors, phase-change resistive switching memories with better simulated resistive switching performance can also be selected as needed, but the switching ratio and other performance characteristics must also be considered. Furthermore, memristors possess numerous advantages such as small size, fast read / write speed, and low power consumption, and their fabrication process is compatible with CMOS technology, enabling their application in storage and computing. The input signal conversion circuit 200 connects the original input signal and a reference voltage, performing amplitude conversion between them. The memristor array unit 100 receives the converted input signal and reference voltage, and divides the reference voltage to form multiple reference voltage nodes. The output signal control conversion circuit 300 connects to the multiple reference voltage nodes and outputs a digital signal in bus form. The on-chip adjustment circuit 400 performs gating adjustment on the memristor array unit 100, achieving non-uniform quantization of data and effectively reducing quantization noise.

[0078] The above description discloses only one or more preferred embodiments of the present invention, and should not be construed as limiting the scope of the present invention. Those skilled in the art will understand that all or part of the processes of the above embodiments can be implemented, and equivalent changes made in accordance with the claims of the present invention are still within the scope of the invention.

Claims

1. An on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors, characterized in that, It includes a memristor array unit, an input signal conversion circuit, an output signal control conversion circuit, and an on-chip adjustment circuit. The memristor array unit is connected to the input signal conversion circuit, and the output signal control conversion circuit and the on-chip adjustment circuit are respectively connected to the memristor array unit. The input signal conversion circuit is used to connect the original input signal and the reference voltage, and to convert the amplitude of the input signal and the reference voltage. The memristor array unit is used to receive the converted input signal and reference voltage, and divide the reference voltage to form multiple reference voltage nodes; The output signal control conversion circuit is used to connect multiple reference voltage nodes and output digital signals in the form of a bus. The on-chip adjustment circuit is used to select and adjust the memristor array unit; The on-chip adjustment circuit includes a gating array unit and an address gating unit. The gating array unit is connected to the memristor array unit, and the address gating unit is connected to the gating array unit. The memristor array unit consists of multiple memristors connected in series.

2. The on-chip adjustable non-uniform quantization analog-to-digital converter based on memristor as described in claim 1, characterized in that, The number of memristors is 2. N N is the number of quantization bits of the on-chip adjustable non-uniform quantization analog-to-digital converter based on memristors.

3. The on-chip tunable non-uniform quantization analog-to-digital converter based on memristors as described in claim 2, characterized in that, The output signal control conversion circuit includes a comparator array unit, a D flip-flop array unit, and a digital encoder; The comparator array unit is used to connect to the input voltage, compare the reference voltage node with the input voltage, and convert the input voltage into a temperature code. The D flip-flop array unit is used to transmit the temperature code under the control of a clock signal; The digital encoder is used to receive temperature codes, convert them into binary codes, and output them via a bus.

4. The on-chip tunable non-uniform quantization analog-to-digital converter based on memristors as described in claim 3, characterized in that, The comparator array unit includes 2 N -1 comparator; The D flip-flop array unit includes 2 N -1 D flip-flops.

5. The on-chip tunable non-uniform quantization analog-to-digital converter based on memristors as described in claim 4, characterized in that, The gating array unit includes 2 N +1 MOSFET.

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