Duplexer based on high-resistance silicon loading perturbation degenerate mode resonant cavity and processing method

Abstract

The invention provides a duplexer based on a high-resistance silicon loading perturbation degenerate mode resonant cavity and a processing method. The duplexer comprises an input port excitation structure, an output port coupling structure and a medium resonant cavity, the input port excitation structure and the output port coupling structure are fed into the dielectric resonant cavity from the outside, and the dielectric resonant cavity is arranged on the dielectric substrate; the dielectric resonant cavity comprises a plurality of cavities, metal side walls are arranged on the peripheral sides of the cavities, and coupling windows are formed between the adjacent cavities by opening the metal side walls; and the input port excitation structure and the output port coupling structure adopt flat planar circuits. According to the silicon-based duplexer, the dielectric substrate adopts high-resistance silicon, the dielectric resonant cavity is adopted as a transmission unit, the size of the silicon-based duplexer is greatly reduced compared with that of a traditional air metal waveguide structure due to the high dielectric constant characteristic of silicon, and the Q value of the dielectric resonant cavity is higher than that of a traditional microstrip line or substrate integrated waveguide; finally, the effect of greatly reducing the overall size of the device while having a high Q value is achieved.

Description

Technical Field

[0001] The present invention relates to the field of duplexers, and in particular to a duplexer based on a high-resistance silicon loaded perturbation degenerate mode resonant cavity and a processing method thereof. Background Art

[0002] With the development of radar and satellite communication systems in the sub-terahertz band, wireless application scenarios have an increasing demand for wide spectrum and low medium transmission loss. The D-band (110-170GHz) is suitable for high-resolution and high-data-rate wireless backhaul systems due to its rich spectrum resources and low atmospheric attenuation characteristics. As a very important passive component in the RF front end, the duplexer can achieve channel selection and frequency separation. Research on high-performance, miniaturized duplexers suitable for system-level solutions has always been the focus of scientific researchers.

[0003] In order to achieve lower transmission loss performance, duplexers often use high-Q resonant cavities as transmission units. The metal waveguide structure currently widely used in the D band has the characteristics of a large Q value, which can achieve low loss characteristics, but it also brings the disadvantage of large size. Due to the radiation problems caused by the open structure of the microstrip line in this frequency band and the difficulty in realizing substrate integrated waveguide in terms of technology, there are few studies on this type of duplexer. In comparison, the dielectric resonant cavity structure is based on metal waveguides. While having a high Q value, it uses a high dielectric constant material as a substrate, which greatly reduces the overall size of the device. It is the best solution for realizing high-performance duplexers in the sub-terahertz band.

[0004] Wafer-level integrated packaging technology can integrate chips and various passive devices into a system on high-resistance silicon wafers. The process uses micro-nano processing equipment to process multiple wafer samples at one time. Passive devices designed with high-resistance silicon as the medium, such as filters, duplexers, and antennas, can be directly processed on silicon wafers, and interconnected with chips to effectively improve the system's integration and packaging efficiency, and enhance the performance of the entire machine. The dry etching in the scheme uses reactive coupled plasma etching technology to isotropically etch the silicon-based sidewalls on a vertical plane, and uses fluorine-based gases to protect the sidewalls. The etching and protection cycle operation process is used to finally achieve a sidewall groove inclination angle of the resonant cavity of nearly 90°. This process also ensures the high aspect ratio characteristics of the blind groove; blind groove electroplating is the core link in this process flow. This process electroplates the exposed metal area on a silicon wafer covered with dry film protection, and adds active inhibitors with strong adsorption capacity to the plating solution to reduce the metal growth rate on the wafer surface. The added groove accelerator converges in the groove body to increase the metal electroplating speed in the blind groove to ensure the formation of the metal sidewall of the resonant cavity, and finally achieves the effect of growing metal from the bottom to the top of the blind groove, and ensures that the surface metal layer is not fully electroplated.

[0005] As the demand for communication frequency bands continues to increase, wireless backhaul systems are developing towards high performance and high integration. At present, the D-band duplexer basically uses the traditional T-junction to connect the filtering links of two different frequency bands, and the metal waveguide cavity with air as the medium is the main implementation form. While introducing additional transmission path loss, it also increases the overall size of the device. The primary problem faced is how to balance miniaturization and low loss at the same time. At present, the process is still mainly based on traditional computer digital control precision processing technology. The advantage of this solution is that the processing error is small, but the use of metal waveguide parts greatly increases the overall size. By developing new process flows, using different high-performance substrates to design duplexers to reduce the overall size has become a major research hotspot. While ensuring the transmission performance of the duplexer, it has also become a very challenging problem to develop a high-precision and low-tolerance process solution in combination with a high dielectric constant substrate. Summary of the invention

[0006] In view of the defects in the prior art, the object of the present invention is to provide a duplexer based on a high-resistance silicon loaded perturbation degenerate mode resonant cavity and a processing method thereof.

[0007] According to the present invention, a duplexer based on a high-resistance silicon loaded perturbation degenerate mode resonant cavity comprises: an input port excitation structure, an output port coupling structure and a dielectric resonant cavity;

[0008] The input port excitation structure and the output port coupling structure are fed into a dielectric resonant cavity from the outside, and the dielectric resonant cavity is arranged on a dielectric substrate;

[0009] The dielectric resonant cavity comprises a plurality of cavities, the circumference of the plurality of cavities is provided with metal side walls, and coupling windows are formed between adjacent cavities by opening the metal side walls;

[0010] The input port excitation structure and the output port coupling structure adopt flat planar circuits.

[0011] Preferably, the dielectric resonant cavity comprises: a main cavity, a first passband first sub-cavity, a first passband second sub-cavity, a second passband first sub-cavity and a second passband second sub-cavity;

[0012] A first passband first coupling window is set between the main cavity and the first passband first sub-cavity, a first passband second coupling window is set between the first passband first sub-cavity and the first passband second sub-cavity, a second passband first coupling window is set between the main cavity and the second passband first sub-cavity, and a second passband second coupling window is set between the second passband first sub-cavity and the second passband second sub-cavity.

[0013] Preferably, the input port excitation structure comprises: a grounded coplanar waveguide wire of the input port excitation structure;

[0014] The grounded coplanar waveguide wire of the input port excitation structure is connected to the main cavity;

[0015] The output port coupling structure comprises: a grounded coplanar waveguide wire of a second passband output port coupling structure and a grounded coplanar waveguide wire of a first passband output port coupling structure;

[0016] The grounded coplanar waveguide wire of the second passband output port coupling structure is connected to the second passband second sub-cavity, and the grounded coplanar waveguide wire of the first passband output port coupling structure is connected to the first passband second sub-cavity.

[0017] Preferably, the grounded coplanar waveguide wire of the input port excitation structure, the grounded coplanar waveguide wire of the second passband output port coupling structure, and an extension line of the grounded coplanar waveguide wire of the first passband output port coupling structure are collinear.

[0018] Preferably, the gap of the grounded coplanar waveguide wire of the input port excitation structure expands at the edge of the main cavity to form a first square slot structure of the input port excitation structure and a second square slot structure of the input port excitation structure.

[0019] Preferably, the width of the coupling window is smaller than the width of the adjacent cavity.

[0020] Preferably, a metal column is provided in the main cavity.

[0021] Preferably, a method for processing a duplexer based on a high-resistance silicon loaded perturbation degenerate mode resonant cavity comprises the following steps:

[0022] Step S1, preparing a blind groove on a high-resistance silicon substrate;

[0023] Step S2, making a metal side wall of the dielectric resonant cavity;

[0024] Step S3, preparing upper and lower surface metal layers, and dicing to obtain a complete duplexer structure.

[0025] Step S1 includes:

[0026] Step S11, spin coating photoresist on the front side of the silicon wafer and developing it to prepare a mask;

[0027] Step S12, using dry etching to complete body silicon etching, the blind groove body silicon etching is 250 microns;

[0028] Step S13, removing the photoresist using an acetone solution in an ultrasonic environment.

[0029] Step S2 includes:

[0030] Step S21, sputtering a metal seed layer on the front side of the high-resistance silicon wafer;

[0031] Step S22, using the dry film as a mask layer for blind groove electroplating;

[0032] Step S23, blind slot electroplating, adding a surface metal activity inhibitor into the electroplating solution to ensure electroplating anisotropy;

[0033] Step S24, mechanically grinding and polishing the top structure.

[0034] Step S3 includes:

[0035] Step S31, sputtering a top metal seed layer;

[0036] Step S32, spin-coating photoresist on the top metal seed layer and patterning it to realize electroplating mask;

[0037] Step S33, electroplating the top metal layer and removing residual glue;

[0038] Step S34, removing the metal seed layer by ion beam etching to form a complete top metal layer structure;

[0039] Step S35, mechanically grinding and polishing the bottom structure;

[0040] Step S36, sputtering a 1 micron metal seed layer directly as the bottom metal layer;

[0041] Step S37, dicing the high-resistance silicon wafer to complete the duplexer structure manufacturing.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] 1. The silicon-based duplexer of the present application is manufactured based on high-resistance silicon wafer processing, and the input and output structures both use planar circuits instead of metal waveguide structures, thereby omitting the port conversion structure between the waveguide port and the fan-out signal transmission line in system-level applications, and is easy to integrate with other planar circuits.

[0044] 2. The dielectric substrate of the present application adopts high-resistance silicon, and a dielectric resonant cavity is used as a transmission unit. The high dielectric constant characteristics of silicon make the volume of the silicon-based duplexer significantly smaller than that of the traditional air-metal waveguide structure, and the dielectric resonant cavity has a higher Q value than the traditional microstrip line or substrate integrated waveguide, ultimately achieving the effect of greatly reducing the overall size of the device while having a high Q value.

[0045] 3. The two passbands of the present application have small frequency deviations and the process performance has high stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0047] Figure 1 This is a schematic diagram of the overall structure of this application;

[0048] Figure 2 It is a schematic diagram of the input port excitation structure and the output port coupling structure;

[0049] Figure 3 Schematic diagram of silicon-based resonant cavity structure;

[0050] Figure 4 A process flow chart for the processing method of the present application;

[0051] Figure 5 Frequency response curve for this application;

[0052] As shown in the figure: a grounded coplanar waveguide wire 1 of an input port excitation structure, a grounded coplanar waveguide wire 2 of a second passband output port coupling structure, a grounded coplanar waveguide wire 3 of a first passband output port coupling structure, a first square slot structure 4 of an input port excitation structure, a second square slot structure 5 of an input port excitation structure, a main cavity 6, a first passband first sub-cavity 7, a first passband second sub-cavity 8, a second passband first sub-cavity 9, a second passband second sub-cavity 10, a metal pillar 11, a metal sidewall 12, a dielectric substrate 13, a first passband first coupling window 14, a first passband second coupling window 15, a second passband first coupling window 16, and a second passband second coupling window 17. DETAILED DESCRIPTION

[0053] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0054] Example 1

[0055] In this embodiment, the dielectric resonant cavity of the duplexer is designed in the high-resistance silicon wafer. The signal enters from the input port excitation structure, passes through the square slot coupling excitation structure, and excites the two degenerate modes of the duplexer main cavity perturbed by the metal column. Then, the signal is coupled to the output port by the output port coupling structure and the slot line coupling excitation structure, thereby realizing a duplexer with three working modes in each of the two passbands. In terms of technology, a processing scheme is proposed to manufacture a metal resonant cavity on a high-resistance silicon wafer to realize passive devices. This embodiment is based on the problem that the sub-terahertz waveguide duplexer cannot guarantee good transmission performance while being miniaturized. By preparing a metal resonant cavity structure on high-resistance silicon, the traditional large-size metal waveguide duplexer is replaced, which greatly reduces the overall size of the RF system, and improves the system integration while achieving miniaturization.

[0056] like Figure 1 As shown, this embodiment includes: an input port excitation structure, an output port coupling structure and a dielectric resonant cavity; the input port excitation structure includes: a grounded coplanar waveguide 1 of the input port excitation structure; the output port coupling structure includes: a grounded coplanar waveguide 2 of the second passband output port coupling structure and a grounded coplanar waveguide 3 of the first passband output port coupling structure; the dielectric resonant cavity includes: a main cavity 6, a first passband first sub-cavity 7, a first passband second sub-cavity 8, a second passband first sub-cavity 9 and a second passband second sub-cavity 10; the input port excitation structure and the output port coupling structure are fed into the dielectric resonant cavity from the outside, and the dielectric resonant cavity is arranged on a dielectric substrate 13; the dielectric resonant cavity includes a plurality of cavities, and metal side walls 12 are arranged on the peripheral sides of the plurality of cavities, and coupling windows are formed between adjacent cavities by opening the metal side walls 12, and the input port excitation structure and the output port coupling structure adopt a flat planar circuit. The use of planar circuits for silicon-based duplexers is easy to integrate with other planar circuits. If the traditional metal waveguide input and output structure is integrated with the planar circuit, the interconnection structure from the planar to the waveguide will be increased, which will increase the path loss of the system and is not conducive to improving the overall performance of the system.

[0057] Specifically, combined Figure 2-3 As shown, a first passband first coupling window 14 is provided between the main cavity 6 and the first passband first sub-cavity 7, a first passband second coupling window 15 is provided between the first passband first sub-cavity 7 and the first passband second sub-cavity 8, a second passband first coupling window 16 is provided between the main cavity 6 and the second passband first sub-cavity 9, and a second passband second coupling window 17 is provided between the second passband first sub-cavity 9 and the second passband second sub-cavity 10. The grounded coplanar waveguide 1 of the input port excitation structure is connected to the main cavity 6; the grounded coplanar waveguide 2 of the second passband output port coupling structure is connected to the second passband second sub-cavity 10, and the grounded coplanar waveguide 3 of the first passband output port coupling structure is connected to the first passband second sub-cavity 8. The gap of the grounded coplanar waveguide 1 of the input port excitation structure expands at the edge of the main cavity 6 to form a first square slot structure 4 of the input port excitation structure and a second square slot structure 5 of the input port excitation structure. A metal column 11 is provided in the main cavity 6.

[0058] In this embodiment, the grounded coplanar waveguide line 1 of the input port excitation structure, the grounded coplanar waveguide line 2 of the second passband output port coupling structure, and the extended lines of the grounded coplanar waveguide line 3 of the first passband output port coupling structure are collinear.

[0059] In this embodiment, the width of the coupling window is smaller than the width of the adjacent cavity.

[0060] This embodiment also provides a method for processing a duplexer based on a high-resistance silicon loaded perturbation degenerate mode resonant cavity, which specifically includes the following steps:

[0061] Step S1, preparing a blind groove on a high-resistance silicon substrate; wherein step S1 includes: step S11, spin coating photoresist on the front side of the silicon wafer and developing to prepare a mask; step S12, completing body silicon etching by dry etching, and the blind groove body silicon etching is 250 microns; step S13, removing the photoresist by using acetone solution in an ultrasonic environment.

[0062] Step S2, making the metal side wall 12 of the dielectric resonant cavity; wherein step S2 includes: step S21, sputtering a metal seed layer on the front side of the high-resistance silicon wafer; step S22, using the dry film as a mask layer for blind groove electroplating; step S23, blind groove electroplating, adding a surface metal activity inhibitor to the plating solution to ensure the anisotropy of the electroplating; step S24, mechanically grinding and polishing the top structure.

[0063] Step S3, prepare the upper and lower surface metal layers, and obtain the complete duplexer structure by slicing. Wherein, step S3 includes: step S31, sputtering the top metal seed layer; step S32, spin coating the photoresist on the top metal seed layer and patterning to realize the electroplating mask; step S33, electroplating the top metal layer and removing the residual glue; step S34, using ion beam etching to remove the metal seed layer to form a complete top metal layer structure; step S35, mechanically grinding and polishing the bottom structure; step S36, sputtering a 1 micron metal seed layer directly as the bottom metal layer; step S37, slicing the high-resistance silicon wafer to complete the duplexer structure.

[0064] Example 2

[0065] Example 2 is a preferred example of Example 1.

[0066] like Figure 1 As shown, this embodiment includes an input port excitation structure, an output port coupling structure, a dielectric resonant cavity, a coupling window and a perturbation metal column 11. The input port excitation structure and the output port coupling structure are both fed into the dielectric resonant cavity from the outside, and the dielectric resonant cavity adopts a metal waveguide cavity structure.

[0067] like Figure 3 As shown, the dielectric resonant cavity is square and includes: a main cavity 6, a first passband first sub-cavity 7, a first passband second sub-cavity 8, a second passband first sub-cavity 9, and a second passband second sub-cavity 10; a copper layer is coated on the upper and lower surfaces of a dielectric substrate 13, a metal side wall 12 is placed around the dielectric resonant cavity, and a coupling window is formed between adjacent dielectric resonant cavities by opening the metal side wall 13; an input port excitation structure and an output port coupling structure are coupled to the dielectric resonant cavity through a grounded coplanar waveguide.

[0068] In one implementation, the grounded coplanar waveguide line 1 of the input port excitation structure, the grounded coplanar waveguide line 2 of the second passband output port coupling structure, and the extended lines of the grounded coplanar waveguide line 3 of the first passband output port coupling structure are collinear.

[0069] In one embodiment, the width of the coupling window between adjacent dielectric resonant cavities is smaller than the corresponding cavity size.

[0070] like Figure 2 As shown, the input port excitation structure includes: a grounded coplanar waveguide wire 1 of the input port excitation structure, the gap of the grounded coplanar waveguide wire 1 of the input port excitation structure expands at the edge of the main cavity 6 of the dielectric resonant cavity, forming a first square slot structure 4 of the input port excitation structure and a second square slot structure 5 of the input port excitation structure.

[0071] The output port coupling structure includes: a grounded coplanar waveguide wire 2 of the second passband output port coupling structure and a grounded coplanar waveguide wire 3 of the first passband output port coupling structure, which are respectively introduced into the second passband second sub-cavity 10 and the first passband second sub-cavity 8 of the dielectric resonant cavity for coupling.

[0072] In one embodiment, the grounded coplanar waveguide wire 1 of the input port excitation structure, the grounded coplanar waveguide wire 2 of the second passband output port coupling structure, and the grounded coplanar waveguide wire 3 of the first passband output port coupling structure are 50 ohms and are used to connect the duplexer with other devices. One end of the grounded coplanar waveguide wire extends into the dielectric resonant cavity.

[0073] In one implementation, the entire input port excitation structure and the output port coupling structure are planar, which has a high degree of design freedom and is easy to process.

[0074] Processing method: This embodiment proposes to first etch a blind groove with a depth of 250um on a high-resistance silicon wafer, and sputter a metal seed layer on the process surface to electroplate the blind groove, grind and polish after the groove is fully plated, sputter a metal layer on the polished surface, and then pattern it by photolithography, electroplate the top metal layer pattern, and then grind and polish the back of the silicon wafer to expose the metal blind groove structure to complete the production of the metal sidewall, and complete the preparation of the lower surface metal layer by sputtering a metal seed layer on the back of the silicon wafer. Through the determination and implementation of this solution, the difficulties of integrating the dielectric resonant cavity into the silicon wafer are overcome, and the function of the duplexer to lead out the signal through the grounded coplanar waveguide is realized, providing a reliable process solution for the system-level integrated packaging of the duplexer.

[0075] like Figure 4 As shown, the specific process steps of the processing method of this embodiment are:

[0076] a. A four-inch high-resistance silicon wafer with a thickness of 500um and double-sided polishing is used as the substrate;

[0077] b. Spin-coat 9um photoresist on the front side of the silicon wafer, use the photoresist as a mask for the sidewall pattern of the blind groove, and use dry etching to perform deep silicon etching on the exposed silicon substrate on the front side to etch out a blind groove with a depth of 250um;

[0078] c. Remove the glue with acetone and sputter a 30 / 300nm Cr / Cu metal seed layer;

[0079] d. Laminating a 75um dry film on the front side of the silicon wafer as a mask pattern for blind slot electroplating;

[0080] e. Perform blind groove electroplating to form a resonant cavity metal side wall 12;

[0081] f. Use a thinning machine and a grinding wheel to mechanically grind and polish the metal that emerges from the electroplating;

[0082] g. Sputtering a 30 / 300 nm Cr / Cu metal seed layer again;

[0083] h. Spin-coat 9um photoresist on the metal seed layer and develop the top metal mask pattern;

[0084] i. Continue to use the photoresist on the metal seed layer as a mask to electroplate a top metal pattern with a thickness of 4 μm, use acetone to wash away the photoresist, and use ion beam etching to clean the metal seed layer covered by the photoresist;

[0085] j. Grind and polish the back of the wafer again using a corresponding thinning machine and grinding wheel until the metal sidewall 12 pattern is exposed;

[0086] k. Sputter a 30 / 1000nm Cr / Cu metal seed layer on the back of the silicon wafer to form a metal layer on the lower surface.

[0087] In this example, the first passband center frequency is selected at 144 GHz, the second passband center frequency is selected at 153 GHz, the dielectric constant of the silicon substrate is 11.6, the loss tangent is 0.002, and the thickness is 250 um. The length Lq1 of the grounded coplanar waveguide line 1 of the input port excitation structure is 0.56 mm, the line width w is 0.0535 mm, the line spacing s is 0.04 mm, the length Lqi of the square groove is 0.36 mm, the width Sqi is 0.13 mm, the window width Wq1 of the metal side wall 12 of the excitation port is 0.19 mm, the offset distance t1 from the central axis of the main cavity 6 is 0.08 mm, and the length Lms of the metal side wall 12 is 0.165 mm; the lengths Lq2 and Lq3 of the two grounded coplanar waveguide lines in the output port coupling structure are 0.535 mm and 0.36 mm, respectively, and the window widths Wq2 and Wq3 of the metal side wall 12 are 0.221 mm and 0.18 mm, respectively; the width of the metal side wall 12 d is 0.07mm; the length L1 and width W1 of the main cavity 6 are both 0.7mm, the length L2 and width W2 of the first passband first sub-cavity 7 are both 0.4mm, and the length L3 and width W3 of the second passband first sub-cavity 9 are both 0.38mm; the window widths W12, W23, W14 and W45 of the metal side walls 12 between adjacent dielectric resonant cavities are 0.19mm, 0.185mm, 0.17mm and 0.16mm respectively, wherein the offset distance t14 of the second passband first sub-cavity 9 from the central axis of the main cavity 6 is 0.1mm; the diameter dr of the metal column 11 is 0.12mm, and the distances m and n from the metal column 11 to the edge of the main cavity 6 are 0.369mm and 0.303mm respectively.

[0088] Figure 5 This is the frequency response curve of this example. The figure shows the simulation results of the duplexer. The center frequency of the first passband is 144GHz, the relative bandwidth is 2.7%, and the minimum loss in the passband is 1.15dB; the center frequency of the second passband is 153GHz, the relative bandwidth is 2.6%, and the minimum loss in the passband is 1.37dB; the isolation between channels is better than 30dB. The figure also shows the measured response curve of the duplexer. The center frequency of the first passband is 144.1GHz, the relative bandwidth is 2.5%, and the minimum loss in the passband is 1.77dB; the center frequency of the second passband is 153.9GHz, the relative bandwidth is 3%, and the minimum loss in the passband is 1.38dB; the isolation between channels is better than 27dB.

[0089] In the description of the present application, it should be understood that the terms "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0090] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A duplexer based on a high-resistance silicon loaded perturbation degenerate mode resonant cavity, characterized in that: include: Input port excitation structure, output port coupling structure and dielectric resonant cavity; The input port excitation structure and the output port coupling structure are fed from the outside into a dielectric resonant cavity, and the dielectric resonant cavity is arranged on a dielectric substrate (13); The dielectric resonant cavity comprises a plurality of cavities, the circumference of the plurality of cavities being provided with metal side walls (12), and coupling windows are formed between adjacent cavities by opening the metal side walls (12); The input port excitation structure and the output port coupling structure adopt flat planar circuits.

2. The duplexer based on high-resistance silicon loaded perturbation degenerate mode resonant cavity according to claim 1, characterized in that: The dielectric resonant cavity comprises: a main cavity (6), a first passband first sub-cavity (7), a first passband second sub-cavity (8), a second passband first sub-cavity (9) and a second passband second sub-cavity (10); A first passband first coupling window (14) is arranged between the main cavity (6) and the first passband first sub-cavity (7), a first passband second coupling window (15) is arranged between the first passband first sub-cavity (7) and the first passband second sub-cavity (8), a second passband first coupling window (16) is arranged between the main cavity (6) and the second passband first sub-cavity (9), and a second passband second coupling window (17) is arranged between the second passband first sub-cavity (9) and the second passband second sub-cavity (10); A metal column (11) is arranged in the main cavity (6).

3. The duplexer based on high-resistance silicon loaded perturbation degenerate mode resonant cavity according to claim 2, characterized in that: The input port excitation structure comprises: a grounded coplanar waveguide wire (1) of the input port excitation structure; The grounded coplanar waveguide wire (1) of the input port excitation structure is connected to the main cavity (6); The output port coupling structure comprises: a grounded coplanar waveguide wire (2) of a second passband output port coupling structure and a grounded coplanar waveguide wire (3) of a first passband output port coupling structure; The grounded coplanar waveguide wire (2) of the second passband output port coupling structure is connected to the second passband second sub-cavity (10), and the grounded coplanar waveguide wire (3) of the first passband output port coupling structure is connected to the first passband second sub-cavity (8).

4. The duplexer based on high-resistance silicon loaded perturbation degenerate mode resonant cavity according to claim 3, characterized in that: The grounded coplanar waveguide wire (1) of the input port excitation structure, the grounded coplanar waveguide wire (2) of the second passband output port coupling structure, and the extended lines of the grounded coplanar waveguide wire (3) of the first passband output port coupling structure are collinear.

5. The duplexer based on high-resistance silicon loaded perturbation degenerate mode resonant cavity according to claim 3, characterized in that: The gap of the grounded coplanar waveguide wire (1) of the input port excitation structure expands at the edge of the main cavity (6) to form a first square slot structure (4) of the input port excitation structure and a second square slot structure (5) of the input port excitation structure.

6. The duplexer based on high-resistance silicon loaded perturbation degenerate mode resonant cavity according to claim 1, characterized in that: The width of the coupling window is smaller than the width of the adjacent cavity.

7. A method for processing a duplexer based on a high-resistance silicon loaded perturbation degenerate mode resonant cavity as claimed in any one of claims 1 to 6, characterized in that: The following steps are involved: Step S1, preparing a blind groove on a high-resistance silicon substrate; Step S2, manufacturing a metal side wall (12) of the dielectric resonant cavity; Step S3, preparing upper and lower surface metal layers, and dicing to obtain a complete duplexer structure.

8. The processing method according to claim 7, characterized in that: Step S1 includes: Step S11, spin coating photoresist on the front side of the silicon wafer and developing it to prepare a mask; Step S12, using dry etching to complete body silicon etching, the blind groove body silicon etching is 250 microns; Step S13, removing the photoresist using an acetone solution in an ultrasonic environment.

9. The processing method according to claim 7, characterized in that , step S2 comprises: Step S21, sputtering a metal seed layer on the front side of the high-resistance silicon wafer; Step S22, using the dry film as a mask layer for blind groove electroplating; Step S23, blind slot electroplating, adding a surface metal activity inhibitor into the electroplating solution to ensure electroplating anisotropy; Step S24, mechanically grinding and polishing the top structure.

10. The processing method according to claim 7, characterized in that: Step S3 includes: Step S31, sputtering a top metal seed layer; Step S32, spin-coating photoresist on the top metal seed layer and patterning it to realize electroplating mask; Step S33, electroplating the top metal layer and removing residual glue; Step S34, removing the metal seed layer by ion beam etching to form a complete top metal layer structure; Step S35, mechanically grinding and polishing the bottom structure; Step S36, sputtering a 1 micron metal seed layer directly as the bottom metal layer; Step S37, dicing the high-resistance silicon wafer to complete the duplexer structure manufacturing.

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