ASK modulation circuit, method and wireless charging receiver

Abstract

The present application provides an ASK modulation circuit, method, and wireless charging receiver. The circuit includes: a logic control circuit, a rectifier circuit, and a constant current source circuit. During a first dead zone, the logic control circuit controls the constant current source circuit to introduce a bleeder current to the AC1 node, or to introduce a bleeder current to the AC1 node and an injection current to the AC2 node; during a second dead zone, the logic control circuit controls the constant current source circuit to introduce an injection current to the AC1 node, or to introduce an injection current to the AC1 node and a bleeder current to the AC2 node; and / or, during the first dead zone, controls the constant current source circuit to introduce an injection current to the AC1 node, or to introduce an injection current to the AC1 node and a bleeder current to the AC2 node; during the second dead zone, controls the constant current source circuit to introduce a bleeder current to the AC1 node, or to introduce a bleeder current to the AC1 node and an injection current to the AC2 node. ASK modulation is achieved by changing the rate of change of the voltage values ​​of the AC1 and AC2 nodes.

Description

Technical Field

[0001] The present application relates to the technical field of power management chips, and in particular to an ASK modulation circuit, method, and wireless charging receiver. Background Art

[0002] A wireless charging system typically includes a wireless charging transmitter and a wireless charging receiver. Various control signals can be generated based on the operating parameters of the wireless charging receiver. The control signals can be transmitted from the wireless charging receiver to the wireless charging transmitter. Specifically, the control signals can be transmitted from the receiving coil of the wireless charging receiver to the transmitting coil of the wireless charging transmitter in the form of a modulated signal using a suitable modulation scheme. Amplitude shift keying (ASK) is a modulation scheme widely used in wireless charging systems. ASK is achieved by modulating the amplitude of the analog signal in the wireless charging system, transmitting information through the amplitude changes of the analog signal.

[0003] See also Figure 1 2(a) and 2(b), in the related art of wireless charging systems, six modulation switches K1-K6 are usually controlled to connect or disconnect six capacitors C1-C6 between the first terminal AC1_1 and the second terminal AC2_1. The connection and disconnection of the capacitors are modulated, affecting the current waveforms at the receiving and transmitting ends, causing the peak voltage of the induced voltage VCOIL to change, thereby realizing the amplitude shift keying (ASK) modulation function. Summary of the Invention

[0004] This application provides an ASK modulation circuit, method, and wireless charging receiver for a wireless charging receiver, which can reduce or eliminate external capacitors, on-chip switches, and chip pins without affecting the ASK modulation effect. The specific technical solution is as follows:

[0005] In the first aspect, the present application provides an ASK modulation circuit, which includes: a logic control circuit, a rectifier circuit and a constant current source circuit, wherein the logic control circuit is electrically connected to the constant current source circuit; the rectifier circuit includes a first bridge arm and a second bridge arm, the first bridge arm and the second bridge arm are connected in parallel, the first bridge arm includes a first switch tube and a second switch tube, the second bridge arm includes a third switch tube and a fourth switch tube, wherein the first switch tube is connected in series with the second switch tube, and the third switch tube is connected in series with the fourth switch tube; the constant current source circuit includes a first constant current component, a second constant current component, a third constant current component and a fourth constant current component, the first constant current component is connected in parallel between the first end and the second end of the first switch tube, the second constant current component is connected in parallel between the first end and the second end of the second switch tube, The third constant current component is connected in parallel between the first and second ends of the third switching tube, and the fourth constant current component is connected in parallel between the first and second ends of the fourth switching tube; the first constant current component includes a first constant current source and a first switch, the first constant current source is connected in series with the first switch, the second constant current component includes a second constant current source and a second switch, the second constant current source is connected in series with the second switch, the third constant current component includes a third constant current source and a third switch, the third constant current source is connected in series with the third switch, the fourth constant current component includes a fourth constant current source and a fourth switch, the fourth constant current source is connected in series with the fourth switch; the connection point between the second end of the first switching tube and the first end of the second switching tube serves as a first node, and the connection point between the second end of the third switching tube and the first end of the fourth switching tube serves as a second node;

[0006] The logic control circuit is configured to, during a first dead zone, control the constant current source circuit to introduce a discharge current to the first node, or to control the constant current source circuit to introduce a discharge current to the first node and to introduce an injection current to the second node; and during a second dead zone, control the constant current source circuit to introduce an injection current to the first node, or to control the constant current source circuit to introduce an injection current to the first node and to introduce a discharge current to the second node;

[0007] and / or,

[0008] The logic control circuit is further used to control the constant current source circuit to introduce an injection current to the first node, or to control the constant current source circuit to introduce an injection current to the first node and introduce a discharge current to the second node during a first dead zone; and to control the constant current source circuit to introduce a discharge current to the first node, or to control the constant current source circuit to introduce a discharge current to the first node and introduce an injection current to the second node during a second dead zone; wherein the first dead zone process is a process in which the voltage of the first node decreases and the voltage of the second node increases, and the second dead zone process is a process in which the voltage of the first node increases and the voltage of the second node decreases.

[0009] In one possible design, for full-bridge operation:

[0010] In the modulation mode, the logic control circuit is configured to control, during a first dead zone, the second switch and the third switch to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; and during a second dead zone, control the first switch and the fourth switch to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node;

[0011] In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0012] In one possible design, for full-bridge operation:

[0013] In the unmodulated mode, the logic control circuit is configured to control, during a first dead zone, the second switch and the third switch to switch from an off state to a on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; and during a second dead zone, control the first switch and the fourth switch to switch from an off state to a on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node;

[0014] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0015] In one possible design, for full-bridge operation:

[0016] In the modulation mode, the logic control circuit is configured to control, during a first dead zone, the first switch and the fourth switch to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; and during a second dead zone, control the second switch and the third switch to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node;

[0017] In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0018] In one possible design, for full-bridge operation:

[0019] In the unmodulated mode, the logic control circuit is configured to control, during a first dead zone, the first switch and the fourth switch to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; and during a second dead zone, control the second switch and the third switch to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node;

[0020] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0021] In one possible design, for half-bridge operation:

[0022] In the modulation mode, the logic control circuit is configured to control the second switch to switch from an off state to an on state during a first dead zone, so that the second constant current source introduces a discharge current to the first node; and to control the first switch to switch from an off state to an on state during a second dead zone, so that the first constant current source introduces an injection current to the first node;

[0023] In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0024] In one possible design, for half-bridge operation:

[0025] In the unmodulated mode, the logic control circuit is configured to control the second switch to switch from an off state to an on state during a first dead zone, so that the second constant current source introduces a discharge current to the first node; and to control the first switch to switch from an off state to an on state during a second dead zone, so that the first constant current source introduces an injection current to the first node;

[0026] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0027] In one possible design, for half-bridge operation:

[0028] In the modulation mode, the logic control circuit is configured to control the first switch to switch from an off state to an on state during a first dead zone, so that the first constant current source introduces an injection current to the first node; and control the second switch to switch from an off state to an on state during a second dead zone, so that the second constant current source introduces a discharge current to the first node;

[0029] In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0030] In one possible design, for half-bridge operation:

[0031] In the unmodulated mode, the logic control circuit is configured to control the first switch to switch from an off state to an on state during a first dead zone, so that the first constant current source introduces an injection current to the first node; and control the second switch to switch from an off state to an on state during a second dead zone, so that the second constant current source introduces a discharge current to the first node;

[0032] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0033] In one possible design, the logic control circuit is used to control the states of the first switch, the second switch, the third switch and the fourth switch to be off during a non-dead zone process, wherein the non-dead zone process is a process in which the voltage of the first node and the voltage of the second node do not change.

[0034] In a second aspect, the present application provides an ASK modulation method, which is applied to the ASK modulation circuit as described in the first aspect, and the method includes:

[0035] During the first dead zone, the constant current source circuit is controlled to introduce a discharge current to the first node, or the constant current source circuit is controlled to introduce a discharge current to the first node and an injection current to the second node; during the second dead zone, the constant current source circuit is controlled to introduce an injection current to the first node, or the constant current source circuit is controlled to introduce an injection current to the first node and a discharge current to the second node;

[0036] and / or,

[0037] During the first dead zone, the constant current source circuit is controlled to introduce an injection current into the first node, or the constant current source circuit is controlled to introduce an injection current into the first node and a discharge current into the second node; during the second dead zone, the constant current source circuit is controlled to introduce a discharge current into the first node, or the constant current source circuit is controlled to introduce a discharge current into the first node and an injection current into the second node; wherein, the first dead zone process is a process in which the voltage of the first node decreases and the voltage of the second node increases, and the second dead zone process is a process in which the voltage of the first node increases and the voltage of the second node decreases.

[0038] In one possible design, the method includes: for a full-bridge operating state:

[0039] In the modulation mode, during the first dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; during the second dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node;

[0040] In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0041] In one possible design, the method includes: for a full-bridge operating state:

[0042] In the unmodulated mode, during the first dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; during the second dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node;

[0043] In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

[0044] In one possible design, the method includes: for a full-bridge operating state:

[0045] In the modulation mode, during a first dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; during a second dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node;

[0046] In the unmodulated mode, the first switch, the second switch, the third switch, and the fourth switch are controlled to be in an off state.

[0047] In one possible design, the method includes: for a full-bridge operating state:

[0048] In the unmodulated mode, during a first dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; during a second dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node;

[0049] In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

[0050] In one possible design, the method includes: for a half-bridge operating state:

[0051] In the modulation mode, during the first dead zone, the second switch is controlled to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node; during the second dead zone, the first switch is controlled to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node;

[0052] In the unmodulated mode, the first switch, the second switch, the third switch, and the fourth switch are controlled to be in an off state.

[0053] In one possible design, the method includes: for a half-bridge operating state:

[0054] In the unmodulated mode, during the first dead zone, the second switch is controlled to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node; during the second dead zone, the first switch is controlled to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node;

[0055] In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

[0056] In one possible design, the method includes: for a half-bridge operating state:

[0057] In the modulation mode, during a first dead zone, the first switch is controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node; during a second dead zone, the second switch is controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node;

[0058] In the unmodulated mode, the first switch, the second switch, the third switch, and the fourth switch are controlled to be in an off state.

[0059] In one possible design, the method includes: for a half-bridge operating state:

[0060] In the unmodulated mode, during a first dead zone, the first switch is controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node; during a second dead zone, the second switch is controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node;

[0061] In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

[0062] In a third aspect, the present application provides a wireless charging receiver, comprising: a receiving coil, a rectifier circuit as described in the first aspect, a logic control circuit, and a constant current source circuit;

[0063] The receiving coil is electrically connected to the rectifier circuit, the logic control circuit is electrically connected to the constant current source circuit, and the constant current source circuit is electrically connected to the rectifier circuit;

[0064] The logic control circuit is used to modulate the control signal according to the ASK modulation method as described in the second aspect, and transmit the modulated control signal to the transmitting coil magnetically coupled to the receiving coil through the receiving coil, wherein the modulated control signal changes the current of the receiving coil by controlling the constant current source circuit.

[0065] Beneficial effects of the embodiments of the present application:

[0066] In an embodiment of the present application, in modulation mode, a logic control circuit is used to control a constant current source to introduce a discharge current or inject a current into the first node and the second node during the dead zone, thereby accelerating or slowing down the rate of change of the voltage values ​​of the first node and the second node. That is, the rate of change of the voltage values ​​of the first node and the second node changes, which effectively changes the output impedance of the receiving end, causing the current in the receiving end coil to change, which in turn causes the current in the transmitting end coil to change, thereby achieving ASK modulation. This can reduce or eliminate off-chip capacitors, on-chip switches, and chip pins without affecting the ASK modulation effect.

[0067] The beneficial effects provided in the above-mentioned second aspect and the various possible designs of the above-mentioned second aspect can be referred to the beneficial effects brought about by the above-mentioned first aspect and the various possible implementation methods of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0069] Figure 1 An ASK modulation circuit provided in the related art;

[0070] FIG2( a ) is a schematic diagram of an ASK modulation waveform provided in the related art;

[0071] FIG2( b ) is a timing diagram of an ASK modulation circuit provided in the related art;

[0072] Figure 3 A schematic diagram of an ASK modulation circuit structure provided in an embodiment of the present application;

[0073] FIG4( a ) is a schematic diagram of a circuit control of a first non-dead zone process in an unmodulated mode provided in Example 1 of the present application;

[0074] FIG4( b ) is a schematic diagram of a circuit control of a first dead zone process in an unmodulated mode provided in Example 1 of the present application;

[0075] FIG4( c ) is a schematic diagram of a circuit control of a second non-dead zone process in an unmodulated mode provided in Example 1 of the present application;

[0076] FIG4( d ) is a schematic diagram of a circuit control of a second dead zone process in an unmodulated mode provided in Example 1 of the present application;

[0077] FIG4( e ) is a schematic diagram of a circuit control of a first non-dead zone process in a modulation mode provided in Example 1 of the present application;

[0078] FIG4( f ) is a schematic diagram of a circuit control of a first dead zone process in a modulation mode provided in Example 1 of the present application;

[0079] FIG4( g ) is a schematic diagram of a circuit control of a second non-dead zone process in a modulation mode provided in Example 1 of the present application;

[0080] FIG4(h) is a schematic diagram of a circuit control of a second dead zone process in a modulation mode provided in Example 1 of the present application;

[0081] Figure 5 A timing diagram provided in Example 1 of the present application;

[0082] Figure 6 A logic control circuit provided in Example 1 of the present application;

[0083] FIG7( a ) is a schematic diagram of a circuit control of a first non-dead zone process in an unmodulated mode provided in Example 2 of the present application;

[0084] FIG7( b ) is a schematic diagram of a circuit control of a first dead zone process in an unmodulated mode provided in the second embodiment of the present application;

[0085] FIG7( c ) is a schematic diagram of a circuit control of a second non-dead zone process in an unmodulated mode provided in the second embodiment of the present application;

[0086] FIG7( d ) is a schematic diagram of a circuit control of a second dead zone process in an unmodulated mode provided in the second embodiment of the present application;

[0087] FIG7( e ) is a schematic diagram of a circuit control of a first non-dead zone process in a modulation mode provided in the second embodiment of the present application;

[0088] FIG7( f ) is a schematic diagram of a circuit control of a first dead zone process in a modulation mode provided in the second embodiment of the present application;

[0089] FIG7( g ) is a schematic diagram of circuit control of a second non-dead zone process in a modulation mode provided in the second embodiment of the present application;

[0090] FIG7( h ) is a schematic diagram of a circuit control of a second dead zone process in a modulation mode provided in the second embodiment of the present application;

[0091] Figure 8 A timing diagram provided for Example 2 of this application;

[0092] Figure 9 A logic control circuit provided in Example 2 of the present application;

[0093] FIG10( a ) is a schematic diagram of a circuit control of a first non-dead zone process in an unmodulated mode provided in Example 3 of the present application;

[0094] FIG10( b ) is a schematic diagram of a circuit control of a first dead zone process in an unmodulated mode provided in Example 3 of the present application;

[0095] FIG10( c ) is a schematic diagram of circuit control of a second non-dead zone process in an unmodulated mode provided in the third embodiment of the present application;

[0096] FIG10( d ) is a schematic diagram of a circuit control of a second dead zone process in an unmodulated mode provided in the third embodiment of the present application;

[0097] FIG10( e ) is a schematic diagram of a circuit control of a first non-dead zone process in a modulation mode provided in the third embodiment of the present application;

[0098] FIG10( f ) is a schematic diagram of a circuit control of a first dead zone process in a modulation mode provided in Example 3 of the present application;

[0099] FIG10( g ) is a schematic diagram of a circuit control of a second non-dead zone process in a modulation mode provided in the third embodiment of the present application;

[0100] FIG10( h ) is a schematic diagram of a circuit control of a second dead zone process in a modulation mode provided in Example 3 of the present application;

[0101] Figure 11 A timing diagram provided in Example 3 of the present application;

[0102] Figure 12 A logic control circuit provided in Example 3 of the present application;

[0103] FIG13( a ) is a schematic diagram of a circuit control of a first non-dead zone process in an unmodulated mode provided in a fourth embodiment of the present application;

[0104] FIG13( b ) is a schematic diagram of a circuit control of a first dead zone process in an unmodulated mode provided in the fourth embodiment of the present application;

[0105] FIG13( c ) is a schematic diagram of a circuit control of a second non-dead zone process in an unmodulated mode provided in the fourth embodiment of the present application;

[0106] FIG13( d ) is a schematic diagram of a circuit control of a second dead zone process in an unmodulated mode provided in the fourth embodiment of the present application;

[0107] FIG13( e ) is a schematic diagram of a circuit control of a first non-dead zone process in a modulation mode provided in the fourth embodiment of the present application;

[0108] FIG13( f ) is a schematic diagram of a circuit control of a first dead zone process in a modulation mode provided in a fourth embodiment of the present application;

[0109] FIG13( g ) is a schematic diagram of circuit control of a second non-dead zone process in a modulation mode provided in the fourth embodiment of the present application;

[0110] FIG13(h) is a schematic diagram of a circuit control of a second dead zone process in a modulation mode provided in the fourth embodiment of the present application;

[0111] Figure 14 A timing diagram provided for the fourth embodiment of the present application;

[0112] Figure 15 A logic control circuit provided in the fourth embodiment of the present application;

[0113] Figure 16 A flow chart of an ASK modulation method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0114] In this application, "at least one" refers to one or more, and "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a alone, b alone, or c alone can represent: a alone, b alone, c alone, a and b in combination, a and c in combination, b and c in combination, or a, b, and c in combination, where a, b, and c can be single or multiple. In addition, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance.

[0115] The directions or positional relationships indicated by terms such as "center", "longitudinal", "lateral", "up", "down", "left", "right", "front", and "back" are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present application and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they should not be understood as limiting the present application.

[0116] The terms "connected" and "connect" should be interpreted broadly. For example, "connected" or "connected" in a circuit structure can refer not only to a physical connection, but also to an electrical connection or a signal connection. For example, it can be a direct connection, i.e., a physical connection, or an indirect connection through at least one intermediate component, as long as the circuit is interconnected. It can also refer to internal connectivity between two components. Signal connection can refer not only to signal connection through circuits but also to signal connection through media, such as radio waves. Those skilled in the art will understand the specific meanings of the above terms in this application on a case-by-case basis.

[0117] See also Figure 1 In the related art of wireless charging systems, by controlling the states of six modulation switches K1-K6, six capacitors C1-C6 are connected or disconnected between the first terminal AC1_1 and the second terminal AC2_1. The connection and disconnection of the capacitors affect the current waveforms at the receiving and transmitting ends, see Figures 2(a) and 2(b), causing the peak voltage of the induced voltage VCOIL to change, thereby realizing the ASK modulation function.

[0118] See also Figure 1 ,like Figure 1 As shown, at the receiving end, the rectifier circuit includes a first power tube Q1_1, a second power tube Q2_1, a third power tube Q3_1, and a fourth power tube Q4_1. The first rectifier branch includes the first and fourth power tubes Q1_1 and Q4_1, and the second rectifier branch includes the second and third power tubes Q2_1 and Q3_1. The first power tube Q1_1 serves as the upper tube of the first rectifier branch, and the fourth power tube Q4_1 serves as the lower tube of the first rectifier branch. The second power tube Q2_1 serves as the lower tube of the second rectifier branch, and the third power tube Q3_1 serves as the upper tube of the second rectifier branch. At different phases of the AC signal, the first or second rectifier branch is controlled to conduct, and the AC signal sensed by the receiving end coil is converted into a DC signal through the rectifier circuit.

[0119] Capacitors C1-C6 are off-chip capacitors, which are connected to the outside of the ASK modulation chip by the user during use. Modulation switches K1-K6 are on-chip switching tubes, which are set inside the ASK modulation chip. Corresponding chip pins need to be set in the ASK modulation chip to connect the off-chip capacitors to the outside of the ASK modulation chip to realize the ASK modulation function.

[0120] The specific waveform diagram of the ASK modulation process is shown in Figure 2. By detecting the voltage values ​​at the first and second terminals AC1_1 and AC2_1, the states of the first, second, third, and fourth power transistors Q1_1, Q2_1, Q3_1, and Q4_1 are controlled. Specifically, based on the variation pattern of the voltage values ​​at the first and second terminals AC1_1 and AC2_1, as shown in Figure 2, the period during which the voltage values ​​at the first and second terminals AC1_1 and AC2_1 do not change within a cycle is called a non-dead zone, while the period during which the voltage values ​​at the first and second terminals AC1_1 and AC2_1 change is called a dead zone. During the non-dead zone, the AC signal sensed by the receiving coil is converted into a DC signal by alternating the conduction of the first and second rectifier branches. During the dead zone, the first and second rectifier branches switch states, with the power transistors in both branches being in the off state.

[0121] To ensure the effectiveness of ASK modulation, related technologies typically require the use of multiple off-chip capacitors, on-chip switches, and chip pins. This increases the area of ​​the ASK modulation chip and the overall circuit cost. If the area of ​​the ASK modulation chip and the overall circuit cost are reduced by reducing the number of off-chip capacitors, on-chip switches, and chip pins, the ASK modulation effect may be poor in some application scenarios.

[0122] In response to the shortcomings in the related art, the embodiments of the present application provide an ASK modulation circuit, method, wireless charging receiver, chip and electronic device, which can reduce or eliminate off-chip capacitors, on-chip switching tubes and chip pins without affecting the ASK modulation effect.

[0123] Among them, the ASK modulation circuit used for the wireless charging receiving end can be a chip or a circuit module.

[0124] Among them, the ASK modulation circuit used for the wireless charging receiving end can be integrated into the same chip or into different chips, and the embodiments of the present application do not specifically limit this.

[0125] In this application, electronic devices may include but are not limited to: smartphones with wireless charging function, wireless headphones, and electric toothbrushes.

[0126] See also Figure 3, Figure 3 The embodiment of the present application provides an ASK modulation circuit 1000, which is used for a wireless charging receiving end. Figure 3 As shown, the circuit may include: a logic control circuit 100, a rectifier circuit 200 and a constant current source circuit 300, wherein the logic control circuit 100 is electrically connected to the constant current source circuit 300; the rectifier circuit 200 includes a first bridge arm 201 and a second bridge arm 202, wherein the first bridge arm 201 and the second bridge arm 202 are connected in parallel, the first bridge arm 201 includes a first switch tube Q1 and a second switch tube Q2, and the second bridge arm 202 includes a third switch tube Q3 and a fourth switch tube Q4, wherein the first switch tube Q1 is connected in series with the second switch tube Q2, and the third switch tube Q3 is connected in series with the fourth switch tube Q4; the constant current source circuit 300 includes a first constant current component 301, a second constant current component 302, a third constant current component 303 and a fourth constant current component 304, wherein the first end and the second end of the first switch tube Q1 are connected in parallel with the first constant current component 301, the first end and the second end of the second switch tube Q2 are connected in parallel with the second constant current component 302, and the fourth constant current component 304. A third constant current component 303 is connected in parallel between the first and second ends of the third switch tube Q3, and a fourth constant current component 304 is connected in parallel between the first and second ends of the fourth switch tube Q4; the first constant current component 301 includes a first constant current source M1 and a first switch S1, and the first constant current source M1 is connected in series with the first switch S1; the second constant current component 302 includes a second constant current source M2 and a second switch S2, and the second constant current source M2 is connected in series with the second switch S2; the third constant current component 303 includes a third constant current source M3 and a third switch S3, and the third constant current source M3 is connected in series with the third switch S3; the fourth constant current component 304 includes a fourth constant current source M4 and a fourth switch S4, and the fourth constant current source M4 is connected in series with the fourth switch S4; the connection point between the second end of the first switch tube Q1 and the first end of the second switch tube Q2 serves as a first node AC1, and the connection point between the second end of the third switch tube Q3 and the first end of the fourth switch tube Q4 serves as a second node AC2.

[0127] The logic control circuit 100 is configured to control the constant current source circuit 300 to introduce a discharge current to the first node AC1 during the first dead zone, or to control the constant current source circuit 300 to introduce a discharge current to the first node AC1 and to introduce an injection current to the second node AC2; and to control the constant current source circuit 300 to introduce an injection current to the first node AC1 during the second dead zone, or to control the constant current source circuit 300 to introduce an injection current to the first node AC1 and to introduce a discharge current to the second node AC2; and / or, the logic control circuit 100 is further configured to control the constant current source circuit 300 to introduce an injection current to the first node AC1 and to introduce a discharge current to the second node AC2 during the first dead zone. During the second dead zone, the constant current source circuit 300 is controlled to introduce a discharge current into the first node AC1, or the constant current source circuit 300 is controlled to introduce a discharge current into the first node AC1 and an injection current into the second node AC2; during the second dead zone, the constant current source circuit 300 is controlled to introduce a discharge current into the first node AC1, or the constant current source circuit 300 is controlled to introduce a discharge current into the first node AC1 and an injection current into the second node AC2; wherein, the first dead zone process is a process in which the voltage of the first node AC1 decreases and the voltage of the second node AC2 increases, and the second dead zone process is a process in which the voltage of the first node AC1 increases and the voltage of the second node AC2 decreases.

[0128] The rectifier circuit 200 includes a first bridge arm 201 and a second bridge arm 202, and the first bridge arm and the second bridge arm are connected in parallel between the output voltage VRECT and ground. A first node AC1 is formed between the first switch tube Q1 and the second switch tube Q2, and a second node AC2 is formed between the third switch tube Q3 and the fourth switch tube Q4. By controlling the first rectifier branch (i.e., the first switch tube Q1 and the fourth switch tube Q4) and the second rectifier branch (i.e., the third switch tube Q3 and the fourth switch tube Q2) to alternately conduct, the AC signal sensed by the receiving end coil is converted into a DC signal. Normally, the first switch tube Q1 and the fourth switch tube Q4 in the first rectifier branch are turned on or off at the same time, and the third switch tube Q3 and the second switch tube Q2 in the second rectifier branch are turned on or off at the same time. The rectifier circuit is a prior art, and the specific connection method and operating principle of the rectifier circuit will not be described in detail in this application.

[0129] The process in which the voltage values ​​of the first node AC1 and the second node AC2 do not change is called a non-dead zone process, and the process in which the voltage values ​​of the first node AC1 and the second node AC2 change is called a dead zone process. Based on the variation pattern of the voltage values ​​of the first node AC1 and the second node AC2, the dead zone process includes a first dead zone process and a second dead zone process within a cycle. The first dead zone process is a process in which the voltage of the first node AC1 decreases and the voltage of the second node AC2 increases, while the second dead zone process is a process in which the voltage of the first node AC1 increases and the voltage of the second node AC2 decreases. The non-dead zone process includes a first non-dead zone process and a second non-dead zone process within a cycle. The first non-dead zone process is a process in which the voltage of the first node AC1 increases and then stops changing, while the voltage of the second node AC2 decreases and then stops changing. The second non-dead zone process is a process in which the voltage of the first node AC1 decreases and then stops changing, while the voltage of the second node AC2 increases and then stops changing.

[0130] See also Figure 3 In this application, a constant current source circuit is added to the existing rectifier circuit. The constant current source circuit includes a first constant current component, a second constant current component, a third constant current component, and a fourth constant current component. The first constant current component is connected in parallel between the first and second ends of the first switch tube, the second constant current component is connected in parallel between the first and second ends of the second switch tube, the third constant current component is connected in parallel between the first and second ends of the third switch tube, and the fourth constant current component is connected in parallel between the first and second ends of the fourth switch tube. A logic control circuit is electrically connected to the constant current source circuit. Specifically, the logic control circuit is electrically connected to the control ends of the first switch, the second switch, the third switch, and the fourth switch in the constant current source circuit respectively. By controlling the switching state of each switch, during the dead zone, current is introduced into the first node and the second node, causing the rate of change of the voltage value of the first node and the second node to change, which is equivalent to changing the output impedance of the receiving end, causing the current in the receiving end coil to change, and then causing the current in the transmitting end coil to change, thereby realizing the ASK modulation function.

[0131] In the related art, in modulation mode, capacitors C1-C6 are connected or disconnected between the first terminal AC1_1 and the second terminal AC2_1, and modulation is performed by connecting or disconnecting the capacitors. This affects the current waveforms at the receiving and transmitting ends, causing the peak voltage of the induced voltage VCOIL to change, thereby achieving ASK modulation. However, in the present application, in modulation mode, a logic control circuit is used to control a constant current source to introduce current to the first node AC1 and the second node AC2 during the dead zone, thereby changing the rate of change of the voltage values ​​at the first node AC1 and the second node AC2, thereby achieving ASK modulation.

[0132] In the present application, specifically, during the first dead zone, the logic control circuit controls the constant current source circuit to introduce a discharge current to the first node AC1, or controls the constant current source circuit to introduce a discharge current to the first node AC1 and an injection current to the second node AC2; during the second dead zone, the logic control circuit controls the constant current source circuit to introduce an injection current to the first node AC1, or controls the constant current source circuit to introduce an injection current to the first node AC1 and a discharge current to the second node AC2. Since the voltage of the first node AC1 decreases and the voltage of the second node AC2 increases during the first dead zone, the method of controlling the constant current source to introduce a bleeder current into the first node AC1, or controlling the constant current source circuit to introduce a bleeder current into the first node AC1 and an injection current into the second node AC2, can make the voltage of the first node AC1 decrease faster and the voltage of the second node AC2 increase faster. Since the voltage of the first node AC1 increases and the voltage of the second node AC2 decreases during the second dead zone, the method of controlling the constant current source circuit to introduce an injection current into the first node AC1, or controlling the constant current source circuit to introduce an injection current into the first node AC1 and a bleeder current into the second node AC2, can make the voltage of the first node AC1 increase faster and the voltage of the second node AC2 decrease faster. The above method can accelerate the rate of change of the voltage values ​​of the first node and the second node, thereby realizing the ASK modulation function.

[0133] In the present application, specifically, during the first dead zone, the logic control circuit controls the constant current source circuit to introduce an injection current to the first node AC1, or controls the constant current source circuit to introduce an injection current to the first node AC1 and introduce a discharge current to the second node AC2; during the second dead zone, the logic control circuit controls the constant current source circuit to introduce a discharge current to the first node AC1, or controls the constant current source circuit to introduce a discharge current to the first node AC1 and introduce an injection current to the second node AC2. Since the voltage of the first node AC1 decreases and the voltage of the second node AC2 increases during the first dead zone, the method of controlling the constant current source to introduce an injection current into the first node AC1, or controlling the constant current source circuit to introduce an injection current into the first node AC1 and a bleeder current into the second node AC2, can slow down the rate at which the voltage of the first node AC1 decreases and slow down the rate at which the voltage of the second node AC2 increases. Since the voltage of the first node AC1 increases and the voltage of the second node AC2 decreases during the second dead zone, the method of controlling the constant current source circuit to introduce a bleeder current into the first node AC1, or controlling the constant current source circuit to introduce a bleeder current into the first node AC1 and an injection current into the second node AC2, can slow down the rate at which the voltage of the first node AC1 increases and slows down the rate at which the voltage of the second node AC2 decreases. The above method can slow down the rate at which the voltage values ​​of the first and second nodes change, thereby realizing the ASK modulation function.

[0134] In an embodiment of the present application, a logic control circuit is used to control a constant current source to introduce a bleed current or inject a current into the first and second nodes during the dead zone, thereby accelerating or slowing down the rate of change of the voltage values ​​of the first and second nodes. This means that the rate of change of the voltage values ​​of the first and second nodes changes, which effectively changes the output impedance of the receiving end, causing the current in the receiving coil to change, which in turn causes the current in the transmitting coil to change, thereby achieving ASK modulation. This method can reduce or eliminate off-chip capacitors, on-chip switches, and chip pins without affecting the ASK modulation effect.

[0135] In one possible embodiment, see Figure 4(a) to Figure 4(h) , Figure 4(a) to Figure 4(h) A circuit control schematic diagram is provided for the first embodiment of the present application, wherein Figure 4(a), Figure 4(b), Figure 4(c), and Figure 4(d) are unmodulated modes, Figure 4(a) is the first non-dead zone process in the unmodulated mode, Figure 4(c) is the second non-dead zone process in the unmodulated mode, Figure 4(b) is the first dead zone process in the unmodulated mode, and Figure 4(d) is the second dead zone process in the unmodulated mode; Figure 4(e), Figure 4(f), Figure 4(g), and Figure 4(h) are modulation modes, Figure 4(e) is the first non-dead zone process in the modulation mode, Figure 4(g) is the second non-dead zone process in the modulation mode, Figure 4(f) is the first dead zone process in the modulation mode, and Figure 4(h) is the second dead zone process in the modulation mode.

[0136] For the full-bridge working state: in the modulation mode, the logic control circuit is used to control the second switch S2 and the third switch S3 to switch from the off state to the on state in the first dead zone process (i.e., Figure 4(f)), so that the second constant current source M2 introduces a discharge current to the first node AC1, and the third constant current source M3 introduces an injection current to the second node AC2; in the second dead zone process (i.e., Figure 4(h)), the first switch S1 and the fourth switch S4 are controlled to switch from the off state to the on state, so that the first constant current source M1 introduces an injection current to the first node AC1, and the fourth constant current source M4 introduces a discharge current to the second node AC2.

[0137] The capacitors connected in parallel between the first and second ends of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, and the fourth switch tube Q4 are the parasitic capacitances of the corresponding switch tubes themselves. The parasitic capacitances shown in the figure are only for the convenience of explaining the principle, and are not the actual capacitances added. For the convenience of explanation, the figure only shows the reference numerals of the constant current sources in the dead zone process (i.e., Figure 4 (f) and Figure 4 (h)) under the modulation mode. The reference numerals of the corresponding constant current sources are not shown one by one in the figure for the non-dead zone process under the modulation mode and the unmodulated mode. It can be understood that Figure 4(a) to Figure 4(h) The reference numerals of the components are consistent.

[0138] In the full-bridge operating state, within one cycle, the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 all change state. Specifically, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) switch between an on state and an off state.

[0139] The specific working process of Example 1 is as follows:

[0140] In modulation mode, for full-bridge operation:

[0141] During the first non-dead zone, as shown in Figure 4(e), the first rectifier branch (i.e., the first and fourth switches Q1 and Q4) is on, while the second rectifier branch (i.e., the second and third switches Q2 and Q3) is off. This results in the voltage at the first node AC1 being the output voltage VRECT, and the voltage at the second node AC2 being zero. Switches S1 through S4 are all off.

[0142] During the first dead zone, referring to FIG4(f), the switches Q1 to Q4 are all in the off state, and the first switch S1 and the fourth switch S4 are both in the off state. At this time, the first node AC1 is discharged to ground through the parasitic capacitance of the second switch Q2, and the second node AC2 begins to charge through the parasitic capacitance of the third switch Q3. During the first dead zone, the logic control circuit controls the second switch S2 and the third switch S3 to switch from the off state to the on state, introduces a discharge current to the first node AC1 through the second constant current source M2, causing the voltage of the first node AC1 to drop faster, and introduces an injection current to the second node AC2 through the third constant current source M3, causing the voltage of the second node AC2 to rise faster.

[0143] During the second non-dead zone, see Figure 4(g), the second rectifier branch (i.e., the second and third switches Q2 and Q3) is turned on, and the first rectifier branch (i.e., the first and fourth switches Q1 and Q4) is turned off. Switches S1 to S4 are all in the off state.

[0144] During the second dead zone, see Figure 4(h), the switches Q1 to Q4 are all in the off state, and the second switch S2 and the third switch S3 are both in the off state. At this time, the first node AC1 begins to charge through the parasitic capacitance of Q1, and the second node AC2 discharges to ground through the parasitic capacitance of Q4. During the second dead zone, the logic control circuit controls the first switch S1 and the fourth switch S4 to switch from the off state to the on state, introduces an injection current into the first node AC1 through the first constant current source M1, causing the voltage of the first node AC1 to rise faster, and introduces a discharge current into the second node AC2 through the fourth constant current source M4, causing the voltage of the second node AC2 to drop faster.

[0145] In unmodulated mode:

[0146] During the first non-dead zone, as shown in FIG4(a), the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) is turned on, and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) is turned off. Switches S1 to S4 are all in the off state.

[0147] During the first dead zone, referring to FIG. 4( b ), the switch tubes Q1 to Q4 are all in the off state, and the switches S1 to S4 are all in the off state.

[0148] During the second non-dead zone, as shown in FIG4(c), the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) is turned on, and the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) is turned off. Switches S1 to S4 are all turned off.

[0149] During the second dead zone, referring to FIG. 4( d ), the switch tubes Q1 - Q4 are all in the off state, and the switches S1 - S4 are all in the off state.

[0150] In the unmodulated mode, the logic control circuit controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be in the off state. That is, in the unmodulated mode, the constant current source circuit does not work and does not need to introduce current to the first node AC1 and the second node AC2.

[0151] In one possible embodiment, in the modulation mode of Example 1, the logic control circuit controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be in the off state during the first non-dead zone process and the second non-dead zone process, as shown in Figures 4(e) and 4(g). That is, in the modulation mode, during the first non-dead zone process and the second non-dead zone process, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2.

[0152] See also Figure 5 , Figure 5A timing diagram is provided for the first embodiment of the present application, such as Figure 5 As shown, in unmodulated mode:

[0153] For the first non-dead zone process and the second non-dead zone process, the timing of the switch tubes Q1 to Q4 is: when it is detected that the body diodes of the switch tubes Q1 to Q4 are turned on, the corresponding switch tubes are controlled to be turned on; when it is detected that the current flowing through the switch tubes Q1 to Q4 passes through zero, the corresponding switch tubes are controlled to be turned off.

[0154] During the first non-dead zone, since the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are turned on, the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 5 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 5 S-Q4 in the circuit is high, and the second switch tube Q2 (i.e. Figure 5 S-Q2) and the third switch tube Q3 (i.e. Figure 5 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 5 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0155] During the second non-dead zone, since the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are turned on, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 5 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 5 S-Q4 in the circuit is low, and the second switch tube Q2 (i.e. Figure 5 S-Q2) and the third switch tube Q3 (i.e. Figure 5 S-Q3 in the circuit is high, switches S1 to S4 (i.e. Figure 5 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0156] During the dead zone, the switches S1 to S4 are all in the off state, and no current needs to be introduced into the first node AC1 and the second node AC2. In addition, the switches Q1 to Q4 are all in the off state.

[0157] During the first dead zone, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are both in the off state, and the switches S1 to S4 are all in the off state. Figure 5 S-Q1 in the figure), the fourth switch tube Q4 (i.e. Figure 5S-Q4 in the middle), the second switch tube Q2 (i.e. Figure 5 S-Q2) and the third switch tube Q3 (i.e. Figure 5 S-Q3 in the figure are all low level, switches S1 to S4 (i.e. Figure 5 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0158] During the second dead zone, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are both in the off state, and the switches S1 to S4 are all in the off state. Figure 5 S-Q1 in the figure), the fourth switch tube Q4 (i.e. Figure 5 S-Q4 in the middle), the second switch tube Q2 (i.e. Figure 5 S-Q2) and the third switch tube Q3 (i.e. Figure 5 S-Q3 in the figure are all low level, switches S1 to S4 (i.e. Figure 5 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0159] Please continue to see Figure 5 , in modulation mode:

[0160] For the non-dead zone process, the timing of the switch tubes Q1 to Q4 is: when it is detected that the body diodes of the switch tubes Q1 to Q4 are turned on, the corresponding switch tubes are controlled to be turned on; when it is detected that the current flowing through the switch tubes Q1 to Q4 passes through zero, the corresponding switch tubes are controlled to be turned off.

[0161] During the first non-dead zone, since the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are turned on, the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 5 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 5 S-Q4 in the circuit is high, and the second switch tube Q2 (i.e. Figure 5 S-Q2) and the third switch tube Q3 (i.e. Figure 5 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 5 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0162] During the second non-dead zone, since the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are turned on, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 5S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 5 S-Q4 in the circuit is low, and the second switch tube Q2 (i.e. Figure 5 S-Q2) and the third switch tube Q3 (i.e. Figure 5 S-Q3 in the circuit is high, switches S1 to S4 (i.e. Figure 5 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0163] During the first dead zone, the voltage of the first node AC1 decreases and the voltage of the second node AC2 increases. At this time, the first switch S1 and the fourth switch S4 are controlled to be turned off, and the second switch S2 and the third switch S3 are controlled to be turned on. A discharge current is introduced into the first node AC1, and an injection current is introduced into the second node AC2. This accelerates the speed at which the voltage of the first node AC1 decreases and the speed at which the voltage of the second node AC2 increases. Therefore, the first switch S1 (i.e. Figure 5 S-S1 in the figure) and the fourth switch S4 (i.e. Figure 5 S-S4 in the circuit) is low level, the second switch S2 (i.e. Figure 5 S-S2 in the figure) and the third switch S3 (i.e. Figure 5 S-S3) in is high level.

[0164] During the second dead zone, the voltage of the first node AC1 rises and the voltage of the second node AC2 drops. At this time, the second switch S2 and the third switch S3 are controlled to be turned off, and the first switch S1 and the fourth switch S4 are controlled to be turned on. The first node AC1 introduces an injection current, and the second node AC2 introduces a discharge current, which accelerates the rise speed of the voltage of the first node AC1 and the drop speed of the voltage of the second node AC2. Therefore, the first switch S1 (i.e. Figure 5 S-S1 in the figure) and the fourth switch S4 (i.e. Figure 5 S-S4 in the circuit) is high level, the second switch S2 (i.e. Figure 5 S-S2 in the figure) and the third switch S3 (i.e. Figure 5 S-S3) in is low level.

[0165] It is understandable that Figure 5 The high level in the timing of the switch tubes Q1~Q4 corresponds to the on state, and the low level corresponds to the off state. Figure 5 The high level in the timing of switches S1 to S4 corresponds to the on state, and the low level corresponds to the off state.

[0166] By using the method of the first embodiment, in the modulation mode, the voltage change speed of the first node AC1 and the second node AC2 is accelerated, such as Figure 5As shown by the dotted line portion of the first node AC1 and the second node AC2, the slopes of the voltage rise and fall of the first node AC1 and the second node AC2 become larger during the dead zone, as shown in FIG. Figure 5 As shown in the dotted part of S-Q2 and S-Q3 in the first dead zone, the second switch tube Q2 and the second switch tube Q3 are turned on in advance, as shown in FIG. Figure 5 As shown in the dotted part of S-Q1 and S-Q4 during the second dead zone, the first switch tube Q1 and the fourth switch tube Q4 are turned on in advance.

[0167] For embodiment one, the present application provides a logic control circuit 100, which is used to obtain control signals of switches S1 to S4 (i.e., S-S1, S-S2, S-S3, S-S4) based on the status signals of switch tubes Q1 to Q4 (i.e., S-Q1, S-Q2, S-Q3, S-Q4).

[0168] For details, see Figure 6 The circuit 100 includes: a first NOR gate A1, a second NOR gate A2, a third NOR gate A3, a fourth NOR gate A4, a fifth NOR gate A5, a sixth NOR gate A6, a seventh NOR gate A7, an eighth NOR gate A8, a ninth NOR gate A9, a tenth NOR gate A10, an eleventh NOR gate A11, a twelfth NOR gate A12, a first AND gate B1, a second AND gate B2, a third AND gate B3, a fourth AND gate B4, a fifth AND gate B5, a sixth AND gate B6, a seventh AND gate B7, and an eighth AND gate B8.

[0169] The first input end of the first NOR gate A1 is connected to the state signal S-Q1 of the first switch tube Q1, the second input end of the first NOR gate A1 is electrically connected to the output end of the second NOR gate A2, and the output end of the first NOR gate A1 is electrically connected to the first input end of the second NOR gate A2 and the first input end of the first AND gate B1 respectively.

[0170] A second input terminal of the second NOR gate A2 is connected to the state signal S-Q2 of the second switch tube Q2.

[0171] A first input of the third NOR gate A3 is connected to the state signal S-Q1 of the first switch tube Q1, a second input of the third NOR gate A3 is connected to the state signal S-Q2 of the second switch tube Q2, and an output of the third NOR gate A3 is electrically connected to the second input of the first AND gate B1.

[0172] The output end of the first AND gate B1 is electrically connected to the first input end of the second AND gate B2. The second input end of the second AND gate B2 is connected to the first modulation enable signal EN_ASK_1. The output end of the second AND gate B2 serves as the control signal end of the first switch S1, and is used to output the control signal S-S1 of the first switch S1.

[0173] A first input terminal of the fourth NOR gate A4 is connected to the state signal S-Q2 of the second switch tube Q2, a second input terminal of the fourth NOR gate A4 is electrically connected to the output terminal of the fifth NOR gate A5, and the output terminal of the fourth NOR gate A4 is electrically connected to the first input terminal of the fifth NOR gate A5 and the first input terminal of the third AND gate B3 respectively.

[0174] A second input terminal of the fifth NOR gate A5 is connected to the state signal S-Q1 of the first switch tube Q1.

[0175] A first input terminal of the sixth NOR gate A6 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the sixth NOR gate A6 is connected to the state signal S-Q2 of the second switch tube Q2, and an output terminal of the sixth NOR gate A6 is electrically connected to the second input terminal of the third AND gate B3.

[0176] The output end of the third AND gate B3 is electrically connected to the first input end of the fourth AND gate B4, the second input end of the fourth AND gate B4 is connected to the second modulation enable signal EN_ASK_2, and the output end of the fourth AND gate B4 serves as the control signal end of the second switch S2, for outputting the control signal S-S2 of the second switch S2.

[0177] A first input terminal of the seventh NOR gate A7 is connected to the state signal S-Q3 of the third switch tube Q3, a second input terminal of the seventh NOR gate A7 is electrically connected to the output terminal of the eighth NOR gate A8, and the output terminal of the seventh NOR gate A7 is electrically connected to the first input terminal of the eighth NOR gate A8 and the first input terminal of the fifth AND gate B5 respectively.

[0178] A second input terminal of the eighth NOR gate A8 is connected to the state signal S-Q4 of the fourth switch tube Q4.

[0179] A first input terminal of the ninth NOR gate A9 is connected to the state signal S-Q3 of the third switch tube Q3, a second input terminal of the ninth NOR gate A9 is connected to the state signal S-Q4 of the fourth switch tube Q4, and an output terminal of the ninth NOR gate A9 is electrically connected to the second input terminal of the fifth AND gate B5.

[0180] The output end of the fifth AND gate B5 is electrically connected to the first input end of the sixth AND gate B6, the second input end of the sixth AND gate B6 is connected to the third modulation enable signal EN_ASK_3, and the output end of the sixth AND gate B6 serves as the control signal end of the third switch S3, for outputting the control signal S-S3 of the third switch S3.

[0181] A first input terminal of the tenth NOR gate A10 is connected to the state signal S-Q4 of the fourth switch tube Q4, a second input terminal of the tenth NOR gate A10 is electrically connected to the output terminal of the eleventh NOR gate A11, and the output terminal of the tenth NOR gate A10 is electrically connected to the first input terminal of the eleventh NOR gate A11 and the first input terminal of the seventh AND gate B7, respectively.

[0182] A second input terminal of the eleventh NOR gate A11 is connected to the state signal S-Q3 of the third switch tube Q3.

[0183] A first input terminal of the twelfth NOR gate A12 is connected to the state signal S-Q3 of the third switch tube Q3, a second input terminal of the twelfth NOR gate A12 is connected to the state signal S-Q4 of the fourth switch tube Q4, and an output terminal of the twelfth NOR gate A12 is electrically connected to the second input terminal of the seventh AND gate B7.

[0184] The output end of the seventh AND gate B7 is electrically connected to the first input end of the eighth AND gate B8, the second input end of the eighth AND gate B8 is connected to the fourth modulation enable signal EN_ASK_4, and the output end of the eighth AND gate B8 serves as the control signal end of the fourth switch S4, for outputting the control signal S-S4 of the fourth switch S4.

[0185] In the first embodiment, the first modulation enable signal EN_ASK_1, the second modulation enable signal EN_ASK_2, the third modulation enable signal EN_ASK_3, and the fourth modulation enable signal EN_ASK_4 in the logic control circuit are used to select the modulation mode and the unmodulated mode. The logic control circuit obtains the control signals of switches S1 to S4 (i.e., S-S1, S-S2, S-S3, S-S4) according to the state signals of the switch tubes Q1 to Q4 (i.e., S-Q1, S-Q2, S-Q3, S-Q4), and controls the states of switches S1 to S4 through the control signals of switches S1 to S4. During the dead zone, the method of controlling the constant current source to introduce a discharge current or inject a current into the first node and the second node accelerates the rate of change of the voltage value of the first node and the second node, that is, the rate of change of the voltage value of the first node and the second node changes, which is equivalent to changing the output impedance of the receiving end, causing the current in the receiving end coil to change, and then causing the current of the transmitting end coil to change, thereby realizing the ASK modulation function. It can reduce or remove off-chip capacitors, on-chip switches and chip pins without affecting the ASK modulation effect.

[0186] In a possible embodiment, for the full-bridge operating state: in the unmodulated mode, the logic control circuit is used to control the second switch and the third switch to switch from the off state to the on state during the first dead zone, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; during the second dead zone, the first switch and the fourth switch are controlled to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node.

[0187] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch and the fourth switch to be off.

[0188] The embodiment of the present application differs from the first embodiment only in that the modulation mode and the unmodulation mode are swapped: the modulation mode in the first embodiment is swapped for the unmodulation mode, and the unmodulation mode in the second embodiment is swapped for the modulation mode. That is, in the modulation mode of the present application, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2. In the unmodulation mode, the constant current source is controlled to introduce current to the first node AC1 and the second node AC2. The control logic corresponding to the embodiment of the present application and the first embodiment is the same and will not be repeated here.

[0189] In one possible embodiment, see Figure 7(a) to Figure 7(h) , Figure 7(a) to Figure 7(h) A circuit control schematic diagram is provided for the second embodiment of the present application, wherein Figure 7(a), Figure 7(b), Figure 7(c), and Figure 7(d) are unmodulated modes, Figure 7(a) is the first non-dead zone process in the unmodulated mode, Figure 7(c) is the second non-dead zone process in the unmodulated mode, Figure 7(b) is the first dead zone process in the unmodulated mode, and Figure 7(d) is the second dead zone process in the unmodulated mode; Figure 7(e), Figure 7(f), Figure 7(g), and Figure 7(h) are modulated modes, Figure 7(e) is the first non-dead zone process in the modulated mode, Figure 7(g) is the second non-dead zone process in the modulated mode, Figure 7(f) is the first dead zone process in the modulated mode, and Figure 7(h) is the second dead zone process in the modulated mode.

[0190] For the full-bridge working state: in the modulation mode, the logic control circuit is used to control the first switch S1 and the fourth switch S4 to switch from the off state to the on state in the first dead zone process (i.e., Figure 7(f)), so that the first constant current source M1 introduces an injection current to the first node AC1, and the fourth constant current source M4 introduces a discharge current to the second node AC2; in the second dead zone process (i.e., Figure 7(h)), the second switch S2 and the third switch S3 are controlled to switch from the off state to the on state, so that the second constant current source M2 introduces a discharge current to the first node AC1, and the third constant current source M3 introduces an injection current to the second node AC2.

[0191] The capacitors connected in parallel between the first and second ends of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, and the fourth switch tube Q4 are the parasitic capacitances of the corresponding switch tubes themselves. The parasitic capacitances shown in the figure are only for the convenience of explaining the principle, and are not the actual capacitances added. For the convenience of explanation, the figure only shows the reference numerals of the constant current sources in the dead zone process (i.e., Figure 7 (f) and Figure 7 (h)) under the modulation mode. The reference numerals of the corresponding constant current sources are not shown one by one in the figure for the non-dead zone process under the modulation mode and the unmodulated mode. It can be understood that Figure 7(a) to Figure 7(h) The reference numerals of the components are consistent.

[0192] In the full-bridge operating state, within one cycle, the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 all change state. Specifically, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) switch between an on state and an off state.

[0193] The specific working process of Example 2 is as follows:

[0194] In modulation mode, for full-bridge operation:

[0195] During the first non-dead zone, see Figure 7(e). The first rectifier branch (i.e., the first and fourth switches Q1 and Q4) is on, while the second rectifier branch (i.e., the second and third switches Q2 and Q3) is off. This results in the voltage at the first node AC1 being the output voltage VRECT, and the voltage at the second node AC2 being zero. Switches S1 through S4 are all off.

[0196] During the first dead zone, referring to FIG7(f), the switches Q1 to Q4 are all in the off state, and the second switch S2 and the third switch S3 are both in the off state. At this time, the first node AC1 is discharged to ground through the parasitic capacitance of the second switch Q2, and the second node AC2 begins to charge through the parasitic capacitance of the third switch Q3. During the first dead zone, the logic control circuit controls the first switch S1 and the fourth switch S4 to switch from the off state to the on state, introduces an injection current into the first node AC1 through the first constant current source M1, causing the voltage of the first node AC1 to decrease more slowly, and introduces a discharge current into the second node AC2 through the fourth constant current source M4, causing the voltage of the second node AC2 to increase more slowly.

[0197] During the second non-dead zone, see Figure 7(g), the second rectifier branch (i.e., the second and third switches Q2 and Q3) is turned on, and the first rectifier branch (i.e., the first and fourth switches Q1 and Q4) is turned off. Switches S1 to S4 are all in the off state.

[0198] During the second dead zone, referring to FIG7(h), the switches Q1 to Q4 are all in the off state, and the first switch S1 and the fourth switch S4 are both in the off state. At this time, the first node AC1 begins to charge through the parasitic capacitance of the first switch Q1, and the second node AC2 discharges to ground through the parasitic capacitance of the fourth switch Q4. During the second dead zone, the logic control circuit controls the second switch S2 and the third switch S3 to switch from the off state to the on state, introduces a discharge current to the first node AC1 through the second constant current source M2, causing the voltage of the first node AC1 to rise more slowly, and introduces an injection current to the second node AC2 through the third constant current source M3, causing the voltage of the second node AC2 to fall more slowly.

[0199] In unmodulated mode:

[0200] During the first non-dead zone, as shown in FIG7(a), the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) is turned on, and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) is turned off. Switches S1 to S4 are all in the off state.

[0201] During the first dead zone, referring to FIG. 7( b ), the switch tubes Q1 to Q4 are all in the off state, and the switches S1 to S4 are all in the off state.

[0202] During the second non-dead zone, as shown in FIG7(c), the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) is turned on, and the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) is turned off. Switches S1 to S4 are all turned off.

[0203] During the second dead zone, referring to FIG. 7( d ), the switch tubes Q1 - Q4 are all in the off state, and the switches S1 - S4 are all in the off state.

[0204] In the unmodulated mode, the logic control circuit controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be in the off state. That is, in the unmodulated mode, the constant current source circuit does not work and does not need to introduce current to the first node AC1 and the second node AC2.

[0205] In one possible embodiment, in the modulation mode of Embodiment 2, the logic control circuit controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be in the off state during the first non-dead zone process and the second non-dead zone process, as shown in Figures 7(e) and 7(g). That is, in the modulation mode, during the first non-dead zone process and the second non-dead zone process, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2.

[0206] See also Figure 8 , Figure 8 A timing diagram is provided for the second embodiment of the present application, such as Figure 8 As shown, in unmodulated mode:

[0207] For the first non-dead zone process and the second non-dead zone process, the timing of the switch tubes Q1 to Q4 is: when it is detected that the body diodes of the switch tubes Q1 to Q4 are turned on, the corresponding switch tubes are controlled to be turned on; when it is detected that the current flowing through the switch tubes Q1 to Q4 passes through zero, the corresponding switch tubes are controlled to be turned off.

[0208] During the first non-dead zone, since the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are turned on, the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 8 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 8 S-Q4 in the circuit is high, and the second switch tube Q2 (i.e. Figure 8 S-Q2) and the third switch tube Q3 (i.e. Figure 8 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 8 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0209] During the second non-dead zone, since the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are turned on, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 8 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 8 S-Q4 in the circuit is low, and the second switch tube Q2 (i.e. Figure 8 S-Q2) and the third switch tube Q3 (i.e. Figure 8 S-Q3 in the circuit is high, switches S1 to S4 (i.e. Figure 8 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0210] During the dead zone, the switches S1 to S4 are all in the off state, and no current needs to be introduced into the first node AC1 and the second node AC2. In addition, the switches Q1 to Q4 are all in the off state.

[0211] During the first dead zone, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are both in the off state, and the switches S1 to S4 are all in the off state. Figure 8 S-Q1 in the figure), the fourth switch tube Q4 (i.e. Figure 8 S-Q4 in the middle), the second switch tube Q2 (i.e. Figure 8 S-Q2) and the third switch tube Q3 (i.e. Figure 8 S-Q3 in the figure are all low level, switches S1 to S4 (i.e. Figure 8 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0212] During the second dead zone, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) and the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are both in the off state, and the switches S1 to S4 are all in the off state. Figure 8 S-Q1 in the figure), the fourth switch tube Q4 (i.e. Figure 8 S-Q4 in the middle), the second switch tube Q2 (i.e. Figure 8 S-Q2) and the third switch tube Q3 (i.e. Figure 8 S-Q3 in the figure are all low level, switches S1 to S4 (i.e. Figure 8 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0213] Please continue to see Figure 8 , in modulation mode:

[0214] For the non-dead zone process, the timing of the switch tubes Q1 to Q4 is as follows: when the body diodes of the switch tubes Q1 to Q4 are detected to be turned on, the corresponding switch tubes are controlled to be turned on; when the current flowing through the switch tubes Q1 to Q4 is detected to be zero-crossing, the corresponding switch tubes are controlled to be turned off.

[0215] During the first non-dead zone, since the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are turned on, the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 8 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 8 S-Q4 in the circuit is high, and the second switch tube Q2 (i.e. Figure 8 S-Q2) and the third switch tube Q3 (i.e. Figure 8 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 8 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0216] During the second non-dead zone, since the second rectifier branch (i.e., the second switch Q2 and the third switch Q3) are turned on, the first rectifier branch (i.e., the first switch Q1 and the fourth switch Q4) are in the off state. Switches S1 to S4 are all in the off state. Therefore, the first switch Q1 (i.e. Figure 8 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 8 S-Q4 in the circuit is low, and the second switch tube Q2 (i.e. Figure 8 S-Q2) and the third switch tube Q3 (i.e. Figure 8 S-Q3 in the circuit is high, switches S1 to S4 (i.e. Figure 8 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0217] During the first dead zone, the voltage of the first node AC1 decreases and the voltage of the second node AC2 increases. At this time, the first switch S1 and the fourth switch S4 are controlled to be turned on, and the second switch S2 and the third switch S3 are controlled to be turned off. The first node AC1 introduces an injection current, and the second node AC2 introduces a discharge current, which slows down the speed at which the voltage of the first node AC1 decreases and slows down the speed at which the voltage of the second node AC2 increases. Therefore, the first switch S1 (i.e. Figure 8 S-S1 in the figure) and the fourth switch S4 (i.e. Figure 8 S-S4 in the circuit) is high level, the second switch S2 (i.e. Figure 8 S-S2 in the figure) and the third switch S3 (i.e. Figure 8 S-S3) in is low level.

[0218] During the second dead zone, the voltage of the first node AC1 rises and the voltage of the second node AC2 drops. At this time, the second switch S2 and the third switch S3 are controlled to be turned on, and the first switch S1 and the fourth switch S4 are controlled to be turned off. A discharge current is introduced into the first node AC1, and an injection current is introduced into the second node AC2, which slows down the speed at which the voltage of the first node AC1 rises and slows down the speed at which the voltage of the second node AC2 drops. Therefore, the first switch S1 (i.e. Figure 8 S-S1 in the figure) and the fourth switch S4 (i.e. Figure 8 S-S4 in the circuit) is low level, the second switch S2 (i.e. Figure 8 S-S2 in the figure) and the third switch S3 (i.e. Figure 8 S-S3) in is high level.

[0219] It is understandable that Figure 8 The high level in the timing of the switch tubes Q1~Q4 corresponds to the on state, and the low level corresponds to the off state. Figure 8 The high level in the timing of switches S1 to S4 corresponds to the on state, and the low level corresponds to the off state.

[0220] By using the method of the second embodiment, in the modulation mode, the voltage change speed of the first node AC1 and the second node AC2 is slowed down. Figure 8 As shown by the dotted line portion of the first node AC1 and the second node AC2, the slopes of the voltage rise and fall of the first node AC1 and the second node AC2 become smaller during the dead zone, as shown in FIG. Figure 8 As shown in the dotted part of S-Q2 and S-Q3 in the first dead zone, the second switch tube Q2 and the third switch tube Q3 are turned on with a delay, as shown in FIG. Figure 8 As shown in the dotted part of S-Q1 and S-Q4 during the second dead zone, the first switch tube Q1 and the fourth switch tube Q4 are turned on with a delay.

[0221] For Example 2, the present application provides a logic control circuit 100, which is used to obtain control signals of switches S1 to S4 (i.e., S-S1, S-S2, S-S3, S-S4) based on the status signals of switch tubes Q1 to Q4 (i.e., S-Q1, S-Q2, S-Q3, S-Q4).

[0222] For details, see Figure 9 The circuit 100 includes: a thirteenth NOR gate A13, a fourteenth NOR gate A14, a fifteenth NOR gate A15, a sixteenth NOR gate A16, a seventeenth NOR gate A17, an eighteenth NOR gate A18, a nineteenth NOR gate A19, a twentieth NOR gate A20, a twenty-first NOR gate A21, a twenty-second NOR gate A22, a twenty-third NOR gate A23, a twenty-fourth NOR gate A24, a ninth AND gate B9, a tenth AND gate B10, an eleventh AND gate B11, a twelfth AND gate B12, a thirteenth AND gate B13, a fourteenth AND gate B14, a fifteenth AND gate B15, and a sixteenth AND gate B16.

[0223] A first input terminal of the thirteenth NOR gate A13 is connected to the state signal S-Q2 of the second switch tube Q2, a second input terminal of the thirteenth NOR gate A13 is electrically connected to the output terminal of the fourteenth NOR gate A14, and the output terminal of the thirteenth NOR gate A13 is electrically connected to the first input terminal of the fourteenth NOR gate A14 and the first input terminal of the ninth AND gate B9, respectively.

[0224] A second input terminal of the fourteenth NOR gate A14 is connected to the state signal S-Q1 of the first switch tube Q1.

[0225] A first input terminal of the fifteenth NOR gate A15 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the fifteenth NOR gate A15 is connected to the state signal S-Q2 of the second switch tube Q2, and an output terminal of the fifteenth NOR gate A15 is electrically connected to the second input terminal of the ninth AND gate B9.

[0226] The output end of the ninth AND gate B9 is electrically connected to the first input end of the tenth AND gate B10. The second input end of the tenth AND gate B10 is connected to the fifth modulation enable signal EN_ASK_5. The output end of the tenth AND gate B10 serves as the control signal end of the first switch S1, and is used to output the control signal S-S1 of the first switch S1.

[0227] A first input terminal of the sixteenth NOR gate A16 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the sixteenth NOR gate A16 is electrically connected to the output terminal of the seventeenth NOR gate A17, and the output terminal of the sixteenth NOR gate A16 is electrically connected to the first input terminal of the seventeenth NOR gate A17 and the first input terminal of the eleventh AND gate B11 respectively.

[0228] A second input terminal of the seventeenth NOR gate A17 is connected to the state signal S-Q2 of the second switch tube Q2.

[0229] A first input terminal of the eighteenth NOR gate A18 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the eighteenth NOR gate A18 is connected to the state signal S-Q2 of the second switch tube Q2, and an output terminal of the eighteenth NOR gate A18 is electrically connected to the second input terminal of the eleventh AND gate B11.

[0230] The output end of the eleventh AND gate B11 is electrically connected to the first input end of the twelfth AND gate B12. The second input end of the twelfth AND gate B12 is connected to the sixth modulation enable signal EN_ASK_6. The output end of the twelfth AND gate B12 serves as the control signal end of the second switch S2, and is used to output the control signal S-S2 of the second switch S2.

[0231] A first input terminal of the nineteenth NOR gate A19 is connected to the state signal S-Q4 of the fourth switch tube Q4, a second input terminal of the nineteenth NOR gate A19 is electrically connected to the output terminal of the twentieth NOR gate A20, and the output terminal of the nineteenth NOR gate A19 is electrically connected to the first input terminal of the twentieth NOR gate A20 and the first input terminal of the thirteenth AND gate B13 respectively.

[0232] A second input terminal of the twentieth NOR gate A20 is connected to the state signal S-Q3 of the third switch tube Q3.

[0233] A first input terminal of the twenty-first NOR gate A21 is connected to the state signal S-Q3 of the third switch tube Q3, a second input terminal of the twenty-first NOR gate A21 is connected to the state signal S-Q4 of the fourth switch tube Q4, and an output terminal of the twenty-first NOR gate A21 is electrically connected to the second input terminal of the thirteenth AND gate B13.

[0234] The output end of the thirteenth AND gate B13 is electrically connected to the first input end of the fourteenth AND gate B14. The second input end of the fourteenth AND gate B14 is connected to the seventh modulation enable signal EN_ASK_7. The output end of the fourteenth AND gate B14 serves as the control signal end of the third switch S3, and is used to output the control signal S-S3 of the third switch S3.

[0235] A first input terminal of the twenty-second NOR gate A22 is connected to the state signal S-Q3 of the third switch tube Q3, a second input terminal of the twenty-second NOR gate A22 is electrically connected to the output terminal of the twenty-third NOR gate A23, and the output terminal of the twenty-second NOR gate A22 is electrically connected to the first input terminal of the twenty-third NOR gate A23 and the first input terminal of the fifteenth AND gate B15, respectively.

[0236] A second input terminal of the twenty-third NOR gate A23 is connected to the state signal S-Q4 of the fourth switch tube Q4.

[0237] A first input terminal of the twenty-fourth NOR gate A24 is connected to the state signal S-Q3 of the third switch tube Q3, a second input terminal of the twenty-fourth NOR gate A24 is connected to the state signal S-Q4 of the fourth switch tube Q4, and an output terminal of the twenty-fourth NOR gate A24 is electrically connected to the second input terminal of the fifteenth AND gate B15.

[0238] The output end of the fifteenth AND gate B15 is electrically connected to the first input end of the sixteenth AND gate B16. The second input end of the sixteenth AND gate B16 is connected to the eighth modulation enable signal EN_ASK_8. The output end of the sixteenth AND gate B16 serves as the control signal end of the fourth switch S4, and is used to output the control signal S-S4 of the fourth switch S4.

[0239] In the second embodiment, the fifth modulation enable signal EN_ASK_5, the sixth modulation enable signal EN_ASK_6, the seventh modulation enable signal EN_ASK_7, and the eighth modulation enable signal EN_ASK_8 in the logic control circuit are used to select the modulation mode and the unmodulated mode. The logic control circuit obtains the control signals of switches S1 to S4 (i.e., S-S1, S-S2, S-S3, S-S4) according to the state signals of the switch tubes Q1 to Q4 (i.e., S-Q1, S-Q2, S-Q3, S-Q4), and controls the states of switches S1 to S4 through the control signals of switches S1 to S4. During the dead zone, the method of controlling the constant current source to introduce a discharge current or inject a current into the first node and the second node slows down the rate of change of the voltage value of the first node and the second node, that is, the rate of change of the voltage value of the first node and the second node changes, which is equivalent to changing the output impedance of the receiving end, causing the current in the receiving end coil to change, thereby causing the current of the transmitting end coil to change, thereby realizing the ASK modulation function. It can reduce or remove off-chip capacitors, on-chip switches and chip pins without affecting the ASK modulation effect.

[0240] In a possible embodiment, for the full-bridge working state:

[0241] In the unmodulated mode, the logic control circuit is used to control the first switch and the fourth switch to switch from an off state to an on state during a first dead zone, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; and to control the second switch and the third switch to switch from an off state to an on state during a second dead zone, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node.

[0242] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch and the fourth switch to be off.

[0243] The embodiment of the present application differs from the second embodiment only in that the modulation mode and the unmodulation mode are swapped: the modulation mode in the second embodiment is swapped for the unmodulation mode, and the unmodulation mode in the second embodiment is swapped for the modulation mode. That is, in the modulation mode of the present application, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2. In the unmodulation mode, the constant current source is controlled to introduce current to the first node AC1 and the second node AC2. The control logic corresponding to the embodiment of the present application and the second embodiment is the same and will not be repeated here.

[0244] In one possible embodiment, see Figure 10(a) to Figure 10(h) , Figure 10(a) to Figure 10(h) A circuit control schematic diagram is provided for Example 3 of the present application, wherein Figure 10(a), Figure 10(b), Figure 10(c), and Figure 10(d) are unmodulated modes, Figure 10(a) is the first non-dead zone process in the unmodulated mode, Figure 10(c) is the second non-dead zone process in the unmodulated mode, Figure 10(b) is the first dead zone process in the unmodulated mode, and Figure 10(d) is the second dead zone process in the unmodulated mode; Figure 10(e), Figure 10(f), Figure 10(g), and Figure 10(h) are modulation modes, Figure 10(e) is the first non-dead zone process in the modulation mode, Figure 10(g) is the second non-dead zone process in the modulation mode, Figure 10(f) is the first dead zone process in the modulation mode, and Figure 10(h) is the second dead zone process in the modulation mode.

[0245] For the half-bridge working state: in the modulation mode, the logic control circuit is used to control the second switch S2 to switch from the off state to the on state in the first dead zone process (i.e., Figure 7(f)), so that the second constant current source M2 introduces a discharge current to the first node AC1; in the second dead zone process (i.e., Figure 10(h)), the logic control circuit is used to control the first switch S1 to switch from the off state to the on state, so that the first constant current source M1 introduces an injection current to the first node AC1.

[0246] The capacitors connected in parallel between the first and second ends of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, and the fourth switch tube Q4 are the parasitic capacitances of the corresponding switch tubes themselves. The parasitic capacitances shown in the figure are only for the convenience of explaining the principle, and are not actual external capacitances. For the convenience of explanation, the figure only shows the reference numerals of the constant current sources in the dead zone process (i.e., Figure 10 (f) and Figure 10 (h)) under the modulation mode. The reference numerals of the corresponding constant current sources are not shown one by one in the figure for the non-dead zone process under the modulation mode and the unmodulated mode. It can be understood that Figure 10(a) to Figure 10(h) The reference numerals of the components are consistent.

[0247] The output voltage of the half-bridge working state is higher than that of the full-bridge working state. In the embodiment of the present application, the half-bridge working state is: the third switch tube Q3 is in the normally off (or normally closed) state, and the fourth switch tube Q4 is in the normally on (or normally open) state. By controlling the first switch tube Q1 and the second switch tube Q2 to be alternately turned on, the AC signal sensed by the receiving end coil is converted into a DC signal. Given that Q1 to Q4 are symmetrical in the rectifier circuit, for another half-bridge working state: the first switch tube Q1 is in the normally off (can be called normally closed) state, the second switch tube Q2 is in the normally on (can be called normally open) state, and by controlling the third switch tube Q3 and the fourth switch tube Q4 to be alternately turned on, the AC signal sensed by the receiving end coil is converted into a DC signal. The corresponding ASK modulation circuit and method for the wireless charging receiving end are also within the scope of protection of the present application.

[0248] The specific working process of Example 3 is as follows:

[0249] In modulation mode, for half-bridge operation:

[0250] During the first non-dead zone, as shown in FIG10( e ), the first switch Q1 and the fourth switch Q4 are turned on, and the second switch Q2 and the third switch Q3 are turned off, so that the voltage at the first node AC1 is the output voltage VRECT.

[0251] During the first dead zone, referring to FIG10(f), the first switch tube Q1, the second switch tube Q2, and the third switch tube Q3 are in the off state, and the fourth switch tube Q4 is in the on state. At this time, the first node AC1 is discharged to ground through the parasitic capacitance of the second switch tube Q2. During the first dead zone, the logic control circuit controls the second switch S2 to switch from the off state to the on state, and introduces a discharge current to the first node AC1 through the second constant current source M2, so that the voltage of the first node AC1 drops faster.

[0252] During the second non-dead zone, as shown in FIG10( g ), the first switch Q2 and the fourth switch Q4 are turned on, the second switch Q1 and the third switch Q3 are turned off, and the switches S1 to S4 are all turned off.

[0253] During the second dead zone, referring to FIG10(h), the first switch tube Q1, the second switch tube Q2, and the third switch tube Q3 are in the off state, and the fourth switch tube Q4 is in the on state. At this time, the first node AC1 begins to charge through the parasitic capacitance of the first switch tube Q1. During the second dead zone, the logic control circuit controls the first switch S1 to switch from the off state to the on state, and introduces an injection current into the first node AC1 through the first constant current source M1, so that the voltage of the first node AC1 rises faster.

[0254] In unmodulated mode:

[0255] During the first non-dead zone, as shown in FIG10( a ), the first switch Q1 and the fourth switch Q4 are turned on, the second switch Q2 and the third switch Q3 are turned off, and the switches S1 to S4 are all turned off.

[0256] During the first dead zone, referring to FIG. 10( b ), the first switch Q1 , the second switch Q2 , and the third switch Q3 are in the off state, the fourth switch Q4 is in the on state, and the switches S1 to S4 are all in the off state.

[0257] During the second non-dead zone, as shown in FIG10( c ), the first switch Q2 and the fourth switch Q4 are turned on, the second switch Q1 and the third switch Q3 are turned off, and the switches S1 to S4 are all turned off.

[0258] During the second dead zone, referring to FIG. 10( d ), the first switch Q1 , the second switch Q2 , and the third switch Q3 are in the off state, the fourth switch Q4 is in the on state, and the switches S1 to S4 are all in the off state.

[0259] In the unmodulated mode, the logic control circuit controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be in the off state. That is, in the unmodulated mode, the constant current source circuit does not work and does not need to introduce current to the first node AC1 and the second node AC2.

[0260] In one possible embodiment, in the modulation mode of Embodiment 3, the logic control circuit controls the states of the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to the off state during the first non-dead zone process and the second non-dead zone process, as shown in Figures 10(e) and 10(g). That is, in the modulation mode, during the first non-dead zone process and the second non-dead zone process, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2.

[0261] See also Figure 11 , Figure 11 A timing diagram is provided for the third embodiment of the present application, such as Figure 11 As shown, in unmodulated mode:

[0262] For the first non-dead zone process and the second non-dead zone process, the third switch tube Q3 is normally off (or normally closed), the fourth switch tube Q4 is normally on (or normally open), and the timing sequence of the second switch tube Q1 and the second switch tube Q2 is: when it is detected that the body diodes of the second switch tube Q1 and the second switch tube Q2 are turned on, the corresponding switch tubes are controlled to be turned on; when it is detected that the current flowing through the second switch tube Q1 and the second switch tube Q2 passes through zero, the corresponding switch tubes are controlled to be turned off.

[0263] During the first non-dead zone, since the first switch tube Q1 and the fourth switch tube Q4 are turned on, the second switch tube Q2 and the third switch tube Q3 are turned off. The switches S1 to S4 are all turned off. Therefore, the first switch tube Q1 (i.e. Figure 11 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 11 S-Q4 in the circuit is high, and the second switch tube Q2 (i.e. Figure 11 S-Q2) and the third switch tube Q3 (i.e. Figure 11 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 11 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0264] During the second non-dead zone, since the first switch tube Q2 and the fourth switch tube Q4 are turned on, the second switch tube Q1 and the third switch tube Q3 are turned off. Switches S1 to S4 are all in the off state. Therefore, the second switch tube Q2 (i.e. Figure 11 S-Q2) and the fourth switch tube Q4 (i.e. Figure 11 S-Q4 in the figure is high, and the second switch tube Q1 (i.e. Figure 11 S-Q1 in the figure) and the third switch tube Q3 (i.e. Figure 11 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 11 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0265] During the dead zone, the switches S1 to S4 are all in the off state, and there is no need to introduce current into the first node AC1 and the second node AC2.

[0266] During the first dead zone, since the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are in the off state, the fourth switch tube Q4 is in the on state, and the switches S1 to S4 are all in the off state. Figure 11 S-Q1 in the figure), the second switch tube Q2 (i.e. Figure 11 S-Q2) and the third switch tube Q3 (i.e. Figure 11 S-Q3 in the figure are all low level, and the fourth switch tube Q4 (i.e. Figure 11 S-Q4 in the circuit is high, switches S1 to S4 (i.e. Figure 11 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0267] During the second dead zone, since the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are in the off state, the fourth switch tube Q4 is in the on state, and the switches S1 to S4 are all in the off state. Figure 11 S-Q1 in the figure), the second switch tube Q2 (i.e. Figure 11 S-Q2) and the third switch tube Q3 (i.e. Figure 11 S-Q3 in the figure are all low level, and the fourth switch tube Q4 (i.e. Figure 11 S-Q4 in the circuit is high, switches S1 to S4 (i.e. Figure 11 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0268] Please continue to see Figure 11 , in modulation mode:

[0269] During the non-dead zone, the third switch tube Q3 is normally off (or normally closed), the fourth switch tube Q4 is normally on (or normally open), and the timing sequence of the second switch tube Q1 and the second switch tube Q2 is as follows: when it is detected that the body diodes of the second switch tube Q1 and the second switch tube Q2 are turned on, the corresponding switch tubes are controlled to be turned on; when it is detected that the current flowing through the second switch tube Q1 and the second switch tube Q2 passes through zero, the corresponding switch tubes are controlled to be turned off.

[0270] During the first non-dead zone, since the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are in the off state, the fourth switch tube Q4 is in the on state, and the switches S1 to S4 are all in the off state. Figure 11 S-Q1 in the figure), the second switch tube Q2 (i.e. Figure 11 S-Q2) and the third switch tube Q3 (i.e. Figure 11 S-Q3 in the figure are all low level, and the fourth switch tube Q4 (i.e. Figure 11 S-Q4 in the circuit is high, switches S1 to S4 (i.e. Figure 11 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0271] During the second non-dead zone, since the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are in the off state, the fourth switch tube Q4 is in the on state, and the switches S1 to S4 are all in the off state. Figure 11 S-Q1 in the figure), the second switch tube Q2 (i.e. Figure 11 S-Q2) and the third switch tube Q3 (i.e. Figure 11 S-Q3 in the figure are all low level, and the fourth switch tube Q4 (i.e. Figure 11 S-Q4 in the circuit is high, switches S1 to S4 (i.e. Figure 11 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0272] During the first dead zone, the voltage of the first node AC1 decreases. At this time, the first switch S1, the third switch S3 and the fourth switch S4 are controlled to be turned off, and the second switch S2 is controlled to be turned on. The first node AC1 introduces a discharge current, which accelerates the speed at which the voltage of the first node AC1 decreases. Therefore, the first switch S1 (i.e. Figure 11 S-S1 in the figure), the third switch S3 (i.e. Figure 11 S-S3 in the figure) and the fourth switch S4 (i.e. Figure 11 S-S4 in the figure are all at low level, and the second switch S2 (i.e. Figure 11 S-S2) in is high level.

[0273] During the second dead zone, the voltage of the first node AC1 rises. At this time, the second switch S2, the third switch S3 and the fourth switch S4 are controlled to be turned off, and the first switch S1 is controlled to be turned on. The first node AC1 introduces an injection current to accelerate the voltage rise of the first node AC1. Therefore, the first switch S1 (i.e. Figure 11 The S-S1 in the figure is high, and the second switch S2 (i.e. Figure 11 S-S2 in the figure), the third switch S3 (i.e. Figure 11 S-S3 in the figure) and the fourth switch S4 (i.e. Figure 11 S-S4) in are all low level.

[0274] It is understandable that Figure 11 The high level in the timing of the switch tubes Q1~Q4 corresponds to the on state, and the low level corresponds to the off state. Figure 11 The high level in the timing of switches S1 to S4 corresponds to the on state, and the low level corresponds to the off state.

[0275] By using the method of the third embodiment, the voltage change speed of the first node AC1 is accelerated in the modulation mode, such as Figure 11 As shown by the dotted line portion of the first node AC1, the slope of the voltage rise and fall of the first node AC1 becomes larger during the dead zone, as shown in FIG. Figure 11 As shown in the dotted part of S-Q1 in the second dead zone, Q1 is turned on early, as shown in Figure 11 As shown in the dotted part of S-Q2 during the first dead zone, Q2 is turned on in advance.

[0276] For embodiment three, the present application provides a logic control circuit 100, which is used to obtain control signals of switches S1 to S4 (i.e., S-S1, S-S2, S-S3, S-S4) based on the status signals of switch tubes Q1 to Q4 (i.e., S-Q1, S-Q2, S-Q3, S-Q4).

[0277] For details, see Figure 12The circuit 100 includes: a twenty-fifth NOR gate A25, a twenty-sixth NOR gate A26, a twenty-seventh NOR gate A27, a twenty-eighth NOR gate A28, a twenty-ninth NOR gate A29, a thirtieth NOR gate A30, a seventeenth AND gate B17, an eighteenth AND gate B18, a nineteenth AND gate B19 and a twentieth AND gate B20.

[0278] A first input terminal of the twenty-fifth NOR gate A25 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the twenty-fifth NOR gate A25 is electrically connected to the output terminal of the twenty-sixth NOR gate A26, and the output terminal of the twenty-fifth NOR gate A25 is electrically connected to the first input terminal of the twenty-sixth NOR gate A26 and the first input terminal of the seventeenth AND gate B17 respectively.

[0279] A second input terminal of the twenty-sixth NOR gate A26 is connected to the state signal S-Q2 of the second switch tube Q2.

[0280] A first input terminal of the twenty-seventh NOR gate A27 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the twenty-seventh NOR gate A27 is connected to the state signal S-Q2 of the second switch tube Q2, and an output terminal of the twenty-seventh NOR gate A27 is electrically connected to the second input terminal of the seventeenth AND gate B17.

[0281] The output end of the seventeenth AND gate B17 is electrically connected to the first input end of the eighteenth AND gate B18. The second input end of the eighteenth AND gate B18 is connected to the ninth modulation enable signal EN_ASK_9. The output end of the eighteenth AND gate B18 serves as the control signal end of the first switch S1, and is used to output the control signal S-S1 of the first switch S1.

[0282] A first input terminal of the twenty-eighth NOR gate A28 is connected to the state signal S-Q2 of the second switch tube Q2, a second input terminal of the twenty-eighth NOR gate A28 is electrically connected to the output terminal of the twenty-ninth NOR gate A29, and the output terminal of the twenty-eighth NOR gate A28 is electrically connected to the first input terminal of the twenty-ninth NOR gate A29 and the first input terminal of the nineteenth AND gate B19, respectively.

[0283] A second input terminal of the twenty-ninth NOR gate A29 is connected to the state signal S-Q1 of the first switch tube Q1.

[0284] A first input terminal of the 30th NOR gate A30 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the 30th NOR gate A30 is connected to the state signal S-Q2 of the second switch tube Q2, and an output terminal of the 30th NOR gate A30 is electrically connected to the second input terminal of the 19th AND gate B19.

[0285] The output end of the nineteenth AND gate B19 is electrically connected to the first input end of the twentieth AND gate B20, the second input end of the twentieth AND gate B20 is connected to the tenth modulation enable signal EN_ASK_10, and the output end of the twentieth AND gate B20 serves as the control signal end of the second switch S2, for outputting the control signal S-S2 of the second switch S2.

[0286] In the third embodiment, the ninth modulation enable signal EN_ASK_9 and the tenth modulation enable signal EN_ASK_10 in the logic control circuit are used to select the modulation mode and the unmodulated mode. The logic control circuit obtains the control signals of switches S1 to S2 (i.e., S-S1, S-S2) according to the state signals of the switch tubes Q1 to Q2 (i.e., S-Q1, S-Q2), and controls the states of switches S1 to S2 by the control signals of switches S1 to S2. During the dead zone, the method of controlling the constant current source to introduce a discharge current or inject a current to the first node accelerates the rate of change of the voltage value of the first node, that is, the rate of change of the voltage value of the first node changes, which is equivalent to changing the output impedance of the receiving end, causing the current in the receiving end coil to change, thereby causing the current of the transmitting end coil to change, thereby realizing the ASK modulation function. It can reduce or remove off-chip capacitors, on-chip switch tubes, and chip pins without affecting the ASK modulation effect.

[0287] In a possible embodiment, for the half-bridge working state:

[0288] In the unmodulated mode, the logic control circuit is used to control the second switch to switch from the off state to the on state during the first dead zone, so that the second constant current source introduces a discharge current to the first node; and to control the first switch to switch from the off state to the on state during the second dead zone, so that the first constant current source introduces an injection current to the first node.

[0289] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch and the fourth switch to be off.

[0290] The embodiment of the present application differs from the third embodiment only in that the modulation mode and the unmodulation mode are swapped: the modulation mode in the third embodiment is swapped for the unmodulation mode, and the unmodulation mode in the third embodiment is swapped for the modulation mode. That is, in the modulation mode of the present application, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2. In the unmodulation mode, the constant current source is controlled to introduce current to the first node AC1 and the second node AC2. The control logic corresponding to the embodiment of the present application and the third embodiment is the same and will not be repeated here.

[0291] In one possible embodiment, see Figures 13(a) to 13(h) , Figures 13(a) to 13(h)A circuit control schematic diagram is provided for the fourth embodiment of the present application, wherein Figure 13(a), Figure 13(b), Figure 13(c), and Figure 13(d) are unmodulated modes, Figure 13(a) is the first non-dead zone process in the unmodulated mode, Figure 13(c) is the second non-dead zone process in the unmodulated mode, Figure 13(b) is the first dead zone process in the unmodulated mode, and Figure 13(d) is the second dead zone process in the unmodulated mode; Figure 13(e), Figure 13(f), Figure 13(g), and Figure 13(h) are modulation modes, Figure 13(e) is the first non-dead zone process in the modulation mode, Figure 13(g) is the second non-dead zone process in the modulation mode, Figure 13(f) is the first dead zone process in the modulation mode, and Figure 13(h) is the second dead zone process in the modulation mode.

[0292] For the half-bridge working state, in the modulation mode, the logic control circuit is used to control the first switch S1 to switch from the off state to the on state in the first dead zone process (i.e., Figure 13(f)), so that the first constant current source M1 introduces an injection current to the first node AC1; in the second dead zone process (i.e., Figure 13(h)), the logic control circuit is used to control the second switch S2 to switch from the off state to the on state, so that the second constant current source M2 introduces a discharge current to the first node AC1.

[0293] The capacitors connected in parallel between the first and second ends of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, and the fourth switch tube Q4 are the parasitic capacitances of the corresponding switch tubes themselves. The parasitic capacitances shown in the figure are only for the convenience of explaining the principle, and are not actual external capacitances. For the convenience of explanation, the figure only shows the reference numerals of the constant current sources in the dead zone process (i.e., Figure 13 (f) and Figure 13 (h)) under the modulation mode. The reference numerals of the corresponding constant current sources are not shown one by one in the figure for the non-dead zone process under the modulation mode and the unmodulated mode. It can be understood that Figures 13(a) to 13(h) The reference numerals of the components are consistent.

[0294] The output voltage of the half-bridge working state is higher than that of the full-bridge working state. In the embodiment of the present application, the half-bridge working state is: the third switch tube Q3 is in the normally off (or normally closed) state, and the fourth switch tube Q4 is in the normally on (or normally open) state. By controlling the first switch tube Q1 and the second switch tube Q2 to be alternately turned on, the AC signal sensed by the receiving end coil is converted into a DC signal. Given that Q1 to Q4 are symmetrical in the rectifier circuit, for another half-bridge working state: the first switch tube Q1 is in the normally off (can be called normally closed) state, the second switch tube Q2 is in the normally on (can be called normally open) state, and by controlling the third switch tube Q3 and the fourth switch tube Q4 to be alternately turned on, the AC signal sensed by the receiving end coil is converted into a DC signal. The corresponding ASK modulation circuit and method for the wireless charging receiving end are also within the scope of protection of the present application.

[0295] The specific working process of Example 4 is as follows:

[0296] In modulation mode, for half-bridge operation:

[0297] During the first non-dead zone, as shown in FIG13( e ), the first switch Q1 and the fourth switch Q4 are turned on, and the second switch Q2 and the third switch Q3 are turned off, so that the voltage at the first node AC1 is the output voltage VRECT.

[0298] During the first dead zone, referring to FIG13(f), the first switch tube Q1, the second switch tube Q2, and the third switch tube Q3 are in the off state, and the fourth switch tube Q4 is in the on state. At this time, the first node AC1 is discharged to the ground through the parasitic capacitance of the second switch tube Q2. During the first dead zone, the logic control circuit controls the first switch S1 to switch from the off state to the on state, and introduces an injection current to the first node AC1 through the first constant current source M1, so that the voltage of the first node AC1 drops more slowly.

[0299] During the second non-dead zone, as shown in FIG13(g), the first switch Q2 and the fourth switch Q4 are turned on, the second switch Q1 and the third switch Q3 are turned off, and the switches S1 to S4 are all turned off.

[0300] During the second dead zone, referring to FIG13(h), the first switch tube Q1, the second switch tube Q2, and the third switch tube Q3 are in the off state, and the fourth switch tube Q4 is in the on state. At this time, the first node AC1 begins to charge through the parasitic capacitance of the first switch tube Q1. During the second dead zone, the logic control circuit controls the second switch S2 to switch from the off state to the on state, and introduces a discharge current to the first node AC1 through the second constant current source M2, so that the voltage of the first node AC1 rises more slowly.

[0301] During the first non-dead zone, as shown in FIG13( a ), the first switch Q1 and the fourth switch Q4 are turned on, the second switch Q2 and the third switch Q3 are turned off, and the switches S1 to S4 are all turned off.

[0302] During the first dead zone, referring to FIG. 13( b ), the first switch Q1 , the second switch Q2 , and the third switch Q3 are in the off state, the fourth switch Q4 is in the on state, and the switches S1 to S4 are all in the off state.

[0303] During the second non-dead zone, as shown in FIG13( c ), the first switch Q2 and the fourth switch Q4 are turned on, the second switch Q1 and the third switch Q3 are turned off, and the switches S1 to S4 are all turned off.

[0304] During the second dead zone, referring to FIG. 13( d ), the first switch Q1 , the second switch Q2 , and the third switch Q3 are in the off state, the fourth switch Q4 is in the on state, and the switches S1 to S4 are all in the off state.

[0305] In the unmodulated mode, the logic control circuit controls the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to be in the off state. That is, in the unmodulated mode, the constant current source circuit does not work and does not need to introduce current to the first node AC1 and the second node AC2.

[0306] In one possible embodiment, in the modulation mode of the fourth embodiment, the logic control circuit controls the states of the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 to the off state during the first non-dead zone process and the second non-dead zone process, as shown in Figures 13(e) and 13(g). That is, in the modulation mode, during the first non-dead zone process and the second non-dead zone process, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2.

[0307] See also Figure 14 , Figure 14 A timing diagram is provided for the fourth embodiment of the present application, such as Figure 14 As shown, in unmodulated mode:

[0308] For the first non-dead zone process and the second non-dead zone process, the third switch tube Q3 is normally off (or normally closed), the fourth switch tube Q4 is normally on (or normally open), and the timing sequence of the second switch tube Q1 and the second switch tube Q2 is: when it is detected that the body diodes of the second switch tube Q1 and the second switch tube Q2 are turned on, the corresponding switch tubes are controlled to be turned on; when it is detected that the current flowing through the second switch tube Q1 and the second switch tube Q2 passes through zero, the corresponding switch tubes are controlled to be turned off.

[0309] During the first non-dead zone, since the first switch tube Q1 and the fourth switch tube Q4 are turned on, the second switch tube Q2 and the third switch tube Q3 are turned off. The switches S1 to S4 are all turned off. Therefore, the first switch tube Q1 (i.e. Figure 14 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 14 S-Q4 in the circuit is high, and the second switch tube Q2 (i.e. Figure 14 S-Q2) and the third switch tube Q3 (i.e. Figure 14 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 14 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0310] During the second non-dead zone, since the first switch tube Q2 and the fourth switch tube Q4 are turned on, the second switch tube Q1 and the third switch tube Q3 are turned off. Switches S1 to S4 are all in the off state. Therefore, the second switch tube Q2 (i.e. Figure 14 S-Q2) and the fourth switch tube Q4 (i.e. Figure 14 S-Q4 in the figure is high, and the second switch tube Q1 (i.e. Figure 14 S-Q1 in the figure) and the third switch tube Q3 (i.e. Figure 14 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 14 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0311] During the dead zone, the switches S1 to S4 are all in the off state, and there is no need to introduce current into the first node AC1 and the second node AC2.

[0312] During the first dead zone, since the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are in the off state, the fourth switch tube Q4 is in the on state, and the switches S1 to S4 are all in the off state. Figure 14 S-Q1 in the figure), the second switch tube Q2 (i.e. Figure 14 S-Q2) and the third switch tube Q3 (i.e. Figure 14 S-Q3 in the figure are all low level, and the fourth switch tube Q4 (i.e. Figure 14 S-Q4 in the circuit is high, switches S1 to S4 (i.e. Figure 14 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0313] During the second dead zone, since the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are in the off state, the fourth switch tube Q4 is in the on state, and the switches S1 to S4 are all in the off state. Figure 14 S-Q1 in the figure), the second switch tube Q2 (i.e. Figure 14 S-Q2) and the third switch tube Q3 (i.e. Figure 14 S-Q3 in the figure are all low level, and the fourth switch tube Q4 (i.e. Figure 14 S-Q4 in the circuit is high, switches S1 to S4 (i.e. Figure 14 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0314] Please continue to see Figure 14 , in modulation mode:

[0315] During the non-dead zone, the third switch tube Q3 is normally off (or normally closed), the fourth switch tube Q4 is normally on (or normally open), and the timing sequence of the second switch tube Q1 and the second switch tube Q2 is as follows: when it is detected that the body diodes of the second switch tube Q1 and the second switch tube Q2 are turned on, the corresponding switch tubes are controlled to be turned on; when it is detected that the current flowing through the second switch tube Q1 and the second switch tube Q2 passes through zero, the corresponding switch tubes are controlled to be turned off.

[0316] During the first non-dead zone, since the first switch tube Q1 and the fourth switch tube Q4 are turned on, the second switch tube Q2 and the third switch tube Q3 are turned off. The switches S1 to S4 are all turned off. Therefore, the first switch tube Q1 (i.e. Figure 14 S-Q1 in the figure) and the fourth switch tube Q4 (i.e. Figure 14 S-Q4 in the circuit is high, and the second switch tube Q2 (i.e. Figure 14 S-Q2) and the third switch tube Q3 (i.e. Figure 14 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 14 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0317] During the second non-dead zone, since the first switch tube Q2 and the fourth switch tube Q4 are turned on, the second switch tube Q1 and the third switch tube Q3 are turned off. Switches S1 to S4 are all in the off state. Therefore, the second switch tube Q2 (i.e. Figure 14 S-Q2) and the fourth switch tube Q4 (i.e. Figure 14 S-Q4 in the figure is high, and the second switch tube Q1 (i.e. Figure 14 S-Q1 in the figure) and the third switch tube Q3 (i.e. Figure 14 S-Q3 in the circuit is low level, switches S1 to S4 (i.e. Figure 14 S-S1, S-S2, S-S3, and S-S4) are all low levels.

[0318] During the first dead zone, the voltage of the first node AC1 decreases. At this time, the second switch S2, the third switch S3 and the fourth switch S4 are controlled to be turned off, and the first switch S1 is controlled to be turned on. The first node AC1 introduces an injection current to slow down the speed of the voltage drop of the first node AC1. Therefore, the first switch S1 (i.e. Figure 14 The S-S1 in the figure is high, and the second switch S2 (i.e. Figure 14 S-S2 in the figure), the third switch S3 (i.e. Figure 14 S-S3 in the figure) and the fourth switch S4 (i.e. Figure 14 S-S4) in are all low level.

[0319] During the second dead zone, the voltage of the first node AC1 rises. At this time, the first switch S1, the third switch S3 and the fourth switch S4 are controlled to be turned off, and the second switch S2 is controlled to be turned on. The first node AC1 introduces a discharge current to slow down the speed of the voltage rise of the first node AC1. Therefore, the first switch S1 (i.e. Figure 11 S-S1 in the figure), the third switch S3 (i.e. Figure 11 S-S3 in the figure) and the fourth switch S4 (i.e. Figure 11 S-S4 in the figure are all at low level, and the second switch S2 (i.e. Figure 11 S-S2) in is high level.

[0320] It is understandable that Figure 14 The high level in the timing of the switch tubes Q1~Q4 corresponds to the on state, and the low level corresponds to the off state. Figure 14 The high level in the timing of switches S1 to S4 corresponds to the on state, and the low level corresponds to the off state.

[0321] By using the method of the fourth embodiment, in the modulation mode, the voltage change speed of the first node AC1 is slowed down, such as Figure 14 As shown by the dotted line portion of the first node AC1, the slope of the voltage rise and fall of the first node AC1 becomes smaller during the dead zone, as shown in FIG. Figure 14 As shown in the dotted part of S-Q1 in the second dead zone, Q1 is turned on later, as shown in Figure 14 As shown in the dotted part of S-Q2 during the first dead zone, Q2 is turned on with a delay.

[0322] For embodiment four, the present application provides a logic control circuit 100, which is used to obtain control signals of switches S1 to S4 (i.e., S-S1, S-S2, S-S3, S-S4) based on the status signals of switch tubes Q1 to Q4 (i.e., S-Q1, S-Q2, S-Q3, S-Q4).

[0323] See also Figure 15 The circuit 100 includes: a thirty-first NOR gate A31, a thirty-second NOR gate A32, a thirty-third NOR gate A33, a thirty-fourth NOR gate A34, a thirty-fifth NOR gate A35, a thirty-sixth NOR gate A36, a twenty-first AND gate B21, a twenty-second AND gate B22, a twenty-third AND gate B23 and a twenty-fourth AND gate B24.

[0324] A first input terminal of the thirty-first NOR gate A31 is connected to the state signal S-Q2 of the second switch tube Q2, a second input terminal of the thirty-first NOR gate A31 is electrically connected to the output terminal of the thirty-second NOR gate A32, and the output terminal of the thirty-first NOR gate A31 is electrically connected to the first input terminal of the thirty-second NOR gate A32 and the first input terminal of the twenty-first AND gate B21, respectively.

[0325] A second input terminal of the thirty-second NOR gate A32 is connected to the state signal S-Q1 of the first switch tube Q1.

[0326] A first input terminal of the thirty-third NOR gate A33 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the thirty-third NOR gate A33 is connected to the state signal S-Q2 of the second switch tube Q2, and an output terminal of the thirty-third NOR gate A33 is electrically connected to the second input terminal of the twenty-first AND gate B21.

[0327] The output end of the twenty-first AND gate B21 is electrically connected to the first input end of the twenty-second AND gate B22. The second input end of the twenty-second AND gate B22 is connected to the eleventh modulation enable signal EN_ASK_11. The output end of the twenty-second AND gate B22 serves as the control signal end of the first switch S1, and is used to output the control signal S-S1 of the first switch S1.

[0328] A first input terminal of the thirty-fourth NOR gate A34 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the thirty-fourth NOR gate A34 is electrically connected to the output terminal of the thirty-fifth NOR gate A35, and the output terminal of the thirty-fourth NOR gate A34 is electrically connected to the first input terminal of the thirty-fifth NOR gate A35 and the first input terminal of the twenty-third AND gate B23, respectively.

[0329] A second input terminal of the thirty-fifth NOR gate A35 is connected to the state signal S-Q2 of the second switch tube Q2.

[0330] A first input terminal of the thirty-sixth NOR gate A36 is connected to the state signal S-Q1 of the first switch tube Q1, a second input terminal of the thirty-sixth NOR gate A36 is connected to the state signal S-Q2 of the second switch tube Q2, and an output terminal of the thirty-sixth NOR gate A36 is electrically connected to the second input terminal of the twenty-third AND gate B23.

[0331] The output end of the twenty-third AND gate B23 is electrically connected to the first input end of the twenty-fourth AND gate B24, the second input end of the twenty-fourth AND gate B24 is connected to the twelfth modulation enable signal EN_ASK_12, and the output end of the twenty-fourth AND gate B24 serves as the control signal end of the second switch S2, for outputting the control signal S-S2 of the second switch S2.

[0332] In the fourth embodiment, the eleventh modulation enable signal EN_ASK_11 and the twelfth modulation enable signal EN_ASK_12 in the logic control circuit are used to select the modulation mode and the unmodulated mode. The logic control circuit obtains the control signals of switches S1 to S2 (i.e., S-S1, S-S2) according to the state signals of the switch tubes Q1 to Q2 (i.e., S-Q1, S-Q2), and controls the states of switches S1 to S2 by the control signals of switches S1 to S2. During the dead zone, the method of controlling the constant current source to introduce a discharge current or inject a current to the first node slows down the rate of change of the voltage value of the first node, that is, the rate of change of the voltage value of the first node changes, which is equivalent to changing the output impedance of the receiving end, causing the current in the receiving end coil to change, thereby causing the current of the transmitting end coil to change, thereby realizing the ASK modulation function. It can reduce or remove off-chip capacitors, on-chip switch tubes, and chip pins without affecting the ASK modulation effect.

[0333] The four embodiments of the present application are aimed at the full-bridge and half-bridge working states. In the modulation mode, by controlling the constant current source to introduce a discharge current or an injection current to the first node and the second node during the dead zone, the rate of change of the voltage value of the first node and the second node is changed, which is equivalent to the capacitance modulation method of changing the off-chip capacitor in the prior art, thereby realizing the ASK modulation function. Specifically, embodiment one and embodiment two are aimed at the full-bridge working state. By controlling the constant current source to introduce a discharge current or an injection current to the first node and the second node during the dead zone, the rate of change of the voltage value of the first node and the second node is accelerated or slowed down, thereby realizing the ASK modulation function; embodiment three and embodiment four are aimed at the half-bridge working state. By controlling the constant current source to introduce a discharge current or an injection current to the first node and the second node during the dead zone, the rate of change of the voltage value of the first node and the second node is accelerated or slowed down, thereby realizing the ASK modulation function. The methods in the four embodiments of the present application can change the rate of change of the voltage value of the first node and the second node, which is equivalent to changing the output impedance of the receiving end, causing the current in the receiving end coil to change, thereby causing the current in the transmitting end coil to change, thereby realizing the ASK modulation function. It can reduce or remove off-chip capacitors, on-chip switches and chip pins without affecting the ASK modulation effect.

[0334] In a possible embodiment, for the half-bridge working state:

[0335] In the unmodulated mode, the logic control circuit is used to control the first switch to switch from the off state to the on state during the first dead zone, so that the first constant current source introduces an injection current to the first node; and to control the second switch to switch from the off state to the on state during the second dead zone, so that the second constant current source introduces a discharge current to the first node.

[0336] In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch and the fourth switch to be off.

[0337] The embodiment of the present application differs from the fourth embodiment only in that the modulation mode and the unmodulation mode are swapped: the modulation mode in the fourth embodiment is swapped for the unmodulation mode, and the unmodulation mode in the fourth embodiment is swapped for the modulation mode. That is, in the modulation mode of the present application, the constant current source circuit does not operate, and there is no need to introduce current to the first node AC1 and the second node AC2. In the unmodulation mode, the constant current source is controlled to introduce current to the first node AC1 and the second node AC2. The control logic corresponding to the embodiment of the present application and the fourth embodiment is the same and will not be repeated here.

[0338] The present application embodiment provides an ASK modulation method, see Figure 16 , this method is applied to the above-mentioned ASK modulation circuit, and the method is as follows.

[0339] S1, during the first dead zone, the constant current source circuit is controlled to introduce a discharge current to the first node, or the constant current source circuit is controlled to introduce a discharge current to the first node and an injection current to the second node; during the second dead zone, the constant current source circuit is controlled to introduce an injection current to the first node, or the constant current source circuit is controlled to introduce an injection current to the first node and a discharge current to the second node.

[0340] and / or,

[0341] S2, during the first dead zone, the constant current source circuit is controlled to introduce an injection current to the first node, or the constant current source circuit is controlled to introduce an injection current to the first node and a discharge current to the second node; during the second dead zone, the constant current source circuit is controlled to introduce a discharge current to the first node, or the constant current source circuit is controlled to introduce a discharge current to the first node and an injection current to the second node; wherein, the first dead zone process is a process in which the voltage of the first node decreases and the voltage of the second node increases, and the second dead zone process is a process in which the voltage of the first node increases and the voltage of the second node decreases.

[0342] In a possible embodiment, the above-mentioned S1 includes: for the full-bridge working state: in the modulation mode, during the first dead zone, controlling the second switch and the third switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; during the second dead zone, controlling the first switch and the fourth switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node.

[0343] The method further includes: S3, in a non-modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off states.

[0344] In a possible embodiment, the above-mentioned S1 includes: for the full-bridge working state: in the unmodulated mode, during the first dead zone, controlling the second switch and the third switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; during the second dead zone, controlling the first switch and the fourth switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node.

[0345] The method further includes: S3, in a modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0346] In a possible embodiment, the above-mentioned S2 includes: for the full-bridge working state: in the modulation mode, during the first dead zone, controlling the first switch and the fourth switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node, so that the fourth constant current source introduces a discharge current to the second node; during the second dead zone, controlling the second switch and the third switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node, so that the third constant current source introduces an injection current to the second node.

[0347] The method further includes: S3, in a non-modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off states.

[0348] In a possible embodiment, the above-mentioned S2 includes: for the full-bridge working state: in the unmodulated mode, during the first dead zone, controlling the first switch and the fourth switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node, so that the fourth constant current source introduces a discharge current to the second node; during the second dead zone, controlling the second switch and the third switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node, so that the third constant current source introduces an injection current to the second node.

[0349] The method further includes: S3, in a modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0350] In a possible embodiment, the above-mentioned S1 includes: for the half-bridge working state: in the modulation mode, during the first dead zone, controlling the second switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node; during the second dead zone, controlling the first switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node.

[0351] The method further includes: S3, in a non-modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off states.

[0352] In a possible embodiment, the above-mentioned S1 includes: for the half-bridge working state: in the unmodulated mode, during the first dead zone, controlling the second switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node; during the second dead zone, controlling the first switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node.

[0353] The method further includes: S3, in a modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0354] In a possible embodiment, the above-mentioned S2 includes: for the half-bridge working state: in the modulation mode, during the first dead zone, controlling the first switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node; during the second dead zone, controlling the second switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node.

[0355] The method further includes: S3, in a non-modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off states.

[0356] In a possible embodiment, the above-mentioned S2 includes: for the half-bridge working state: in the unmodulated mode, during the first dead zone, controlling the first switch to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node; during the second dead zone, controlling the second switch to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node.

[0357] The method further includes: S3, in a modulation mode, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

[0358] In a possible embodiment, the method further includes: S4, in a non-dead zone process, controlling the states of the first switch, the second switch, the third switch, and the fourth switch to be in an off state, wherein the non-dead zone process is a process in which the voltage of the first node and the voltage of the second node do not change.

[0359] An embodiment of the present application provides a wireless charging receiver, which includes: a receiving coil, a rectifier circuit as described above, a logic control circuit, and a constant current source circuit;

[0360] The receiving coil is electrically connected to the rectifier circuit, the logic control circuit is electrically connected to the constant current source circuit, and the constant current source circuit is electrically connected to the rectifier circuit;

[0361] The logic control circuit is used to modulate the control signal according to the ASK modulation method as described above, and transmit the modulated control signal to the transmitting coil magnetically coupled to the receiving coil through the receiving coil, wherein the modulated control signal changes the current of the receiving coil by controlling the constant current source circuit.

[0362] The embodiment of the present application provides a wireless charging receiver, which includes: a receiving coil, a rectifier, and a communication module, wherein the communication module includes a processor and a memory;

[0363] Memory for storing computer programs;

[0364] The processor implements the above-mentioned ASK modulation method for the wireless charging receiving end when executing the program stored in the memory.

[0365] The memory may include random access memory (RAM) or non-volatile memory, such as at least one disk storage. Alternatively, the memory may be at least one storage device located away from the processor.

[0366] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components.

[0367] An embodiment of the present application provides a chip, including: the above-mentioned ASK modulation circuit for a wireless charging receiving end.

[0368] An embodiment of the present application provides an electronic device including the above chip.

[0369] Finally, it should be noted that the above embodiments are merely specific implementations of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. An ASK modulation circuit, characterized in that: The circuit includes: a logic control circuit, a rectifier circuit and a constant current source circuit, wherein the logic control circuit is electrically connected to the constant current source circuit; the rectifier circuit includes a first bridge arm and a second bridge arm, wherein the first bridge arm and the second bridge arm are connected in parallel, the first bridge arm includes a first switch tube and a second switch tube, and the second bridge arm includes a third switch tube and a fourth switch tube, wherein the first switch tube is connected in series with the second switch tube, and the third switch tube is connected in series with the fourth switch tube; the constant current source circuit includes a first constant current component, a second constant current component, a third constant current component and a fourth constant current component, wherein the first end and the second end of the first switch tube are connected in parallel with the first constant current component, the first end and the second end of the second switch tube are connected in parallel with the second constant current component, and the first end of the third switch tube is connected in parallel with the fourth constant current component. The third constant current component is connected in parallel between the first end and the second end of the fourth switch tube, and the fourth constant current component is connected in parallel between the first end and the second end of the fourth switch tube; the first constant current component includes a first constant current source and a first switch, the first constant current source is connected in series with the first switch, the second constant current component includes a second constant current source and a second switch, the second constant current source is connected in series with the second switch, the third constant current component includes a third constant current source and a third switch, the third constant current source is connected in series with the third switch, the fourth constant current component includes a fourth constant current source and a fourth switch, the fourth constant current source is connected in series with the fourth switch; the connection point between the second end of the first switch tube and the first end of the second switch tube is used as a first node, and the connection point between the second end of the third switch tube and the first end of the fourth switch tube is used as a second node; The logic control circuit is configured to, during a first dead zone, control the constant current source circuit to introduce a discharge current to the first node, or to control the constant current source circuit to introduce a discharge current to the first node and to introduce an injection current to the second node; and during a second dead zone, control the constant current source circuit to introduce an injection current to the first node, or to control the constant current source circuit to introduce an injection current to the first node and to introduce a discharge current to the second node; and / or, The logic control circuit is further used to control the constant current source circuit to introduce an injection current to the first node, or to control the constant current source circuit to introduce an injection current to the first node and introduce a discharge current to the second node during a first dead zone; and to control the constant current source circuit to introduce a discharge current to the first node, or to control the constant current source circuit to introduce a discharge current to the first node and introduce an injection current to the second node during a second dead zone; wherein the first dead zone process is a process in which the voltage of the first node decreases and the voltage of the second node increases, and the second dead zone process is a process in which the voltage of the first node increases and the voltage of the second node decreases.

2. The ASK modulation circuit according to claim 1, characterized in that: For full-bridge working status: In the modulation mode, the logic control circuit is configured to control the second switch and the third switch to switch from an off state to an on state during a first dead zone, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; During the second dead zone, controlling the first switch and the fourth switch to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

3. The ASK modulation circuit according to claim 1, wherein: For full-bridge working status: In the unmodulated mode, the logic control circuit is configured to control the second switch and the third switch to switch from an off state to an on state during a first dead zone, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; During the second dead zone, controlling the first switch and the fourth switch to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

4. The ASK modulation circuit according to claim 1, wherein: For full-bridge working status: In the modulation mode, the logic control circuit is configured to control the first switch and the fourth switch to switch from an off state to an on state during a first dead zone, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; During the second dead zone, controlling the second switch and the third switch to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

5. The ASK modulation circuit according to claim 1, wherein: For full-bridge working status: In the unmodulated mode, the logic control circuit is configured to control the first switch and the fourth switch to switch from an off state to an on state during a first dead zone, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; During the second dead zone, controlling the second switch and the third switch to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

6. The ASK modulation circuit according to claim 1, characterized in that: For half-bridge working state: In the modulation mode, the logic control circuit is used to control the second switch to switch from an off state to an on state during a first dead zone, so that the second constant current source introduces a discharge current to the first node; During the second dead zone, controlling the first switch to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node; In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

7. The ASK modulation circuit according to claim 1, characterized in that: For half-bridge working state: In the unmodulated mode, the logic control circuit is configured to control the second switch to switch from an off state to an on state during a first dead zone, so that the second constant current source introduces a discharge current to the first node; During the second dead zone, controlling the first switch to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node; In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

8. The ASK modulation circuit according to claim 1, wherein: For half-bridge working state: In the modulation mode, the logic control circuit is used to control the first switch to switch from an off state to an on state during a first dead zone, so that the first constant current source introduces an injection current to the first node; During the second dead zone, controlling the second switch to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node; In the unmodulated mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

9. The ASK modulation circuit according to claim 1, wherein: For half-bridge working state: In the unmodulated mode, the logic control circuit is configured to control the first switch to switch from an off state to an on state during a first dead zone, so that the first constant current source introduces an injection current into the first node; During the second dead zone, controlling the second switch to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node; In the modulation mode, the logic control circuit is used to control the states of the first switch, the second switch, the third switch, and the fourth switch to be off.

10. The ASK modulation circuit according to claim 1, characterized in that: The logic control circuit is used to control the states of the first switch, the second switch, the third switch and the fourth switch to be off during a non-dead zone process, wherein the non-dead zone process is a process in which the voltage of the first node and the voltage of the second node do not change.

11. An ASK modulation method, characterized in that: The method is applied to the ASK modulation circuit according to any one of claims 1 to 9, and the method includes: During the first dead zone, the constant current source circuit is controlled to introduce a discharge current to the first node, or the constant current source circuit is controlled to introduce a discharge current to the first node and an injection current to the second node; during the second dead zone, the constant current source circuit is controlled to introduce an injection current to the first node, or the constant current source circuit is controlled to introduce an injection current to the first node and a discharge current to the second node; and / or, During the first dead zone, the constant current source circuit is controlled to introduce an injection current into the first node, or the constant current source circuit is controlled to introduce an injection current into the first node and a discharge current into the second node; during the second dead zone, the constant current source circuit is controlled to introduce a discharge current into the first node, or the constant current source circuit is controlled to introduce a discharge current into the first node and an injection current into the second node; wherein, the first dead zone process is a process in which the voltage of the first node decreases and the voltage of the second node increases, and the second dead zone process is a process in which the voltage of the first node increases and the voltage of the second node decreases.

12. The ASK modulation method according to claim 11, characterized in that: The method is applied to the ASK modulation circuit according to claim 2, and the method includes: For full-bridge working status: In the modulation mode, during the first dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; during the second dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; In the unmodulated mode, the first switch, the second switch, the third switch, and the fourth switch are controlled to be in an off state.

13. The ASK modulation method according to claim 11, wherein: The method is applied to the ASK modulation circuit according to claim 3, and the method includes: For full-bridge working status: In the unmodulated mode, during the first dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; during the second dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

14. The ASK modulation method according to claim 11, wherein: The method is applied to the ASK modulation circuit according to claim 4, and the method includes: For full-bridge working status: In the modulation mode, during a first dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; during a second dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; In the unmodulated mode, the first switch, the second switch, the third switch, and the fourth switch are controlled to be in an off state.

15. The ASK modulation method according to claim 11, characterized in that: The method is applied to the ASK modulation circuit according to claim 5, and the method includes: For full-bridge working status: In the unmodulated mode, during a first dead zone, the first switch and the fourth switch are controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node, and the fourth constant current source introduces a discharge current to the second node; during a second dead zone, the second switch and the third switch are controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node, and the third constant current source introduces an injection current to the second node; In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

16. The ASK modulation method according to claim 11, characterized in that: The method is applied to the ASK modulation circuit according to claim 6, and the method includes: For half-bridge working state: In the modulation mode, during the first dead zone, the second switch is controlled to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node; during the second dead zone, the first switch is controlled to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node; In the unmodulated mode, the first switch, the second switch, the third switch, and the fourth switch are controlled to be in an off state.

17. The ASK modulation method according to claim 11, characterized in that: The method is applied to the ASK modulation circuit according to claim 7, and the method includes: For half-bridge working state: In the unmodulated mode, during the first dead zone, the second switch is controlled to switch from the off state to the on state, so that the second constant current source introduces a discharge current to the first node; during the second dead zone, the first switch is controlled to switch from the off state to the on state, so that the first constant current source introduces an injection current to the first node; In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

18. The ASK modulation method according to claim 11, wherein: The method is applied to the ASK modulation circuit according to claim 8, and the method includes: For half-bridge working state: In the modulation mode, during a first dead zone, the first switch is controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node; during a second dead zone, the second switch is controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node; In the unmodulated mode, the first switch, the second switch, the third switch, and the fourth switch are controlled to be in an off state.

19. The ASK modulation method according to claim 11, characterized in that: The method is applied to the ASK modulation circuit according to claim 9, and the method includes: For half-bridge working state: In the unmodulated mode, during a first dead zone, the first switch is controlled to switch from an off state to an on state, so that the first constant current source introduces an injection current to the first node; during a second dead zone, the second switch is controlled to switch from an off state to an on state, so that the second constant current source introduces a discharge current to the first node; In the modulation mode, the states of the first switch, the second switch, the third switch, and the fourth switch are controlled to be off.

20. A wireless charging receiver, characterized in that: The wireless charging receiver comprises: a receiving coil, a rectifier circuit according to any one of claims 1 to 10, a logic control circuit, and a constant current source circuit; The receiving coil is electrically connected to the rectifier circuit, the logic control circuit is electrically connected to the constant current source circuit, and the constant current source circuit is electrically connected to the rectifier circuit; The logic control circuit is used to modulate the control signal according to the ASK modulation method according to any one of claims 11 to 19, and transmit the modulated control signal to the transmitting coil magnetically coupled to the receiving coil through the receiving coil, wherein the modulated control signal changes the current of the receiving coil by controlling the constant current source circuit.

Images