Gate driving device

Abstract

The purpose of the present invention is to obtain a gate drive device capable of reducing noise compared to conventional gate drive devices. A gate drive device (100) is provided with: a command generation circuit (20) that generates and outputs a gate drive command on the basis of an input signal (Vin); a constant output circuit (10) that is connected in parallel to the command generation circuit (20) and outputs a constant voltage signal in accordance with the input signal (Vin); a complementary emitter follower circuit (30) that amplifies the gate drive command; and a current limiting element (82) that is provided on the input side or the output side of the complementary emitter follower circuit (30) and that suppresses reverse current, and the gate drive device applies a gate drive voltage, which is obtained by combining a gate drive command and a constant voltage signal, to the gate terminal of the semiconductor switching element (92).

Description

Technical Field

[0001] The present application relates to a gate driving device. Background Art

[0002] As a voltage-driven element constituting a semiconductor power conversion device, there is an example of using a gate drive device to control on and off. As a conventional gate drive device, there is a gate drive device comprising: a waveform shaping circuit that shapes an input voltage signal that changes in a step-like manner to generate a voltage waveform with a predetermined voltage change rate; and a complementary emitter follower circuit or a complementary source follower circuit, the input side of which is connected to the output of the waveform shaping circuit, and the output side is connected to the gate terminal of the above-mentioned voltage-driven element, wherein the emitter terminal or the source terminal of the above-mentioned voltage-driven element is connected to the middle connection point of a positive bias power supply that supplies a positive bias voltage and a reverse bias power supply that supplies a reverse bias voltage (for example, refer to patent document 1). The waveform shaping circuit of the gate drive device described in patent document 1 is constructed by connecting a resistor and a capacitor in an inverse L shape, and outputs a first-order delay waveform based on a time constant determined by the resistor and the capacitor.

[0003] Prior art literature

[0004] Patent Document 1: Japanese Patent Application Publication No. 2004-48959 Summary of the invention

[0005] The gate drive device described in Patent Document 1 can suppress the noise (switching noise) caused by the time variation (dI / dt) of the current when the current rises before the Miller period by appropriately setting the time constant of the waveform shaping circuit. On the other hand, since only one time constant of the waveform shaping circuit can be set, the gate drive current increases during the Miller period when the voltage drop occurs, and the time variation (dV / dt) of the voltage becomes rapid when the voltage drops, which has the problem that the noise caused by the time variation of the voltage may become larger.

[0006] The present application is made to solve the above-mentioned problems, and an object of the present application is to obtain a gate driving device capable of reducing noise compared with the related art.

[0007] The gate drive device disclosed in the present application comprises: an instruction generation circuit, which generates and outputs a gate drive instruction based on an input signal; a constant output circuit, which is connected in parallel with the instruction generation circuit and outputs a constant voltage signal or a constant current signal based on the input signal; an amplifier circuit, which amplifies the gate drive instruction; and a current limiting element, which is arranged on the input side or the output side of the amplifier circuit to suppress the reverse flow of current. The gate drive device applies a gate drive voltage obtained by synthesizing the gate drive instruction and the constant voltage signal or the constant current signal to the gate terminal of the semiconductor switching element.

[0008] According to the gate driving device disclosed in the present application, noise can be reduced compared to the conventional method. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 : is a circuit diagram showing the gate driving device in the first embodiment.

[0010] Figure 2A 1 is a structural diagram showing an application example of the gate driving device in the first embodiment.

[0011] Figure 2B This is a configuration diagram showing an application example of the gate driving device in the first embodiment, and is a diagram for a case where a MOSFET is used as a semiconductor switching element.

[0012] Figure 3 This is a diagram schematically showing each operation waveform of the gate driving device in the first embodiment.

[0013] Figure 4A This is a diagram schematically showing each operation waveform when the main circuit current is the rated current.

[0014] Figure 4B This is a diagram schematically showing each operation waveform when the main circuit current is a small current.

[0015] Figure 5A 1 is a diagram showing each operation waveform according to the comparative example, and is a diagram when the main circuit current is a large current.

[0016] Figure 5B It is a diagram showing each operation waveform according to the first embodiment, and is a diagram when the main circuit current is a large current.

[0017] Figure 5C 1 is a diagram showing each operation waveform according to the comparative example, and is a diagram when the main circuit current is a small current.

[0018] Figure 5D It is a diagram showing each operation waveform according to the first embodiment, and is a diagram when the main circuit current is a small current.

[0019] Figure 6 : is a circuit diagram showing a gate driving device in the second embodiment.

[0020] Fig. 7A This is a diagram showing each operation waveform according to the second embodiment, and is a diagram for a case where the main circuit current is a large current.

[0021] Figure 7B It is a diagram showing each operation waveform according to the second embodiment, and is a diagram when the main circuit current is a small current.

[0022] Figure 8 : is a circuit diagram showing a gate driving device in a third embodiment.

[0023] Fig. 9 This is a circuit diagram showing a modified example of the gate driving device in the third embodiment.

[0024] Fig.10 : is a circuit diagram showing a gate driving device in a fourth embodiment.

[0025] Fig.11 It is a diagram showing each operation waveform according to the fourth embodiment, and is a diagram when the main circuit current is a large current. DETAILED DESCRIPTION

[0026] Implementation method 1.

[0027] according to Figures 1 to 5D , describing implementation mode 1. Figure 1 1 is a circuit diagram showing a gate driving device in Embodiment 1. The gate driving device 100 is connected to an interface circuit 91 on the input side and to a semiconductor switch element 92 on the output side. The gate driving signal, i.e., the gate driving voltage, is generated according to the input signal Vin inputted via the interface circuit 91 and is outputted to the gate terminal of the semiconductor switch element 92. The gate driving device 100 includes a constant output circuit 10, a command generating circuit 20, a current limiting element 82, and a complementary emitter follower circuit 30, i.e., an amplifier circuit. The constant output circuit 10 and the command generating circuit 20 are connected in parallel. The constant output circuit 10 is connected to the input side of the complementary emitter follower circuit 30 via a diode 81 and a connection point 83. The connection point 83 is arranged between the current limiting element 82 and the complementary emitter follower circuit 30. The command generating circuit 20 is connected to the input side of the complementary emitter follower circuit 30 via the current limiting element 82 and the connection point 83.

[0028] The constant output circuit 10 is a constant voltage output circuit that includes a resistor 11 provided between the circuit L1 on the ground side and the circuit L2 on the high potential side and outputs a constant voltage signal. Its output terminal is connected to the anode of the diode 81. The cathode of the diode 81 is connected to the connection point 83.

[0029] The command generation circuit 20 has an RC resonant circuit composed of a resistor 21 and a capacitor 23. The command generation circuit 20 shapes the input signal Vin, which is a step-shaped voltage signal, into a command waveform with a predetermined voltage change rate, and outputs it as a gate drive command. The command generation circuit 20 is composed of a series connection of a resistor 21 and a Zener diode 22, a diode 29, and a capacitor 23 connected in parallel. The resistor 21 is arranged between the circuit L1 on the ground side and the circuit L3 on the high potential side, and is connected to the cathode of the Zener diode 22 on the high potential side. The Zener diode 22 and the diode 29 are arranged so that the direction from the circuit L3 on the high potential side toward the circuit L1 on the ground side becomes a forward direction. In the capacitor 23, one end is grounded and the other end is connected to the circuit L3 on the high potential side. The output of the command generation circuit 20 is input to the complementary emitter follower circuit 30 via the current limiting element 82 and the connection point 83.

[0030] The Zener diode 22 is an example of a constant voltage element, and is clamped at a predetermined breakdown voltage as described later, and the voltage of the gate drive command is maintained at the breakdown voltage. In the first embodiment, the breakdown voltage of the Zener diode 22 is set to be the same as the Miller voltage of the semiconductor switch element 92.

[0031] The complementary emitter follower circuit 30 is a circuit formed by connecting an npn transistor 31 and a pnp transistor 32 in series, and a connection point 33 between the emitter of the npn transistor 31 and the emitter of the pnp transistor is connected to the gate terminal of the semiconductor switch element 92 as the output terminal of the complementary emitter follower circuit 30. In addition, a connection point 34 between the base of the npn transistor 31 and the base of the pnp transistor becomes the input terminal of the complementary emitter follower circuit 30. In addition, the collector of the npn transistor 31 is connected to an external power supply whose power supply voltage is Vcc via a resistor. The collector of the pnp transistor 32 is grounded via a resistor. In embodiment 1, the output of the complementary emitter follower circuit 30 becomes the output of the gate drive device 100.

[0032] The complementary emitter follower circuit 30 functions as an amplifier circuit to at least amplify the gate drive instruction which is the output of the instruction generation circuit 20. In addition, in Embodiment 1, the complementary emitter follower circuit 30 as described above is used, but a complementary source follower circuit including an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and a P-channel MOSFET can be used instead of the complementary emitter follower circuit 30.

[0033] The current limiting element 82 is provided between the command generating circuit 20 and the connection point 83 in the circuit L3, and uses its electromotive force to suppress the current from the output side from flowing back into the command generating circuit 20. In the first embodiment, a resistor is used as the current limiting element 82, but a reactor may be used instead of the resistor.

[0034] In the first embodiment, the semiconductor switch element 92 is set to an IGBT (Insulated Gate Bipolar Transistor) with a diode connected in anti-parallel, but it can also be a MOSFET with a diode connected between the source and the drain, or a common source and common gate type GaN-HEMT (Gallium nitride-High Mobility Transistor), etc., without being particularly limited.

[0035] The constant voltage signal as the output of the constant output circuit 10 and the gate drive command as the output of the command generation circuit 20 are synthesized at the connection point 83, amplified in the complementary emitter follower circuit 30, and then output as the output of the gate drive device 100, that is, the gate drive voltage. The gate drive voltage is applied to the gate terminal of the semiconductor switch element 92.

[0036] Figure 2A 1 is a block diagram showing an application example of the gate drive device in the first embodiment, and is a block diagram showing an example of a chopper circuit applied to a power converter, for example. Figure 2A In the figure, the semiconductor switch elements 92 and the gate drive device 100 on the positive side (high side) and the negative side (low side) are respectively set as the upper semiconductor switch element 92A and the gate drive device 100A, and the lower semiconductor switch element 92B and the gate drive device 100B. Figure 2A V1 in represents the potential difference between the ground side and the high potential side of the chopper circuit. Figure 2B Yes Figure 2A FIG. 9 is a diagram showing a case where the upper semiconductor switch element 92A and the lower semiconductor switch element 92B are replaced with MOSFETs. Figure 2A as well as Figure 2B The circuit structure is a chopper circuit, but as long as Figure 2A , Figure 2B In this way, a circuit in which two semiconductor switching elements are connected in series to form a branch can be applied to Embodiment 1. For example, it can be an inverter circuit composed of 6 elements or a full-bridge circuit composed of 4 elements. In addition, it is not necessary for both of the elements connected in series to be semiconductor switching elements, and one of them can also be a diode element.

[0037] Next, the turning-on operation of the semiconductor switch element 92 by the gate drive of the gate drive device 100 is described. The gate drive device 100 is input with an input signal Vin as a gate signal via the interface circuit 91. The input signal Vin is a voltage signal that changes in a stepwise manner. The constant output circuit 10 and the command generation circuit 20 are connected in parallel, so the input signal Vin is inputted separately, and each output is synthesized at the connection point 83.

[0038] The constant voltage signal as the output of the constant output circuit 10 is determined by the input signal Vin and the resistance value of the resistor 11. The command generation circuit 20 functions as a low impedance voltage source composed of an RC resonance circuit having a resistor 21 and a capacitor 23, and a Zener diode 22. The waveform of the gate drive command as the output of the command generation circuit 20 becomes a voltage waveform having a first-order delay function characteristic. The specific waveform is determined by the input signal Vin, and the circuit constants of the resistor 21 and the capacitor 23.

[0039] As described above, the output of the constant output circuit 10 and the output of the command generation circuit 20 are synthesized at the connection point 83 and input to the complementary emitter follower circuit 30, so the waveform of the signal input to the complementary emitter follower circuit 30 and the waveform of the signal transmitted from the complementary emitter follower circuit 30 to the semiconductor switch element 92 mainly become the waveform of the larger output signal. In embodiment 1, the circuit constant is set in such a way that one side of the command generation circuit 20 becomes a high output. Therefore, the waveform of the signal input to the complementary emitter follower circuit 30 and the waveform of the drive signal transmitted to the semiconductor switch element 92 are substantially the same as the waveform of the gate drive command as the output of the command generation circuit 20.

[0040] As described above, the Zener diode 22 provided in the command generation circuit 20 clamps at a predetermined breakdown voltage, so the relationship of the following equation (1) holds between the output current of the constant output circuit 10 and the output current of the command generation circuit 20 .

[0041] [Mathematical formula 1]

[0042]

[0043] In formula (1), Iconst is the output current of the constant output circuit 10, and Iact is the output current of the instruction generation circuit 20. In addition, Vgate is the output voltage of the gate drive device 100, which is the gate drive voltage. Vz is the breakdown voltage of the Zener diode 22. In addition, as described above, in embodiment 1, the breakdown voltage of the Zener diode 22 is set to be the same as the Miller voltage of the semiconductor switch element 92, so when Vmiller is set to the Miller voltage of the semiconductor switch element 92, the following formula (2) also holds in embodiment 1.

[0044] Vz=Vmiller …(2)

[0045] According to equations (1) and (2), when the gate drive voltage Vgate is greater than the Miller voltage Vmiller of the semiconductor switch element 92, the output current Iconst of the constant output circuit 10 becomes greater than the output current Iact of the instruction generation circuit 20. In this case, due to the influence of the electromotive force of the current limiting element 82, the reverse flow of the current is also suppressed, and the output current Iconst of the constant output circuit 10 is suppressed from flowing into the instruction generation circuit 20. This means that the output current Iconst of the constant output circuit 10 is all input to the complementary emitter follower circuit 30, and then the gate current flows in the semiconductor switch element 92, indicating that the gate drive performed by the constant output circuit 10 will not be hindered.

[0046] In addition, in embodiment 1, the breakdown voltage of the Zener diode 22 is set to be the same as the Miller voltage Vmiller, but the breakdown voltage of the Zener diode 22 does not need to be the same as the Miller voltage Vmiller as long as it is a voltage different from the power supply voltage Vcc of the external power supply of the complementary emitter follower circuit 30, more specifically, a constant voltage smaller than the power supply voltage Vcc.

[0047] In the turn-on action of the gate drive device 100, at the beginning of the turn-on action, a large time change (dI / dt) of the current is generated due to the output of the instruction generation circuit 20, and dI / dt gradually decreases. Therefore, the current rises quickly, and the increase in switching loss at the beginning of the turn-on is suppressed. After reaching the Miller period, the voltage drop is suppressed by the output of the constant output circuit 10 to prevent the time change (dV / dt) of the voltage from becoming sharp when the voltage drops. As a result, the occurrence of noise in the semiconductor switching element that is paired in the chopper circuit, etc. (the occurrence of noise caused by the time change of the recovery voltage) can be suppressed. In this way, the gate drive is performed using a signal obtained by combining the gate drive instruction and the constant voltage signal, so that the increase in switching loss and the occurrence of noise in the turn-on action can be suppressed.

[0048] Next, the operation waveforms of the gate driving device according to the first embodiment will be described. Figure 3 is a diagram showing an overview of each operation waveform of the gate drive device in the first embodiment, Figure 2A The operation waveform of the behavior when the lower semiconductor switch element 92B of the chopper circuit is turned on. Figure 3 In the figure, the horizontal axis is set to time, showing the general waveforms of the input signal Vin, the output current IG1 of the instruction generating circuit 20 (equal to Iact of formula (1)), the output current IG2 of the constant output circuit 10 (equal to Iconst of formula (1)), the gate drive voltage Vgate, the voltage (collector-emitter voltage) VCE_L of the lower semiconductor switch element 92B, the current (collector current) IC_L of the lower semiconductor switch element 92B, the voltage (collector-emitter voltage) VCE_H of the upper semiconductor switch element 92A, and the current (collector current) IC_H of the upper semiconductor switch element 92A.

[0049] exist Figure 3 In the example, the time when the input signal Vin rises is set to time t0. That is, before time t0, the input signal Vin is zero or negatively biased. At this time, the lower semiconductor switch element 92B is in the off state, and the upper semiconductor switch element 92A is in the on state. In addition, the constant output circuit 10, the command generation circuit 20, and the gate drive device 100 have no output.

[0050] At time t0, the input signal Vin turns positive, so the output current IG1 of the command generation circuit 20, the output current IG2 of the constant output circuit 10, and the gate drive voltage Vgate rise. As a result, the lower semiconductor switch element 92B starts turning on. At the same time, the upper semiconductor switch element 92A starts turning off.

[0051] Time t0 to time t1 is before the Miller period. During this period, the output of the instruction generation circuit 20 is large, and the gate drive voltage Vgate becomes a voltage waveform having a first-order delay function characteristic in the same manner as the output of the instruction generation circuit 20. In addition, a large gate current flows through the lower semiconductor switch element 92B. During the period from time t0 to time t1, the gate drive voltage Vgate exceeds the gate threshold voltage (not shown), so the current IC_L of the lower semiconductor switch element 92B begins to rise sharply. At the timing when the gate drive voltage Vgate becomes the Miller voltage Vmiller, the voltage is clamped by the Zener diode 22, and the gate drive voltage Vgate does not rise above the Miller voltage. In addition, the output current IG1 of the instruction generation circuit 20 is also suppressed, and the gate current in the lower semiconductor switch element 92B is also suppressed.

[0052] The period from time t1 to time t2 is the Miller period, and the output of the command generation circuit 20 is limited by the Zener diode 22. During this period, the output current IG2 of the constant output circuit 10 is greater than the output current IG1 of the command generation circuit 20, and the gate drive is mainly realized by the output of the constant output circuit 10. However, since the output of the constant output circuit 10 is small, it becomes a gentle gate drive, and the voltage VCE_L drops smoothly.

[0053] After the Miller period from time t2 to time t3, the gate drive voltage Vgate is increased to Vcc (power supply voltage of the external power supply) only by the output of the constant output circuit 10, and the turning-on operation of the lower semiconductor switch element 92B is completed.

[0054] At time t3, the lower semiconductor switch element 92B starts to be turned off. The turning off operation in the first embodiment is the same as that in the case of normal constant voltage driving.

[0055] As described above, according to the first embodiment, at the beginning of the turn-on, the gate drive is performed using the large output of the command generation circuit 20 to suppress the occurrence of switching loss, and after the Miller period, the gate drive is performed using the gentle output of the constant output circuit 10 to prevent the time change of the voltage when the voltage drops from becoming abrupt, and also prevent the occurrence of noise. That is, according to the first embodiment, by preventing the occurrence of noise due to the time change of the voltage when the voltage drops, it is possible to suppress noise more than before, and also suppress the occurrence of switching loss.

[0056] Furthermore, in the first embodiment, the robustness against the fluctuation of the main circuit current is also improved. This will be described below. Figure 4A 1 is a diagram showing an overview of each operation waveform when the main circuit current is the rated current. Figure 4B This is a diagram showing the overview of each action waveform when the main circuit current is a small current. Here, "small current" means a current that is small relative to the rated current, and can be set to 10A, for example. When the main circuit current is a small current, it has the characteristics of a small gate charge and a low Miller voltage. That is, the Miller voltage Vmiller2 at a small current is lower than the Miller voltage Vmiller1 at the rated current.

[0057] Under such a condition, in the gate drive or constant voltage drive based on the first-order delay drive instruction using the RC resonant circuit as in the past, when the circuit constants are set to match the main circuit current as the rated current, the gate drive capability becomes too large at a small current, and the gate drive voltage Vgate may rise to Vcc before reaching the Miller period. In addition, when the gate drive voltage Vgate rises to Vcc before reaching the Miller period, the gate current during the Miller period becomes too large, thereby increasing the time change (dV / dt) of the voltage during the drop of the voltage VCE_L and the time change (dV / dt) of the voltage during the rise of the paired semiconductor switch element VCE_H. Such an increase in the time change of voltage will lead to the occurrence of noise. If the circuit constants are set to match the small current, although the occurrence of the above-mentioned noise is suppressed, the gate drive capability at the rated current and the large current becomes smaller, and the rise of the current is delayed, which may lead to an increase in switching loss. As described above, in the conventional structure, the gate drive capability changes too much due to the change of the main circuit current, making it difficult to suppress the switching loss at the rated current and the high current and the noise at the low current. In addition, the "high current" here means a current that is large relative to the rated current, for example, it can be set to 50A.

[0058] In the gate drive device 100 in the first embodiment, the voltage of the RC resonant circuit of the instruction generation circuit 20 is clamped by the Zener diode 22 with the Miller voltage Vmiller. Thus, the output current IG1 of the instruction generation circuit 20 is limited to suppress the increase of the gate drive capability. On the other hand, by combining the gentle output of the constant output circuit 10, a certain degree of gate drive capability is ensured. Thus, in the gate drive device 100, the change of the gate drive capability caused by the change of the main circuit current is suppressed, and both the suppression of switching loss and the suppression of noise are achieved, so that the robustness against the change of the main circuit current is improved.

[0059] In order to explain the improvement in the above-mentioned robustness, a conventional gate driving device using an RC resonance circuit is used as a comparative example, and the difference between each operation waveform between the comparative example and the first embodiment is shown. Figure 5A 1 is a diagram showing various operation waveforms according to the comparative example, and is a diagram showing a case where the main circuit current is a large current. Figure 5B 1 is a diagram showing each operation waveform involved in the first embodiment, and is a diagram for a case where the main circuit current is a large current. Figure 5C 1 is a diagram showing various operation waveforms according to the comparative example, and is a diagram showing a case where the main circuit current is a small current. Figure 5D It is a diagram showing each operation waveform according to the first embodiment, and is a diagram when the main circuit current is a small current. FIG. 5A to FIG. 5DIt is a diagram showing the analysis results obtained by analyzing each operation waveform.

[0060] FIG. 5A to FIG. 5D Show Figure 2A as well as Figure 2B The various action waveforms when the lower semiconductor switch element 92B is turned on, the “gate current IG” represents the current flowing in the gate terminal of the lower semiconductor switch element 92B. The “gate drive command VGC” and the “gate voltage VG” represent the output of the gate drive device 100 and the gate voltage (gate-emitter voltage) of the lower semiconductor switch element 92B, respectively. The gate drive command VGC corresponds to the gate drive voltage Vgate. The “Hi side element voltage VH” and the “Hi side element current IH” represent the voltage (collector-emitter voltage) of the upper semiconductor switch element 92A and the current (collector current) of the upper semiconductor switch element 92A, respectively. Figures 3 to 4B The "Lo side element voltage VL" and "Lo side element current IL" respectively represent the voltage (collector-emitter voltage) of the lower semiconductor switch element 92B and the current (collector current) of the lower semiconductor switch element 92B, respectively. Figures 3 to 4B VCE_L and IC_L correspond.

[0061] Furthermore, as conditions in the above analysis, the circuit constants of the RC resonance circuit of the comparative example and the RC resonance circuit of the command generation circuit 20 of the first embodiment are set to match the case where the main circuit current is a large current.

[0062] In confirmation Figure 5A as well as Figure 5C When comparing the waveforms of the comparative example, it can be seen that in the comparative example, the increase in gate current IG during the Miller period is different when the current is large and when the current is small, and the gate drive capability is greater when the current is small. Therefore, in the comparative example, the time variation of the recovery voltage described above increases, and the noise increases.

[0063] On the other hand, in embodiment 1, as from Figure 5C and Figure 5D As can be seen from the comparison, the gate current IG in the Miller period at a low current can be suppressed compared to the comparative example, and the time variation of the recovery voltage can also be suppressed. Thus, the difference between the conventional gate drive device and the embodiment 1 can be confirmed from the analysis results. In addition, even when a plurality of semiconductor switching elements to be the object are connected in parallel, the gate drive device of each switching element is used in accordance with the embodiment 1. Figure 1 The gate driving device 100 may be constructed with the same circuit structure as shown.

[0064] Implementation method 2.

[0065] Next, according to Figures 6 to 7B , describing implementation mode 2. Figure 6 is a circuit diagram showing a gate driving device in Embodiment 2. Figures 1 to 5D The same or equivalent structures are denoted by the same reference numerals, and their descriptions are omitted. In the gate drive device 200, the constant output circuit 40 is different from the constant output circuit 10 of the gate drive device 100. The constant output circuit 40 of the gate drive device 200 includes a constant current diode 41, i.e., a constant current element, and a capacitor 42 connected in parallel to each other, forming a constant current output circuit that outputs a constant current signal. One end of the constant current diode 41 and the capacitor 42 are each connected to the circuit L1 on the ground side, and the other end is connected to the circuit L2 on the high potential side. The other structures are the same as those of the gate drive device 100.

[0066] Next, the operation of the gate driving device 200 according to the second embodiment will be described. Fig. 7A 2 is a diagram showing the waveforms of various operations according to the second embodiment, and is a diagram showing the case where the main circuit current is a large current. Figure 7B This is a diagram showing the waveforms of various actions involved in Embodiment 2, and is a diagram for the case where the main circuit current is a small current. The basic action is the same as that of Embodiment 1, and is mainly switched in the following manner: after gate driving is performed by the instruction generation circuit 20, gate driving is performed by the output of the constant output circuit 40. The constant output circuit 40 of Embodiment 2 is a constant current output circuit, so the gate current IG also becomes constant after gate driving is performed by the constant output circuit 40. As a result, the rising rate of the gate voltage VG also becomes constant. In addition, the constant output circuit 10 of Embodiment 1 is a constant voltage output circuit, so the gate current IG does not become constant but varies, especially at a small current. For example, regarding the gate current IG during the period from 0.8μs to 1.2μs, in the comparison Figure 5D and Figure 7B When Figure 5D In the first embodiment of the present invention, a rise in the gate current IG is observed at a low current, but Figure 7B The same is true for Embodiment 2 of FIG. As in Embodiment 2, when the gate current IG is constant, the gate driving capability is maintained, and the robustness against the change of the main circuit current is high. Thus, according to Embodiment 2, the robustness against the change of the main circuit current can be further improved.

[0067] Furthermore, the constant current diode has a characteristic of low temperature dependence, which means that the variation of the gate driving capability due to temperature variation can be suppressed, so the robustness against temperature variation is also improved in the second embodiment.

[0068] Implementation method 3.

[0069] Next, according to Figure 8 , describing implementation mode 3. Figure 8 is a circuit diagram showing a gate driving device in Embodiment 3. Figures 1 to 7B The same reference numerals are attached to structures that are the same as or equivalent to the structures shown, and their descriptions are omitted. The gate drive device 300 connects the output terminal of the constant output circuit 40 to the output side of the complementary emitter follower circuit 30, which is different from the second embodiment. In the gate drive device 300, instead of providing the current limiting element 82 and the connection point 83 between the instruction generation circuit 20 and the complementary emitter follower circuit 30 in the gate drive device 100 and the gate drive device 200, the current limiting element 821 and the connection point 831 are provided on the output side of the complementary emitter follower circuit 30. The connection point 831 is arranged between the current limiting element 821 and the gate terminal of the semiconductor switch element 92. The constant output circuit 40 is connected to the output side of the complementary emitter follower circuit 30 at the connection point 831. In the third embodiment, a resistor is used as the current limiting element 821. The other structures are the same as those of the gate drive device 200. In embodiments 1 and 2 and embodiment 3, there is a difference in which side of the input side and the output side of the complementary emitter follower circuit 30 the output of the constant output circuit 10 or the constant output circuit 40 and the output of the instruction generation circuit 20 are synthesized, but the basic operation is the same.

[0070] In the gate driving device 300, the output terminal of the constant output circuit 40 is connected to the gate terminal of the semiconductor switch element 92 and the current limiting element 821 and the complementary emitter follower circuit 30. Therefore, after the gate driving voltage Vgate is greater than the Miller voltage Vmiller of the semiconductor switch element 92, the reverse flow of the current is suppressed by the influence of the electromotive force of the current limiting element 821, so that the current absorption caused by the complementary emitter follower circuit 30 can be suppressed. Therefore, the constant output circuit 40 can maintain normal operation and can obtain the same effect as in the first and second embodiments.

[0071] In the third embodiment, a resistor is used as the current limiting element, but a Fig. 9 As in the modification of the third embodiment shown in FIG. 3 , a reactor is used as the current limiting element. In the gate driving device 301 , the current limiting element 821 of the gate driving device 300 is replaced with a current limiting element 822 which is a reactor.

[0072] Implementation method 4.

[0073] Next, according to Figure 10 to Figure 11 , describing implementation mode 4. Fig.10 is a circuit diagram showing a gate driving device in Embodiment 4. Figures 1 to 9 The same symbols are attached to the structures that are the same as or equivalent to the structures shown, and their descriptions are omitted. In the gate drive device 400, the command generation circuit 50 is different from the command generation circuit 20 of the gate drive device 200. That is, the command generation circuit 20 has an RC resonance circuit formed by a resistor and a capacitor, but the command generation circuit 50 has a constant current output circuit formed by a constant current element and a capacitor. The command generation circuit 50 is composed of a series connection of a Zener diode 22 and a constant current diode 51, a diode 29, and a capacitor 23 connected in parallel. The constant current diode 51 is provided between the circuit L1 on the ground side and the circuit L3 on the high potential side, and is connected to the cathode of the Zener diode 22 on the high potential side. Regarding the capacitor 23 and the diode 29, it is the same as in the second embodiment. The output of the command generation circuit 50 is input to the complementary emitter follower circuit 30 via the current limiting element 82 and the connection point 83 in the same manner as in the second embodiment. Regarding other structures, it is the same as the gate drive device 200.

[0074] Next, the operation of the gate driving device 400 according to the fourth embodiment will be described. Fig.11 1 is a diagram showing the waveforms of each operation involved in the fourth embodiment, and is a diagram for the case where the main circuit current is a large current. The basic operation is the same as that of the second embodiment, but when the gate drive command VGC and the gate voltage VG rise, Fig. 7A In the second embodiment shown, the rising waveform is drawn as a parabola, while in the fourth embodiment, the gate drive command VGC and the gate voltage VG rise linearly. When the gate drive command VGC and the gate voltage VG rise linearly, even if the Miller voltage changes due to the change of the main circuit current, a constant gate drive capability is maintained. Therefore, compared with the second embodiment, the fourth embodiment further improves the robustness against the change of the main circuit current.

[0075] In addition, constant current diodes have less temperature dependence than resistors, so the robustness against temperature changes is further improved.

[0076] The present application describes various exemplary embodiments and examples, but various features, forms, and functions described in one or more embodiments are not limited to application in specific embodiments, and can be applied to the embodiments alone or in various combinations.

[0077] Therefore, numerous variations not shown in the examples are conceivable within the scope of the technology disclosed in the present application, including, for example, the case where at least one component is deformed, the case where at least one component is added or omitted, and the case where at least one component is extracted and combined with components of other embodiments.

[0078] Explanation of symbols

[0079] 10, 40: constant output circuit; 11, 21: resistor; 20, 50: instruction generating circuit; 22: Zener diode; 23, 42: capacitor; 30: complementary emitter follower circuit; 83, 831: connection point; 41, 51: constant current diode; 29, 81: diode; 82, 821, 822: current limiting element; 92: semiconductor switching element; 92A: upper semiconductor switching element; 92B: lower semiconductor switching element; 100, 100A, 100B, 200, 300, 301, 400: gate driving device; Vin: input signal.

Claims

1. A gate driving device, characterized in that: have: An instruction generation circuit generates and outputs a gate drive instruction according to an input signal; A constant output circuit connected in parallel with the instruction generation circuit, outputting a constant voltage signal or a constant current signal according to an input signal; an amplifier circuit for amplifying the gate drive instruction; as well as A current limiting element is provided at the input side or the output side of the amplifier circuit to suppress the reverse flow of current. The gate driving device applies a gate driving voltage obtained by synthesizing the gate driving command and the constant voltage signal or the constant current signal to a gate terminal of the semiconductor switching element.

2. The gate driving device according to claim 1, wherein: The command generation circuit includes a constant voltage element that clamps the gate drive command at a constant voltage that is lower than a power supply voltage of the amplifier circuit, and maintains the gate drive command at the constant voltage.

3. The gate driving device according to claim 1 or 2, wherein: The command generation circuit includes an RC resonance circuit including a capacitor and a resistor connected in parallel with each other.

4. The gate driving device according to claim 1 or 2, wherein: The command generation circuit makes a temporal change of the gate voltage of the semiconductor switch element constant when the gate voltage of the semiconductor switch element rises.

5. The gate driving device according to claim 1 or 2, wherein: The command generation circuit includes a constant current element and a capacitor connected in parallel to each other.

6. The gate driving device according to any one of claims 1 to 5, wherein: The current limiting element is provided between the command generating circuit and the input side of the amplifier circuit, and a connection point connected to the output end of the constant output circuit is provided between the current limiting element and the input side of the amplifier circuit.

7. The gate driving device according to any one of claims 1 to 5, wherein: The current limiting element is provided between the output side of the amplifier circuit and the gate terminal, and a connection point connected to the output end of the constant output circuit is provided between the current limiting element and the gate terminal.

8. The gate driving device according to any one of claims 1 to 7, wherein: The current limiting element includes at least one of a resistor and a reactor.

9. The gate driving device according to claim 2, wherein: When the output current of the constant output circuit is set to Iconst, the output current of the command generation circuit is set to Iact, the gate drive voltage is set to Vgate, and the constant voltage is set to Vz, equation (1) is satisfied: [Mathematical formula 1] 10. The gate driving device according to claim 2 or 9, wherein: The constant voltage element is a Zener diode having a breakdown voltage of the constant voltage.

11. The gate driving device according to any one of claims 2, 9 and 10, wherein: The constant voltage is the same as a Miller voltage of the semiconductor switching element.

12. The gate driving device according to any one of claims 1 to 11, wherein: The amplifier circuit is a complementary emitter follower circuit or a complementary source follower circuit.

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