Method for automatic recognition of processing defects of single crystal silicon polished wafer COP
By partitioning silicon wafers and calculating the ratio of defect mean to standard deviation, COP and processing defects on single-crystal silicon polished wafers can be automatically identified, solving the problem of difficult identification in existing technologies, improving identification accuracy, and optimizing crystal pulling conditions.
Patent Information
- Application Number
- CN202411860186.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-17
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2044-12-17
AI Technical Summary
Existing technologies struggle to effectively identify and distinguish between crystal-native defects (COP) and processing defects on single-crystal silicon polished wafers, leading to a high misjudgment rate and impacting product disposal decisions.
By dividing the silicon wafer into 12 sector regions and three annular regions, the mean and standard deviation of the number of defects in each region are calculated. The COP mode is determined by the ratio of the standard deviation to the mean. Combined with the results of single-chip and stacked image determination, automatic identification is achieved using a programming language.
It enables batch automatic identification of COP and processing defects in single-crystal silicon polished wafers, improves identification accuracy, reduces misjudgments, and provides an optimization reference for crystal pulling conditions.
Smart Images

Figure CN119738527B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of Czochralski silicon single crystal technology, specifically to an automatic identification method for COP and processing defects in polished single crystal silicon wafers. Background Technology
[0002] There are three main types of defects on the surface of semiconductor silicon single crystal polished wafers: (1) Crystal Original Pit (COP); (2) Polishing Induced Defect (PID); (3) Particles; these three types of defects are collectively referred to as LLS (Laser Local Scattering).
[0003] When the number of LLS exceeds the specification, two types of disposal measures are involved: (1) downgrading or scrapping; (2) re-polishing or re-washing. Failures caused by COP require downgrading or scrapping (COP defects exist on the surface and inside the silicon wafer and cannot be improved by re-polishing or re-washing).
[0004] Defects caused by PID require re-polishing; defects caused by particles require re-washing. A challenge in actual production is that identifying the LLS failure mode of silicon wafers is difficult for field operators, often leading to improper handling due to misidentification.
[0005] The COP (Coarse Angle Phenomenon) patterns of polished silicon wafers can be classified into the following four types: (1) central aggregation; (2) symmetrical distribution around the outer ring; (3) simultaneous existence of central aggregation and symmetrical distribution around the outer ring; and (4) full-surface distribution. Whether COP appears on the surface of the silicon wafer and what type of COP appears depends on the crystal pulling conditions of the crystal rod position where the silicon wafer is located. The crystal pulling conditions include pulling speed and thermal field.
[0006] Regardless of the specific method, COP (Cellular Optical Particle) shares a common characteristic: its distribution is centrosymmetric around the center of the silicon wafer. This characteristic depends on the Czochralski method of silicon single crystal growth (axisymmetric thermal field distribution and rotational pulling growth method). In contrast, defects and particles resulting from silicon wafer processing are randomly distributed and do not exhibit centrosymmetric distribution characteristics.
[0007] The patents CN101460665A, JP5029514B2, and CN101466876B published by the Japanese company SUMCO. SUMCO's patents divide the silicon wafer into several circular regions and determine whether it is a COP (Central Optical Surface) defect mode based on the distribution of defects in each ring. However, SUMCO's patents do not utilize the central symmetry characteristic of COP, and therefore cannot effectively eliminate the influence of silicon wafer processing abnormalities on COP mode determination, thus having a higher possibility of misjudgment. Summary of the Invention
[0008] This invention primarily addresses the shortcomings of existing technologies by providing an automatic identification method for COP (Crystal Occlusion) and processing defects in polished monocrystalline silicon wafers. Through programming languages, it achieves batch-based automatic judgment of processing defects and COP defects, thereby solving the problems of difficulty in failure mode identification and improper product handling in actual production. Statistical analysis of the occurrence of COP defects in crystal rods provides important reference for adjusting and optimizing crystal pulling conditions.
[0009] The above-mentioned technical problems of the present invention are mainly solved by the following technical solutions:
[0010] An automatic identification method for COP and processing defects of single-crystal silicon polished wafers includes the following steps:
[0011] Step 1: Divide the silicon wafer into 12 sector-shaped regions with an angle of 30°.
[0012] Step 2: Divide the silicon wafer into three annular regions with radii of 0-50mm, 50mm-100mm, and 100mm-150mm respectively.
[0013] Step 3: Define the coordinate boundaries of each zone based on the division methods in Step 1 and Step 2.
[0014] Step 4: Based on the coordinate file of the particle detection, assign all defects to their respective regions.
[0015] Step 5: Count the number of defects in each region.
[0016] Step 6: After removing the maximum and minimum values of the number of defects in each zone, calculate the mean and standard deviation of Zone1, Zone2, and Zone3 respectively.
[0017] Step 7: The standard for determining whether a Zone is in COP mode is that the standard deviation / mean is <0.20; otherwise, it is a processing defect.
[0018] As a preferred option, if either Zone1 or Zone3 meets the COP criterion, then the silicon wafer is in COP mode.
[0019] As a preferred option, further determining the subdivision mode of COP is helpful for optimizing and adjusting the crystal pulling process.
[0020] Preferably, when Zone 1 is determined to be a COP pattern, it is classified as a center-clustered COP pattern; when Zone 3 is determined to be a COP pattern, it is classified as an outer-ring symmetrical distribution COP pattern; when Zone 1 and Zone 3 meet the COP criteria, but Zone 2 does not, it is classified as a center-clustered and outer-ring symmetrical distribution COP pattern; when Zone 1, Zone 2, and Zone 3 all meet the COP criteria, it is classified as a full-area COP pattern; when Zone 2 is determined to be a COP pattern, it is classified as a processing defect.
[0021] As a preferred method, in actual production, one box is considered as a sub-batch, and the entire box of silicon wafers is stacked and judged. The corresponding crystal rod length is approximately 25mm. By statistically analyzing the judgment results of all sub-batch in a single crystal rod, the position of the COP crystal segment in the crystal rod is determined, thus providing an important reference for adjusting and optimizing the crystal pulling conditions.
[0022] As a preferred method, the coordinates of several consecutive silicon wafers are superimposed, and then the partition counting and judgment are performed according to the above method, thereby increasing the accuracy of COP mode judgment.
[0023] As a preferred option, when there are many processing defects, stacking the entire box will make the defects in the stacked image tend to be evenly distributed, so that the average value of the Stdev standard deviation / Average is less than the judgment standard value, thus causing the result after stacking the image to be misjudged as COP.
[0024] As a preferred approach, the results of both single-item and overlay determinations are considered. When the results of the two determinations are inconsistent, manual intervention is used for determination.
[0025] The present invention can achieve the following effects:
[0026] This invention provides an automatic identification method for COP (Chip Occlusion) and processing defects in polished monocrystalline silicon wafers. Compared with existing technologies, this method uses a programming language to achieve batch automatic judgment of processing defects and COP defects, thereby solving the problems of difficulty in failure mode identification and improper product handling in actual production. Statistical analysis of the occurrence of COP defects in crystal rods provides important reference for adjusting and optimizing crystal pulling conditions. Attached Figure Description
[0027] Figure 1 This is a map of the 16 slightly centrally aggregated COP silicon wafers of the present invention.
[0028] Figure 2 This is a map diagram of the stacked 16 slightly aggregated COP silicon wafers of the present invention.
[0029] Figure 3 This is the determination result of the centrally aggregated COP of the present invention.
[0030] Figure 4 This is the outer ring symmetrical distribution COP diagram of the present invention.
[0031] Figure 5 This is the result of the outer ring symmetry type COP determination of the present invention.
[0032] Figure 6 This is a map of the continuous 10-center clustered + outer ring symmetrical partial COP of the present invention.
[0033] Figure 7 It is a Map diagram of the present invention after 10 consecutive central clustered + outer ring symmetrical partial COP overlay diagrams.
[0034] Figure 8 This is the determination result of the COP overlay diagram of 10 consecutive central clusters and outer ring symmetrical distributions in this invention.
[0035] Figure 9 This is a map diagram of the full-surface COP of the present invention.
[0036] Figure 10 This is the determination result of the full-surface COP situation in the present invention.
[0037] Figure 11 This is a defect map diagram caused by polishing abnormalities in this invention.
[0038] Figure 12 This is the determination result of the processing defects caused by polishing abnormalities in this invention.
[0039] Figure 13 This is a map of processing defects caused by polishing abnormalities in this invention.
[0040] Figure 14 This is the determination result of the processing defects caused by polishing abnormalities in this invention.
[0041] Figure 15 This is a single Map diagram of the LLS anomaly caused by the final cleaning anomaly in this invention.
[0042] Figure 16 This is a stacked diagram of the entire box showing the LLS abnormality caused by the final washing abnormality of the present invention.
[0043] Figure 17 This is the final determination result of the present invention regarding the processing defect caused by the washing abnormality.
[0044] Figure 18 This is a map showing the missing data in the abnormal areas of this invention.
[0045] Figure 19 This is the determination result when COP and processing defects coexist in the present invention. Detailed Implementation
[0046] The technical solution of the invention will be further described in detail below through embodiments and in conjunction with the accompanying drawings.
[0047] Example: Figure 1-19 As shown, an automatic identification method for COP and processing defects of a single-crystal silicon polished wafer includes the following steps:
[0048] Step 1: Divide the silicon wafer into 12 sector-shaped regions with an angle of 30°.
[0049] Step 2: Divide the silicon wafer into three annular regions with radii of 0-50mm, 50mm-100mm, and 100mm-150mm respectively.
[0050] Step 3: Define the coordinate boundaries of each zone based on the division methods in Step 1 and Step 2.
[0051] Step 4: Based on the coordinate file of the particle detection, assign all defects to their respective regions.
[0052] Step 5: Count the number of defects in each region.
[0053] Step 6: After removing the maximum and minimum values of the number of defects in each zone, calculate the mean and standard deviation of Zone1, Zone2, and Zone3 respectively.
[0054] The reason for removing the maximum and minimum values is that when processing defects (such as scratches, chemical residues, etc.) and COP coexist, the abnormal distribution of defects caused by processing defects will lead to a large standard deviation, thus interfering with the determination of the COP pattern. If the silicon wafer only has defects caused by processing and no COP, since the defects caused by processing defects are randomly distributed, the standard deviation will still be large after removing the maximum and minimum values, so it will not affect the determination result.
[0055] Step 7: The criterion for determining whether a Zone is in COP mode is that the standard deviation / mean is <0.20; otherwise, it is a processing defect. If either Zone 1 or Zone 3 meets the COP criterion, then the silicon wafer is in COP mode. Further determination of the COP sub-mode is helpful for optimizing and adjusting the crystal pulling process.
[0056] When Zone1 is determined to be in COP mode, it is determined to be a central clustered COP mode.
[0057] When Zone3 is determined to be in COP mode, it is determined to be an outer ring symmetrical distribution type of COP.
[0058] If Zone1 and Zone3 meet the COP criteria, while Zone2 does not, then it is a COP pattern characterized by central clustering and symmetrical outer ring distribution.
[0059] If Zone1, Zone2, and Zone3 all meet the COP criteria, then it is determined to be a full-face COP mode.
[0060] When Zone2 is identified as COP mode, it is determined to be a processing defect.
[0061] In actual production, one box is considered a sub-batch, and one box contains 25 silicon wafers. A whole box of silicon wafers is stacked and then judged; the corresponding crystal rod length is approximately 25mm. By statistically analyzing the judgment results of all sub-batches within a single crystal rod, the position of the COP segment within the crystal rod is determined, providing important reference for adjusting and optimizing crystal pulling conditions.
[0062] By superimposing the coordinates of several consecutive silicon wafers and then performing partitioned counting and judgment according to the method described above, the accuracy of COP mode judgment is increased. When the number of processing defects is large, stacking the entire wafer will cause the defects to tend to be evenly distributed after stacking, making the Stdev standard deviation / Average average value less than the judgment standard value, thus leading to the result of stacking being misjudged as COP. Combining the results of single-wafer judgment and stacking judgment, when the two judgment results are inconsistent, manual intervention is used for judgment.
[0063] The silicon wafer is divided into several sectors with equal angles, and then further divided into three annular regions with different radii. Whether a region exhibits a COP (Continuous Opportunity) pattern is determined by the uniformity of defect distribution across the sectors within each annular region. The uniformity is measured by the ratio of the standard deviation to the mean of the number of defects in each sector. A COP pattern is defined as a ratio below a certain value, while a pattern above this value is considered a silicon wafer processing defect. When calculating the mean and standard deviation for each annular region, the sectors with the highest and lowest defect counts are removed. This helps eliminate interference from silicon wafer processing anomalies in the COP pattern determination. Since the distribution of processing defects is random, removing the maximum and minimum values does not affect the defect determination result.
[0064] In summary, this automatic identification method for COP and processing defects in single-crystal silicon polished wafers, through programming language, enables batch automatic judgment of processing defects and COP defects, thereby solving the problems of difficulty in failure mode identification and improper product handling in actual production. Statistical analysis of the occurrence of COP defects in crystal rods provides important reference for the adjustment and optimization of crystal pulling conditions.
[0065] The above description is only a specific embodiment of the present invention, but the structural features of the present invention are not limited thereto. Any changes or modifications made by those skilled in the art within the scope of the present invention are covered by the patent scope of the present invention.
Claims
1. A method for automatic identification of single crystal silicon polished wafer COP and processing defects, characterized in that The method comprises the following steps: First step: divide the silicon wafer into 12 sectors with an angle of 30°; Second step: divide the silicon wafer into three annular regions, zone 1 with a diameter of 0-50 mm, zone 2 with a diameter of 50-100 mm, and zone 3 with a diameter of 100-150 mm; Third step: define the coordinate limits of each region according to the division modes of the first and second steps; Fourth step: attribute all Defects to each region according to the coordinate file of particle detection; Fifth step: count the number of Defects in each region; Sixth step: calculate the mean and standard deviation of zone 1, zone 2 and zone 3 after removing the maximum and minimum values of the number of Defects in each region; Seventh step: the judgment standard of a certain zone COP mode is that the standard deviation divided by the mean is less than 0.20, otherwise it is a processing defect; if one of zone 1 and zone 3 meets the COP judgment standard, the silicon wafer is a COP mode; further determine the sub-mode of COP, and the sub-division of COP mode is helpful for the optimization and adjustment of the crystal pulling process; When zone 1 is determined as a COP mode, it is determined as a center aggregation type COP mode; when zone 3 is determined as a COP mode, it is determined as an outer ring symmetric distribution type COP; when zone 1 and zone 3 meet the COP judgment standard and zone 2 does not meet the COP judgment standard, it is a center aggregation and outer ring symmetric distribution type COP mode; when zone 1, zone 2 and zone 3 all meet the COP judgment standard, it is determined as a full-face COP mode; when zone 1 and zone 3 do not meet the COP judgment standard and zone 2 meets the COP judgment standard, it is determined as a processing defect; when zone 1 and zone 3 do not meet the COP judgment standard and zone 2 meets the processing defect standard, it is determined as a processing defect.
2. The method of claim 1, wherein the method further comprises: determining a location of the processing defect on the single crystal silicon polished wafer COP. In actual production, a box is taken as a sub-batch, and the whole box of silicon wafers is stacked and determined; the corresponding crystal bar length is 25 mm, the position of the COP segment in the crystal bar is determined by statistical analysis of the determination results of all sub-batches in a crystal bar, thereby providing an important reference for the adjustment and optimization of the crystal pulling conditions.
3. The method of claim 1, wherein the method further comprises: determining a location of the processing defect on the single crystal silicon polished wafer COP. The coordinates of a plurality of continuous silicon wafers are stacked together, and then the partition counting and determination are performed according to the above method.
4. The method of claim 3, wherein the method further comprises: determining a location of the processing defect on the single crystal silicon polished wafer COP. When the number of processing defects is large, the Defects after stacking tend to be evenly distributed, so that the standard deviation divided by the mean is less than the judgment standard value, thereby causing the result after stacking to be misjudged as COP.
5. The method of claim 4, wherein the method further comprises: determining a location of the processing defect on the single crystal silicon polished wafer COP. When the determination results of single wafer and stacking are inconsistent, manual intervention is adopted for determination.
Citation Information
Patent Citations
Method of judging cop occurrence cause for single crystal silicon wafer
CN101460665A
Single-crystal silicon wafer COP evaluation method
CN101466876B
Surface defect detection method
CN109799240A
Wafer and defect detection method thereof
CN118583881A