A capacitive sensing unit and system

Abstract

The present invention discloses a capacitance sensing unit and system. The capacitance sensing unit includes a GM module, an integration and storage module, a quantization circuit module, and a counting module. The first input terminal of the GM module is used to receive a sensing signal characterizing the system to be measured. The second input terminal of the GM module is connected to a reference voltage. The first output terminal of the GM module is connected to the first input terminal to generate a first current. The second output terminal of the GM module outputs a second current having an adjustable ratio to the first current, and the adjustable ratio is used to amplify or attenuate the signal. The integration and storage module is connected to the second output terminal and is used to integrally store the current output by the GM module. The quantization circuit module is connected to the integration and storage module. The counting module is connected to the quantization circuit module and is used to count the output of the quantization circuit module. The present invention can achieve capacitance detection with a high signal-to-noise ratio under severe noise interference conditions.

Description

Technical Field

[0001] The present invention relates to the technical field of sensors, and particularly to a capacitive sensing unit and system. Background Art

[0002] With the development of technology, touch sensors have become an important human-computer interaction method due to their simplicity, directness, and user-friendliness. In electronic products such as mobile phones, tablets, wearable devices, computers, and display screens, capacitive touch has become the mainstream touch technology due to its advantages in durability, multi-touch, and portability.

[0003] In capacitive touch, touch sensing plays a key role in the touch experience, and its performance directly affects the sensitivity, accuracy, and anti-interference ability of touch. The touch sensing system faces various noise interferences during operation, mainly including liquid crystal display noise, charger noise, power grid noise, light interference, RF interference, etc. These noises have different frequency and amplitude characteristics.

[0004] In the prior art, the signal-to-noise ratio is mainly improved in two ways: one is to add a filter to filter or attenuate the noise, and the other is to operate the touch sensing system in a non-noise frequency range to avoid or reduce the noise impact. However, these solutions have obvious deficiencies: since the noise interference is often much larger than the signal amplitude in practical applications, in order to measure and filter out the noise interference, either the signal needs to be reduced before testing, or a very large measurement range is required. Both of these methods will significantly increase the system cost and it is difficult to ensure the accuracy of detection.

[0005] In addition, when the existing capacitive detection circuit performs signal quantization, it often uses a fixed-rate quantization method, which results in a long quantization time when processing a large signal, reducing the detection efficiency of the system. Especially in the presence of large noise interference, it is difficult for the detection system to quickly and accurately complete signal quantization, affecting the touch performance.

[0006] Therefore, there is an urgent need to propose a capacitive sensing unit and system to solve the above problems. Summary of the Invention

[0007] The object of the present invention is to propose a capacitive sensing unit and system that can achieve high signal-to-noise ratio capacitive detection under severe noise interference.

[0008] To solve the above technical problems, the present invention provides a capacitive sensing unit, including a GM module, an integration storage module, a quantization circuit module, and a counting module;

[0009] The first input terminal of the GM module is used to receive a sensing signal representing the system under test. The second input terminal of the GM module is connected to a reference voltage. The first output terminal of the GM module is connected to the first input terminal to generate a first current. The second output terminal of the GM module outputs a second current having an adjustable ratio to the first current, and the adjustable ratio is used to amplify or reduce the signal.

[0010] The integration and storage module is connected to the second output terminal and is used to integrally store the current output by the GM module.

[0011] The quantization circuit module is connected to the integration and storage module and is used to quantize the charge on the integration and storage module and control the voltage on the integration and storage module to be stable within a set range.

[0012] The counting module is connected to the quantization circuit module and is used to count the output of the quantization circuit module to obtain a count value representing the capacitance value of the system under test.

[0013] Further, the integration and storage module includes a switching circuit and an integration capacitor.

[0014] The switching circuit is connected to the second output terminal and is used to convert the second current into a co-directional current under the control of a clock signal. The integration capacitor is connected to the switching circuit and is used to integrate the co-directional current.

[0015] Further, the quantization circuit module includes a plurality of comparison voltages and a plurality of current sources.

[0016] The plurality of comparison voltages includes a target voltage. The plurality of current sources are used to charge and discharge the integration and storage module according to the magnitude relationship between the voltage on the integration and storage module and the plurality of comparison voltages, so that the voltage on the integration and storage module is stable near the target voltage.

[0017] Further, the quantization circuit module further includes a plurality of voltage comparators and a current source control circuit.

[0018] The first input terminals of the plurality of voltage comparators are connected to the integration and storage module. The second input terminals of the plurality of voltage comparators are respectively connected to the plurality of comparison voltages and are used to compare the magnitude relationship between the voltage on the integration and storage module and the plurality of comparison voltages. The current source control circuit is used to control the number of turned-on current sources according to the difference between the voltage on the integration and storage module and the target voltage.

[0019] Further, the plurality of current sources includes a discharge current source and a charge current source.

[0020] The discharge current source is used to discharge the integration storage module, and the charging current source is used to charge the integration storage module.

[0021] Further, when the voltage on the integration storage module is higher than the target voltage, the discharge current source discharges; when the voltage on the integration storage module is lower than the target voltage, the charging current source charges.

[0022] In addition, the present invention also provides a capacitance sensing system, which includes the capacitance sensing unit as described above, and further includes a system under test and a data processing module; the system under test is connected to the GM module; the data processing module is used to perform data analysis and processing on the count value output by the counting module.

[0023] Further, the data analysis and processing includes at least one of data storage, data filtering, and data extraction.

[0024] Further, the system under test includes a mutual capacitance system; the mutual capacitance system includes a transmitting electrode TX, a receiving electrode RX, a transmitting capacitance Ctx, a mutual capacitance Cm, and a receiving capacitance Crx;

[0025] Both ends of the mutual capacitance Cm are respectively connected to the transmitting electrode TX and the receiving electrode RX; the end of the receiving electrode RX far from the mutual capacitance Cm is connected to the GM module; one end of the transmitting capacitance Ctx is connected to the transmitting electrode TX, and the other end is grounded; one end of the receiving capacitance Crx is connected to the receiving electrode RX, and the other end is grounded.

[0026] Further, the system under test includes a self-capacitance system; the self-capacitance system includes a receiving electrode RX and a receiving capacitance Crx; the receiving electrode RX is connected to the first input end of the GM module, and one end of the receiving capacitance Crx is connected to the receiving electrode RX, and the other end is grounded.

[0027] By the above technical solutions, the present invention has the following beneficial effects:

[0028] The sensing signal of the system under test is converted into a current by the GM module, the second output end of the GM module outputs a second current proportional to the first current, integrated and stored by combining with the integration storage module, and the charge on the integration storage module is quantified by the quantization circuit module, while controlling the voltage on the integration storage module to be stable within a set range, and finally the count value representing the capacitance value of the system under test is obtained through the counting module, realizing stable and reliable capacitance detection.

[0029] Since the GM module can amplify the signal by A times, significantly improving the signal volume and signal-to-noise ratio; the quantization circuit module uses multiple current sources to control the charge and discharge of the integration storage module (i.e., adopts the current control method of Kn×Iunit), expanding the quantization range without increasing the area of the integration capacitor, which not only ensures the small area advantage of the chip but also reduces the system cost; the current is converted into a co-directional current for integration through the switch circuit, and the number of turned-on current sources is controlled according to the difference between the voltage on the integration storage module and the target voltage, achieving a faster quantization speed; at the same time, the system supports two detection methods, mutual capacitance and self-capacitance, with a wide range of applications. Description of the Drawings

[0030] Figure 1 Schematic diagram of the overall structure of the capacitance sensing system in an embodiment of the present invention;

[0031] Figure 2 Timing diagram of the voltage and current at the main nodes of the mutual capacitance detection in the capacitance sensing system in an embodiment of the present invention;

[0032] Figure 3 Schematic diagram of the structure of the capacitance sensing system in another embodiment of the present invention;

[0033] Figure 4 Timing diagram of the voltage and current at the main nodes of the self-capacitance detection in the capacitance sensing system in another embodiment of the present invention;

[0034] Figure 5 Schematic diagram of the structure of the quantization circuit module in the capacitance sensing system in an embodiment of the present invention;

[0035] Figure 6 Schematic diagram of the voltage on the integration capacitor in the capacitance sensing system in an embodiment of the present invention. Detailed Embodiments

[0036] The following will describe a capacitance sensing unit and system of the present invention in more detail with reference to the drawings, which show the preferred embodiments of the present invention. It should be understood that those skilled in the art can modify the present invention described herein while still achieving the advantageous effects of the present invention. Therefore, the following description should be understood as a broad guidance for those skilled in the art and not as a limitation to the present invention.

[0037] In the following paragraphs, the present invention will be described more specifically by way of example with reference to the drawings. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are all in a very simplified form and use non-precise scales, only for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention.

[0038] Such as Figure 1 And Figure 3As shown in the figure, an embodiment of the present invention provides a capacitance sensing unit, including: a GM module, an integration storage module, a quantization circuit module (Quantization Circuit), and a counter module (Counter).

[0039] Specifically, the first input terminal of the GM module is used to receive a sensing signal Vrx representing the system to be measured, the second input terminal of the GM module is connected to a reference voltage Vcm, the first output terminal of the GM module is connected to the first input terminal to generate a first current Iout, and the second output terminal of the GM module outputs a second current A×Iout that has an adjustable ratio to the first current. The adjustable ratio is used to amplify or reduce the signal. Here, A is an adjustable amplitude modulation coefficient, and this ratio can be set according to the actual situation, either amplified or reduced, so as to be able to scale the signal (i.e., the sensing signal Vrx; in the mutual capacitance mode, the sensing signal Vrx is the sensing signal on the receiving electrode RX; in the self-capacitance mode, the sensing signal Vrx is the sensing signal on the receiving electrode RX). The integration storage module is connected to the second output terminal and is used to integrally store the current output by the GM module; the quantization circuit module is connected to the integration storage module and is used to quantify the charge on the integration storage module and control the voltage Vint on the integration storage module to be stable within a set range; the counter module is connected to the quantization circuit module and is used to count the output of the quantization circuit module to obtain a count value representing the capacitance value of the system to be measured.

[0040] In one embodiment, the GM module includes a transconductance operational amplifier. The first input terminal is the inverting input terminal of the operational amplifier and is connected to the system to be measured; the second input terminal is the non-inverting input terminal of the operational amplifier and is coupled to the reference voltage Vcm; the first output terminal is connected to the first input terminal to generate a first current Iout; the second output terminal generates a second current A×Iout, that is, the second current A×Iout at the second output terminal is a copy of the first current Iout at the first input terminal, and the current magnitude can be scaled by A times. Here, A is an adjustable amplitude modulation coefficient. By adjusting A, the signal can be amplified to improve the signal-to-noise ratio, but signal amplification will increase the cost of the circuit, such as chip area, working duration, etc.

[0041] In addition, the signals specifically connected to the first input terminal and the second input terminal of the GM module may vary according to different working modes. For example, in the self-capacitance mode, the first input terminal is connected to the receiving electrode RX for receiving the voltage change on the receiving electrode RX. For another example, in the mutual-capacitance mode, the first input terminal is connected to the receiving electrode RX for receiving the voltage change coupled from the transmitting electrode TX to the receiving electrode RX. Regardless of which working mode, the generated first current Iout is related to the capacitance in the system under test and the swing of the applied excitation signal. For example, in the mutual-capacitance mode, the mutual capacitance Cm and the charge Cm×ΔVtx generated by the swing ΔVtx of the excitation signal of the transmitting electrode are provided by the first current Iout.

[0042] In one embodiment, the integration and storage module includes a switch circuit CH and an integration capacitor C1. Specifically, the switch circuit CH is connected to the second output terminal and is used to convert the second current A×Iout into a unidirectional current under the control of a clock signal CK; the integration capacitor C1 is connected to the switch circuit CH and is used to integrate the unidirectional current.

[0043] In this embodiment, the switch circuit CH is connected to the second output terminal of the GM module and is simultaneously coupled to the integration capacitor C1 and the quantization circuit module. The main purpose of the switch circuit CH is to demodulate the current with positive and negative directions generated by the GM module under the control of the clock signal CK, convert it into a unidirectional current, and then send it to the integration capacitor C1 for integration. The integration capacitor C1 is used to integrate the current demodulated by the switch circuit CH. The size of the integration capacitor C1 determines the size of the integrable signal. However, it should be noted that the capacitor consumes a large area in the chip.

[0044] In one embodiment, the quantization circuit module includes a plurality of comparison voltages and a plurality of current sources. Specifically, the plurality of comparison voltages include a target voltage, and the plurality of current sources are used to charge and discharge the integration and storage module according to the magnitude relationship between the voltage Vint on the integration and storage module and the plurality of comparison voltages, so that the voltage Vint on the integration and storage module is stabilized near the target voltage.

[0045] Furthermore, the quantization circuit module further includes a plurality of voltage comparators (i.e., Figure 5CMP1, CMP2, CMP3, CMP4, and CMP5) and a current source control circuit. Specifically, the first input terminals of the multiple voltage comparators are connected to the integration storage module, and the second input terminals of the multiple voltage comparators are respectively connected to the multiple comparison voltages, for comparing the magnitude relationship between the voltage Vint on the integration storage module and the multiple comparison voltages; the current source control circuit is used to control the number of turned-on current sources according to the difference between the voltage Vint on the integration storage module and the target voltage.

[0046] In this embodiment, the multiple current sources include a discharge current source and a charging current source. Specifically, the discharge current source is used to discharge the integration storage module, and the charging current source is used to charge the integration storage module.

[0047] Preferably, when the voltage Vint on the integration storage module is higher than the target voltage, the discharge current source discharges; when the voltage Vint on the integration storage module is lower than the target voltage, the charging current source charges.

[0048] Preferably, the current magnitudes of the multiple current sources satisfy In = Kn × Iunit, where Kn is a positive integer and Iunit is a reference current; the ratio of the current magnitudes of adjacent levels in the discharge current source is a first set threshold (for example, 2), and the ratio of the current magnitudes of adjacent levels in the charging current source is a second set threshold (for example, 2).

[0049] In this embodiment, Figure 2 is the voltage and current waveform diagram of the main nodes when working in the mutual capacitance mode in this embodiment. As can be seen from the figure, when the transmitting electrode TX inputs an excitation signal VTX, a corresponding voltage change Vrx will be generated on the receiving electrode RX. The GM module converts this voltage change into a first current Iout and a second current A × Iout. After demodulation by the switch circuit CH, the voltage Vint on the integration capacitor C1 will change accordingly. The quantization circuit module controls the charge and discharge currents to make Vint finally stabilize near the target voltage Vref3.

[0050] In this embodiment, Figure 4It is a waveform diagram of the voltage and current of the main node when working in the self-capacitance mode in another embodiment. As can be seen from the figure, this figure shows the voltage and current changes on each main node in the self-capacitance mode, including the change of the reference voltage Vcm, the voltage signal Vrx generated on the receiving electrode RX, the current Iout generated by the GM module and its amplified current A×Iout, and the voltage Vint change on the integration capacitor C1. The figure shows that when the reference voltage Vcm undergoes high and low jumps, due to the existence of the self-capacitance Crx from the receiving electrode to the ground, a charge change is generated on the receiving electrode RX, which is converted into a current output through the GM module, and finally the voltage Vint on the integration capacitor is stabilized near the target voltage Vref3 through the control of the quantization circuit module.

[0051] Figure 6 This is a schematic diagram of the control of the voltage Vint on the integration capacitor C1 by the quantization circuit module in this embodiment. The solid line in the figure represents the change process of Vint when there are multiple levels of charge and discharge control: when Vint is in different voltage ranges, by controlling the opening of different numbers of current sources, Vint changes at different slopes and finally quickly stabilizes near the target voltage Vref3. The dashed line in the figure represents the change process of Vint when only a single speed of charge and discharge is adopted, which requires a longer quantization time compared with it.

[0052] In a specific example, as Figure 5 and Figure 6 shown, while the integration capacitor C1 integrates the current, the quantization circuit module is also performing quantization synchronously, and removing or supplementing the quantized charge from the integration capacitor C1 to prevent the voltage on the integration capacitor C1 from being too high or too low.

[0053] Specifically, when the voltage Vint on the integration capacitor C1 is higher or lower than a certain comparison voltage, the quantization circuit module charges or discharges the integration capacitor C1 at a corresponding speed. The farther Vint deviates from the target voltage, the faster the charging or discharging speed, and finally Vint is stabilized near the target comparison voltage.

[0054] For example, set comparison voltages Vref1 > Vref2 > Vref3 > Vref4 > Vref5, where Vref3 is the target voltage, and the number and magnitude of the comparison voltages can be set according to actual needs. When Vint > Vref1, turn on currents I1, I2, I3 to discharge the integration capacitor C1; when Vref1 > Vint > Vref2, turn on currents I2, I3 to discharge the integration capacitor C1; when Vref2 > Vint > Vref3, turn on current I3 to discharge the integration capacitor C1; when Vref3 > Vint > Vref4, turn on current I4 to charge the integration capacitor C1; when Vref4 > Vint > Vref5, turn on currents I4, I5 to charge the integration capacitor C1; when Vref5 > Vint, turn on currents I4, I5, I6 to charge the integration capacitor C1. Among them, the current magnitudes of each current source satisfy In = Kn × Iunit (Kn is a positive integer), and the directions of currents I1, I2, I3 are opposite to those of currents I4, I5, I6. Preferably, I3 = I4 = Iunit. The minimum charge / discharge time unit is tclk, and preferably the minimum charge / discharge charge amount is Iunit × tclk, so that Vint finally stabilizes near Vref3 with a deviation of Iunit × tclk / C1. Among them, Figure 1 and Figure 3 as shown, CLK is the system clock signal, and tclk is the period of the CLK clock signal, that is, the minimum charge / discharge time unit.

[0055] Continue to refer to Figure 6 as shown, when Vint is in different voltage intervals, it will change at different slopes, that is, the quantization circuit charges and discharges at different speeds. The farther Vint deviates from the target voltage Vref3, the faster the charge / discharge speed, and finally it stabilizes near Vref3. By controlling the current direction and magnitude in the quantization circuit, not only the quantization speed and accuracy, and the charge / discharge speed are controlled, preventing the voltage on the integration capacitor C1 from being too high or too low, but also the area required for the integration capacitor C1 is reduced, the quantizable range is increased, and the quantization speed is improved.

[0056] In summary, in this embodiment, by controlling the current direction and magnitude in the quantization circuit module, the quantization speed and accuracy, and the charge / discharge speed are controlled, preventing the voltage on the integration capacitor C1 from being too high or too low, reducing the area of the integration capacitor C1, increasing the quantizable range, and improving the quantization speed.

[0057] In addition, continue to refer to Figure 1 and Figure 3 as shown, this embodiment also proposes a capacitance sensing system, including the capacitance sensing unit as described above, and further including a system under test and a data processing module (Digital Processor).

[0058] Specifically, the system to be measured is connected to the GM module; the data processing module is used to perform data analysis and processing on the count value output by the counting module.

[0059] In this embodiment, the data analysis and processing includes at least one of data storage, data filtering, and data extraction.

[0060] In a specific example, the system to be measured includes a mutual capacitance system; the mutual capacitance system includes a transmitting electrode TX, a receiving electrode RX, a transmitting capacitance Ctx, a mutual capacitance Cm, and a receiving capacitance Crx;

[0061] Specifically, two ends of the mutual capacitance Cm are respectively connected to the transmitting electrode TX and the receiving electrode RX; one end of the receiving electrode RX far from the mutual capacitance Cm is connected to the GM module; one end of the transmitting capacitance Ctx is connected to the transmitting electrode TX, and the other end is grounded; one end of the receiving capacitance Crx is connected to the receiving electrode RX, and the other end is grounded.

[0062] In another specific example, the system to be measured includes a self - capacitance system; the self - capacitance system includes a receiving electrode RX and a receiving capacitance Crx.

[0063] Specifically, the receiving electrode RX is connected to the first input end of the GM module, and one end of the receiving capacitance Crx is connected to the receiving electrode RX, and the other end is grounded.

[0064] In this embodiment, continue to refer to Figure 2 and Figures 4 - 6 As shown, in the self - capacitance mode, the inverting input terminal of the operational amplifier is directly connected to the receiving electrode RX. When the reference voltage Vcm undergoes a high - low jump, due to the existence of the self - capacitance from the receiving electrode to the ground (i.e., the receiving capacitance Crx of the self - capacitance system), a charge change Crx×ΔVcm is generated. The GM module converts this charge change into a current output.

[0065] In the mutual - capacitance mode, a mutual capacitance Cm is formed between the transmitting electrode TX and the receiving electrode RX due to the existence of a dielectric. When the TX inputs an excitation signal with an amplitude of VTX, due to the existence of the mutual capacitance Cm, a charge change Cm×VTX is generated at the RX end. The GM module also converts this charge change into a current output. External touch will change the mutual capacitance value Cm.

[0066] Therefore, in the self - capacitance mode, the generated current is related to the change ΔVcm of the receiving capacitance Crx and the reference voltage Vcm; in the mutual - capacitance mode, the generated current is related to the mutual capacitance Cm and the transmitting - electrode excitation signal VTX. The switch circuit CH demodulates the forward and reverse currents generated by the GM module into co - directional currents under the control of the clock signal CK and sends them to the integration capacitor C1 for integration. The quantization - circuit module quantizes the charge on the integration capacitor C1.

[0067] For example, five reference voltages are set as Vref1 > Vref2 > Vref3 > Vref4 > Vref5, and Vref3 is the target voltage. When the voltage Vint on the integration capacitor C1 is in different intervals, different combinations of current sources will be turned on:

[0068] Vint > Vref1: Turn on I1, I2, and I3 for discharging;

[0069] Vref1 > Vint > Vref2: Turn on I2 and I3 for discharging;

[0070] Vref2 > Vint > Vref3: Turn on I3 for discharging;

[0071] Vref3 > Vint > Vref4: Turn on I4 for charging;

[0072] Vref4 > Vint > Vref5: Turn on I4 and I5 for charging;

[0073] Vref5 > Vint: Turn on I4, I5, and I6 for charging.

[0074] The magnitudes of the current sources satisfy In = Kn×Iunit, and preferably I3 = I4 = Iunit. The minimum charge - and - discharge time is tclk, and the minimum charge - and - discharge charge amount is Iunit×tclk. Through multi - level current control, Vint is quickly stabilized near Vref3, and the deviation is Iunit×tclk / C1. Finally, the counting module counts and accumulates the output of the quantization circuit to obtain a count value related to the capacitance value to be measured.

[0075] It can be seen that in this embodiment, the signal - to - noise ratio is improved by A - fold amplification of the GM module, the quantization range is expanded and the quantization speed is increased through multi - level quantization current control. At the same time, the requirement for the area of the integration capacitor C1 is reduced, and it has a good cost advantage. In addition, this embodiment can work effectively in both the self - capacitance and mutual - capacitance modes, achieving high - sensitivity and high - precision touch sensing.

[0076] In summary, a capacitance - sensing unit and system proposed by the present invention have the following advantages:

[0077] The sensing signal of the system to be measured is converted into current by the GM module. The second output terminal of the GM module outputs a second current proportional to the first current. The integration storage is carried out in combination with the integration storage module, and the charge on the integration storage module is quantified by the quantization circuit module. At the same time, the voltage on the integration storage module is controlled to be stable within a set range. Finally, the count value representing the capacitance value of the system to be measured is obtained through the counting module, realizing stable and reliable capacitance detection.

[0078] Since the GM module can amplify the signal by A times, significantly improving the signal volume and signal-to-noise ratio; the quantization circuit module uses multiple current sources to control the charge and discharge of the integration storage module (i.e., the current control method of Kn×Iunit), expanding the quantization range without increasing the area of the integration capacitor, which not only ensures the small area advantage of the chip but also reduces the system cost; the current is converted into a co-directional current for integration through the switch circuit, and the number of current sources turned on is controlled according to the difference between the voltage on the integration storage module and the target voltage, realizing a faster quantization speed; at the same time, the system supports two detection methods of mutual capacitance and self-capacitance, with a wide range of applications.

[0079] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these changes and modifications.

Claims

1. A capacitive sensing unit, characterized in that: It includes GM module, integral storage module, quantization circuit module and counting module; The first input terminal of the GM module is used to receive a sensing signal representing the system to be tested, the second input terminal of the GM module is connected to a reference voltage, the first output terminal of the GM module is connected to the first input terminal to generate a first current, and the second output terminal of the GM module outputs a second current having an adjustable ratio with the first current, and the adjustable ratio is used to amplify or reduce the signal; The integral storage module is connected to the second output terminal and is used to integrate and store the current output by the GM module; The quantization circuit module is connected to the integration storage module, and is used to quantize the charge on the integration storage module and control the voltage on the integration storage module to be stable within a set range; the quantization circuit module includes a plurality of comparison voltages and a plurality of current sources; the plurality of comparison voltages include a target voltage, and the plurality of current sources are used to charge and discharge the integration storage module according to the magnitude relationship between the voltage on the integration storage module and the plurality of comparison voltages, so that the voltage on the integration storage module is stable near the target voltage; the current magnitude of the plurality of current sources satisfies In=Kn×Iunit, where Kn is a positive integer and Iunit is a reference current; The counting module is connected to the quantization circuit module and is used to count the output of the quantization circuit module to obtain a count value representing the capacitance value of the system to be measured.

2. The capacitive sensing unit according to claim 1, wherein: The integral storage module includes a switch circuit and an integral capacitor; The switch circuit is connected to the second output terminal and is used to convert the second current into a unidirectional current under the control of a clock signal; the integration capacitor is connected to the switch circuit and is used to integrate the unidirectional current.

3. The capacitive sensing unit according to claim 1, wherein: The quantization circuit module also includes a plurality of voltage comparators and a current source control circuit; The first input ends of the multiple voltage comparators are connected to the integral storage module, and the second input ends of the multiple voltage comparators are respectively connected to the multiple comparison voltages, so as to compare the magnitude relationship between the voltage on the integral storage module and the multiple comparison voltages; the current source control circuit is used to control the number of current sources turned on according to the difference between the voltage on the integral storage module and the target voltage.

4. The capacitive sensing unit according to claim 1, wherein: The multiple current sources include a discharge current source and a charge current source; The discharging current source is used to discharge the integral storage module, and the charging current source is used to charge the integral storage module.

5. The capacitive sensing unit according to claim 4, wherein: When the voltage on the integral storage module is higher than the target voltage, the discharging current source performs discharging; when the voltage on the integral storage module is lower than the target voltage, the charging current source performs charging.

6. A capacitance sensing system, comprising the capacitance sensing unit according to any one of claims 1 to 5, characterized in that: It also includes a system to be tested and a data processing module; the system to be tested is connected to the GM module; the data processing module is used to perform data analysis and processing on the counting value output by the counting module.

7. The capacitance sensing system according to claim 6, wherein: The data analysis process includes at least one of data storage, data filtering and data extraction.

8. The capacitance sensing system according to claim 6, wherein: The system to be tested includes a mutual capacitance system; the mutual capacitance system includes a transmitting electrode TX, a receiving electrode RX, a transmitting capacitor Ctx, a mutual capacitor Cm and a receiving capacitor Crx; Two ends of the mutual capacitor Cm are respectively connected to the transmitting electrode TX and the receiving electrode RX; one end of the receiving electrode RX away from the mutual capacitor Cm is connected to the GM module; One end of the transmitting capacitor Ctx is connected to the transmitting electrode TX, and the other end is grounded; one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

9. The capacitance sensing system according to claim 6, wherein: The system to be tested includes a self-capacitance system; the self-capacitance system includes a receiving electrode RX and a receiving capacitor Crx; the receiving electrode RX is connected to the first input end of the GM module, one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

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