Frequency adjustment method, electronic device, and storage medium

By periodically acquiring processor performance data and device operation information, the memory frequency is dynamically adjusted, solving the problem of frequency adjustment lag and improving system performance and power consumption balance.

CN119759710BActive Publication Date: 2026-04-28HONOR DEVICE CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HONOR DEVICE CO LTD
Filing Date
2023-09-28
Publication Date
2026-04-28

AI Technical Summary

Technical Problem

In existing technologies, the processor frequency adjustment process is delayed, resulting in excessive or insufficient frequency supply, which affects the balance between system performance and power consumption.

Method used

By periodically acquiring processor performance data and device operation information, and triggering memory frequency adjustments based on preset conditions, the processor's performance requirements are dynamically matched, avoiding adjustment lag.

Benefits of technology

It enables dynamic supply of memory frequency, avoiding oversupply or undersupply of frequency, and improving system performance and power consumption.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The application discloses a frequency adjustment method, an electronic device and a storage medium, and belongs to the technical field of computers. The method comprises the following steps: periodically acquiring processor performance data by an electronic device, and acquiring device running information. In the case that it is determined that the first preset condition is met according to the device running information, the frequency of a memory is adjusted according to the processor performance data. In the application, the frequency adjustment can be triggered in time according to the running condition of the electronic device, the problem of adjustment lag is avoided, the dynamic frequency supply can be ensured, the problem that the power is wasted due to over-supply of the frequency or the performance is poor due to insufficient supply of the frequency can be avoided, the performance and the power consumption of the system have better performances.
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Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a frequency adjustment method, electronic device, and storage medium. Background Technology

[0002] When a processor accesses data, it first searches for the data in the processor cache. If the data is not found there, it continues searching in the system cache. If the data is still not found there, it then accesses the data from main memory. Therefore, the frequencies of the processor cache, system cache, and main memory have a significant impact on system performance and power consumption.

[0003] Currently, in order to ensure a balance between system performance and power consumption, processor performance data is periodically acquired, the processor frequency is determined based on the processor performance data, and then the frequencies of the processor cache, system cache, and main memory are adjusted by combining preset mapping tables between processor frequency and processor cache frequency, processor frequency and system cache frequency, and processor frequency and main memory frequency.

[0004] However, the frequency adjustment process described above only involves periodic frequency adjustment based on processor performance data. If the processor performance has changed, the frequency adjustment must wait until the next cycle arrives before it can be performed. This can lead to adjustment lag, which in turn can easily result in oversupply or undersupply of frequency. Summary of the Invention

[0005] This application provides a frequency adjustment method, an electronic device, and a storage medium, which can avoid the problem of adjustment lag. The technical solution is as follows:

[0006] In a first aspect, a frequency adjustment method is provided for use in an electronic device, which includes a processor and memory. For example, the processor may be a central processing unit (CPU). The memory may be a processor cache, a system cache, or main memory. For example, the processor cache may be a Level 3 cache (L3 cache). For example, the main memory may be double-datarate synchronous dynamic random access memory (DDR SDRAM).

[0007] In this method, processor performance data is acquired periodically; device operation information is acquired; if the device operation information determines that a first preset condition is met, the frequency of the memory is adjusted according to the processor performance data.

[0008] This processor performance data is used to reflect the performance of the processor. The processor may include one or more processor cores. The processor performance data may include the performance data of each of the one or more processor cores of the processor.

[0009] The device operation information refers to information reflecting the operating status of the electronic device. For example, this device operation information may include user scenarios and / or system load. Further, the device operation information may also include one or more of the following: frame loss information, device temperature, processor core status, etc.

[0010] The first preset condition is used to indicate that the performance requirements are relatively low under the current operating conditions of the electronic device.

[0011] In this application, frequency adjustment can be triggered when the first preset condition is met based on the device's operating information. This means that the operation of adjusting the memory frequency based on the processor's performance data can be triggered. In this way, frequency adjustment can be triggered promptly based on the device's operating status, avoiding adjustment lag issues and ensuring dynamic frequency supply. This prevents power waste due to over-supply of frequency or poor performance due to insufficient frequency supply, resulting in better system performance and power consumption.

[0012] In one possible implementation, the frequency of the memory is adjusted based on the processor performance data obtained each time it is acquired.

[0013] In this way, the frequency of the memory can be periodically adjusted based on the processor performance data, so that the frequency of the memory can meet the performance requirements of the processor as much as possible.

[0014] In one possible implementation, if the amount of data accessed by the processor to the memory is greater than a first data amount threshold, or if the amount of data accessed by the processor to the memory is less than a second data amount threshold, the frequency of the memory is adjusted according to the amount of data accessed.

[0015] If the amount of data accessed by the processor to the memory exceeds the first data volume threshold, it indicates that the processor's current access bandwidth demand is large. Therefore, the frequency of the memory can be adjusted according to the amount of data accessed to ensure dynamic frequency supply, so as to match the current access bandwidth demand and avoid insufficient frequency supply.

[0016] If the amount of data accessed by the processor to the memory is less than the second data amount threshold, it means that the processor's current access bandwidth requirement is small. Therefore, the frequency of the memory can be adjusted according to the amount of data accessed to ensure dynamic frequency supply, so as to match the current access bandwidth requirement and avoid over-supply of frequency.

[0017] In one possible implementation, the device operation information includes a user scenario, with the first preset condition being that the user scenario is a non-user operation scenario.

[0018] Since latency is less of a concern in non-user operation scenarios, performance requirements are lower. Therefore, the memory frequency can be adjusted based on the processor's performance data to avoid over-provisioning and wasting power.

[0019] In one possible implementation, the device operation information includes system load, with the first preset condition being that the system load is less than a first load threshold.

[0020] In this case, the system load is less than the first load threshold, indicating that the system load is low and the performance requirement is low. Therefore, in this case, the frequency of the memory can be adjusted according to the processor performance data to avoid over-supplying the frequency and wasting power.

[0021] In one possible implementation, the device operation information includes user scenario and system load. The first preset condition is that the user scenario is a non-user operation scenario and the system load is less than a first load threshold. Since latency is less of a concern in non-user operation scenarios and the system load is also relatively low, performance requirements are lower. Therefore, the memory frequency can be adjusted based on the processor performance data in this case to avoid power waste caused by over-provisioning of frequency.

[0022] Alternatively, the user scenario is a user operation scenario where the system load is less than the first load threshold. In this case, although latency is a relatively important concern in user operation scenarios, the fact that the system load is less than the first load threshold indicates that the performance requirement is relatively low. Therefore, the memory frequency can be adjusted based on the processor performance data to avoid over-provisioning and wasting power.

[0023] Alternatively, the user scenario may be a non-user operation scenario where the system load exceeds the second load threshold and the processor's performance has not deteriorated. In this case, the user scenario is a non-user operation scenario, but the system load exceeds the second load threshold, indicating a high system load and a significant performance requirement. Although the performance requirement is high, the processor's performance has not deteriorated, meaning that the processor's current performance is sufficient to meet the demand. Therefore, in this situation, the memory frequency can be adjusted based on the processor's performance data to avoid over-provisioning and wasting power.

[0024] In one possible implementation, the operation of adjusting the memory frequency based on the processor performance data can be as follows: if the processor performance data meets the frequency adjustment conditions, then calculate the processor frequency based on the processor performance data; determine a first target frequency based on the processor frequency using a preset algorithm; and adjust the memory frequency based on the first target frequency.

[0025] If the processor's performance data does not meet the frequency adjustment conditions, it means that the processor's current performance is appropriate, and therefore there is no need to adjust the memory frequency; the operation can be terminated directly.

[0026] If the processor performance data meets the frequency adjustment conditions, it indicates that the processor's current performance is too high or too low, and the memory frequency needs to be adjusted. In this case, the processor frequency can be calculated first based on the processor performance data, and then the memory frequency can be adjusted accordingly.

[0027] The preset algorithm can be set in advance. For example, the preset algorithm can be: first map the frequency of the processor to a first initial frequency, then amplify the first initial frequency to obtain a first target frequency that is greater than the first initial frequency.

[0028] In one possible implementation, if the device operation information determines that the second preset condition is met, the frequency of the processor is obtained; based on the frequency of the processor, a first target frequency is determined by a preset algorithm; and the frequency of the memory is adjusted based on the first target frequency.

[0029] The second preset condition is used to indicate that the performance requirements are relatively high under the current operating conditions of the electronic device.

[0030] If the device's operating information indicates that the second preset condition is met, it means that the current performance requirements are relatively high. In this case, calculating the processor frequency based on processor performance data would result in more latency and load, hindering performance improvement. Therefore, instead of calculating the processor frequency based on processor performance data, the processor frequency is obtained directly through the kernel's general interface. The memory frequency is then adjusted based on this processor frequency, allowing for on-demand frequency increases.

[0031] In one possible implementation, the device operation information includes a user scenario, and the second preset condition is that the user scenario is a user operation scenario.

[0032] Since users are relatively concerned about latency in their operation scenarios, and the performance requirements are relatively high, the frequency of the memory can be adjusted according to the processor's performance data in this case to avoid poor performance due to insufficient frequency supply.

[0033] In one possible implementation, the device operation information includes system load, and the second preset condition is that the system load is greater than a second load threshold.

[0034] In this case, the system load is greater than the second load threshold, indicating that the system load is high. For example, the system load is relatively high when the application is cold-started, and the performance demand is greater. Therefore, in this case, the frequency of the memory can be adjusted according to the processor performance data to avoid insufficient frequency supply leading to poor performance.

[0035] In one possible implementation, the device operation information includes user scenario and system load, with a second preset condition: the user scenario is a user operation scenario and the system load is greater than a second load threshold. In this case, since latency is relatively important in the user operation scenario, and the system load is also relatively high, the performance requirement is high. Therefore, the memory frequency can be adjusted according to the processor performance data under this condition to avoid poor performance due to insufficient frequency supply.

[0036] Alternatively, the user scenario may be a non-user operation scenario, where the system load exceeds the second load threshold and the processor's performance deteriorates. In this case, although the user scenario is non-user operation, the system load exceeds the second load threshold, indicating a high system load and significant performance requirements. The processor's performance deteriorates, meaning its current performance cannot meet the demands. Therefore, in this situation, the memory frequency can be adjusted based on the processor's performance data to avoid insufficient frequency supply leading to poor performance.

[0037] In one possible implementation, the device operation information also includes frame drop information, and the presence of a risk of stuttering can be detected based on this frame drop information. In this case, if a risk of stuttering is detected within a preset time period prior to the current moment before adjusting the memory frequency according to the first target frequency, the first target frequency is increased.

[0038] If a risk of stuttering is detected, indicating poor system performance, then within a preset timeframe after the risk is detected, if the memory frequency needs adjustment, a frequency increase operation can be performed. This involves increasing a first target frequency and then adjusting the memory frequency accordingly. In this way, a frequency increase operation can be performed quickly after a stuttering risk is detected to meet system performance requirements and prevent stuttering.

[0039] In one possible implementation, the device operating information also includes the device temperature. The operation of adjusting the memory frequency according to the first target frequency can be as follows: if the device temperature is greater than or equal to a first temperature threshold and less than or equal to a second temperature threshold, and if the first target frequency is less than a first preset frequency, then the memory frequency is adjusted to the first preset frequency; if the first target frequency is greater than a second preset frequency, then the memory frequency is adjusted to the second preset frequency; if the first target frequency is greater than or equal to the first preset frequency and less than or equal to the second preset frequency, then the memory frequency is adjusted to the first target frequency. If the device temperature is greater than the second temperature threshold, then the memory frequency is adjusted to the first target frequency.

[0040] If the device temperature is greater than or equal to the first temperature threshold and less than or equal to the second temperature threshold, it indicates that the current temperature of the electronic device is relatively normal. Therefore, the frequency of the memory can be adjusted by referring to the first preset frequency and the second preset frequency. That is, when adjusting the frequency of the memory, it is necessary to ensure that the frequency of the memory is greater than or equal to the first preset frequency and less than or equal to the second preset frequency.

[0041] If the device temperature exceeds the second temperature threshold, it indicates that the electronic device is currently overheating. In this case, if the first preset frequency is set too high, such as exceeding the first target frequency, adjusting the memory frequency according to the first preset frequency would not only lead to over-supply of frequency and wasted power, but would also cause the device to overheat more severely due to high power consumption. Therefore, when the device temperature exceeds the second temperature threshold, the first and second preset frequencies are not considered; instead, the memory frequency is directly adjusted to the first target frequency to match the current system performance requirements and avoid power loss caused by over-supply of frequency.

[0042] In one possible implementation, the processor includes one or more processor cores, and the device operation information also includes processor core states. Before adjusting the memory frequency based on the processor performance data, the performance data of processor cores whose processor core states are in a dormant state can also be filtered out from the processor performance data.

[0043] Since processor cores in hibernation mode have no performance or power consumption requirements, their performance data can be filtered out from the processor's performance data. This allows for subsequent frequency adjustments based on the performance data of processor cores in running mode, thereby improving the accuracy of frequency adjustments.

[0044] Secondly, a frequency adjustment device is provided, which has the function of implementing the frequency adjustment method described in the first aspect. The frequency adjustment device includes at least one module for implementing the frequency adjustment method provided in the first aspect.

[0045] Thirdly, an electronic device is provided, comprising a processor and a memory. The memory stores a program that supports the electronic device in executing the frequency adjustment method provided in the first aspect, and stores data related to implementing the frequency adjustment method described in the first aspect. The processor is configured to execute the program stored in the memory. The electronic device may further include a communication bus for establishing a connection between the processor and the memory.

[0046] Fourthly, a computer-readable storage medium is provided, wherein instructions are stored therein, which, when executed on a computer, cause the computer to perform the frequency adjustment method described in the first aspect.

[0047] Fifthly, a computer program product containing instructions is provided, which, when run on a computer, causes the computer to perform the frequency adjustment method described in the first aspect above.

[0048] The technical effects achieved by the second, third, fourth, and fifth aspects mentioned above are similar to those achieved by the corresponding technical means in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0049] Figure 1 This is a schematic diagram of a system-on-chip (SOC) architecture provided in an embodiment of this application;

[0050] Figure 2 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0051] Figure 3 This is a block diagram of a software system for an electronic device provided in an embodiment of this application;

[0052] Figure 4 This is a flowchart of a frequency adjustment method provided in an embodiment of this application;

[0053] Figure 5 This is a schematic diagram of a frequency adjustment process provided in an embodiment of this application;

[0054] Figure 6 This is a schematic diagram of the structure of a frequency adjustment device provided in an embodiment of this application. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0056] It should be understood that "multiple" as mentioned in this application refers to two or more. In the description of this application, unless otherwise stated, " / " indicates "or," for example, A / B can mean A or B; "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist, for example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, to facilitate a clear description of the technical solutions of this application, the terms "first," "second," etc., are used to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first," "second," etc., do not limit the quantity or execution order, and that "first," "second," etc., do not necessarily imply differences.

[0057] The terms "one embodiment" or "some embodiments" used in this application mean that one or more embodiments of this application include the specific features, structures, or characteristics described in that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this application do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. Furthermore, the terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0058] The application scenarios of the embodiments of this application are described below.

[0059] This application embodiment is applied to scenarios where the frequency of memory in a chip is adjusted. For example, this application embodiment can be applied to scenarios where the frequency of processor cache, system cache, and main memory in a chip is adjusted.

[0060] For example, Figure 1 This is a schematic diagram of the architecture of a SOC provided in an embodiment of this application. See also... Figure 1 This SoC may include processors such as a CPU, graphics processing unit (GPU), and neural network processing unit (NPU). The SoC may also include system cache and main memory.

[0061] Optionally, the CPU may include multiple processor cores, such as performance cores and low-power cores, to achieve a balance between performance and power consumption. For example, performance cores may include high-performance prime cores and high-performance big cores, while low-power cores may include low-power little cores.

[0062] Optionally, the CPU may include a processor cache. For example, the processor cache may be a Level 3 cache, but of course, the processor cache may also be other types of cache, which is not limited in this embodiment.

[0063] Optionally, the main memory can be DDR SDRAM. Of course, the main memory can also be other types of memory, and this application embodiment does not limit this. DDR SDRAM can be abbreviated as DDR.

[0064] Optionally, DDR may include a DDR controller (DDRC) and low-power double-data-rate SDRAM (LPDDR SDRAM) chips. LPDDR SDRAM may be abbreviated as LPDDR. For example, LPDDR chips may include LPDDR4, LPDDR5, etc.

[0065] When the CPU accesses data, it first searches for the data in the processor cache. If the data is not found there, it continues searching in the system cache. If the data is still not found there, it accesses the data in main memory. Therefore, the frequencies of the processor cache, system cache, and main memory have a significant impact on system performance and power consumption. In some embodiments, the processor cache, system cache, and main memory can be collectively referred to as the data path.

[0066] Currently, the bus dynamic clock and voltage scaling (BUS DCVS) algorithm can be used to adjust the frequency. BUS DCVS is a bus frequency selection algorithm used to select the optimal frequency point among dynamic workloads to achieve a balance between performance and power consumption.

[0067] In related technologies, the BUSDCVS algorithm provides a frequency adjustment strategy. Specifically, it periodically acquires CPU performance management unit (PMU) data and determines the CPU frequency based on this PMU data. Then, it adjusts the frequencies of the processor cache, system cache, and main memory by combining preset mapping tables between CPU frequency and processor cache frequency, CPU frequency and system cache frequency, and CPU frequency and main memory frequency.

[0068] However, this frequency adjustment strategy only adjusts the frequency periodically based on the CPU's PMU data. If the CPU performance has changed, it still needs to wait until the next cycle arrives before it can adjust the frequency. This will cause adjustment lag, which can easily lead to over-supply or under-supply of frequency, resulting in poor system performance and power consumption.

[0069] To address this, this application provides a frequency adjustment method that acquires device operating information, including user scenarios and system load, and determines whether frequency adjustment needs to be triggered based on this information. If frequency adjustment is deemed necessary, the methods adjust the frequencies of the processor cache, system cache, and main memory based on the CPU's PMU data. This allows for timely frequency adjustment based on device operating conditions, avoiding adjustment lag and ensuring dynamic frequency supply. It also prevents over- or under-supply of frequency, resulting in better system performance and power consumption.

[0070] The frequency adjustment method provided in this application can be applied to electronic devices. These electronic devices may include mobile phones, tablets, wearable devices, digital cameras, in-vehicle devices, augmented reality (AR) devices, virtual reality (VR) devices, laptops, ultra-mobile personal computers (UMPCs), netbooks, personal digital assistants (PDAs), and laptops, etc. This application does not limit the specific type of device used.

[0071] Figure 2 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. See also... Figure 2The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an accelerometer sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0072] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0073] Processor 110 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0074] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can retrieve it directly from this memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0075] The external storage interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external storage interface 120 to perform data storage functions, such as saving music, video, and other files on the external memory card.

[0076] Internal memory 121 can be used to store computer-executable program code, which includes instructions. Processor 110 executes various functional applications and data processing of electronic device 100 by running the instructions stored in internal memory 121. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback, image playback, etc.), etc. The data storage area may store data created by electronic device 100 during use (such as audio data, phonebook, etc.). Furthermore, internal memory 121 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.

[0077] The wireless communication function of electronic device 100 can be realized through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor and baseband processor, etc.

[0078] The electronic device 100 can implement display functions through a GPU, a display screen 194, and an application processor. In this embodiment, the electronic device 100 may include one or N display screens 194, where N is an integer greater than 1.

[0079] Electronic device 100 can perform shooting functions through ISP, camera 193, video codec, GPU, display 194 and application processor.

[0080] Electronic device 100 can implement audio functions, such as music playback and recording, through audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D and application processor.

[0081] The SIM card interface 195 is used to connect a SIM card. The SIM card can be inserted into or removed from the SIM card interface 195 to make contact with and separate from the electronic device 100. The electronic device 100 can support one or N SIM card interfaces, where N is an integer greater than 1. The SIM card interface 195 can support Nano SIM cards, Micro SIM cards, SIM cards, etc. Multiple cards can be inserted into the same SIM card interface 195 simultaneously. The multiple cards can be of the same or different types. The SIM card interface 195 is also compatible with different types of SIM cards. The SIM card interface 195 is also compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to realize functions such as calls and data communication. In some embodiments, the electronic device 100 uses an eSIM, i.e., an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

[0082] The software system of electronic device 100 will be described next.

[0083] The software system of electronic device 100 can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This application embodiment uses a layered Android system as an example to illustrate the software system of electronic device 100.

[0084] Figure 3 This is a block diagram of a software system for an electronic device 100 provided in an embodiment of this application. See also... Figure 3 A layered architecture divides software into several layers, each with a clear role and function. Layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into an application layer, an application framework layer, the Android Runtime, a system layer, and a kernel layer.

[0085] The application layer can include a series of application packages. For example... Figure 3 As shown, the application package may include applications such as camera, gallery, calendar, call, map, navigation, Bluetooth, music, video, and SMS.

[0086] The application framework layer provides application programming interfaces (APIs) and a programming framework for applications in the application layer. The application framework layer includes some predefined functions. For example... Figure 3As shown, the application framework layer can include a window manager, content providers, a view system, a phone manager, a resource manager, and a notification manager. The window manager manages window programs. It can obtain the screen size, determine if a status bar is present, lock the screen, and capture the screen. The content provider stores and retrieves data, making this data accessible to the application. This data can include videos, images, audio, made and received phone calls, browsing history and bookmarks, and phone books. The view system includes visual controls, such as controls for displaying text and controls for displaying images. The view system can be used to build the application's display interface, which can consist of one or more views, such as a view displaying SMS notification icons, a view displaying text, and a view displaying images. The phone manager provides communication functions for the electronic device 100, such as managing call status (including connection and disconnection). The resource manager provides the application with various resources, such as localized strings, icons, images, layout files, and video files. The notification manager allows the application to display notification information in the status bar, which can be used to convey informational messages and can disappear automatically after a short pause without user interaction. For example, the notification manager is used to notify users of download completions and message alerts. The notification manager can also display notifications as icons or scrolling text in the system's top status bar, such as notifications from background applications. Furthermore, the notification manager can appear as dialog boxes on the screen, such as displaying text messages in the status bar, emitting sounds, causing electronic devices to vibrate, or flashing indicator lights.

[0087] The Android Runtime comprises the core libraries and the virtual machine. The Android Runtime is responsible for the scheduling and management of the Android system. The core libraries consist of two parts: one part contains the functionalities that Java calls, and the other part is the core Android library itself. The application layer and application framework layer run in the virtual machine. The virtual machine executes the Java files of the application layer and application framework layer as binary files. The virtual machine is used to perform functions such as object lifecycle management, stack management, thread management, security and exception management, and garbage collection.

[0088] The system layer can include multiple functional modules, such as a surface manager, media libraries, 3D graphics processing libraries (e.g., OpenGL ES), and 2D graphics engines (e.g., SGL). The surface manager manages the display subsystem and provides fusion of 2D and 3D layers for multiple applications. The media libraries support playback and recording of various common audio and video formats, as well as still image files. They support multiple audio and video encoding formats, such as MPEG4, H.264, MP3, AAC, AMR, JPG, and PNG. The 3D graphics processing libraries implement 3D graphics drawing, image rendering, compositing, and layer processing. The 2D graphics engine is the drawing engine for 2D graphics.

[0089] The kernel layer is the layer between hardware and software. The kernel layer may include a scheduling module, a temperature control module, a frequency modulation module, a display driver, a camera driver, an audio driver, a sensor driver, etc. The scheduling module, temperature control module, and frequency modulation module can be combined to implement the frequency adjustment method provided in the embodiments of this application.

[0090] For example, the scheduling module can acquire one or more of the following device operating information: frame loss information, processor core status information, system load, etc. The temperature control module can acquire one or more of the following device operating information: user scenario, device temperature, etc. The frequency adjustment module can acquire processor performance data and the amount of data accessed by the processor to memory. The frequency adjustment module can determine the memory frequency based on one or more of the above-mentioned processor performance data, processor memory access data, user scenario, system load, processor core status, device temperature, frame loss information, etc. Then, it can call the underlying interface to set the memory frequency, thereby adjusting the frequency of the memory.

[0091] The frequency adjustment method provided in the embodiments of this application will be explained in detail below.

[0092] The frequency adjustment method provided in this application is applied to an electronic device, which includes a processor and a memory. For example, the processor may be a CPU. For example, the memory may be a processor cache, system cache, or main memory, and the memory supports a dynamic frequency adjustment mechanism. This application embodiment can adjust the frequency of the memory according to the frequency of the processor. It should be noted that the frequency described in this application embodiment can also be referred to as a frequency point. Another point to note is that the frequency adjustment of the memory in this application embodiment achieves the adjustment of the bandwidth of the memory.

[0093] Figure 4 This is a flowchart of a frequency adjustment method provided in an embodiment of this application. See also... Figure 4The method includes the following steps:

[0094] Step 401: The electronic device periodically acquires processor performance data.

[0095] This processor performance data is used to reflect the performance of the processor. The processor may include one or more processor cores. The processor performance data may include the performance data of each of the one or more processor cores of the processor.

[0096] Optionally, the performance data of a processor core can be the PMU data of that processor core. Of course, the performance data of that processor core can also be other data that can reflect the performance of that processor core. This application embodiment does not limit this.

[0097] For example, the PMU data of a processor core may include one or more of the following: the number of clock cycles required for the processor core to execute one instruction, the number of instructions executed by the processor core per unit cycle, the number of data hits in the processor cache per unit cycle (also known as cache hits), the number of data misses in the processor cache per unit cycle (also known as cache misses), and the processor pipeline stall time (also known as CPU stall time). This application embodiment does not limit this.

[0098] The time interval at which electronic devices acquire processor performance data can be preset. For example, an electronic device can acquire processor performance data every 8 milliseconds or 16 milliseconds.

[0099] Step 402: The electronic device acquires device operation information.

[0100] The device operation information refers to information reflecting the operating status of the electronic device. For example, this device operation information may include user scenarios and / or system load. Further, the device operation information may also include one or more of the following: frame loss information, device temperature, processor core status, etc.

[0101] User scenarios can include user operation scenarios and non-user operation scenarios. User operation scenarios can include touchscreen operation scenarios, such as a user swiping and browsing on an electronic device. Of course, user operation scenarios can also include other scenarios that reflect a user's operation of the electronic device; this application embodiment does not limit this. Non-user operation scenarios can include non-touchscreen operation scenarios, such as a user watching a video on an electronic device. Of course, non-user operation scenarios can also include other scenarios that reflect a user's non-operation of the electronic device; this application embodiment does not limit this.

[0102] System load can include processor load, which reflects how busy the processor is. For example, processor load can be processor utilization. In this case, processor utilization indicates the level of processor load. That is, higher processor utilization indicates higher processor load; lower processor utilization indicates lower processor load.

[0103] Frame drop information is used to reflect frame drop occurrences in the foreground. For example, frame drop information may include the system frame drop rate.

[0104] The device temperature refers to the current temperature of the electronic device.

[0105] Processor core state can include the state of each of one or more processor cores in the processor. Processor core state can include idle state and running state.

[0106] Optionally, some of the information in the device's operational information can be acquired periodically. For example, the electronic device can periodically acquire one or more of the following: system load, frame drop information, processor core status, etc.

[0107] Other information in the device's operational data can be detected. For example, when the user scenario changes—such as from a user-operated scenario to a non-user-operated scenario, or vice versa—the electronic device can detect this change and thus determine its current user scenario. Similarly, when the device temperature changes, the electronic device can also detect this change and thus determine its current temperature.

[0108] Step 403: If the electronic device determines that the first preset condition is met based on the device operation information, then the frequency of the memory is adjusted according to the processor performance data.

[0109] The first preset condition is used to indicate that the performance requirements are relatively low under the current operating conditions of the electronic device. The first preset condition can be set in advance.

[0110] For example, if the device operation information includes a user scenario, the first preset condition can be: the user scenario is a non-user operation scenario. Since latency is less of a concern in non-user operation scenarios, performance requirements are lower. Therefore, in this case, the memory frequency can be adjusted based on the processor performance data to avoid over-supplying the frequency and wasting power.

[0111] Alternatively, if the device operating information includes system load, the first preset condition can be: the system load is less than a first load threshold. The first load threshold can be preset, and the first load threshold can be set relatively low. In this case, the system load being less than the first load threshold indicates that the system load is low, and the performance requirement is low. Therefore, in this case, the frequency of the memory can be adjusted according to the processor performance data to avoid over-supplying the frequency and wasting power.

[0112] Alternatively, if the device operation information includes user scenarios and system load, the first preset condition can be: the user scenario is a non-user operation scenario and the system load is less than a first load threshold. Since latency is less of a concern in non-user operation scenarios, and the system load is also relatively low, the performance requirement is lower. Therefore, the memory frequency can be adjusted based on the processor performance data in this case to avoid over-supplying the frequency and wasting power.

[0113] Alternatively, if the device operation information includes user scenarios and system load, the first preset condition can be: the user scenario is a user operation scenario and the system load is less than a first load threshold. In this case, although latency is relatively important in the user operation scenario, the fact that the system load is less than the first load threshold indicates that the performance requirement is relatively low. Therefore, the memory frequency can be adjusted based on the processor performance data to avoid over-supplying frequency and wasting power.

[0114] Alternatively, if the device operation information includes user scenarios and system load, the first preset condition can be: the user scenario is a non-user operation scenario, the system load is greater than a second load threshold, and the processor's performance has not deteriorated. The second load threshold can be greater than the first load threshold, and the second load threshold can be preset, and the second load threshold can be set relatively large. In this case, the user scenario is a non-user operation scenario, but the system load is greater than the second load threshold, indicating that the system load is high, and the performance demand is high. Although the performance demand is high, the processor's performance has not deteriorated, indicating that the processor's current performance can meet the demand. Therefore, in this case, the memory frequency can be adjusted according to the processor's performance data to avoid over-provisioning of frequency and resulting in wasted power consumption.

[0115] Among these, electronic devices can determine whether the processor's performance has deteriorated based on processor performance data.

[0116] For example, an electronic device can determine whether the processor's performance has deteriorated based on the number of cache misses and / or CPU stall time in the processor performance data.

[0117] For example, an electronic device can determine the maximum and minimum values ​​among multiple (e.g., 20) cache miss counts recently acquired; if the difference between the maximum and minimum values ​​is small (e.g., less than a first preset difference), it can be determined that the processor's performance has not deteriorated; if the difference between the maximum and minimum values ​​is large (e.g., greater than or equal to the first preset difference), it can be determined that the processor's performance has deteriorated.

[0118] For example, an electronic device can determine the maximum and minimum values ​​among multiple recently acquired CPU stall times; if the difference between the maximum and minimum values ​​is small (e.g., less than a second preset difference), it can be determined that the processor's performance has not deteriorated; if the difference between the maximum and minimum values ​​is large (e.g., greater than or equal to the second preset difference), it can be determined that the processor's performance has deteriorated.

[0119] For example, an electronic device can determine the maximum and minimum values ​​among multiple recently acquired cache miss counts, and the maximum and minimum values ​​among multiple recently acquired CPU stall times. If the difference between the maximum and minimum values ​​of cache miss counts is small, and the difference between the maximum and minimum values ​​of CPU stall times is small, then it can be determined that the processor's performance has not deteriorated; otherwise, it can be determined that the processor's performance has deteriorated.

[0120] In this embodiment, when the electronic device determines that a first preset condition is met based on its operating information, it can trigger frequency modulation, that is, it can trigger an operation to adjust the frequency of the memory based on the processor performance data. In this way, frequency modulation can be triggered promptly according to the operating status of the electronic device, avoiding the problem of adjustment lag. This ensures dynamic frequency supply and avoids problems such as power waste due to over-supply of frequency or poor performance due to insufficient frequency supply, resulting in better system performance and power consumption.

[0121] In some embodiments, the operation of an electronic device to adjust the frequency of the memory based on the processor performance data may include either method 1 or method 2.

[0122] Method 1: If the processor performance data meets the frequency adjustment conditions, calculate the processor frequency based on the processor performance data; adjust the memory frequency based on the processor frequency.

[0123] Method 2: Filter out the performance data of processor cores whose processor core state is in sleep mode from the processor performance data. Then, if the processor performance data meets the frequency adjustment conditions, calculate the processor frequency based on the processor performance data; adjust the memory frequency based on the processor frequency.

[0124] Since processor cores in hibernation mode have no performance or power consumption requirements, their performance data can be filtered out from the processor's performance data. This allows for subsequent frequency adjustments based on the performance data of processor cores in running mode, thereby improving the accuracy of frequency adjustments.

[0125] The frequency adjustment condition can be preset. This condition is used to indicate whether the processor's performance is too high or too low. Optionally, the frequency adjustment condition can include thresholds for each data point in the processor performance data, as well as the required relationship between each data point and its corresponding threshold. In this case, if the processor performance data meets the frequency adjustment condition, it means that the relationship between each data point and its corresponding threshold satisfies the frequency adjustment condition, indicating that the processor's performance is either too high or too low.

[0126] It should be noted that the threshold values ​​set in the frequency adjustment conditions may differ depending on the type of memory. Specifically, if the memory is a processor cache, the frequency adjustment conditions may include a first threshold value for each piece of processor performance data; if the memory is a system cache, the frequency adjustment conditions may include a second threshold value for each piece of processor performance data; and if the memory is main memory, the frequency adjustment conditions may include a third threshold value for each piece of processor performance data. The first, second, and third threshold values ​​corresponding to a single piece of processor performance data may be the same or different, and this embodiment does not impose any limitations on this.

[0127] If the processor's performance data does not meet the frequency adjustment conditions, it means that the processor's current performance is appropriate, and therefore there is no need to adjust the memory frequency; the operation can be terminated directly.

[0128] If the processor performance data meets the frequency adjustment conditions, it indicates that the processor's current performance is too high or too low, and the memory frequency needs to be adjusted. In this case, the electronic device can first calculate the processor's frequency based on the processor performance data, and then adjust the memory frequency accordingly.

[0129] The operation of the electronic device calculating the frequency of the processor based on the processor performance data is similar to the operation of a device calculating the frequency of a processor based on the performance data of a processor in related technologies, and will not be described in detail in the embodiments of this application.

[0130] In some embodiments, the operation of an electronic device adjusting the frequency of a memory according to the frequency of the processor can be: determining a first target frequency according to the frequency of the processor using a preset algorithm; and adjusting the frequency of the memory according to the first target frequency.

[0131] The preset algorithm can be set in advance. For example, the preset algorithm can be: first map the frequency of the processor to a first initial frequency, then amplify the first initial frequency to obtain a first target frequency that is greater than the first initial frequency.

[0132] Optionally, a mapping relationship between processor frequency and memory frequency can be preset in the electronic device. The electronic device can find the memory frequency corresponding to the processor frequency in the mapping relationship as the first initial frequency, and then add the first initial frequency to the preset amplification parameters to obtain the first target frequency.

[0133] It should be noted that the memory frequencies corresponding to different processor frequencies in the mapping relationship can be different depending on the type of memory. Specifically, if the memory is a processor cache, the memory frequency corresponding to a certain processor frequency in the mapping relationship can be a first frequency; if the memory is a system cache, the memory frequency corresponding to this processor frequency in the mapping relationship can be a second frequency; if the memory is main memory, the memory frequency corresponding to this processor frequency in the mapping relationship can be a third frequency. The first, second, and third frequencies corresponding to this processor frequency can be the same or different, and this application embodiment does not limit this.

[0134] In some embodiments, the operation of the electronic device adjusting the frequency of the memory according to a first target frequency can be achieved in any of the following four ways:

[0135] The first method: The electronic device adjusts the frequency of the memory to the first target frequency.

[0136] The second method: If no risk of lag is detected within a preset time period prior to the current moment, the electronic device adjusts the frequency of the memory to the first target frequency. If a risk of lag is detected within the preset time period prior to the current moment, the electronic device increases the first target frequency and then adjusts the frequency of the memory to the first target frequency.

[0137] The preset duration can be set in advance. For example, the preset duration can be the duration of 2 frames (e.g., 32 milliseconds).

[0138] It should be noted that electronic devices can determine the presence of stuttering risk based on frame drop information. If the electronic device detects a stuttering risk, it indicates poor system performance. Within a preset timeframe after detecting the stuttering risk, if the electronic device needs to adjust the frequency of the memory, it can perform a frequency increase operation. This involves increasing a first target frequency and then adjusting the memory frequency accordingly. In this way, the electronic device can perform a frequency increase operation quickly after detecting a stuttering risk to meet system performance requirements and avoid stuttering.

[0139] For example, an electronic device can add a first target frequency to a pre-set amplification parameter to increase the first target frequency.

[0140] The third method: When the device temperature is greater than or equal to a first temperature threshold and less than or equal to a second temperature threshold, if the first target frequency is less than a first preset frequency, the electronic device adjusts the frequency of the memory to the first preset frequency; if the first target frequency is greater than a second preset frequency, the electronic device adjusts the frequency of the memory to the second preset frequency; if the first target frequency is greater than or equal to the first preset frequency and less than or equal to the second preset frequency, the electronic device adjusts the frequency of the memory to the first target frequency. When the device temperature is greater than the second temperature threshold, the electronic device adjusts the frequency of the memory to the first target frequency.

[0141] Both the first and second preset frequencies can be preset. The second preset frequency is higher than the first preset frequency. The first preset frequency can be the minimum frequency that the memory needs to reach, as preset. The second preset frequency can be the maximum frequency that the memory is allowed to reach, as preset.

[0142] Both the first and second temperature thresholds can be preset. The first temperature threshold is lower than the second temperature threshold.

[0143] If the device temperature is greater than or equal to the first temperature threshold and less than or equal to the second temperature threshold, it indicates that the current temperature of the electronic device is relatively normal. Therefore, the frequency of the memory can be adjusted by referring to the first preset frequency and the second preset frequency. That is, when adjusting the frequency of the memory, it is necessary to ensure that the frequency of the memory is greater than or equal to the first preset frequency and less than or equal to the second preset frequency.

[0144] If the device temperature exceeds the second temperature threshold, it indicates that the electronic device is currently overheating. In this case, if the first preset frequency is set too high, such as exceeding the first target frequency, adjusting the memory frequency according to the first preset frequency would not only lead to over-supply of frequency and wasted power, but would also cause the device to overheat more severely due to high power consumption. Therefore, when the device temperature exceeds the second temperature threshold, the first and second preset frequencies are not considered; instead, the memory frequency is directly adjusted to the first target frequency to match the current system performance requirements and avoid power loss caused by over-supply of frequency.

[0145] The fourth method: If a risk of lag is detected within a preset time period prior to the current moment, the first target frequency is increased; if no risk of lag is detected within the preset time period prior to the current moment, subsequent operations are performed directly. Then, if the device temperature is greater than or equal to a first temperature threshold and less than or equal to a second temperature threshold, and if the first target frequency is less than a first preset frequency, the memory frequency is adjusted to the first preset frequency; if the first target frequency is greater than a second preset frequency, the memory frequency is adjusted to the second preset frequency; if the first target frequency is greater than or equal to the first preset frequency and less than or equal to the second preset frequency, the memory frequency is adjusted to the first target frequency. If the device temperature is greater than the second temperature threshold, the memory frequency is adjusted to the first target frequency.

[0146] In some embodiments, after step 402, if the electronic device determines that the second preset condition is met based on the device operation information, the frequency of the processor is obtained, and the frequency of the memory is adjusted according to the frequency of the processor.

[0147] The second preset condition is used to indicate a relatively high performance requirement under the current operating conditions of the electronic device. The second preset condition can be set in advance.

[0148] For example, if the device operation information includes a user scenario, the second preset condition can be: the user scenario is a user operation scenario. Since latency is relatively important in user operation scenarios, performance requirements are high. Therefore, in this case, the memory frequency can be adjusted based on the processor performance data to avoid insufficient frequency supply leading to poor performance.

[0149] Alternatively, if the device operating information includes system load, the second preset condition can be: the system load is greater than a second load threshold. In this case, a system load greater than the second load threshold indicates a high system load, such as during a cold start of an application, when the system load is relatively high and the performance demand is greater. Therefore, in this case, the memory frequency can be adjusted based on the processor performance data to avoid insufficient frequency supply leading to poor performance.

[0150] Alternatively, if the device operation information includes user scenarios and system load, the second preset condition can be: the user scenario is a user operation scenario and the system load is greater than a second load threshold. In this case, since latency is a relatively important concern in user operation scenarios, and the system load is also relatively high, the performance demand is greater. Therefore, the frequency of the memory can be adjusted according to the processor performance data in this case to avoid poor performance due to insufficient frequency supply.

[0151] Alternatively, if the device operation information includes user scenarios and system load, the second preset condition can be: the user scenario is a non-user operation scenario, the system load exceeds a second load threshold, and the processor's performance deteriorates. In this case, although the user scenario is a non-user operation scenario, the system load exceeds the second load threshold, indicating a high system load and a greater performance requirement. The processor's performance deteriorates, meaning its current performance cannot meet the demand. Therefore, in this situation, the memory frequency can be adjusted based on the processor's performance data to avoid insufficient frequency supply leading to poor performance.

[0152] It should be noted that the second preset condition and the first preset condition cannot conflict. That is, the electronic device will not determine, based on its operating information, that both the first and second preset conditions are met simultaneously.

[0153] The following explains some possible combinations of the first and second preset conditions.

[0154] For example, the first preset condition is: the user scenario is a non-user operation scenario. The second preset condition is: the user scenario is a user operation scenario, or the user scenario is a user operation scenario and the system load is less than the first load threshold.

[0155] For example, the first preset condition is: the system load is less than a first load threshold. The second preset condition is: the system load is greater than a second load threshold, or the user scenario is a user operation scenario and the system load is greater than the second load threshold, or the user scenario is a non-user operation scenario, the system load is greater than the second load threshold, and the processor's performance deteriorates.

[0156] For example, the first preset condition is: the user scenario is a non-user operation scenario and the system load is less than the first load threshold. The second preset condition is: the user scenario is a user operation scenario, or the system load is greater than the second load threshold, or the user scenario is a user operation scenario and the system load is greater than the second load threshold, or the user scenario is a non-user operation scenario, the system load is greater than the second load threshold, and the processor's performance deteriorates.

[0157] For example, the first preset condition is: the user scenario is a user operation scenario and the system load is less than a first load threshold. The second preset condition is: the system load is greater than a second load threshold, or the user scenario is a user operation scenario and the system load is greater than a second load threshold, or the user scenario is a non-user operation scenario, the system load is greater than a second load threshold, and the processor's performance deteriorates.

[0158] For example, the first preset condition is: the user scenario is a non-user operation scenario, the system load is greater than the second load threshold, and the processor's performance has not deteriorated. The second preset condition is: the user scenario is a user operation scenario, or the user scenario is a user operation scenario and the system load is greater than the second load threshold, or the user scenario is a non-user operation scenario, the system load is greater than the second load threshold, and the processor's performance has deteriorated.

[0159] In some embodiments, when an electronic device obtains the processor's frequency, it can do so through a kernel general interface. The obtained processor frequency is the actual frequency of the processor. It should be noted that the processor frequency calculated above based on processor performance data is an estimate of the processor frequency based on that data.

[0160] If the electronic device determines that the second preset condition is met based on its operating information, it indicates that the device currently has relatively high performance requirements. In this case, calculating the processor frequency based on processor performance data would result in more latency and load, hindering performance improvement. Therefore, the electronic device does not calculate the processor frequency based on processor performance data, but instead obtains the processor frequency directly through the kernel's general interface. The memory frequency is then adjusted based on the processor's frequency, allowing for on-demand frequency increases.

[0161] The operation of adjusting the frequency of the memory according to the frequency of the processor is the same as the operation of adjusting the frequency of the memory according to the frequency of the processor described above, and will not be repeated in this embodiment.

[0162] In some embodiments, based on step 401, each time the electronic device acquires processor performance data, it can adjust the frequency of the memory according to the latest acquired processor performance data.

[0163] In this way, the electronic device periodically adjusts the frequency of the memory based on the processor's performance data, so that the frequency of the memory can meet the performance requirements of the processor as much as possible.

[0164] The operation of adjusting the frequency of the memory based on the latest acquired processor performance data is the same as the operation of adjusting the frequency of the memory based on the processor performance data described above, and will not be repeated in this embodiment.

[0165] In some embodiments, the electronic device may also obtain the amount of data accessed by the processor to the memory. If the amount of data accessed by the processor to the memory is greater than a first data amount threshold, or if the amount of data accessed by the processor to the memory is less than a second data amount threshold, the frequency of the memory is adjusted according to the amount of data accessed.

[0166] The amount of data accessed by the processor to the memory obtained by the electronic device here refers to the amount of data accessed by the processor to the memory per unit cycle. In this case, the amount of data accessed can be referred to as the access bandwidth of the processor.

[0167] Both the first and second data volume thresholds can be preset. The first data volume threshold is less than the second data volume threshold.

[0168] If the amount of data accessed by the processor to the memory exceeds the first data volume threshold, it indicates that the processor's current access bandwidth demand is large. Therefore, the frequency of the memory can be adjusted according to the amount of data accessed to ensure dynamic frequency supply, so as to match the current access bandwidth demand and avoid insufficient frequency supply.

[0169] If the amount of data accessed by the processor to the memory is less than the second data amount threshold, it means that the processor's current access bandwidth requirement is small. Therefore, the frequency of the memory can be adjusted according to the amount of data accessed to ensure dynamic frequency supply, so as to match the current access bandwidth requirement and avoid over-supply of frequency.

[0170] Optionally, the operation of the electronic device adjusting the frequency of the memory according to the amount of accessed data can be: determining a second target frequency according to the amount of accessed data; and adjusting the frequency of the memory according to the second target frequency.

[0171] Optionally, when the electronic device determines the second target frequency based on the amount of accessed data, it can divide the amount of accessed data by the bus width to obtain the second initial frequency, and then amplify the second initial frequency to obtain the second target frequency.

[0172] For example, when an electronic device amplifies a second initial frequency, it can add the second initial frequency to a pre-set amplification parameter to obtain a second target frequency.

[0173] The operation of adjusting the frequency of the memory according to the second target frequency by the electronic device is similar to the operation of adjusting the frequency of the memory according to the first target frequency by the electronic device described above, and will not be described again in this embodiment.

[0174] In this embodiment, the electronic device periodically acquires processor performance data and device operating information. When a first preset condition is met based on the device operating information, the memory frequency is adjusted according to the processor performance data. This allows for timely frequency adjustment based on the electronic device's operating status, avoiding adjustment lag and ensuring dynamic frequency supply. Consequently, it avoids power waste due to over-supply or poor performance due to insufficient frequency supply, resulting in better system performance and power consumption.

[0175] The following is combined with Figure 1 The SOC architecture shown Figure 3 The software system of the electronic device shown, and Figure 5 The frequency adjustment diagram shown is used to illustrate the above frequency adjustment method.

[0176] like Figure 5 As shown, optionally, the frequency modulation module can periodically acquire processor performance data; for example, the processor performance data can be the processor's PMU data. Optionally, the frequency modulation module can acquire the amount of data accessed by the processor to memory.

[0177] Optionally, the scheduling module can periodically acquire frame loss information and predict whether there is a risk of stuttering based on the frame loss information. Optionally, the scheduling module can periodically acquire the processor core status. The processor core status includes the status of each processor core in one or more processor cores of the processor. The status of a processor core can include a sleep state and a running state. Optionally, the scheduling module can periodically acquire the system load. For example, the system load can be the processor load, representing the processor's workload.

[0178] Optionally, the temperature control module can identify user scenarios. For example, the user scenarios may include user operation scenarios (including but not limited to user touchscreen operation scenarios) and non-user operation scenarios (including but not limited to non-user touchscreen operation scenarios). Optionally, the frequency modulation module can periodically detect the device temperature.

[0179] It should be noted that the frequency modulation module can exist as a separate module independently, or it can be included in the BUSDCVS module.

[0180] In some embodiments, the scheduling module may notify the frequency modulation module of a potential stuttering risk based on frame loss information. In some embodiments, the scheduling module may notify the frequency modulation module of an excessively high or low system load.

[0181] In some embodiments, the temperature control module may notify the frequency modulation module of a change in the user scenario, such as a change from a user-operated scenario to a non-user-operated scenario, or a change from a non-user-operated scenario to a user-operated scenario. In some embodiments, the scheduling module may notify the frequency modulation module of an excessively high device temperature.

[0182] In some embodiments, the frequency modulation module may periodically obtain one or more of the following from the scheduling module: frame loss information, processor core status, and system load; and periodically obtain one or more of the following from the temperature control module: user scenario and device temperature.

[0183] In some embodiments, the frequency modulation module may, upon receiving a notification from the scheduling module (such as the notification mentioned above for alerting of potential lag risk, or the notification mentioned above for alerting of excessively high or low system load), and / or upon receiving a notification from the temperature control module (such as the notification mentioned above for alerting of changes in user scenario, or the notification mentioned above for alerting of excessively high device temperature), obtain one or more of the following from the scheduling module: frame loss information, processor core status, and system load; and obtain one or more of the following from the temperature control module: user scenario and device temperature.

[0184] The frequency adjustment module can adjust the memory frequency based on one or more of the following factors: processor performance data, processor access data to memory, user scenario, system load, processor core status, device temperature, and frame drop information. This allows for frequency adjustment by considering multiple factors, ensuring dynamic frequency supply and avoiding problems such as power waste due to over-supply or poor performance due to insufficient frequency supply.

[0185] The frequency adjustment processes for processor cache, system cache, and main memory are illustrated below:

[0186] In the first scenario, assuming the memory mentioned above is a processor cache, the frequency adjustment process for the processor cache is as follows:

[0187] The processor is equipped with Timer 1, which can acquire processor performance data when the time interval is greater than the preset threshold. In other words, processor performance data can be acquired periodically.

[0188] The frequency modulation module is equipped with a timer 2, which can obtain processor performance data from the processor when the time interval is greater than the preset water line. In other words, it can periodically obtain processor performance data from the processor.

[0189] The frequency modulation module can periodically obtain one or more of the following from the scheduling module: frame loss information, processor core status, and system load; and periodically obtain one or more of the following from the temperature control module: user scenario and device temperature. Optionally, the frequency modulation module can obtain one or more of the following from the scheduling module and / or the temperature control module when it receives a notification from the scheduling module and / or the temperature control module: frame loss information, processor core status, and system load; and user scenario and device temperature.

[0190] The frequency modulation module can determine the processor cache frequency based on one or more of the processor performance data, user scenario, system load, processor core status, device temperature, and frame drop information mentioned above. The specific determination process has been described above. Figure 4 The embodiments have been described in detail, and will not be repeated in this application. After determining the processor cache frequency, the frequency adjustment module can call the underlying interface to set the processor cache frequency, thereby adjusting the frequency of the processor cache.

[0191] In the second scenario, assuming the memory mentioned above is a system cache, the frequency adjustment process of the system cache is as follows:

[0192] The processor is equipped with Timer 1, which can acquire processor performance data when the time interval is greater than the preset threshold. In other words, processor performance data can be acquired periodically.

[0193] The frequency modulation module is equipped with a timer 2, which can obtain processor performance data from the processor when the time interval is greater than the preset water line. In other words, it can periodically obtain processor performance data from the processor.

[0194] The system cache has hardware registers that record the amount of data accessed by the processor. A monitor can be configured for the system cache, periodically reading these hardware registers to obtain the amount of data accessed by the processor in the previous cycle. When the amount of accessed data exceeds a preset threshold, the monitor sends an interrupt notification carrying that accessed data to the frequency modulation module. For example, this interrupt notification can be generated by hardware support and can be configured using a DTS file.

[0195] The frequency modulation module can periodically obtain one or more of the following from the scheduling module: frame loss information, processor core status, and system load; and periodically obtain one or more of the following from the temperature control module: user scenario and device temperature. Optionally, the frequency modulation module can obtain one or more of the following from the scheduling module and / or the temperature control module when it receives a notification from the scheduling module and / or the temperature control module: frame loss information, processor core status, and system load; and user scenario and device temperature.

[0196] The frequency modulation module can determine the system cache frequency based on one or more of the following: processor performance data, the amount of data accessed by the processor to the system cache, user scenario, system load, processor core status, device temperature, and frame drop information. The specific determination process has been described above. Figure 4 The embodiments have been described in detail, and will not be repeated in the embodiments of this application. After the frequency modulation module determines the system cache frequency, it can call the underlying interface to set the system cache frequency, thereby adjusting the frequency of the system cache.

[0197] In the second scenario, assuming the memory described above is the main memory, the frequency adjustment process of the main memory is as follows:

[0198] The processor is equipped with Timer 1, which can acquire processor performance data when the time interval is greater than the preset threshold. In other words, processor performance data can be acquired periodically.

[0199] The frequency modulation module is equipped with a timer 2, which can obtain processor performance data from the processor when the time interval is greater than the preset water line. In other words, it can periodically obtain processor performance data from the processor.

[0200] The main memory has hardware registers that record the amount of data accessed by the processor. A monitor can be configured for the main memory, periodically reading these hardware registers to obtain the amount of data accessed by the processor in the previous cycle. When the amount of accessed data exceeds a preset threshold, the monitor sends an interrupt notification carrying that amount of accessed data to the frequency modulation module. For example, this interrupt notification can be generated by hardware and configured using a DTS file.

[0201] The frequency modulation module can periodically obtain one or more of the following from the scheduling module: frame loss information, processor core status, and system load; and periodically obtain one or more of the following from the temperature control module: user scenario and device temperature. Optionally, the frequency modulation module can obtain one or more of the following from the scheduling module and / or the temperature control module when it receives a notification from the scheduling module and / or the temperature control module: frame loss information, processor core status, and system load; and user scenario and device temperature.

[0202] The frequency modulation module can determine the main memory frequency based on one or more of the following: processor performance data, processor access data to main memory, user scenario, system load, processor core status, device temperature, and frame drop information. The specific determination process has been described above. Figure 4The embodiments have been described in detail, and will not be repeated in this application. After determining the main memory frequency, the frequency modulation module can call the underlying interface to set the main memory frequency, thereby adjusting the main memory frequency.

[0203] Figure 6 This is a schematic diagram of a frequency adjustment device provided in an embodiment of this application. The device can be implemented as part or all of an electronic device by software, hardware, or a combination of both. The electronic device can be as described above. Figures 2 to 3 The electronic device 100 described in the embodiment. See also... Figure 6 The device includes: a first acquisition module 601, a second acquisition module 602, and an adjustment module 603.

[0204] The first acquisition module 601 is used to execute the above. Figure 4 Step 401 in the embodiment;

[0205] The second acquisition module 602 is used to execute the above. Figure 4 Step 402 in the embodiment;

[0206] Adjustment module 603 is used to execute the above. Figure 4 Step 403 in the embodiment.

[0207] In this embodiment, processor performance data and device operating information are acquired periodically. When a first preset condition is met based on the device operating information, the memory frequency is adjusted according to the processor performance data. This allows for timely frequency adjustment based on device operating conditions, avoiding adjustment lag and ensuring dynamic frequency supply. Consequently, it avoids power waste due to over-supply or poor performance due to insufficient frequency supply, resulting in optimal system performance and power consumption.

[0208] It should be noted that the frequency adjustment device provided in the above embodiments is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0209] The functional units and modules in the above embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of the embodiments of this application.

[0210] The frequency adjustment device and frequency adjustment method provided in the above embodiments belong to the same concept. The specific working process and technical effects of the units and modules in the above embodiments can be found in the method embodiments section, and will not be repeated here.

[0211] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line, DSL) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer, or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., Digital Versatile Discs (DVDs)), or semiconductor media (e.g., Solid State Disks (SSDs)).

[0212] The above-described embodiments are optional embodiments provided by this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the technical scope disclosed in this application should be included within the protection scope of this application.

Claims

1. A frequency adjustment method, characterized in that, Applied to an electronic device, the electronic device including a processor and a memory, the method includes: The processor performance data is periodically acquired, and the processor performance data is the performance management unit (PMU) data of the processor. Obtain device operation information, which includes user scenarios and / or system load; If the device operation information determines that the first preset condition is met, then the frequency of the memory is adjusted according to the processor performance data. If the second preset condition is determined to be met based on the device operation information, the frequency of the memory is adjusted according to the actual frequency of the processor. Wherein, both the first preset condition and the second preset condition are used to indicate the performance requirements of the electronic device, and the performance requirements indicated by the second preset condition are higher than those of the first preset condition.

2. The method as described in claim 1, characterized in that, The method further includes: Each time the processor performance data is acquired, the frequency of the memory is adjusted based on the processor performance data.

3. The method as described in claim 1, characterized in that, The method further includes: If the amount of data accessed by the processor to the memory is greater than a first data amount threshold, or if the amount of data accessed by the processor to the memory is less than a second data amount threshold, then the frequency of the memory is adjusted according to the amount of data accessed.

4. The method according to any one of claims 1 to 3, characterized in that, The device operation information includes user scenarios, and the first preset condition is: the user scenario is a non-user operation scenario; or... The device operation information includes system load, and the first preset condition is: the system load is less than a first load threshold; or... The device operation information includes user scenarios and system load. The first preset condition is: the user scenario is a non-user operation scenario and the system load is less than a first load threshold; or, the user scenario is a user operation scenario and the system load is less than a first load threshold; or, the user scenario is a non-user operation scenario, the system load is greater than a second load threshold, and the processor performance has not deteriorated.

5. The method according to any one of claims 1 to 4, characterized in that, Adjusting the memory frequency based on the processor performance data includes: If the processor performance data meets the frequency adjustment conditions, then the estimated frequency of the processor is calculated based on the processor performance data; Based on the processor's estimated frequency, a first target frequency is determined using a preset algorithm; The frequency of the memory is adjusted according to the first target frequency.

6. The method as described in claim 1, characterized in that, If the second preset condition is determined to be met based on the device operating information, then adjusting the frequency of the memory according to the actual frequency of the processor includes: If the device operation information determines that the second preset condition is met, then the actual frequency of the processor is obtained; The first target frequency is determined by a preset algorithm based on the actual frequency of the processor. The frequency of the memory is adjusted according to the first target frequency.

7. The method as described in claim 1 or 6, characterized in that, The device operation information includes user scenarios, and the second preset condition is: the user scenario is a user operation scenario; or... The device operation information includes system load, and the second preset condition is: the system load is greater than a second load threshold; or... The device operation information includes user scenarios and system load. The second preset condition is: the user scenario is a user operation scenario and the system load is greater than the second load threshold, or the user scenario is a non-user operation scenario, the system load is greater than the second load threshold, and the processor performance deteriorates.

8. The method as described in claim 5 or 6, characterized in that, The device operation information also includes frame loss information, and the method further includes: The frame loss information is used to detect whether there is a risk of stuttering. Before adjusting the frequency of the memory according to the first target frequency, the method further includes: If a risk of lag is detected within a preset time period prior to the current moment, the first target frequency is increased.

9. The method as described in any one of claims 5, 6, and 8, characterized in that, The device operating information also includes device temperature, and adjusting the memory frequency according to the first target frequency includes: If the device temperature is greater than or equal to a first temperature threshold and less than or equal to a second temperature threshold, and if the first target frequency is less than a first preset frequency, then the frequency of the memory is adjusted to the first preset frequency; if the first target frequency is greater than a second preset frequency, then the frequency of the memory is adjusted to the second preset frequency; if the first target frequency is greater than or equal to the first preset frequency and less than or equal to the second preset frequency, then the frequency of the memory is adjusted to the first target frequency.

10. The method as described in any one of claims 5, 6, 8, and 9, characterized in that, The device operating information also includes device temperature, and determining the frequency of the memory based on the first target frequency includes: If the device temperature is greater than the second temperature threshold, the frequency of the memory is adjusted to the first target frequency.

11. The method according to any one of claims 1 to 10, characterized in that, The processor includes one or more processor cores, and the device operation information further includes processor core status. Before adjusting the memory frequency based on the processor performance data, the method further includes: The performance data of processor cores whose processor core state is in a dormant state are filtered out from the processor performance data.

12. The method according to any one of claims 1 to 11, characterized in that, The memory is a processor cache, a system cache, or main memory.

13. An electronic device, characterized in that, The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the method as described in any one of claims 1 to 12.

14. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1 to 12.

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