Semiconductor package and manufacturing method thereof

Abstract

The invention discloses a semiconductor package and a manufacturing method thereof, the semiconductor package comprises an EM I shielding layer, and the semiconductor package has the beneficial effects that a stable supporting structure is provided for a welding wire by arranging a connecting bump and a conductive copper rod between the EM I shielding layer and a supporting mold, and the design effectively prevents the welding wire from shifting or unsoldering in the packaging process, so that the reliability of the packaging process is improved. The packaging yield and reliability are remarkably improved, the mechanical connection is enhanced by using the conductive copper rod and the conductive bump, and the good electrical connection is ensured, so that the stability and the performance of the whole circuit are improved; through the design that the sealing filling groove and the sealing groove are introduced into the packaging structure, the sealing space formed through injection molding effectively prevents external moisture, dust and other harmful substances from invading, the supporting bottom frame is tightly matched with the outer sealing frame and the sealing bottom frame, and the sealing material is filled to jointly form an efficient sealing system. And all-around protection is provided for circuits and elements in the package.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a semiconductor package and a manufacturing method thereof. Background Art

[0002] Semiconductor packaging refers to the process of processing tested wafers into individual chips according to product model and functional requirements. This involves placing the fabricated semiconductor device in a supportive and protective plastic, ceramic, or metal housing and connecting it to external driver circuits and other electronic components. Semiconductor packaging is the process of encapsulating the semiconductor chip in a microelectronic device within a specific housing. This typically involves attaching the chip to a package base or substrate and covering it with an encapsulating material (such as plastic, ceramic, or metal). The primary purpose of packaging is to protect the chip from mechanical, chemical, or environmental damage and provide electrical connections. However, existing semiconductor packaging technology suffers from the following major issues: Lack of support for solder wires: Solder wire components are prone to shifting or desoldering during the packaging process due to a lack of support structure, impacting package yield and reliability, and making it difficult to ensure the safety and stability of the internal circuitry. Inadequate sealing: The lack of a sealant groove in the package results in poor sealing, allowing external moisture, dust, and other harmful substances to enter, damaging circuits and components and shortening their service life. These issues limit the performance and stability of semiconductor devices, necessitating the development of new packaging technologies to improve their reliability and service life. Summary of the Invention

[0003] The purpose of the present invention is to provide a semiconductor package and a manufacturing method thereof, so as to solve the following major problems existing in the existing semiconductor packaging technology proposed in the above background technology: lack of welding wire support: the welding wire components are easily offset or desoldered during the packaging process due to the lack of support structure, affecting the packaging yield and reliability, and the safety and stability of the internal circuit of the package are difficult to ensure; insufficient sealing performance: the package does not have a sealing glue groove, the packaging sealing effect is poor, and external moisture, dust and other harmful substances are easy to invade, causing damage to the circuits and components and shortening the service life. These problems limit the performance and stability of semiconductor devices, and there is an urgent need to develop new packaging technologies to improve their reliability and service life.

[0004] To achieve the above-mentioned object, the present invention provides the following technical solution: a semiconductor package, comprising an EM I shielding layer, wherein the top of the EM I shielding layer is fixedly connected to a No. 1 support mold, the top of the No. 1 support mold is fixedly connected to a No. 2 support mold, the top of the No. 2 support mold is fixedly connected to a semiconductor substrate, a plurality of connecting bumps are fixedly connected to the interior of the EM I shielding layer at equal intervals, the bottom of the connecting bumps is fixedly connected to a No. 1 conductive bump, the top of the No. 1 conductive bump is fixedly connected to the EM I shielding layer, and the No. 1 conductive bump is fixedly connected to the top of the No. 1 conductive bump. I shielding layer is fixed, a connecting component is provided inside the No. 1 support mold, and the connecting component is connected to the connecting bump, a conductive component is provided inside the semiconductor substrate, and the conductive component is connected to the connecting component, top conductive blocks are equidistantly provided on the top of the conductive component, the top of the top conductive block is fixedly connected to a top metal plate, the top of the top metal plate is fixedly connected to a No. 1 conductive block, a metal trace is provided on the top of the No. 1 conductive block, a plurality of No. 2 conductive blocks are equidistantly provided on the top of the metal trace, a packaging metal plate is provided on the top of the No. 2 conductive block, a No. 1 bare chip is provided on the top of the semiconductor substrate, a No. 2 bare chip is provided on the top of the No. 1 bare chip, and the No. 2 bare chip is provided on the top of the No. 1 bare chip. A No. 3 bare chip is arranged on the top of the No. 1 bare chip, a plurality of No. 1 connection points are equidistantly arranged inside the No. 1 bare chip, a plurality of No. 2 connection points are equidistantly arranged on the top of the No. 3 bare chip, the No. 1 connection point is connected to the metal trace by wire welding, the bottom of the package metal plate is connected to the No. 2 connection point, a shell is arranged above the No. 3 bare chip, a package fixing component is arranged on the inner side of the shell, which is used to fix the package position of the No. 1 conductive block, the metal trace, the No. 2 conductive block and the package metal plate, an outer closed frame is fixed to the outer side of the shell, a closed bottom frame is fixed to the bottom of the outer closed frame, a No. 1 sealing filling groove is provided at the bottom of the outer closed frame, and a supporting bottom frame is provided at the bottom of the EMI shielding layer.

[0005] Preferably, the connecting assembly includes a conductive copper rod, and a plurality of conductive copper rods are fixedly connected to the top of the connecting protrusion at equal distances, the conductive copper rod is fixedly connected to the No. 1 support mold, and the top of the conductive copper rod is fixedly connected to the No. 2 conductive protrusion, the No. 2 conductive protrusion is fixedly connected to the No. 2 support mold, and the No. 2 conductive protrusion is connected to the conductive assembly.

[0006] Preferably, the conductive component includes a No. 1 metal wire pattern, and a plurality of No. 1 metal wire patterns are fixedly connected inside the semiconductor substrate at equal intervals. The bottom of the No. 1 metal wire pattern is fixedly connected to the No. 2 conductive bump, and the top of the No. 1 metal wire pattern is fixedly connected to a conductive support block. A No. 2 metal wire pattern is provided on the top of the conductive support block, and the top of the No. 2 metal wire pattern is fixedly connected to the top conductive block.

[0007] Preferably, the package fixing component includes a No. 2 package inner support frame, the outer side of the metal trace and the No. 2 conductive block is fixedly connected to the No. 2 package inner support frame, the outer side of the No. 2 package inner support frame is fixedly connected to the inner side of the outer shell, the outer side of the No. 2 conductive block and the package metal plate is fixedly connected to the No. 1 package inner support frame, the outer side of the No. 1 package inner support frame is fixedly connected to the inner side of the outer shell, and the bottom of the No. 1 package inner support frame is fixedly connected to the No. 2 package inner support frame.

[0008] Preferably, a plurality of packaging supports are fixedly connected at equal intervals inside the shell, and the bottoms of the packaging supports are fixedly connected to the No. 1 packaging inner support frame.

[0009] Preferably, a plurality of connection grooves cooperating with the No. 1 conductive bumps are equidistantly provided on the top of the support bottom frame, and a plurality of No. 3 conductive bumps connected to the connection grooves are equidistantly provided on the bottom of the support bottom frame.

[0010] Preferably, a No. 2 sealing filling groove cooperating with the No. 1 sealing filling groove is provided on the top of the supporting bottom frame, and a closing groove cooperating with the closing bottom frame is provided on the inner side of the No. 2 sealing filling groove.

[0011] Preferably, a No. 2 electronic device is provided at the bottom of the No. 1 support mold, and the No. 2 electronic device is fixedly connected to the EMI shielding layer.

[0012] Preferably, a No. 1 electronic device cooperating with the No. 2 electronic device is installed on the inner side of the supporting bottom frame.

[0013] A method for manufacturing a semiconductor package comprises the following steps:

[0014] S1. Connect the conductive bump No. 1 to the bottom of the EM 1 shielding layer using conductive adhesive, and install the support mold No. 1 on top of the EM 1 shielding layer using adhesive. Install the support mold No. 2 on top of the support mold No. 1 using adhesive to ensure electrical and mechanical connection between the parts.

[0015] S2. Multiple connecting bumps are embedded and installed equidistantly inside the EM 1 shielding layer. The bottom of each connecting bump is electrically connected to the first conductive bump via a conductive material. Multiple conductive copper rods are installed equidistantly on top of the connecting bumps by welding. The conductive copper rods pass through the holes reserved in the first support mold. A second conductive bump is installed on top of the conductive copper rods by welding again to ensure that a certain electrical connection is maintained between the second conductive bump and the second support mold.

[0016] S3. Embed and install multiple first metal line patterns within the semiconductor substrate, electrically connect the bottom of each first metal line pattern to the second conductive bump via a conductive material, install a conductive support block on top of the first metal line pattern by welding, and set a second metal line pattern on top of the conductive support block, electrically connect the top of the second metal line pattern to the top conductive block via a conductive material, thereby constructing a complete conductive path;

[0017] S4. Install a top metal plate on top of the top conductive block through a conductive material, and install a No. 1 conductive block on top of the top metal plate again through a conductive material;

[0018] S5. Forming a metal trace on top of the No. 1 conductive block by electroplating, disposing a plurality of No. 2 conductive blocks equidistantly on top of the metal trace, and electrically connecting the second conductive blocks to the metal trace through a conductive material;

[0019] S6. Install a packaging metal plate on top of the second conductive block using conductive material to provide protection for subsequent packaging and testing. On top of the semiconductor substrate, stack the first die, the second die, and the third die in sequence using adhesive to form a multi-layer circuit structure.

[0020] S7. Electrically connect the first connection point inside the first die to the corresponding point on the metal trace by wire welding. At the same time, electrically connect the bottom of the package metal plate to the second connection point on the top of the third die by conductive material.

[0021] S8. Install a housing above the third bare die using adhesive. Install the first and second package inner support frames on the inner side of the housing using injection molding. These frames support and secure the first conductive block, metal traces, the second conductive block, and the package metal plate through their reserved structures.

[0022] S9. Install an outer sealing frame on the outer side of the housing using adhesive, and install a closed bottom frame on the bottom of the outer sealing frame to form an external frame of the packaging structure;

[0023] S10. A first sealing filling groove is formed by injection molding at the bottom of the outer sealing frame. A second sealing filling groove is also formed on the top of the supporting bottom frame by injection molding to match the first sealing filling groove. A closed groove is also formed inside the second sealing filling groove by injection molding to match the closed bottom frame, thereby providing a sealed space for packaging.

[0024] S11. Multiple connection grooves that mate with the first conductive bumps are equidistantly formed on the top of the supporting base frame through the reserved space, and multiple third conductive bumps that connect to the connection grooves are equidistantly formed on the bottom of the supporting base frame. A second electronic device is mounted on the bottom of the first supporting mold using adhesive, ensuring a certain electrical connection between the second electronic device and the EMI shielding layer. An electronic device that mates with the second electronic device is mounted on the inner side of the supporting base frame through the reserved space, ensuring electrical and mechanical connection between the components.

[0025] S12. Use appropriate sealing materials to fill the No. 1 sealing filling groove and the No. 2 sealing filling groove, and ensure the sealing of the entire package by pouring to prevent interference from the external environment;

[0026] S13. Conduct final inspection and testing on the completed semiconductor package, including functional testing, performance testing, and reliability testing, to ensure that its functions and performance meet the design requirements and provide reliable protection for subsequent packaging and application.

[0027] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

[0028] Compared with the prior art, the beneficial effects of the present invention are as follows: by arranging connecting bumps and conductive copper rods between the EMI shielding layer and the support mold, a stable support structure is provided for the welding wires. This design effectively prevents the welding wires from being offset or desoldering during the packaging process, significantly improving the yield and reliability of the packaging. The use of conductive copper rods and conductive bumps not only enhances the mechanical connection, but also ensures good electrical connection, thereby improving the stability and performance of the overall circuit; by introducing the design of sealing filling grooves and closed grooves in the packaging structure, the sealed space formed by injection molding effectively prevents the intrusion of external harmful substances such as moisture and dust. The close fit between the supporting bottom frame and the outer closed frame and the closed bottom frame, as well as the filling of the sealing material, together constitute an efficient sealing system, which provides all-round protection for the circuits and components inside the package and extends the service life; the packaging structure adopts a fully enclosed design, that is, all key components are tightly wrapped by the outer shell and the support frame, forming a complete protection system, which not only improves the corrosion and oxidation resistance of the package, but also extends the service life of the package. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the embodiments or the description of the prior art. Obviously, the drawings described below are merely exemplary, and those skilled in the art can, without inventive effort, derive other implementation drawings based on the provided drawings.

[0030] Figure 1 Schematic diagram of the internal structure of the present invention;

[0031] Figure 2 This is a schematic diagram of the packaging metal plate structure of the present invention;

[0032] Figure 3 This is a schematic diagram of the structure of the No. 1 package inner support frame and the No. 2 package inner support frame of the present invention;

[0033] Figure 4 Schematic diagram of the overall internal structure of the present invention;

[0034] Figure 5 Schematic diagram of the internal structure of the semiconductor substrate of the present invention;

[0035] Figure 6 This is a schematic diagram of the internal structure of the third bare chip of the present invention;

[0036] Figure 7 This is a schematic diagram of the supporting bottom frame structure of the present invention;

[0037] Figure 8 This is a schematic diagram of the semiconductor substrate structure of the present invention;

[0038] Figure 9 It is a schematic diagram of the overall structure of the present invention.

[0039] Figure: 1, EM I shielding layer; 2, support mold No. 1; 3, support mold No. 2; 4, semiconductor substrate; 5, conductive bump No. 1; 6, connection bump; 7, conductive copper rod; 8, conductive bump No. 2; 9, metal line pattern No. 1; 10, conductive support block; 11, metal line pattern No. 2; 12, top conductive block; 13, top metal plate; 14, bare die No. 1; 15, connection point No. 1; 16, bare die No. 2; 17, bare die No. 3; 18, connection point No. 2; 19, housing; 20 , outer closing frame; 21, closed bottom frame; 22, No. 1 sealing filling groove; 23, supporting bottom frame; 24, No. 3 conductive bump; 25, No. 2 sealing filling groove; 26, closed groove; 27, No. 1 electronic device; 28, connecting groove; 29, No. 2 electronic device; 30, No. 1 conductive block; 31, metal trace; 32, No. 2 conductive block; 33, packaging metal plate; 34, No. 1 package inner support frame; 35, No. 2 package inner support frame; 36, packaging support. DETAILED DESCRIPTION

[0040] Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present disclosure. Rather, they are merely examples of devices consistent with certain aspects of the present disclosure, as detailed in the appended claims.

[0041] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0042] See also Figures 1 to 9As shown, a semiconductor package according to an embodiment of the present invention includes an EM I shielding layer 1, the top of the EM I shielding layer 1 is fixedly connected to a No. 1 support mold 2, the top of the No. 1 support mold 2 is fixedly connected to a No. 2 support mold 3, the top of the No. 2 support mold 3 is fixedly connected to a semiconductor substrate 4, a plurality of connection bumps 6 are fixedly connected to the interior of the EM I shielding layer 1 at equal intervals, the bottom of the connection bump 6 is fixedly connected to a No. 1 conductive bump 5, the top of the No. 1 conductive bump 5 is fixedly connected to the EM The shielding layer 1 is fixed, a connecting component is provided inside the No. 1 support mold 2, and the connecting component is connected to the connecting protrusion 6. A conductive component is provided inside the semiconductor substrate 4, and the conductive component is connected to the connecting component. Top conductive blocks 12 are equidistantly provided on the top of the conductive component, and a top metal plate 13 is fixed to the top of the top conductive block 12. A No. 1 conductive block 30 is fixed to the top of the top metal plate 13. A metal trace 31 is provided on the top of the No. 1 conductive block 30, and a plurality of No. 2 conductive blocks 32 are equidistantly provided on the top of the metal trace 31. A packaging metal plate 33 is provided on the top of the No. 2 conductive block 32. A No. 1 bare chip 14 is provided on the top of the semiconductor substrate 4, and a No. 2 bare chip 16 is provided on the top of the No. 1 bare chip 14. There is a No. 3 bare chip 17, a plurality of No. 1 connection points 15 are equidistantly arranged inside the No. 1 bare chip 14, a plurality of No. 2 connection points 18 are equidistantly arranged on the top of the No. 3 bare chip 17, the No. 1 connection point 15 is connected to the metal trace 31 by wire welding, and the bottom of the package metal plate 33 is connected to the No. 2 connection point 18. A shell 19 is set above the No. 3 bare chip 17, and a package fixing component is set on the inner side of the shell 19 for fixing the package position of the No. 1 conductive block 30, the metal trace 31, the No. 2 conductive block 32, and the package metal plate 33. The outer side of the shell 19 is fixed with an outer sealing frame 20, the bottom of the outer sealing frame 20 is fixed with a closed bottom frame 21, and the bottom of the outer sealing frame 20 is provided with a No. 1 sealing filling groove 22, EM A supporting bottom frame 23 is provided at the bottom of the I shielding layer 1, providing a semiconductor package with a complete structure and clear layers. By fixing the various components, good electromagnetic shielding of the EM I shielding layer 1 and the supporting effect of the No. 1 support mold 2 and the No. 2 support mold 3 are achieved, ensuring the stability and reliability of the semiconductor package.

[0043] Among them, the connecting component includes a conductive copper rod 7, and multiple conductive copper rods 7 are fixedly connected to the top of the connecting bump 6 at equal distances. The conductive copper rod 7 is fixed to the No. 1 support mold 2, and the top of the conductive copper rod 7 is fixed to the No. 2 conductive bump 8, which is fixed to the No. 2 support mold 3. The No. 2 conductive bump 8 is connected to the conductive component. By introducing the conductive copper rod 7 and the No. 2 conductive bump 8, the electrical signal between the EM I shielding layer 1 and the semiconductor substrate 4 is effectively connected, thereby improving the conductive performance and signal transmission efficiency of the package.

[0044] Among them, the conductive component includes a metal wire pattern No. 1 9, and multiple metal wire patterns No. 1 are fixedly connected inside the semiconductor substrate 4 at equal intervals. The bottom of the metal wire pattern No. 1 is fixedly connected to the conductive bump No. 2 8, and the top of the metal wire pattern No. 1 is fixedly connected to the conductive support block 10. The top of the conductive support block 10 is provided with a metal wire pattern No. 2 11, and the top of the metal wire pattern No. 2 11 is fixedly connected to the top conductive block 12. The metal wire pattern No. 1 and the metal wire pattern No. 2 11 are used to construct a conductive path inside the semiconductor substrate 4, providing a reliable foundation for signal transmission and distribution.

[0045] Among them, the package fixing component includes a No. 2 package inner support frame 35, the outer side of the metal trace 31 and the No. 2 conductive block 32 is fixedly connected to the No. 2 package inner support frame 35, the outer side of the No. 2 package inner support frame 35 is fixedly connected to the inner side of the outer shell 19, the outer side of the No. 2 conductive block 32 and the package metal plate 33 is fixedly connected to the No. 1 package inner support frame 34, the outer side of the No. 1 package inner support frame 34 is fixedly connected to the inner side of the outer shell 19, and the bottom of the No. 1 package inner support frame 34 is fixedly connected to the No. 2 package inner support frame 35. By fixing the No. 1 package inner support frame 34 and the No. 2 package inner support frame 35, key components such as the metal trace 31, the No. 2 conductive block 32 and the package metal plate 33 are effectively fixed, thereby improving the stability and durability of the package.

[0046] Among them, multiple packaging supports 36 are equidistantly fixed inside the shell 19, and the bottom of the packaging support 36 is fixed to the No. 1 package inner support frame 34. The provision of the packaging support 36 further enhances the overall structure of the package and improves the protection and support effect of the internal components.

[0047] Among them, the top of the supporting bottom frame 23 is equidistantly provided with a plurality of connecting grooves 28 that cooperate with the No. 1 conductive bump 5, and the bottom of the supporting bottom frame 23 is equidistantly provided with a plurality of No. 3 conductive bumps 24 connected to the connecting grooves 28. Through the design of the connecting grooves 28 and the No. 3 conductive bumps 24, the effective connection between the bottom of the package and the external circuit is achieved, thereby improving the scalability and flexibility of the package.

[0048] Among them, a second sealing filling groove 25 is opened on the top of the supporting bottom frame 23 to cooperate with the first sealing filling groove 22, and a closed groove 26 is opened on the inner side of the No. 2 sealing filling groove 25 to cooperate with the closed bottom frame 21. The opening of the No. 2 sealing filling groove 25 and the closed groove 26 provides additional sealing and protection for the package, effectively preventing interference and damage from the external environment.

[0049] Among them, the bottom of the No. 1 support mold 2 is provided with a No. 2 electronic device 29, which is fixedly connected to the EM I shielding layer 1. The No. 2 electronic device 29 is provided at the bottom of the No. 1 support mold 2 and is fixedly connected to the EM I shielding layer 1, which provides additional electronic functions for the package and ensures the electromagnetic shielding effect through the isolation effect of the EM I shielding layer 1.

[0050] Among them, the No. 1 electronic device 27 that cooperates with the No. 2 electronic device 29 is installed on the inner side of the supporting bottom frame 23. The No. 1 electronic device 27 that cooperates with the No. 2 electronic device 29 is installed on the inner side of the supporting bottom frame 23, realizing the complementarity and collaborative work of the electronic components inside the package. The No. 1 electronic device 27 and the No. 2 electronic device 29 achieve functional complementarity through circuit connection, thereby improving the overall performance and functional diversity.

[0051] A method for manufacturing a semiconductor package, characterized by comprising the following steps:

[0052] S1. Connect the first conductive bump 5 to the bottom of the EM 1 shielding layer 1 using conductive adhesive, and install the first support mold 2 on top of the EM 1 shielding layer 1 using adhesive. Install the second support mold 3 on top of the first support mold 2 using adhesive to ensure electrical and mechanical connection between the parts.

[0053] S2. Multiple connecting bumps 6 are embedded and installed at equal intervals within the EM I shielding layer 1. The bottom of each connecting bump 6 is electrically connected to the first conductive bump 5 via a conductive material. Multiple conductive copper rods 7 are installed at equal intervals on top of the connecting bumps 6 by welding. The conductive copper rods 7 pass through the holes reserved in the first support mold 2. A second conductive bump 8 is installed on the top of the conductive copper rods 7 by welding again to ensure that a certain electrical connection is maintained between the second conductive bump 8 and the second support mold 3.

[0054] S3. Embed multiple first metal line patterns 9 within the semiconductor substrate 4. The bottom of each first metal line pattern 9 is electrically connected to the second conductive bump 8 via a conductive material. A conductive support block 10 is installed on top of the first metal line pattern 9 by welding. A second metal line pattern 11 is disposed on top of the conductive support block 10. The top of the second metal line pattern 11 is electrically connected to the top conductive block 12 via a conductive material, thereby constructing a complete conductive path.

[0055] S4. Install the top metal plate 13 on the top of the top conductive block 12 through a conductive material, and install the first conductive block 30 on the top of the top metal plate 13 through a conductive material again;

[0056] S5. Form a metal trace 31 on top of the first conductive block 30 by electroplating, and arrange multiple second conductive blocks 32 equidistantly on top of the metal trace 31, and electrically connect them to the metal trace 31 through a conductive material.

[0057] S6. Install a packaging metal plate 33 on top of the second conductive block 32 using conductive material to provide protection for subsequent packaging and testing. On top of the semiconductor substrate 4, the first die 14, the second die 16, and the third die 17 are stacked in sequence using adhesive to form a multi-layer circuit structure.

[0058] S7. Electrically connect the first connection point 15 inside the first die 14 to the corresponding point on the metal trace 31 by wire welding. At the same time, electrically connect the bottom of the package metal plate 33 to the second connection point 18 on the top of the third die 17 by conductive material.

[0059] S8. Install housing 19 above bare die 17 using adhesive. Install inner package support frame 34 and inner package support frame 35 on the inner side of housing 19 by injection molding. These inner package support frames 34 and 35 support and secure conductive block 30, metal trace 31, conductive block 32, and package metal plate 33 through their reserved structures.

[0060] S9, installing the outer sealing frame 20 on the outer side of the housing 19 by adhesive, and installing the closed bottom frame 21 on the bottom of the outer sealing frame 20 to form the outer frame of the packaging structure;

[0061] S10. A first sealing filling groove 22 is formed by injection molding at the bottom of the outer sealing frame 20. A second sealing filling groove 25 is also formed by injection molding on the top of the supporting bottom frame 23 to match the first sealing filling groove 22. A sealing groove 26 is also formed by injection molding inside the second sealing filling groove 25 to match the sealing bottom frame 21, thereby providing a sealed space for packaging.

[0062] S11. A plurality of connection grooves 28 cooperating with the first conductive bumps 5 are equidistantly formed on the top of the support base frame 23 through the reserved space. A plurality of third conductive bumps 24 connected to the connection grooves 28 are equidistantly provided on the bottom of the support base frame 23. A second electronic device 29 is mounted on the bottom of the first support mold 2 using adhesive, ensuring a certain electrical connection between the second electronic device 29 and the EM I shielding layer 1. A first electronic device 27 cooperating with the second electronic device 29 is mounted on the inner side of the support base frame 23 through the reserved space to ensure electrical and mechanical connection between the various components.

[0063] S12, using appropriate sealing materials to fill the No. 1 sealing filling groove 22 and the No. 2 sealing filling groove 25, and ensure the sealing of the entire package by pouring to prevent interference from the external environment;

[0064] S13. Conduct final inspection and testing on the completed semiconductor package, including functional testing, performance testing, and reliability testing, to ensure that its functions and performance meet the design requirements and provide reliable protection for subsequent packaging and application.

[0065] Specifically, when in use, a stable and reliable packaging infrastructure is constructed by firmly fixing the EM I shielding layer 1, the No. 1 support mold 2, the No. 2 support mold 3 and the semiconductor substrate 4. This design not only enhances the electromagnetic shielding performance, but also significantly improves the supporting strength of the package, providing a solid foundation for subsequent electronic component installation and signal transmission. By connecting the No. 1 conductive bump 5, the connecting bump 6, the conductive copper rod 7, the No. 2 conductive bump 8 components, and cleverly combining the No. 1 metal wire pattern 9 and the No. 2 metal wire pattern 11 conductive components, the present invention realizes efficient and stable transmission of electrical signals inside the package. This design not only improves the conductive performance of the package, but also significantly improves the signal transmission efficiency, ensuring the normal operation of the electronic equipment. The design of the conductive support block 10 and the layout of the No. 1 metal wire pattern 9 and the No. 2 metal wire pattern 11 inside the package provide a solid foundation for signal transmission and distribution. Solid foundation, these conductive paths not only ensure the stable and reliable electrical connection between the components inside the package, but also provide a strong guarantee for the rapid transmission of signals, the package fixing components, including the No. 1 package inner support frame 34, the No. 2 package inner support frame 35, and the close cooperation with the shell 19, effectively fix the metal traces 31, the No. 2 conductive block 32 and the package metal plate 33 key components, at the same time, the package support 36 arranged inside the shell further enhances the overall structure of the package, improves the durability and stability of the package, the design of the supporting bottom frame 23 and the connecting groove 28, the No. 3 conductive bump 24, realizes the effective connection between the bottom of the package and the external circuit, at the same time, the opening of the No. 2 sealing filling groove 25 and the closing groove 26 provides additional sealing and protection for the package, effectively preventing interference and damage from the external environment, the No. 2 electronic device 29 set at the bottom of the No. 1 support mold 2 and the EM The fixing of the I shielding layer 1 and the cooperation between the No. 1 electronic device 27 and the No. 2 electronic device 29 installed on the inner side of the supporting bottom frame 23 provide the package with additional electronic functions, such as signal processing and amplification. These additional electronic functions not only enrich the functional diversity of the package, but also further improve the overall performance and reliability.

[0066] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to these embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the appended claims and their equivalents.

[0067] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the disclosure herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, and the true scope of the present disclosure is indicated by the following claims.

Claims

1. A semiconductor package, characterized in that: The invention comprises an EMI shielding layer (1), wherein the top of the EMI shielding layer (1) is fixedly connected to a first support mold (2), the top of the first support mold (2) is fixedly connected to a second support mold (3), the top of the second support mold (3) is fixedly connected to a semiconductor substrate (4), a plurality of connection bumps (6) are fixedly connected at equal intervals inside the EMI shielding layer (1), the bottom of the connection bumps (6) is fixedly connected to a first conductive bump (5), the top of the first conductive bump (5) is fixedly connected to the EMI shielding layer (1), and a connection component is arranged inside the first support mold (2), and the connection component is connected to the semiconductor substrate (4). The semiconductor substrate (4) is connected to a connecting bump (6), a conductive component is arranged inside the semiconductor substrate (4), the conductive component is connected to the connecting component, a top conductive block (12) is arranged equidistantly on the top of the conductive component, a top metal plate (13) is fixedly connected to the top of the top conductive block (12), a No. 1 conductive block (30) is fixedly connected to the top of the top metal plate (13), a metal trace (31) is arranged on the top of the No. 1 conductive block (30), a plurality of No. 2 conductive blocks (32) are arranged equidistantly on the top of the metal trace (31), and a packaging metal plate is arranged on the top of the No. 2 conductive block (32). (33), a bare chip No. 1 (14) is arranged on the top of the semiconductor substrate (4), a bare chip No. 2 (16) is arranged on the top of the bare chip No. 1 (14), a bare chip No. 3 (17) is arranged on the top of the bare chip No. 2 (16), a plurality of bare chip No. 1 connection points (15) are arranged equidistantly inside the bare chip No. 1 (14), a plurality of bare chip No. 2 connection points (18) are arranged equidistantly on the top of the bare chip No. 3 (17), the bare chip No. 1 (15) is connected to the metal trace (31) by wire welding, and the bottom of the package metal plate (33) is connected to the bare chip No. 2 (18). A shell (19) is arranged above the third bare chip (17), and a packaging fixing component is arranged on the inner side of the shell (19) for fixing the packaging position of the first conductive block (30), the metal trace (31), the second conductive block (32), and the packaging metal plate (33). An outer closed frame (20) is fixedly connected to the outer side of the shell (19), and a closed bottom frame (21) is fixedly connected to the bottom of the outer closed frame (20). A first sealing filling groove (22) is provided at the bottom of the outer closed frame (20), and a supporting bottom frame (23) is arranged at the bottom of the EMI shielding layer (1).

2. A semiconductor package according to claim 1, characterized in that: The connection assembly comprises a conductive copper rod (7), a plurality of conductive copper rods (7) are fixedly connected to the top of the connection protrusion (6) at equal distances, the conductive copper rod (7) is fixedly connected to a No. 1 support mold (2), a No. 2 conductive protrusion (8) is fixedly connected to the top of the conductive copper rod (7), the No. 2 conductive protrusion (8) is fixedly connected to a No. 2 support mold (3), and the No. 2 conductive protrusion (8) is connected to the conductive assembly.

3. A semiconductor package according to claim 2, characterized in that: The conductive component comprises a first metal wire pattern (9), a plurality of first metal wire patterns (9) are fixedly connected at equal intervals inside the semiconductor substrate (4), the bottom of the first metal wire pattern (9) is fixedly connected to a second conductive bump (8), the top of the first metal wire pattern (9) is fixedly connected to a conductive support block (10), the top of the conductive support block (10) is provided with a second metal wire pattern (11), and the top of the second metal wire pattern (11) is fixedly connected to a top conductive block (12).

4. A semiconductor package according to claim 3, characterized in that: The package fixing assembly comprises a No. 2 package inner support frame (35), the outer sides of the metal trace (31) and the No. 2 conductive block (32) are fixedly connected to the No. 2 package inner support frame (35), the outer side of the No. 2 package inner support frame (35) is fixedly connected to the inner side of the outer shell (19), the outer sides of the No. 2 conductive block (32) and the package metal plate (33) are fixedly connected to the No. 1 package inner support frame (34), the outer side of the No. 1 package inner support frame (34) is fixedly connected to the inner side of the outer shell (19), and the bottom of the No. 1 package inner support frame (34) is fixedly connected to the No. 2 package inner support frame (35).

5. A semiconductor package according to claim 4, characterized in that: A plurality of packaging supports (36) are fixedly connected at equal intervals inside the shell (19), and the bottoms of the packaging supports (36) are fixedly connected to a No. 1 packaging inner support frame (34).

6. The semiconductor package according to claim 5, characterized in that: The top of the supporting bottom frame (23) is provided with a plurality of connection grooves (28) that cooperate with the No. 1 conductive protrusion (5) at equal intervals, and the bottom of the supporting bottom frame (23) is provided with a plurality of No. 3 conductive protrusions (24) that connect with the connection grooves (28) at equal intervals.

7. A semiconductor package according to claim 6, characterized in that: A second sealing filling groove (25) cooperating with the first sealing filling groove (22) is provided at the top of the supporting bottom frame (23), and a closing groove (26) cooperating with the closing bottom frame (21) is provided inside the second sealing filling groove (25).

8. The semiconductor package according to claim 7, characterized in that: A second electronic device (29) is provided at the bottom of the first support mold (2), and the second electronic device (29) is fixedly connected to the EMI shielding layer (1).

9. The semiconductor package according to claim 8, characterized in that: A first electronic device (27) that cooperates with a second electronic device (29) is installed on the inner side of the supporting bottom frame (23).

10. A method for manufacturing a semiconductor package according to any one of claims 1 to 9, characterized in that: The following steps are involved: S1, connecting the No. 1 conductive bump (5) to the bottom of the EMI shielding layer (1) through a conductive adhesive, and installing the No. 1 support mold (2) on the top of the EMI shielding layer (1) through an adhesive, and installing the No. 2 support mold (3) on the top of the No. 1 support mold (2) through an adhesive to ensure electrical and mechanical connection between the parts; S2. Multiple connecting protrusions (6) are embedded and installed at equal intervals inside the EMI shielding layer (1). The bottom of each connecting protrusion (6) is electrically connected to the first conductive protrusion (5) through a conductive material. Multiple conductive copper rods (7) are installed at equal intervals on the top of the connecting protrusion (6) by welding. The conductive copper rods (7) pass through the holes reserved in the first support mold (2). The second conductive protrusion (8) is installed on the top of the conductive copper rod (7) by welding again to ensure that a certain electrical connection is maintained between the second conductive protrusion (8) and the second support mold (3). S3, embedding and installing a plurality of No. 1 metal wire patterns (9) inside the semiconductor substrate (4), the bottom of each No. 1 metal wire pattern (9) being electrically connected to the No. 2 conductive bump (8) through a conductive material, installing a conductive support block (10) on the top of the No. 1 metal wire pattern (9) through welding, and setting a No. 2 metal wire pattern (11) on the top of the conductive support block (10), and electrically connecting the top of the No. 2 metal wire pattern (11) to the top conductive block (12) through a conductive material, so as to construct a complete conductive path; S4, installing a top metal plate (13) on the top of the top conductive block (12) through a conductive material, and installing a first conductive block (30) on the top of the top metal plate (13) through a conductive material again; S5, forming a metal trace (31) on the top of the No. 1 conductive block (30) by electroplating, arranging a plurality of No. 2 conductive blocks (32) at equal intervals on the top of the metal trace (31), and achieving electrical connection with the metal trace (31) by means of a conductive material; S6, on the top of the No. 2 conductive block (32), a packaging metal plate (33) is installed by means of a conductive material to provide protection for subsequent packaging and testing, and on the top of the semiconductor substrate (4), a No. 1 bare chip (14), a No. 2 bare chip (16) and a No. 3 bare chip (17) are sequentially stacked by means of an adhesive to form a multi-layer circuit structure; S7, electrically connecting the No. 1 connection point (15) inside the No. 1 bare chip (14) to the corresponding point on the metal trace (31) by wire welding, and at the same time, electrically connecting the bottom of the packaging metal plate (33) to the No. 2 connection point (18) on the top of the No. 3 bare chip (17) by conductive material; S8, installing a housing (19) above the third bare chip (17) by means of an adhesive, and installing a first package inner support frame (34) and a second package inner support frame (35) on the inner side of the housing (19) by means of injection molding, wherein the first package inner support frame (34) and the second package inner support frame (35) support and fix the first conductive block (30), the metal trace (31), the second conductive block (32), and the package metal plate (33) through a reserved structure; S9, installing an outer sealing frame (20) on the outer side of the outer shell (19) by means of adhesive, and installing a sealing bottom frame (21) on the bottom of the outer sealing frame (20) to form an external frame of the packaging structure; S10, a No. 1 sealing filling groove (22) is formed by injection molding at the bottom of the outer sealing frame (20), a No. 2 sealing filling groove (25) matching with the No. 1 sealing filling groove (22) is formed by injection molding at the top of the supporting bottom frame (23), and a closed groove (26) matching with the closed bottom frame (21) is formed by injection molding inside the No. 2 sealing filling groove (25), so as to provide a sealed space for packaging; S11, a plurality of connection grooves (28) cooperating with the No. 1 conductive protrusion (5) are equidistantly provided at the top of the supporting bottom frame (23) through the reserved space, and a plurality of No. 3 conductive protrusions (24) connected with the connection grooves (28) are equidistantly provided at the bottom of the supporting bottom frame (23), and a No. 2 electronic device (29) is installed at the bottom of the No. 1 supporting mold (2) through an adhesive, and it is ensured that a certain electrical connection is maintained between the No. 2 electronic device (29) and the EMI shielding layer (1), and a No. 1 electronic device (27) cooperating with the No. 2 electronic device (29) is installed on the inner side of the supporting bottom frame (23) through the reserved space, so as to ensure the electrical and mechanical connection between the various parts; S12, using appropriate sealing materials to fill the No. 1 sealing filling groove (22) and the No. 2 sealing filling groove (25), and ensuring the sealing of the entire package by pouring to prevent interference from the external environment; S13. Carry out final inspection and testing on the manufactured semiconductor package, including functional testing, performance testing, and reliability testing, to ensure that its function and performance meet the design requirements and provide reliable guarantee for subsequent packaging and application.

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