Machining method based on heavily-doped boron low-roughness polished wafer

Abstract

The invention relates to the technical field of silicon wafer processing, in particular to a processing method based on a heavily boron-doped low-roughness polished wafer, which comprises the following steps: setting the rotating speed of a carrying table and the vacuum adsorption pressure of the carrying table on a silicon wafer so as to adapt to the waxing operation on the silicon wafer of 1150 microns; when the silicon wafer is roughly polished, a first polishing solution with the particle size being 40-70 nanometers and the solid content being 13%-18% is selected, and two kinds of first polishing cloth of the SUBA600 model and the SUBA800 model are selected to be used in a matched mode; during middle polishing of the silicon wafer, a second polishing solution with the particle size being 30-70 nanometers and the solid content being 11%-15% is selected, and second polishing cloth of the CKE212S model is selected; and during fine polishing of the silicon wafer, a third polishing solution with the particle size of 20-40 nanometers and the solid content of 7-10% is adopted. According to the invention, the rotating speed of the silicon wafer of 1150 microns to the carrying table and the vacuum adsorption pressure of the carrying table to the silicon wafer are adjusted, so that the silicon wafer can have better stability when rotating along with the carrying table. When the silicon wafer is polished, proper polishing liquid and polishing cloth are selected, so that the polishing effect on the silicon wafer is better.

Description

Technical Field

[0001] The invention relates to the technical field of silicon wafer processing, in particular to a processing method based on a heavily boron-doped low-roughness polishing wafer. Background Art

[0002] In the field of semiconductor material manufacturing, surface polishing of semiconductor materials is one of the most important processes. Especially in the process of manufacturing semiconductor devices, the surface roughness of semiconductor materials directly affects the performance and reliability of the devices. Therefore, the surface polishing technology of semiconductor materials has always been a research hotspot in this field. In the field of semiconductor device processing, the surface polishing of semiconductor materials can not only improve the performance and reliability of the devices, but also increase the output of the devices and reduce the production cost. Therefore, the surface polishing technology of semiconductor materials is also one of the important technologies in this field. In the field of surface polishing technology, the polishing process is an important means to achieve a smooth and flat surface of semiconductor materials. The polishing process includes multiple steps such as rough polishing, medium polishing and fine polishing. Each step requires the use of different polishing liquids and polishing cloths to achieve different polishing effects.

[0003] However, the current polishing process is prone to the following problems when processing 1150 micron silicon wafers:

[0004] 1. The mass of 1150 micron silicon wafer is larger than that of 725 micron silicon wafer. When the carrier drives the silicon wafer to rotate, the centrifugal force is also greater, which makes the silicon wafer easy to fall off the carrier and be thrown away, causing it to break;

[0005] 2. When selecting polishing liquid and polishing cloth, the characteristics of semiconductor materials are not fully considered, resulting in poor polishing effect. Summary of the invention

[0006] In view of the above problems existing in the prior art, the present invention provides a processing method based on a heavily boron-doped low-roughness polishing sheet.

[0007] In order to solve the above technical problems, the present invention is solved by the following technical solutions:

[0008] A processing method based on a heavily boron-doped low-roughness polishing sheet, comprising:

[0009] The rotation speed of the carrier and the vacuum adsorption pressure of the carrier on the silicon wafer are set to adapt to the wax coating operation of the 1150 micron silicon wafer;

[0010] When rough polishing the silicon wafer, a first polishing liquid with a particle size of 40-70 nanometers and a solid content of 13%-18% is selected, and two first polishing cloths of SUBA600 and SUBA800 are selected for use;

[0011] When the silicon wafer is polished, a second polishing liquid with a particle size of 30-70 nanometers and a solid content of 11%-15% is selected, and a second polishing cloth of model CKE212S is selected;

[0012] When fine-polishing the silicon wafer, a third polishing liquid with a particle size of 20-40 nanometers and a solid content of 7-10% is used.

[0013] Preferably, the rotation speed of the carrier is 1700RPM to 2500RPM.

[0014] Preferably, the vacuum adsorption pressure of the carrier on the silicon wafer is -85KPa to -95KPa.

[0015] Preferably, when the silicon wafer is subjected to intermediate polishing, the intermediate polishing pressure is set at 50-70 KPa.

[0016] Preferably, when the silicon wafer is subjected to intermediate polishing, the intermediate polishing time is set at 15-20 minutes.

[0017] Preferably, when the silicon wafer is fine-polished, the fine-polishing medium pressure is set at 50-70 KPa.

[0018] Preferably, when the silicon wafer is fine-polished, the fine-polishing time is set at 15-20 minutes.

[0019] Preferably, when the silicon wafer is fine-polished, the third polishing liquid is arranged to be discharged in a straight manner with a flow rate of 1.5-2.5 L / min.

[0020] Preferably, the first polishing liquid, the second polishing liquid and the third polishing liquid all use silicon dioxide as a polishing agent.

[0021] The present invention has at least the following beneficial effects:

[0022] 1. In this application, the rotation speed of the carrier and the vacuum adsorption pressure of the carrier on the silicon wafer are adjusted for a 1150-micron silicon wafer, so that the silicon wafer can have better stability when rotating with the carrier, thereby improving the safety of the wax coating operation on the silicon wafer.

[0023] 2. In this application, the material properties of 1150 micron silicon wafers are fully considered, and suitable polishing liquid and polishing cloth are selected when rough polishing, medium polishing and fine polishing of the silicon wafers, so that the polishing effect of the silicon wafers is better. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A flow chart of a processing method for a heavily boron-doped low-roughness polishing wafer in some embodiments of the present application is shown. DETAILED DESCRIPTION

[0025] In order to further understand the content of the present invention, the present invention is described in detail in conjunction with the accompanying drawings and embodiments. It should be understood that the embodiments are only for explaining the present invention and are not intended to limit it.

[0026] like Figure 1 As shown, this embodiment provides a processing method based on heavily boron-doped low-roughness polishing wafers, which is suitable for 1150-micron silicon wafer processing. On the one hand, it can improve the stability and safety of the silicon wafer during the wax coating process, and on the other hand, it can improve the polishing effect of the silicon wafer.

[0027] The processing method includes:

[0028] Step S100, setting the rotation speed of the carrier and the vacuum adsorption pressure of the carrier on the silicon wafer to adapt to the wax coating operation on the 1150 micron silicon wafer.

[0029] It can be understood that the mass of 1150-micron silicon wafers is greater than that of conventional 725-micron silicon wafers. After the carrier performs vacuum adsorption on the silicon wafer, the carrier drives the silicon wafer to rotate, and the centrifugal force applied to the silicon wafer is also greater. If conventional processes are used, the silicon wafer may easily detach from the carrier and be thrown away, which may easily cause the silicon wafer to break. Therefore, in this embodiment, the rotation speed of the carrier and the vacuum adsorption pressure of the carrier on the silicon wafer are adjusted for the 1150-micron silicon wafer, so that the silicon wafer can have better stability when rotating with the carrier, thereby improving the safety of wax coating operations on the silicon wafer.

[0030] Step S200, when rough polishing the silicon wafer, a first polishing liquid with a particle size of 40-70 nanometers and a solid content of 13%-18% is selected, and two first polishing cloths of SUBA600 and SUBA800 are selected for use.

[0031] It can be understood that by using a first polishing liquid with a particle size of 40-70 nanometers and a solid content of 13%-18% to rough-polish the silicon wafer, and using two first polishing cloths of model SUBA600 and model SUBA800 in combination to rough-polish the silicon wafer, the surface roughness of the silicon wafer can reach 0.6nm, thereby achieving a better surface polishing effect for the silicon wafer.

[0032] Step S300, when performing intermediate polishing on the silicon wafer, a second polishing liquid with a particle size of 30-70 nanometers and a solid content of 11%-15% is selected, and a second polishing cloth of model CKE212S is selected.

[0033] It should be noted that the second polishing cloth of model CKE212S has a pore size of 80±23 μm, so that the surface polishing effect of the silicon wafer can be further improved by processing the silicon wafer with the second polishing cloth after rough polishing.

[0034] It can be understood that by selecting a second polishing liquid with a particle size of 30-70 nanometers and a solid content of 11%-15% for medium polishing of the silicon wafer, and selecting a second polishing cloth of model CKE212S for medium polishing of the silicon wafer, the surface roughness of the silicon wafer can reach 0.3nm, thereby achieving a better surface polishing effect for the silicon wafer.

[0035] Step S400: When fine polishing the silicon wafer, a third polishing liquid having a particle size of 20-40 nanometers and a solid content of 7-10% is used.

[0036] It is understandable that by using the third polishing liquid with a particle size of 20-40 nanometers and a solid content of 7-10% to perform fine polishing on the silicon wafer, the surface roughness of the silicon wafer can be reduced to less than 0.17 nm, resulting in a better surface polishing effect for the silicon wafer.

[0037] In some embodiments, in step S100, after the stage vacuum absorbs the silicon wafer, the rotation speed of the stage is set to 1700RPM-2500RPM, so that the rotation speed of the silicon wafer following the stage is also 1700RPM-2500RPM. It can be understood that, in this embodiment, by setting the rotation speed of the stage, the rotation speed of the stage can better adapt to the wax coating operation of the 1150 micron silicon wafer, and can better ensure the stability of the position of the silicon wafer on the stage, which can realize the wax coating operation of the silicon wafer on one hand, and prevent the silicon wafer from being thrown off the stage on the other hand.

[0038] In some embodiments, in step S100, the vacuum adsorption pressure of the carrier on the silicon wafer is set to -85KPa to -95KPa. It can be understood that in this embodiment, by setting the vacuum adsorption pressure of the carrier on the silicon wafer, the carrier can maintain a better adsorption force on the silicon wafer during the process of driving the silicon wafer to rotate, so as to improve the stability of the silicon wafer on the carrier and prevent the silicon wafer from being thrown off by the carrier.

[0039] In some embodiments, in step S300, when the silicon wafer is subjected to medium polishing, the medium polishing pressure is set at 50-70 KPa. This setting can ensure that the silicon wafer is fully subjected to medium polishing, so that the surface roughness of the silicon wafer can reach 0.3 nm, thereby improving the polishing effect of the silicon wafer.

[0040] In some embodiments, in step S300, when the silicon wafer is subjected to intermediate polishing, the intermediate polishing time is set to 15 minutes to 20 minutes. This setting can ensure that there is enough time for the intermediate polishing of the silicon wafer, so that the surface roughness of the silicon wafer can reach 0.3 nm, thereby improving the polishing effect of the silicon wafer.

[0041] In some embodiments, in step S400, when the silicon wafer is subjected to fine polishing, the fine polishing medium pressure is set at 50-70 KPa. This setting can ensure that the silicon wafer is fully fine polished, so that the surface roughness of the silicon wafer can reach less than 0.17 nm, thereby improving the polishing effect of the silicon wafer.

[0042] In some embodiments, in step S400, when fine polishing the silicon wafer, the fine polishing time is set to 15 minutes to 20 minutes. This setting can ensure that there is enough time to fine polish the silicon wafer, so that the surface roughness of the silicon wafer can reach less than 0.17nm, thereby improving the polishing effect of the silicon wafer.

[0043] In some embodiments, in step S400, when fine polishing is performed on the silicon wafer, the third polishing liquid is selected to be discharged in a direct discharge manner, and the direct discharge flow rate is 1.5-2.5 L / min.

[0044] In some embodiments, the first polishing liquid, the second polishing liquid and the third polishing liquid used in the rough polishing, the medium polishing and the fine polishing of the silicon wafer all use silicon dioxide as a polishing agent.

[0045] More specifically, since the first polishing liquid uses silicon dioxide as a polishing agent, the particle size of the silicon dioxide in the first polishing liquid is 40-70 nanometers, and the solid content of the silicon dioxide in the first polishing liquid is 13%-18%. Since the second polishing liquid uses silicon dioxide as a polishing agent, the particle size of the silicon dioxide in the second polishing liquid is 30-70 nanometers, and the solid content of the silicon dioxide in the second polishing liquid is 11%-15%. Since the third polishing liquid uses silicon dioxide as a polishing agent, the particle size of the silicon dioxide in the third polishing liquid is 20-40 nanometers, and the solid content of the silicon dioxide in the third polishing liquid is 7-10%.

[0046] In conclusion, the above is only a preferred embodiment of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the patent of the present invention.

Claims

1. A processing method based on a heavily boron-doped low-roughness polishing sheet, characterized in that: include, The rotation speed of the carrier and the vacuum adsorption pressure of the carrier on the silicon wafer are set to adapt to the wax coating operation of the 1150 micron silicon wafer; When rough polishing the silicon wafer, a first polishing liquid with a particle size of 40-70 nanometers and a solid content of 13%-18% is selected, and two first polishing cloths of SUBA600 and SUBA800 are selected for use; When the silicon wafer is polished, a second polishing liquid with a particle size of 30-70 nanometers and a solid content of 11%-15% is selected, and a second polishing cloth of model CKE212S is selected; When fine-polishing the silicon wafer, a third polishing liquid with a particle size of 20-40 nanometers and a solid content of 7-10% is used.

2. The processing method according to claim 1, characterized in that: The rotation speed of the carrier is 1700RPM to 2500RPM.

3. The processing method according to claim 2, characterized in that: The vacuum adsorption pressure of the carrier on the silicon wafer is -85KPa to -95KPa.

4. The processing method according to claim 1, characterized in that: When the silicon wafer is subjected to intermediate polishing, the intermediate polishing pressure is set at 50-70 KPa.

5. The processing method according to claim 4, characterized in that: When the silicon wafer is subjected to intermediate polishing, the intermediate polishing time is set at 15-20 minutes.

6. The processing method according to claim 1, characterized in that: When the silicon wafer is fine-polished, the fine-polishing medium pressure is set at 50-70 KPa.

7. The processing method according to claim 6, characterized in that: When the silicon wafer is finely polished, the fine polishing time is set at 15-20 minutes.

8. The processing method according to claim 7, characterized in that: When the silicon wafer is finely polished, the third polishing liquid is arranged to be discharged in a straight manner with a flow rate of 1.5-2.5 L / min.

9. The processing method according to claim 1, characterized in that: The first polishing liquid, the second polishing liquid and the third polishing liquid all use silicon dioxide as a polishing agent.

Images