MEMS device packaging method
Through a multi-step bonding and scribing MEMS device packaging method, the manufacturing complexity and yield problems in wafer-level packaging technology are solved, the packaging efficiency and yield are improved, and the requirements of high airtightness and low cost are met.
Patent Information
- Application Number
- CN202411944099.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-04-08
AI Technical Summary
Wafer-level packaging technology has problems with complex manufacturing processes, high equipment and technical requirements, yield problems, poor scribing efficiency and yield, as well as repairability, technical maturity and compatibility.
A MEMS device packaging method is provided, including obtaining a substrate wafer, making a second scribe slot and a second alignment mark, forming a first bonded wafer, and ultimately forming a packaged wafer with a vacuum sealed chamber through multiple bonding and scribe operations.
It improves the packaging efficiency and packaging yield of MEMS devices, meets the packaging requirements of high airtightness, high reliability and low cost, provides the required optical paths for optical devices, and avoids damage to wafers during etching.
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Figure CN119774543A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of chip packaging, and in particular to a MEMS device packaging method. Background Art
[0002] At present, the packaging technology of MicroElectroMechanical Systems (MEMS) devices is mainly divided into chip-level packaging and wafer-level packaging. Among them, although the wafer-level packaging technology has small packaging size, high transmission speed, high connection density, and can achieve rapid mass production to reduce production costs, its manufacturing process is complex and has high requirements for equipment and technology. The yield problem, dicing efficiency and finished product rate, poor maintainability, and technical maturity and compatibility are also problems existing in the wafer-level packaging technology. Summary of the invention
[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
[0004] The purpose of the present application is to solve one of the technical problems existing in the related art to at least a certain extent. The embodiment of the present application provides a MEMS device packaging method, which can improve the packaging efficiency and packaging yield of the MEMS device.
[0005] An embodiment of the present application provides a MEMS device packaging method, comprising:
[0006] Obtaining a substrate wafer, wherein the substrate wafer is provided with a MEMS device, a wafer bonding area, a first alignment mark and a first scribe groove;
[0007] Based on the MEMS device and the wafer bonding area, making a second scribe groove and a second alignment mark on the first wafer to form a first bonded wafer;
[0008] Based on the wafer bonding area, making a through hole, a second scribe groove and a third alignment mark on the second wafer to form a second bonded wafer;
[0009] Based on the wafer bonding area, a fourth alignment mark is made on the third wafer to form a temporary carrier;
[0010] Bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark to form a cap wafer;
[0011] Bonding the cap wafer and the temporary carrier according to the second alignment mark and the third alignment mark to form a temporary cap wafer;
[0012] Slicing the first bonded wafer and the second bonded wafer on the temporary capping wafer along the second scribe line to obtain a sliced capping wafer;
[0013] Fabricating a metal intermediate layer on a second bonding wafer on the sliced cap wafer;
[0014] Bonding the sliced cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the third alignment mark to form a packaged wafer with a vacuum sealed chamber;
[0015] The cap wafer and the temporary carrier are separated, and then the base wafer is diced along the first dicing grooves to obtain a MEMS chip unit.
[0016] According to certain embodiments of the present application, the first wafer is a glass wafer, and the second wafer is a silicon wafer; the bonding method for bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark is silicon-glass anodic bonding.
[0017] According to some embodiments of the present application, the bonding method of bonding the cap wafer and the temporary carrier according to the second alignment mark and the third alignment mark is temporary bonding.
[0018] According to some embodiments of the present application, the temporary bonding includes thermal compression temporary bonding and UV curing temporary bonding.
[0019] According to certain embodiments of the present application, the bonding method of bonding the slicing cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the third alignment mark is metal intermediate layer bonding.
[0020] According to some embodiments of the present application, the metal interlayer bonding includes gold-silicon eutectic bonding, gold-gold diffusion bonding and copper-tin solder bonding.
[0021] According to certain embodiments of the present application, the metal intermediate layer includes a metal bonding layer and a metal bonding layer; the metal bonding layer is made of one or more of Ti, Gr, and Ta, and the metal bonding layer is made of one or more of Au, Cu, and Sn.
[0022] According to certain embodiments of the present application, the debonding method for separating the cap wafer and the temporary carrier includes a mechanical debonding method, a thermal sliding debonding method, a chemical debonding method and a laser debonding method.
[0023] According to some embodiments of the present application, the base wafer contains a getter, and the getter is activated at a process temperature of metal interlayer bonding.
[0024] According to some embodiments of the present application, the getter is Ti metal or Ti-based alloy thin film material.
[0025] The above scheme has at least the following beneficial effects: it can meet the packaging requirements of high airtightness, high reliability and low cost, provide the required optical path for optical devices, improve the packaging efficiency and packaging yield of MEMS devices, maintain the required strength of the wafer during the etching process, and avoid damage to the wafer. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The accompanying drawings are used to provide further understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.
[0027] Figure 1 is a flow chart of a MEMS device packaging method provided in an embodiment of the present application;
[0028] Figure 2 is a schematic diagram of manufacturing a substrate wafer provided in an embodiment of the present application;
[0029] Figure 3 is a schematic diagram of manufacturing a first bonding wafer provided in an embodiment of the present application;
[0030] Figure 4 is a schematic diagram of manufacturing a second bonding wafer provided in an embodiment of the present application;
[0031] Figure 5 It is a schematic diagram of manufacturing a temporary carrier provided in an embodiment of the present application;
[0032] Figure 6 is a schematic diagram of manufacturing a cap wafer provided in an embodiment of the present application;
[0033] Figure 7 It is a schematic diagram of manufacturing a temporary cap wafer provided in an embodiment of the present application;
[0034] Figure 8 It is a schematic diagram of manufacturing a sliced cap wafer provided in an embodiment of the present application;
[0035] Fig. 9 It is a schematic diagram of manufacturing a metal intermediate layer provided in an embodiment of the present application;
[0036] Fig.10 It is a schematic diagram of manufacturing a packaged wafer provided in an embodiment of the present application;
[0037] Fig.11 It is a schematic diagram of manufacturing the MEMS chip unit provided in the embodiment of the present application. DETAILED DESCRIPTION
[0038] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0039] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims or the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.
[0040] The embodiments of the present application are further described below in conjunction with the accompanying drawings.
[0041] An embodiment of the present application provides a MEMS device packaging method.
[0042] The embodiments of the present application are further described below in conjunction with the accompanying drawings.
[0043] Reference Figure 1 The MEMS device packaging method includes but is not limited to the following steps, including step S1, step S2, step S3, step S4, step S5, step S6, step S7, step S8, step S9 and step S10.
[0044] Step S1, obtaining a substrate wafer.
[0045] Reference Figure 2 In some embodiments, a fabricated substrate wafer 200 is obtained, and the substrate wafer 200 is provided with a MEMS device 201, a getter 202, a wafer bonding area 203, a metal pad 204, a drive circuit 205, a first alignment mark 206, and a first scribe groove 207. Among them, in the substrate wafer 200, the positions of the MEMS device 201, the metal pad 204, the drive circuit 205 and other components are fixed, that is, they cannot be changed in any way during the post-production process; and the settings of the getter 202, the wafer bonding area 203, the first alignment mark 206, the first scribe groove 207 and other components can be changed according to actual conditions in the post-production process, and are not specifically limited here.
[0046] It is understandable that the position setting of each component of the base wafer 200 can provide a position reference for the subsequent structure of the glass cover wafer 400 and the silicon wafer 300. The obtained base wafer 200 is bonded with the subsequently manufactured wafer to realize the packaging of the MEMS device 201, which is conducive to improving the packaging yield of the MEMS device 201.
[0047] Step S2: Based on the MEMS device and the wafer bonding area, a second scribe line and a second alignment mark are made on the first wafer to form a first bonded wafer.
[0048] The first wafer 301 is a glass wafer.
[0049] Reference Figure 3 The glass wafer is used as raw material and pre-processed. Based on the MEMS device 201 and the wafer bonding area 203 , a second scribe groove 302 is made by etching process, and a second alignment mark 303 is made by etching process to form a first bonded wafer 300 .
[0050] In some embodiments, a glass wafer is used as a raw material, the glass wafer is pre-processed, the position of the second scribe groove 302 is determined based on the position of the MEMS device 201 and the wafer bonding area 203 of the base wafer 200, and the second scribe groove 302 is manufactured by an etching process. The position of the second alignment mark 303 is determined according to the bonding alignment requirement, and the second alignment mark 303 is manufactured by an etching process. The first bonded wafer 300 can be manufactured.
[0051] It should be noted that the glass wafer is BF33, and using it as a packaging cover meets the required optical requirements.
[0052] Step S3, based on the wafer bonding area, making a through hole, a second scribe line and a third alignment mark on the second wafer to form a second bonded wafer.
[0053] The second wafer 401 is a silicon wafer.
[0054] Reference Figure 4 , using silicon wafer as raw material, pre-processing the silicon wafer. Based on the MEMS device 201 of the base wafer 200, the wafer thickness is determined, based on the position of the wafer bonding area 203, the position and size of the through hole 402 are determined, and the through hole 402 is made through an etching process, thereby providing a packaging cavity for the MEMS device 201, and at the same time, the position of the second scribe groove 403 is determined according to the position of the wafer bonding area 203, and the second scribe groove 403 is made through an etching process, and the position of the third alignment mark 404 is determined according to the bonding alignment requirement, and the third alignment mark 404 is made through an etching process, so as to obtain a second bonded wafer 400.
[0055] Step S4: Based on the wafer bonding area, a fourth alignment mark is made on the third wafer to form a temporary carrier.
[0056] The third wafer 501 is a silicon wafer.
[0057] Reference Figure 5, using silicon wafer as raw material, pre-processing the silicon wafer, determining the position of the fourth alignment mark 502 based on the position of the MEMS device 201 of the base wafer 200 and the wafer bonding area 203, and manufacturing the fourth alignment mark 502 through an etching process to obtain a temporary carrier 500.
[0058] Step S5: bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark to form a cap wafer.
[0059] Reference Figure 6 Based on the first bonding method, the second alignment mark 302 and the third alignment mark 404 are used for bonding alignment, and the first bonding wafer 300 and the second bonding wafer 400 are bonded to form a cap wafer 600 .
[0060] The bonding method for bonding the first bonding wafer 300 and the second bonding wafer 400 according to the second alignment mark 302 and the third alignment mark 404 is silicon-glass anodic bonding. That is, the first bonding method is silicon-glass anodic bonding.
[0061] Step S6, bonding the cap wafer and the temporary carrier according to the second alignment mark and the third alignment mark to form a temporary cap wafer.
[0062] Reference Figure 7 Based on the second bonding method, the second alignment mark 302 and the fourth alignment mark 502 are used for bonding alignment, and the cap wafer 600 and the temporary carrier 500 are bonded to form a temporary cap wafer 700.
[0063] The bonding alignment is performed using the second alignment mark 302 and the fourth alignment mark 502 to bond the cap wafer 600 and the temporary carrier 500. That is, the second bonding method is temporary bonding. Temporary bonding includes hot pressing temporary bonding and UV curing temporary bonding.
[0064] Step S7, dicing the first bonded wafer and the second bonded wafer on the temporary capping wafer along the second dicing grooves to obtain sliced capping wafers.
[0065] Reference Figure 8 By mechanically or laser cutting, the first bonded wafer 300 and the second bonded wafer 400 on the temporary capping wafer 700 are cut along the second scribe line 403 to obtain a sliced capping wafer 800, which includes two or more independent capping wafers 600 bonded by the first bonded wafer 300 and the second bonded wafer 400, and a temporary carrier 500 still bonded to the independent capping wafers 600.
[0066] Step S8, manufacturing a metal intermediate layer on the second bonding wafer on the sliced cap wafer.
[0067] Reference Fig. 9 , a metal intermediate layer 900 is manufactured on the surface of the second bonding wafer 400 in the sliced cap wafer 800 .
[0068] It should be noted that the material of the metal intermediate layer 900 can be selected according to actual conditions. Generally, the metal bonding layer 901 can be made of Ti, Cr, Ta, and the metal bonding layer 902 can be made of one or more combinations of Au, Cu, Sn, which are not specifically limited here.
[0069] Step S9 , bonding the sliced cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the third alignment mark to form a packaged wafer with a vacuum sealed chamber.
[0070] Reference Fig.10 Based on the third bonding method, the first alignment mark 206 and the third alignment mark 404 are used for bonding alignment, and the sliced cap wafer 800 and the base wafer 200 are bonded through the metal intermediate layer 900 to obtain a packaged wafer 1000 with a vacuum-sealed chamber 1001.
[0071] The bonding method of bonding the sliced cap wafer 800 and the base wafer 200 through the metal intermediate layer 900 is metal intermediate layer bonding. That is, the third bonding method is metal intermediate layer bonding. Metal intermediate layer bonding includes gold-silicon eutectic bonding, gold-gold diffusion bonding and copper-tin solder bonding.
[0072] Step S10, separating the cap wafer from the temporary carrier, and then dicing the base wafer along the first dicing grooves to obtain a MEMS chip unit.
[0073] Reference Fig.11 Based on the debonding method, the cap wafer 600 and the temporary carrier 700 are separated, and then the base wafer 200 is wafer-diced along the first dicing groove 207 to finally obtain an independent MEMS chip unit 1101.
[0074] The main working principle and process of the MEMS device packaging method are introduced below through a specific embodiment.
[0075] The first step is to obtain a substrate wafer 200. The substrate wafer 200 is provided with a MEMS device 201, a getter 202, a wafer bonding area 203, a metal pad 204, a driving circuit 205, a first alignment mark 206 and a first scribe line 207 structure, wherein the wafer bonding area 203 is an unprocessed silicon material.
[0076] The second step is to make a glass cover wafer. The glass wafer is subjected to pattern transfer through steps such as cleaning, coating, photolithography, development, and etching; using the photoresist as a mask, a second scribe groove 302 and a second alignment mark 303 are made through a reactive ion etching process, thereby completing the preparation of the glass cover wafer.
[0077] The third step is to make a bonding ring wafer. First, determine the positions of the through hole 402, the second scribe groove 403, and the third alignment mark 404. The position and size of the through hole 402 are determined according to the position of the MEMS device 201 of the base wafer 200 and the wafer bonding area 203. The silicon wafer is cleaned, coated, photolithographic, and developed, and the through hole 402 structure of the bonding ring wafer is made through an etching process; the position of the second scribe groove 403 is determined according to the position of the wafer bonding area 203, and the second scribe groove 403 of the bonding ring wafer is made through an etching process; the position of the third alignment mark 404 is determined according to the bonding alignment requirements, and the third alignment mark 404 is made through an etching process, thereby completing the preparation of the bonding ring wafer.
[0078] The fourth step is to make a temporary carrier 500. The material of the temporary carrier is generally glass or silicon. Since the glass cover wafer is bonded to the temporary carrier in this method, if the temporary carrier is made of glass material, it will be difficult to distinguish the two wafers and cannot be debonded by UV irradiation. Therefore, silicon wafers are used as raw materials. The silicon wafer is cleaned, coated, photolithographic, and developed. The position of the fourth alignment mark 502 is determined based on the position of the MEMS device 201 of the base wafer 200 and the wafer bonding area 203, and the fourth alignment mark 502 is made by an etching process to obtain a temporary carrier 500.
[0079] The fifth step is to make the cap wafer 600. First, the second alignment mark 303 and the third alignment mark 404 are used to complete the alignment of the glass cap wafer and the bonding ring wafer, and then the silicon-glass anodic bonding is performed. The specific operation of the silicon-glass anodic bonding is as follows: the first step is to evacuate the gas in the bonding chamber to a certain degree and maintain it until the bonding is completed; the second step is to increase the temperature, and the temperature in the chamber gradually increases to the rated temperature in three stages, the temperature is 400°C; the third step is to pressurize, the two electrodes pressurize the glass cap wafer and the bonding ring wafer to a certain pressure, and maintain it until the bonding is completed; the fourth step is to turn on the power, the two electrodes load a high voltage to the glass cap wafer and the bonding ring wafer, and maintain it for a certain time. Under this process condition, the process of the silicon-glass anodic bonding part can be completed, thereby obtaining the cap wafer 600.
[0080] Step 6: Make temporary cap wafer 700. First, align the temporary carrier 500 and the cap wafer 600 using the second alignment mark 302 and the fourth alignment mark 502, and then perform UV curing for temporary bonding. The specific operation of UV curing temporary bonding is as follows: the first step is to evenly apply the adhesive on the temporary carrier 500 and the cap wafer 600, wherein the adhesive can be divided into a solid adhesive film and a liquid temporary bonding glue; if a solid adhesive film is used, it is directly attached to the surface of the temporary carrier 500; if a liquid temporary bonding glue is used, it is evenly applied on the surface of the temporary carrier 500 and the cap wafer 600 by spin coating or spraying; the second step is to press, and gently press the temporary carrier 500 and the cap wafer 600 with the adhesive on the surface together to ensure that there is no position shift; the third step is to use ultraviolet light, i.e., UV light source, to irradiate the bonding glue surface through the carrier to react, and the exposure time is usually a few seconds to a few minutes. The length of the exposure time depends on the intensity of the light source and the type of adhesive, so that the temporary carrier 500 and the cap wafer 600 are bonded together to form a temporary cap wafer 700.
[0081] Step 7: Make a sliced cap wafer 800. By mechanically or laser cutting, the glass cap wafer and the bonding ring wafer on the temporary cap wafer 700 are cut along the second scribe line 403 to obtain a sliced cap wafer 800, which includes two or more independent cap wafers bonded by the glass cap wafer and the bonding ring wafer, and a temporary carrier 500 still bonded to the independent cap wafers.
[0082] Step 8: Make a metal intermediate layer 900. A metal intermediate layer 900 including a metal bonding layer 901 and a metal bonding layer 902 is made on the surface of the sliced cap wafer 800 by using a process such as magnetron sputtering. By adjusting the sputtering power and the sputtering gas flow rate, the cap wafer 600 is maintained in a certain temperature range, and the target material is gradually deposited on the surface of the sliced cap wafer 800 to form a continuous film. The metal intermediate layer 900 obtained by the above process includes a metal bonding layer 901 and a metal bonding layer 902, wherein the metal bonding layer 901 can be made of Ti, Cr, Ta, and the metal bonding layer 902 can be made of one or more combinations of Au, Cu, and Sn. In this example, the metal bonding layer 901 is set to be Cr, and the metal bonding layer 902 is set to be Au.
[0083] The ninth step is to manufacture the package wafer 1000. The base wafer 200 and the slicing cap wafer 800 are interconnected by bonding through the metal intermediate layer 900 under vacuum conditions, and the getter 202 is activated at the bonding temperature. The base wafer 200 and the slicing cap wafer 800 are aligned on the photolithography machine using the first alignment mark 206, the second alignment mark 303, the third alignment mark 404 and the fourth alignment mark 502, so that the metal intermediate layer 900 on the slicing cap wafer 800 is in close contact with the wafer bonding area 203 of the base wafer 200. Specifically, the specific operation of metal intermediate layer bonding is as follows: the first step is to evacuate the gas in the bonding cavity to a certain degree and maintain it until the bonding is completed; the second step is to increase the temperature. Since the metal bonding layer 901 is a Cr metal layer and the metal bonding layer 902 is an Au metal layer, the temperature in the cavity needs to be gradually increased to the rated temperature of 380°C in three stages and maintained for a certain time; the third step is to pressurize the substrate wafer 200 and the slice cap wafer 800 to a certain pressure and maintain it until the bonding is completed; the third step is to activate the getter 202. When the bonding process temperature rises to a certain temperature, the getter 202 is activated to absorb the residual active gas in the MEMS closed cavity after packaging; the fourth step is to anneal. After the temperature rises to the rated degree and is maintained for a certain time, the heating is stopped to allow the wafer to cool naturally. After the bonding is completed, the vacuum-encapsulated optical MEMS packaging wafer 1000 can be obtained. The base wafer 200 , the glass cover wafer and the bonding ring wafer are connected to form a vacuum sealed cavity 1001 of the MEMS device and provide an optical path.
[0084] The tenth step is to make an independent MEMS chip unit 1101. The debonding method based on the principle of UV irradiation is specifically operated as follows: the first step is to place the sample under a UV lamp to ensure that the light source evenly irradiates the entire sample surface; the second step is to set the UV spectrum and irradiation time according to the material requirements and experimental needs; the third step is to irradiate the adhesive dry film so that the particles in the dry film break and release gas, and the glass cover wafer and temporary carrier 700 on the sliced cap wafer 800 are pushed open, and the temporary carrier 700 is separated from the sliced cap wafer 800; the fourth step is to use an appropriate solvent to clean the sample surface to remove possible reaction residues. The debonding process is completed, thereby obtaining a sliced cap wafer 1100. Then the substrate wafer 200 is wafer-diced along the first dicing groove 207 to finally obtain an independent MEMS chip unit 1101.
[0085] This MEMS device packaging method can meet the packaging requirements of high airtightness, high reliability and low cost, provide the required optical path for optical devices, improve the packaging efficiency and packaging yield of MEMS devices, and at the same time adopt temporary bonding and debonding process methods in the manufacturing process to maintain the required strength of the wafer during the etching process to avoid damage to the wafer.
[0086] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the embodiments. Technical personnel familiar with the field can make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.
Claims
1. A method for packaging a MEMS device, characterized in that: include: Obtaining a substrate wafer, wherein the substrate wafer is provided with a MEMS device, a wafer bonding area, a first alignment mark and a first scribe groove; Based on the MEMS device and the wafer bonding area, making a second scribe groove and a second alignment mark on the first wafer to form a first bonded wafer; Based on the wafer bonding area, making a through hole, a second scribe groove and a third alignment mark on the second wafer to form a second bonded wafer; Based on the wafer bonding area, a fourth alignment mark is made on the third wafer to form a temporary carrier; Bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark to form a cap wafer; Bonding the cap wafer and the temporary carrier according to the second alignment mark and the third alignment mark to form a temporary cap wafer; Slicing the first bonded wafer and the second bonded wafer on the temporary capping wafer along the second scribe line to obtain a sliced capping wafer; Fabricating a metal intermediate layer on a second bonding wafer on the sliced cap wafer; Bonding the sliced cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the third alignment mark to form a packaged wafer with a vacuum sealed chamber; The cap wafer and the temporary carrier are separated, and then the base wafer is diced along the first dicing grooves to obtain a MEMS chip unit.
2. The MEMS device packaging method according to claim 1, characterized in that: The first wafer is a glass wafer, and the second wafer is a silicon wafer; the bonding method of bonding the first bonding wafer and the second bonding wafer according to the second alignment mark and the third alignment mark is silicon-glass anodic bonding.
3. The MEMS device packaging method according to claim 2, characterized in that: The bonding method of bonding the cap wafer and the temporary carrier according to the second alignment mark and the third alignment mark is temporary bonding.
4. The MEMS device packaging method according to claim 3, characterized in that: The temporary bonding includes thermal compression temporary bonding and UV curing temporary bonding.
5. The MEMS device packaging method according to claim 1, characterized in that: The bonding method of bonding the slicing cap wafer and the base wafer through the metal intermediate layer according to the first alignment mark and the third alignment mark is metal intermediate layer bonding.
6. The MEMS device packaging method according to claim 5, characterized in that: The metal intermediate layer bonding includes gold-silicon eutectic bonding, gold-gold diffusion bonding and copper-tin solder bonding.
7. The MEMS device packaging method according to claim 1, characterized in that: The metal intermediate layer includes a metal bonding layer and a metal bonding layer; the metal bonding layer is made of one or more of Ti, Gr, and Ta, and the metal bonding layer is made of one or more of Au, Cu, and Sn.
8. The MEMS device packaging method according to claim 1, characterized in that: The debonding methods for separating the cap wafer and the temporary carrier include mechanical debonding, thermal sliding debonding, chemical debonding and laser debonding.
9. The MEMS device packaging method according to claim 1, characterized in that: The base wafer contains a getter, which is activated at a process temperature of metal interlayer bonding.
10. The MEMS device packaging method according to claim 9, characterized in that: The getter is Ti metal or Ti-based alloy thin film material.