A strike prevention circuit and detector device
The anti-spark circuit controlled by the DC connector J1 and the AND gate chip U3 solves the spark problem when charging the portable gas detector device, realizes the plug-and-play charging and power bank functions, and ensures a safe and efficient charging process.
Patent Information
- Application Number
- CN202510286103.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-12
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2045-03-12
AI Technical Summary
Existing portable gas detectors are prone to sparking when charging due to the instantaneous excessive current at the contact point. Existing solutions have the problem of spark generation or prolonged charging time.
The anti-spark circuit consists of a DC connector J1, PMOS tube U1, PMOS tube U2, AND gate chip U3, resistors R1~R8, voltage regulator diode D1, diode D2 and transistor Q1. It controls the connection between the charger and the rechargeable battery through AND gate logic to ensure that the charger is turned on only when it is fully inserted to avoid sparks.
It realizes plug and play charging, prevents the generation of charging sparks and does not prolong the charging waiting time. It also has charging indication and power bank functions to ensure a safe and reliable charging process.
Smart Images

Figure CN119787585B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of circuit protection technology, and in particular to an anti-spark circuit and a detector device. Background Art
[0002] Existing portable gas detectors use a 24V lithium battery. When charged with an external charger, the charging port may spark. The reason for this is that the current at the contact point is too high when the connector is connected. To solve this sparking problem, there are currently several solutions. One solution is to use an RC resistor and capacitor to form a delay circuit. When the charger is plugged in, the charging power is turned on with a delay. However, this method can still easily cause sparks when the charger is quickly plugged in and out. Another solution is to use a current-limiting resistor to reduce the charging current to limit the generation of charging sparks. Although this method is simple, it limits the charging current, resulting in longer charging times and is extremely unfriendly to users. Summary of the Invention
[0003] In view of the problems existing in the above-mentioned prior art, the purpose of this application is to provide an anti-spark circuit and a detector device, which can effectively prevent the generation of charging sparks without prolonging the charging waiting time.
[0004] To achieve the above objectives, this application provides the following solutions.
[0005] On the one hand, the present application provides an anti-spark circuit, including: a DC connector J1, a PMOS tube U1, a PMOS tube U2, an AND gate chip U3, a charging interface J2, resistors R1 to R8, a voltage regulator diode D1, a diode D2, and a transistor Q1;
[0006] The first pin of the DC connector J1 is respectively connected to the drain of the PMOS tube U1 and one end of the resistor R1; the other end of the resistor R1 is respectively connected to one end of the resistor R2, the cathode of the voltage stabilizing diode D1, one end of the resistor R4, the first input pin of the AND gate chip U3, and the power pin of the AND gate chip U3; the second pin of the DC connector J1 is connected to the power ground; the third pin of the DC connector J1 is respectively connected to the other end of the resistor R2, one end of the resistor R3, and the second input pin of the AND gate chip U3; the other end of the resistor R3, the anode of the voltage stabilizing diode D1, the other end of the resistor R4, and the ground pin of the AND gate chip U3 are all connected to the power ground; the output pin of the AND gate chip U3 is connected to the anode of the diode D2 The cathode of the diode D2 is connected to one end of the resistor R5; the other end of the resistor R5 is respectively connected to one end of the resistor R6 and the base of the transistor Q1; the other end of the resistor R6 and the emitter of the transistor Q1 are connected to the power ground; the collector of the transistor Q1 is connected to one end of the resistor R7; the other end of the resistor R7 is respectively connected to the gate of the PMOS tube U1, the gate of the PMOS tube U2 and one end of the resistor R8; the other end of the resistor R8 is respectively connected to the source of the PMOS tube U1 and the source of the PMOS tube U2; the drain of the PMOS tube U2 is connected to the first pin of the charging interface J2; the second pin of the charging interface J2 is connected to the power ground; the charging interface J2 is also connected to the rechargeable battery inside the detector device;
[0007] The first and third pins of the DC connector J1 are used for connection with a charger outside the detector device; when the charger is not inserted or not fully inserted into the DC connector J1, the third pin of the DC connector J1 is connected to the second pin of the DC connector J1; when the charger is fully inserted into the DC connector J1, the third pin of the DC connector J1 is disconnected from the second pin of the DC connector J1.
[0008] Optionally, when the charger is not fully inserted into the DC connector J1, the third pin of the DC connector J1 is connected to the second pin of the DC connector J1, the first input pin of the AND gate chip U3 is at a high level, the second input pin of the AND gate chip U3 is at a low level, the output pin of the AND gate chip U3 outputs a low level, the transistor Q1 is turned off, the PMOS tube U1 and the PMOS tube U2 are not conducting, and the charger is not conducting with the rechargeable battery.
[0009] Optionally, when the charger is fully inserted into the DC connector J1, the third pin of the DC connector J1 is disconnected from the second pin of the DC connector J1, the first input pin of the AND gate chip U3 and the second input pin of the AND gate chip U3 are both high level, the output pin of the AND gate chip U3 outputs a high level, the transistor Q1 is turned on, the PMOS tube U1 and the PMOS tube U2 are also turned on, and the charger is connected to the rechargeable battery to start charging.
[0010] Optionally, the anti-spark circuit also includes: a transistor Q2, resistors R9~R11 and an MCU chip; the base of the transistor Q2 is connected to one end of the resistor R9; the other end of the resistor R9 is respectively connected to the output pin of the AND gate chip U3 and the positive electrode of the diode D2; the collector of the transistor Q2 is respectively connected to one end of the resistor R10 and one end of the resistor R11; the other end of the resistor R10 is connected to the voltage VDD; the other end of the resistor R11 is used to generate a charger access indication signal TP1; the other end of the resistor R11 is connected to the MCU chip; the emitter of the transistor Q2 is connected to the power ground.
[0011] Optionally, when the output pin of the AND gate chip U3 outputs a high level, the charger connection indication signal TP1 is a high level.
[0012] Optionally, the voltage VDD is 3.3V.
[0013] Optionally, the anti-spark circuit also includes: a diode D3 and an MCU chip; the positive electrode of the diode D3 is connected to the MCU chip; the positive electrode of the diode D3 is used to introduce the external power supply control signal TP2; the negative electrode of the diode D3 is respectively connected to the negative electrode of the diode D2 and one end of the resistor R5.
[0014] Optionally, the DC connector J1 is also used to connect to an external detector device; when the external power supply control signal TP2 is at a high level, the rechargeable battery is connected to the external detector device to start powering.
[0015] On the other hand, the present application provides a detector device that is powered by a rechargeable battery, and the detector device includes the anti-spark circuit.
[0016] Optionally, the rechargeable battery is a lithium battery, a nickel-metal hydride battery, a nickel-cadmium battery, a graphene battery or a sodium battery.
[0017] According to the specific embodiments provided in this application, this application discloses the following technical effects:
[0018] In the anti-spark circuit provided herein, the first and third pins of DC connector J1 are used for connection to an external charger. When the charger is not fully inserted into DC connector J1, the third pin of DC connector J1 is connected to the second pin of DC connector J1. At this time, due to the AND gate logic setting of AND gate chip U3, there is no conduction between the charger and the rechargeable battery, so no sparks are generated. Only when the charger is fully inserted into DC connector J1, so that the third pin of DC connector J1 is disconnected from the second pin of DC connector J1, will the charger connect to the rechargeable battery and begin charging, achieving plug-and-play charging without extending the charging wait time. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0020] Figure 1 1 is a circuit connection diagram of the anti-spark circuit in exemplary embodiment 1;
[0021] Figure 2 1 is a circuit connection diagram of the anti-spark circuit in Example 2;
[0022] Figure 3 Schematic diagram of circuit connection of the anti-spark circuit in exemplary embodiment 3. DETAILED DESCRIPTION
[0023] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0024] The purpose of this application is to propose an anti-spark circuit and detector equipment that can effectively prevent the generation of charging sparks without prolonging the charging waiting time.
[0025] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0026] In an exemplary embodiment 1, the present application provides an anti-spark circuit. Figure 1As shown, the anti-spark circuit includes: a DC connector J1, a PMOS tube U1, a PMOS tube U2, an AND gate chip U3, a charging interface J2, resistors R1 to R8, a voltage regulator diode D1, a diode D2 and a transistor Q1.
[0027] The first pin of the DC connector J1 is connected to the drain of the PMOS transistor U1 and one end of the resistor R1. The other end of the resistor R1 is connected to one end of the resistor R2, the cathode of the Zener diode D1, one end of the resistor R4, the first input pin of the AND gate chip U3, and the power pin of the AND gate chip U3. The second pin of the DC connector J1 is connected to the power ground. The third pin of the DC connector J1 is connected to the other end of the resistor R2, one end of the resistor R3, and the second input pin of the AND gate chip U3. The other end of the resistor R3, the anode of the Zener diode D1, the other end of the resistor R4, and the ground pin of the AND gate chip U3 are all connected to the power ground. The output pin of the AND gate chip U3 is connected to the anode of the diode D2. The cathode of the diode D2 is connected to one end of the resistor R5. The other end of the resistor R5 is connected to one end of the resistor R6 and the base of the transistor Q1. The other end of the resistor R6 and the emitter of the transistor Q1 are connected to the power ground. The collector of transistor Q1 is connected to one end of resistor R7. The other end of resistor R7 is connected to the gate of PMOS transistor U1, the gate of PMOS transistor U2, and one end of resistor R8. The other end of resistor R8 is connected to the source of PMOS transistor U1 and the source of PMOS transistor U2. The drain of PMOS transistor U2 is connected to the first pin of charging port J2. The second pin of charging port J2 is connected to the power ground. Charging port J2 is also connected to the rechargeable battery inside the detector.
[0028] The first and third pins of the DC connector J1 are used to connect to a charger external to the tester. When the charger is not inserted or not fully inserted into the DC connector J1, the third pin of the DC connector J1 is connected to the second pin of the DC connector J1. When the charger is fully inserted into the DC connector J1, the third pin of the DC connector J1 is disconnected from the second pin of the DC connector J1.
[0029] In an exemplary embodiment, the DC connector J1 can be a DC022 DC power outlet. The DC power outlet has three pins, with pins 1, 2, and 3 serving as the first, second, and third pins of the DC connector J1, respectively. Pin 1 of the DC power outlet is connected to the drain of the PMOS transistor U1, pin 2 is connected to the power ground, and pin 3 is connected to the other end of resistor R2, one end of resistor R3, and the second input pin of the AND gate chip U3.
[0030] The resistor R1 acts as a current-limiting resistor to protect the Zener diode D1. The Zener diode D1 is used to generate the power supply voltage for the AND gate chip U3. In an exemplary embodiment, the Zener diode D1 can be a ZMM3V3 model, which uses a 3.3V power supply.
[0031] The resistors R2 and R3 together form a voltage divider circuit, which is connected in parallel with the voltage stabilizing diode D1. The resistor R2 is the upper resistor of the voltage divider circuit, and the resistor R3 is the lower resistor of the voltage divider circuit. The two resistors can divide the voltage to produce a high level.
[0032] The resistor R4 is used to ground the first input pin of the AND gate chip U3 when there is no power supply.
[0033] In an exemplary embodiment, the AND gate chip U3 may utilize a SN74AHC1G08DBVR series chip. Pin 1 of the SN74AHC1G08DBVR series chip serves as the first input pin of the AND gate chip U3, with its input signal denoted as A. Pin 2 of the SN74AHC1G08DBVR series chip serves as the second input pin of the AND gate chip U3, with its input signal denoted as B. Pin 3 of the SN74AHC1G08DBVR series chip serves as a ground pin, denoted as GND. Pin 4 of the SN74AHC1G08DBVR series chip serves as an output pin of the AND gate chip U3, with its output signal denoted as Y. Pin 5 of the AND gate chip U3 serves as a power pin, denoted as VCC, for connecting to a 3.3V voltage for power supply. When the AND gate chip U3 detects that both input signals A and B are high, it outputs a high level to drive the subsequent transistor Q1. The AND gate logic employed by the AND gate chip U3 is shown in Table 1 below.
[0034] Table 1 AND gate logic of AND gate chip U3
[0035]
[0036] The resistor R5 is used as a current limiting resistor for the transistor Q1. The transistor Q1 is used to drive the gates of the PMOS transistor U1 and the PMOS transistor U2 to switch.
[0037] The PMOS transistors U1 and U2 are used to turn off or on the charging circuit, so that an external charger can be connected to the rechargeable battery for charging. The current in the charging circuit flows from J1 to U1 to U2 to J2.
[0038] In an exemplary embodiment, the PMOS transistors U1 and U2 may utilize an IRF7416 series chip. The IRF7416 series chip includes three electrodes and eight pins, of which pins 1, 2, and 3 are source pins S. Pin 4 of the IRF7416 series chip is a gate pin G. Pins 5, 6, 7, and 8 of the IRF7416 series chip are drain pins D.
[0039] In the anti-spark circuit of the present application, when the rechargeable battery does not need to be charged, the charger is not inserted into the DC connector J1. At this time, the third pin of the DC connector J1 is connected to the second pin of the DC connector J1, and both are connected to the power ground. When the rechargeable battery needs to be charged, the charger needs to be fully inserted into the DC connector J1. The moment the charger is inserted, the first and third pins of the DC connector J1 are connected to the charger. At this time, the first input pin of the AND gate chip U3 is at a high level. When the charger is not fully inserted into the DC connector J1, the third pin of the DC connector J1 is not disconnected from the second pin. At this time, the third pin of the DC connector J1 is still connected to the power ground, so the second input pin of the AND gate chip U3 is at a low level. Because the second input pin of the AND gate chip U3 is at a low level, the output pin of the AND gate chip U3 also outputs a low level. At this time, the transistor Q1 is turned off, the PMOS tubes U1 and U2 are not conducting (off), the charger and the rechargeable battery are not connected, and no sparks will be generated.
[0040] When the charger is fully inserted into DC connector J1 and makes full contact with the first and third pins of DC connector J1, it pushes the third pin of DC connector J1 to disconnect from the second pin. At this point, the first and second input pins of AND gate chip U3 are both high, and the output pin of AND gate chip U3 outputs a high level. Transistor Q1 then turns on, which in turn controls PMOS transistors U1 and U2, connecting the charger to the rechargeable battery and beginning charging. Since the charger is fully in contact with the DC connector J1 at this point, no sparks are generated. In one exemplary embodiment, the rechargeable battery's charging voltage is 29.4V.
[0041] In an exemplary embodiment 2, the anti-spark circuit also has a charging indication function. Specifically, Figure 2 As shown, the anti-spark circuit also includes: transistor Q2, resistors R9~R11 and MCU chip ( Figure 2(not shown) together constitute a charging indication circuit. In the charging indication circuit, the base of the transistor Q2 is connected to one end of the resistor R9. The other end of the resistor R9 is respectively connected to the output pin of the AND gate chip U3 and the positive electrode of the diode D2. The collector of the transistor Q2 is respectively connected to one end of the resistor R10 and one end of the resistor R11. The other end of the resistor R10 is connected to the voltage VDD. The other end of the resistor R11 is used to generate a charger access indication signal TP1. The other end of the resistor R11 is connected to the MCU chip for transmitting the charger access indication signal TP1 to the MCU chip. The emitter of the transistor Q2 is connected to the power ground.
[0042] The voltage VDD is 3.3V and is used to power the relevant components in the charging indication circuit. The resistor R9 acts as a current-limiting resistor to drive the transistor Q2. The charging indication circuit is used to provide an external charger access indication signal TP1. When the output pin of the AND gate chip U3 outputs a high level, the charger access indication signal TP1 is high, indicating that an external charger has been connected. The charger access indication signal TP1 is connected to the MCU chip, and can notify the user that normal charging is currently in progress through a display screen or indicator light.
[0043] In an exemplary embodiment 3, the anti-spark circuit can also be equipped with a power bank function to power or charge external detector equipment. Figure 3 As shown, the anti-spark circuit also includes: a diode D3 and an MCU chip ( Figure 3 (not shown). The anode of diode D3 is connected to the MCU chip. The anode of diode D3 is used to introduce external power supply control signal TP2. The cathode of diode D3 is connected to the cathode of diode D2 and one end of resistor R5, respectively. When the anti-spark circuit implements a power bank function, DC connector J1 is used to connect to an external detector device. That is, the power connector of the external detector device is connected to DC connector J1 for power supply.
[0044] In an exemplary embodiment, the model of diode D3 and diode D2 can be LL4148. Diode D3 and diode D2 form an OR gate logic relationship to ensure that when the positive input of any diode is high, its negative electrode can output a high level. When it needs to be used as a power bank, the MCU chip sets the external power supply control signal TP2 to a high level. At this time, the transistor Q1 is turned on, the PMOS tube U1 and the PMOS tube U2 are also turned on, the rechargeable battery is connected to the external detector equipment, and the rechargeable battery starts to supply power as the power supply. At this time, the current flow in the power supply circuit is J2→U2→U1→J1. The anti-spark circuit can realize the power bank function, which solves the dilemma of needing to charge other detector equipment when they are out of power during outdoor measurement.
[0045] In an exemplary embodiment, the present application also provides a detector device, which is powered by a rechargeable battery and is provided with Figure 1 、 Figure 2 or Figure 3 The anti-spark circuit shown. The rechargeable battery can be a lithium battery, a nickel-metal hydride battery, a nickel-cadmium battery, a graphene battery, or a sodium battery. The detector device can be a portable gas detector device, which is internally powered by a 24V lithium battery. In other exemplary embodiments, the detector device can also be a portable liquid detector or other device.
[0046] Compared to existing delay circuit solutions, the anti-spark circuit of this application achieves fast response charging, plug and play charging, without delay waiting. At the same time, the charging detection of the anti-spark circuit of this application relies on the good contact of the DC connector J1, which can effectively prevent the generation of charging sparks during the charger insertion process. If the contact is not complete, charging will not be possible, ensuring that accidents such as fires caused by poor charging contact will not occur. In addition, by adding a diode D3 connected to the MCU chip and connecting the DC connector J1 to an external detector device, the power bank function of external charging can be realized.
[0047] It should be noted that the terms "comprises," "includes," or any other variations thereof used in this application are intended to encompass non-exclusive inclusion, such that a product or system comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such a product or system. In the absence of further limitations, elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the product or system comprising the elements.
[0048] The above description shows and describes several preferred embodiments of the present application. However, as previously mentioned, it should be understood that the present application is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. Instead, the present application can be used in various other combinations, modifications, and environments and can be modified within the scope of the present application through the above teachings or techniques or knowledge in the relevant fields. Modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present application should be protected by the claims appended hereto.
[0049] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0050] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is only intended to help understand the method and core concept of this application. At the same time, for those skilled in the art, based on the concept of this application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.
Claims
1. An anti-spark circuit, characterized in that: include: DC connector J1, PMOS transistor U1, PMOS transistor U2, AND gate chip U3, charging interface J2, resistors R1-R8, Zener diode D1, diode D2 and transistor Q1; The first pin of the DC connector J1 is respectively connected to the drain of the PMOS tube U1 and one end of the resistor R1; the other end of the resistor R1 is respectively connected to one end of the resistor R2, the cathode of the voltage stabilizing diode D1, one end of the resistor R4, the first input pin of the AND gate chip U3, and the power pin of the AND gate chip U3; the second pin of the DC connector J1 is connected to the power ground; the third pin of the DC connector J1 is respectively connected to the other end of the resistor R2, one end of the resistor R3, and the second input pin of the AND gate chip U3; the other end of the resistor R3, the anode of the voltage stabilizing diode D1, the other end of the resistor R4, and the ground pin of the AND gate chip U3 are all connected to the power ground; the output pin of the AND gate chip U3 is connected to the anode of the diode D2 The cathode of the diode D2 is connected to one end of the resistor R5; the other end of the resistor R5 is respectively connected to one end of the resistor R6 and the base of the transistor Q1; the other end of the resistor R6 and the emitter of the transistor Q1 are connected to the power ground; the collector of the transistor Q1 is connected to one end of the resistor R7; the other end of the resistor R7 is respectively connected to the gate of the PMOS tube U1, the gate of the PMOS tube U2 and one end of the resistor R8; the other end of the resistor R8 is respectively connected to the source of the PMOS tube U1 and the source of the PMOS tube U2; the drain of the PMOS tube U2 is connected to the first pin of the charging interface J2; the second pin of the charging interface J2 is connected to the power ground; the charging interface J2 is also connected to the rechargeable battery inside the detector device; The resistor R1 serves as a current-limiting resistor for protecting the Zener diode D1; the Zener diode D1 is used to generate a power supply voltage for the AND gate chip U3; the resistors R2 and R3 together form a voltage divider circuit, which is connected in parallel with the Zener diode D1; the resistor R2 is the upper resistor of the voltage divider circuit, and the resistor R3 is the lower resistor of the voltage divider circuit, and the two divide the voltage to produce a high level; the resistor R4 is used to ground the first input pin of the AND gate chip U3 when no power is supplied; The first and third pins of the DC connector J1 are used for connecting a charger outside the detector device; when the charger is not inserted or not fully inserted into the DC connector J1, the third pin of the DC connector J1 is connected to the second pin of the DC connector J1; when the charger is fully inserted into the DC connector J1, the third pin of the DC connector J1 is disconnected from the second pin of the DC connector J1; When the charger is not fully inserted into the DC connector J1, the third pin of the DC connector J1 is connected to the second pin of the DC connector J1, the first input pin of the AND gate chip U3 is high, the second input pin of the AND gate chip U3 is low, the output pin of the AND gate chip U3 outputs a low level, the transistor Q1 is turned off, the PMOS transistor U1 and the PMOS transistor U2 are not conducting, and the charger is not conducting with the rechargeable battery; When the charger is fully inserted into the DC connector J1, the third pin of the DC connector J1 is disconnected from the second pin of the DC connector J1, the first input pin and the second input pin of the AND gate chip U3 are both at a high level, the output pin of the AND gate chip U3 outputs a high level, the transistor Q1 is turned on, the PMOS transistor U1 and the PMOS transistor U2 are also turned on, and the charger is connected to the rechargeable battery to start charging.
2. The anti-spark circuit according to claim 1, characterized in that: Also includes: Transistor Q2, resistors R9~R11 and MCU chip; the base of the transistor Q2 is connected to one end of the resistor R9; the other end of the resistor R9 is respectively connected to the output pin of the AND gate chip U3 and the positive electrode of the diode D2; the collector of the transistor Q2 is respectively connected to one end of the resistor R10 and one end of the resistor R11; the other end of the resistor R10 is connected to the voltage VDD; the other end of the resistor R11 is used to generate a charger connection indication signal TP1; the other end of the resistor R11 is connected to the MCU chip; the emitter of the transistor Q2 is connected to the power ground.
3. The anti-spark circuit according to claim 2, characterized in that: When the output pin of the AND gate chip U3 outputs a high level, the charger connection indication signal TP1 is a high level.
4. The anti-spark circuit according to claim 2, characterized in that: The voltage VDD is 3.3V.
5. The anti-spark circuit according to claim 1, characterized in that: Also includes: A diode D3 and an MCU chip; the anode of the diode D3 is connected to the MCU chip; The anode of the diode D3 is used to introduce the external power supply control signal TP2; the cathode of the diode D3 is connected to the cathode of the diode D2 and one end of the resistor R5 respectively.
6. The anti-spark circuit according to claim 5, characterized in that: The DC connector J1 is also used to connect to an external detector device; when the external power supply control signal TP2 is at a high level, the rechargeable battery is connected to the external detector device and starts to supply power.
7. A detector device powered by a rechargeable battery, characterized in that: The invention comprises the anti-spark circuit according to any one of claims 1 to 6.
8. The detector device according to claim 7, characterized in that: The rechargeable battery is a lithium battery, a nickel-metal hydride battery, a nickel-cadmium battery, a graphene battery or a sodium battery.
Citation Information
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