Half-hole design method of inner-layer circuit board
By optimizing the structural design and forming process of the inner half-hole, the problem of insufficient bonding force of the hole copper tear and copper plating layer is solved, and the quality of the inner circuit board is improved.
Patent Information
- Application Number
- CN202411979260.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-04-08
AI Technical Summary
The semi-hole design of the existing inner circuit board has hole copper tear, and the bonding force of the copper plating layer in the half-hole wall is insufficient, which affects the quality of the circuit board.
By optimizing the structural design of the inner layer half-hole, the semi-hole is formed by the NPTH hole intersecting with the PTH hole or the appearance intersecting with the PTH hole. After the pattern plating and before etching, the semi-hole is formed by the process of forming the semi-hole, increasing the pad thickness and half-hole hole diameter, and optimizing the PTH hole molding process.
The hole copper tear caused by half-hole molding is reduced, the bonding force of the copper plating layer of the half-hole wall is increased, and the quality of the inner circuit board is improved.
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Figure BDA0005221142180000031
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of printed circuit board manufacturing, and in particular to a half-hole design method for an inner layer circuit board. Background Art
[0002] The inner layer circuit can provide good signal integrity protection and reduce the impact of external interference on the signal. With the development of printed circuit board technology, more and more devices use printed circuit boards to integrate and optimize internal circuits. Half-hole refers to the process of forming a structure with only one side conductive by a specific process in the design of PCB (Printed Circuit Board). Half-hole can be used to control the impedance of PCB circuit. By adding half-holes to the line, the capacitance and inductance of the line can be adjusted to meet specific impedance matching requirements; it can also be used to embed electronic components such as inductors, filters, capacitors, etc., so as to achieve a more compact design and reduce the volume of components. The inner layer half-hole is a half-hole formed between the inner copper foil of the PCB. Reasonable inner layer half-hole design can increase the bonding strength of the copper plating layer on the wall of the half-hole and reduce the copper tearing phenomenon of the half-hole.
[0003] The object of the present invention is to provide a half-hole design method for an inner layer circuit board to improve the quality of the inner layer circuit board. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a half-hole design method for an inner-layer circuit board, thereby improving the quality of the circuit board by optimizing the structure of the inner-layer half-hole.
[0005] The technical solution of the present invention is as follows:
[0006] A method for designing a half hole of an inner layer circuit board, wherein the half hole is formed by the intersection of an NPTH hole and a PTH hole, or by the intersection of an outer shape and a PTH hole, wherein:
[0007] When the NPTH hole intersects with the PTH hole, and the inner layer corresponding to the PTH has connectivity, the pad is ≥10mil, and the NPTH hole is formed by two drilling methods after pattern plating and before etching, and a half hole is formed after drilling the NPTH hole;
[0008] When the shape intersects with the PTH hole and the inner layer corresponding to the PTH has connectivity, the pad is ≥10mil, the half-hole position is moved inward by 2mil, and a half-hole is formed in the PTH hole after graphic plating and before etching.
[0009] Furthermore, the PTH hole is formed by positive sheet one copper two copper, black hole, conductive glue or thickened copper process.
[0010] Furthermore, if the positive film one copper two copper process is used, the inner layer line width and line spacing are ≤4.8mil; if the black hole, conductive glue or thickened copper process is used, the inner layer line width and line spacing are ≥5mil.
[0011] Furthermore, the half-aperture diameter is ≥0.4 mm.
[0012] Furthermore, the drilling parameters for drilling NPTH holes are:
[0013] The hole diameter is 0.5mm-0.85mm, the spindle speed is 50-35krpm, the feed rate is 0.3m / min, and the retract rate is 15m / min;
[0014] The hole diameter is 0.9mm-3.0mm, the spindle speed is 25-20krpm, the feed rate is 0.3m / min, and the retract rate is 15m / min.
[0015] Furthermore, when the gong is half-hole, a cover plate is used as the gong plate.
[0016] Compared with the prior art, the half-hole design method for the inner layer circuit board provided by the present invention has the following beneficial effects:
[0017] The half-hole design method of the inner layer circuit board provided by the present invention can reduce the hole copper tearing caused by the half-hole forming by optimizing the half-hole forming process, and can increase the bonding strength of the copper plating layer on the half-hole hole wall, thereby improving the quality of the inner layer circuit board. DETAILED DESCRIPTION
[0018] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention and to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the specific implementation modes of the present invention are further described below.
[0019] It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in each embodiment of the present invention described below can be combined with each other as long as there is no conflict between them.
[0020] A method for designing a half hole of an inner layer circuit board, wherein the half hole is formed by the intersection of an NPTH hole and a PTH hole, or by the intersection of an outer shape and a PTH hole, wherein:
[0021] When the NPTH hole intersects with the PTH hole, and the inner layer corresponding to the PTH has connectivity, the pad is ≥10mil, and the NPTH hole is formed by two drillings after the pattern is electroplated and before etching. After drilling the NPTH hole, the half hole is formed. The etching process after drilling can remove the copper skin and flash formed during drilling, and improve the quality of the half hole. The reason is that: during the two drillings, because the hole is drilled on the copper skin, the copper skin rolls up and flashes after drilling. Because the rolled flash has no tin surface protection, when etching is performed again, the flash brought up during the two drillings can be etched clean. The drilling parameters are: the hole diameter is 0.5mm-0.85mm, the spindle speed is 50-35krpm, the feed rate is 0.3m / min, and the retracting speed is 15m / min; the hole diameter is 0.9mm-3.0mm, the spindle speed is 25-20krpm, the feed rate is 0.3m / min, and the retracting speed is 15m / min.
[0022] When the shape intersects with the PTH hole, and the inner layer corresponding to the PTH is connected, the pad is ≥10mil, and the half-hole position is moved inward by 2mil, which can increase the bonding strength of the copper plating layer on the wall of the half-hole and reduce the hole copper tearing caused by the half-hole. After the graphic electroplating and before etching, the PTH hole is formed into a half-hole. The etching process after the gong plate can remove the copper skin and flash formed during the gong plate, and improve the quality of the half-hole. The reason is that the flash will roll up on the surface of the half-hole after the gong plate. Since the rolled flash has no tin surface protection, it will be removed after etching. When gonging half holes, the gong plate is gonged with a cover plate (cardboard) to protect the tin surface of the positive film after electroplating. The specific gong plate parameters are as follows:
[0023]
[0024] The PTH hole is formed by positive film one copper two copper, black hole, conductive glue or thick copper process. If the positive film one copper two copper process is used, the inner line width and line spacing are ≤4.8mil; if the black hole, conductive glue or thick copper process is used, the inner line width and line spacing are ≥5mil. By optimizing the line width and line spacing of the PTH hole forming process, the bonding strength of the copper plating layer in the PTH hole is ensured.
[0025] The half-hole design method of the inner layer circuit board of the present invention has a half-hole diameter of ≥0.4mm.
[0026] It should be noted that, in the present invention, the inner layer corresponding to the PTH has connectivity specifically means: the circuit board is divided into single-sided, double-sided and multi-layer boards, wherein the multi-layer board is first passed through the inner layer circuit, and then pressed with the semi-cured sheet (PP), after the pressing is completed, the hole is drilled, and then a layer of copper is plated on the hole wall to form a PTH hole. When the inner layer is connected to the PTH hole wall, that is, the inner layer corresponding to the PTH has connectivity, the connection between the outer layer and the inner layer can be realized; if the inner layer is not connected to the PTH hole wall, that is, the inner layer corresponding to the PTH has no connectivity, at this time the inner layer cannot be connected to the outer layer.
[0027] The half-hole design method of the inner layer circuit board provided by the present invention can reduce the hole copper tearing caused by the half-hole forming by optimizing the half-hole forming process, and can increase the bonding strength of the copper plating layer on the half-hole hole wall, thereby improving the quality of the inner layer circuit board.
[0028] The embodiments of the present invention are described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions and variations made to these embodiments without departing from the principles and spirit of the present invention are still within the protection scope of the present invention.
Claims
1. A method for designing a half hole of an inner layer circuit board, characterized in that: A half hole is formed by the intersection of an NPTH hole and a PTH hole, or by the intersection of an outer shape and a PTH hole, where: When the NPTH hole intersects with the PTH hole, and the inner layer corresponding to the PTH has connectivity, the pad is ≥10mil, and the NPTH hole is formed by two drilling methods after pattern plating and before etching, and a half hole is formed after drilling the NPTH hole; When the shape intersects with the PTH hole and the inner layer corresponding to the PTH has connectivity, the pad is ≥10mil, the half-hole position is moved inward by 2mil, and a half-hole is formed in the PTH hole after graphic plating and before etching.
2. The method for designing a half hole of an inner layer circuit board according to claim 1, characterized in that: The PTH hole is formed by positive one copper two copper, black hole, conductive glue or thickened copper process.
3. The method for designing a half hole of an inner layer circuit board according to claim 2, characterized in that: If the positive film one copper two copper process is used, the inner layer line width and line spacing shall be ≤4.8mil; if the black hole, conductive glue or thickened copper process is used, the inner layer line width and line spacing shall be ≥5mil.
4. The method for designing a half hole of an inner layer circuit board according to claim 1, characterized in that: Half hole diameter ≥ 0.4mm.
5. The method for designing a half hole of an inner layer circuit board according to claim 1, characterized in that: The drilling parameters for drilling NPTH holes are: The hole diameter is 0.5mm-0.85mm, the spindle speed is 50-35krpm, the feed rate is 0.3m / min, and the retract rate is 15m / min; The hole diameter is 0.9mm-3.0mm, the spindle speed is 25-20krpm, the feed rate is 0.3m / min, and the retract rate is 15m / min.
6. The method for designing a half hole of an inner layer circuit board according to claim 1, characterized in that: When the gong is half-hole, a cover plate is used.
Citation Information
Patent Citations
A method for making a metal half hole at the edge of a plate
CN109152241A
Circuit board with half hole of novel metallization
CN207625878U
Module metalized double-half-hole PCB (printed circuit board)
CN218041915U