Method for processing polycrystalline silicon carbide wafer
By characterizing the surface roughness of polycrystalline silicon carbide wafers and removing necessary materials, the problem of incomplete repeatability of surface preparation in the Smart CutTM process is solved, reducing the scrap rate and production cost, and improving the binding success rate.
Patent Information
- Application Number
- CN202380062340.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-09-05
- Filing Date
- 2023-09-04
- Publication Date
- 2025-04-08
AI Technical Summary
When the existing Smart CutTM process prepares polycrystalline silicon carbide wafers on the surface, the surface preparation is incompletely repeated, resulting in incomplete transfer of m-SiC layer, increasing waste rate and production costs.
By characterizing the front surface roughness of the polycrystalline silicon carbide wafer, and when the predetermined specification is not met, the material with a thickness between 3 μm and 10 μm is removed from the front of the wafer until the predetermined specification is met, and then the bonding is performed.
It reduces the scrap rate, improves the binding success rate of polycrystalline silicon carbide wafers, reduces production costs, and reduces the impact on the environment.
Smart Images
Figure CN119790485A_ABST
Abstract
Description
Technical Field
[0001] The field of the invention is polycrystalline silicon carbide wafers intended to be used as supports for thin layers of single-crystalline silicon carbide. Background Art
[0002] Silicon carbide (SiC) is increasingly being used in power electronics applications, especially to meet the needs of the growing electronics sector, such as electric vehicles. Single-crystal SiC-based power devices and integrated power supply systems can actually achieve higher power densities than their conventional silicon counterparts, and can do so with smaller active areas.
[0003] However, substrates made of single-crystal SiC intended for use in the microelectronics industry are still expensive and difficult to supply on a large scale. Therefore, in order to produce composite structures, which usually include thin layers made of single-crystal SiC on a less expensive support substrate, it is advantageous to employ layer transfer solutions. One well-known thin layer transfer solution is Smart Cut TM Such a process makes it possible, for example, to manufacture a composite structure comprising a thin layer made of single-crystalline SiC taken from a donor substrate made of single-crystalline SiC (m-SiC) in contact with a receiving substrate made of polycrystalline SiC (p-SiC).
[0004] The receiving substrate is a p-SiC wafer obtained from a relatively thick p-SiC plate (e.g., a thickness of 0.6 mm to 3 mm). The p-SiC is deposited on a growth substrate (e.g., a graphite substrate), typically by chemical vapor deposition at a temperature between 1100°C and 1400°C, so that a p-SiC plate can be formed. After removing the growth substrate, the p-SiC plate undergoes one or more wafer formation processes (wafering process), which includes various cleaning, etching, grinding and polishing stages, and one or more p-SiC wafers having a desired shape (especially beveled edges) and a desired thickness can be obtained. Sawing can also be performed in this process, especially when multiple wafers need to be manufactured from the same plate. According to the SEMI standard, the thickness of the polycrystalline SiC wafer thus manufactured is: 350μm+ / -25μm for a substrate with a diameter of 150mm, or 500μm+ / -25μm for a substrate with a diameter of 200mm.
[0005] Smart Cut for SiC TM The process requires the ability to perform a specific surface preparation and then bond the donor substrate (mSiC) and the receiving substrate (pSiC) together, for example using ADB (atomic diffusion bonding) or SAB (surface activated bonding) techniques. This surface preparation aims to produce a specific surface condition characterized by roughness in the spatial frequency range of 5×5μm to 150×150μm.
[0006] However, this surface preparation does not seem to be completely reproducible, as many p-SiC wafers prepared in this way were accompanied by TM The risk of incomplete transfer of the m-SiC layer during the process. Therefore, in practice, p-SiC wafers prepared in this way are sorted beforehand to remove those that do not meet the roughness specifications required for the bonding process. The scrap rate has proven to be high, while the cost of p-SiC wafers is high and their production requires a lot of energy. Summary of the invention
[0007] The goal of the present invention is to reduce this scrap rate, thereby reducing the Smart Cut applied to SiC TM The cost of the process and its impact on the environment.
[0008] To this end, the present invention provides a method for processing a polycrystalline silicon carbide wafer, the method comprising the following steps:
[0009] - Characterize the surface roughness of the front side of multicrystalline silicon carbide wafers;
[0010] - when the characterized surface roughness meets predetermined specifications for bonding the polycrystalline silicon carbide wafer with the front side at the bonding interface to the single crystal silicon carbide substrate: performing the bonding;
[0011] -When the characterized surface roughness does not meet the specification, reducing the surface roughness of the front side by removing material with a thickness between 3μm and 10μm from the front side of the polycrystalline silicon carbide wafer; repeating the characterization of the surface roughness of the front side; when the surface roughness characterized by the repeated characterization step meets the predetermined specification, performing the combining.
[0012] The predetermined specification corresponds to a criterion determined in advance which, once met, is sufficient to achieve, for example, complete bonding of a p-SiC wafer with the front side located at the bonding interface to an m-SiC substrate. Bonding is called complete bonding when the m-SiC substrate is bonded to the entire front side (except for a peripheral ring having a width of less than 10 mm, preferably less than 6 mm, and more preferably less than 5 mm at all points). The bonding step and the material removal step are respectively determined by the conformity or non-conformity of the surface roughness characteristics of the surfaces to be bonded. Thus, the method according to the invention makes it possible to identify, from a batch of wafers originating from the same wafering process, those polycrystalline silicon carbide wafers which are at risk of incomplete transfer of the single-crystalline silicon carbide layer, so that these wafers can be corrected until the surface condition of the wafers allows a satisfactory bonding to be achieved, thereby avoiding the rejection of a large number of wafers.
[0013] Certain preferred but non-limiting aspects of this method are as follows:
[0014] - Material removal is only done on the front side;
[0015] - Removal of material from the front side including grinding;
[0016] - Grinding includes continuous rough grinding and fine grinding;
[0017] - Rough grinding is performed with a grinding wheel having an abrasive grit size characterized by a mesh size of less than 5000;
[0018] - Rough grinding removes less than 10 μm of material;
[0019] - Fine grinding is performed with a grinding wheel whose abrasive grit is characterized by a mesh size greater than 5000;
[0020] - The thickness of material removed by fine grinding is less than 3μm;
[0021] - removing material from the front side further comprises polishing the front side after grinding;
[0022] - polishing is chemical polishing or chemical-mechanical polishing;
[0023] -The thickness of the material removed by polishing is less than 1 μm;
[0024] - the method further comprises preforming a polycrystalline silicon carbide wafer from the polycrystalline silicon carbide plate, said preforming comprising double-sided thinning (wafering) of the polycrystalline silicon carbide plate, said double-sided wafering comprising, for example, sequentially very coarse grinding, coarse grinding and fine grinding;
[0025] - the pre-forming further comprises the steps of sawing, etching and / or polishing the back side and / or the front side of the polycrystalline silicon carbide plate;
[0026] - Characterization of the surface condition of the front side of multicrystalline silicon carbide wafers including light scattering haze measurements;
[0027] - the method comprises, when the surface roughness characterized by repeatedly characterizing the surface roughness of the front side does not meet the specification, further reducing the surface roughness of the front side by material removal;
[0028] The initially provided multicrystalline silicon carbide wafer has an initial thickness included within an acceptable thickness interval and, after the surface roughness of the front side has been reduced, a final thickness also included within the same acceptable thickness interval.
[0029] The present invention extends to a method for manufacturing a batch of multicrystalline silicon carbide wafers, each having a final thickness within an acceptable thickness interval, the method comprising:
[0030] - providing a set of polycrystalline silicon carbide wafers, each polycrystalline silicon carbide wafer having an initial thickness included within the same acceptable thickness interval;
[0031] - For each wafer in the set, in turn:
[0032] o Characterize the surface roughness of the wafer front side;
[0033] o adding the wafer to the batch when the characterized surface roughness meets predetermined specifications for bonding the wafer to the single crystal silicon carbide substrate with the front side at the bonding interface;
[0034] - When the characterized surface roughness does not meet the predetermined specification: reducing the roughness of the front side by removing material with a thickness between 3 μm and 10 μm from the front side of the polycrystalline silicon carbide wafer; repeating the characterization of the surface roughness of the front side; when the surface roughness characterized by repeating the characterization step meets the predetermined specification, adding the wafer to the batch.
[0035] Finally, the invention extends to a method for producing a batch of multilayer structures, each multilayer structure comprising a thin layer of single-crystalline silicon carbide deposited on a polycrystalline silicon carbide wafer, the method comprising, for each wafer of the batch of polycrystalline silicon carbide wafers formed as described above, bonding a single-crystalline silicon carbide substrate to the front side of the polycrystalline silicon carbide wafer. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Other aspects, objects, advantages and features of the invention will become more apparent on reading the following detailed description of preferred embodiments of the invention, given by way of non-limiting example and with reference to the accompanying drawings, in which Figure 1 1 is a diagram showing a Smart Cut process for processing a p-SiC wafer according to the present invention. TM Schematic representation of the various steps of the process. DETAILED DESCRIPTION
[0037] The invention relates to a method for processing a p-SiC wafer intended to be used as a support for a thin layer of m-SiC. The method may comprise a previous step of forming a wafer from a p-SiC plate. To this end, the p-SiC plate is subjected to a wafering process. This process may in particular comprise a double-sided thinning of the plate and a possible planarization of the plate in order to correct any curvature that may have occurred in the plate. The thinning may be carried out by grinding. This grinding may comprise, in sequence, very coarse grinding (reducing the thickness to about 400 μm), coarse grinding (reducing the thickness to about 360 μm) and fine grinding (removing the last few microns of material). The different grinding operations use grinding wheels of different grit sizes, which become smaller and smaller through successive grinding operations. The various grinding operations are carried out on the front and back sides of the polycrystalline silicon carbide plate.
[0038] In addition to grinding, the wafering process may include one or more steps of cleaning, etching and / or polishing the front and / or back sides of the polycrystalline silicon carbide plate. For example, polishing includes chemical-mechanical polishing. Polishing reduces the surface roughness of the polycrystalline silicon carbide plate and / or corrects the flatness of the polycrystalline silicon carbide plate. Cleaning removes contaminants.
[0039] Finally, the wafering process may include sawing, particularly when multiple polycrystalline silicon carbide wafers are to be produced from the same polycrystalline silicon carbide plate.
[0040] For example, p-SiC plates are prepared by CVD on graphite, which means that a step of separating the graphite is performed before double-sided thinning of the p-SiC plates.
[0041] The polycrystalline silicon carbide wafer produced from the p-SiC plate preferably has an initial thickness included in an acceptable thickness interval or a selected target thickness interval, so that once the surface roughness of the front side of the polycrystalline silicon carbide wafer is reduced by one or more consecutive material removals as described below, the final thickness of the p-SiC wafer is still included in the same acceptable value interval, the initial thickness and the final thickness respectively referring to the average thickness of the p-SiC wafer before and after all material removal.
[0042] More specifically, the initial thickness and the final thickness of the polycrystalline silicon carbide wafer fall within intervals referred to as the initial thickness distribution and the final thickness distribution of the polycrystalline silicon carbide wafer, respectively. The initial thickness distribution of the polycrystalline silicon carbide wafer is selected to be included in the acceptable thickness interval, and the median value of the initial thickness distribution is selected to be greater than the median value of the acceptable thickness interval, so that the final thickness distribution of the polycrystalline silicon carbide wafer is also included in the acceptable thickness interval, wherein the median value of each interval refers to the average value of the lower endpoint and the upper endpoint of the interval. For example, the median value of the initial thickness distribution is 15 μm greater than the median value of the acceptable thickness interval.
[0043] Such an embodiment advantageously makes it possible to obtain a polycrystalline silicon carbide wafer that complies with a thickness standard despite one or more successive reductions in surface roughness implemented by material removal. The thickness standard may correspond to an acceptable thickness range for semiconductor industry equipment parts. Alternatively or in addition, the thickness standard may also comply with a specification generally adopted in the semiconductor industry, or be clearly defined by a semiconductor industry standard.
[0044] For example, an acceptable thickness interval is the interval defined by the SEMI standard for a p-SiC plate with a diameter of 150 mm, i.e., 350 μm + / - 25 μm. As a further example, an acceptable thickness interval is the thickness interval commonly used by most semiconductor industries for a p-SiC plate with a diameter of 200 mm, i.e., 500 μm + / - 25 μm.
[0045] In this case, the initial thickness of the wafer produced from the p-SiC plate with a diameter of 150 mm can be included in the initial thickness distribution shifted to 365 μm, for example, the initial thickness is 365 μm + / - 10 μm, while the initial thickness of the wafer produced from the p-SiC plate with a diameter of 200 mm can be included in the initial thickness distribution shifted to 515 μm, for example, the thickness is 515 μm + / - 10 μm. This embodiment allows the final thickness of the p-SiC wafer with a diameter of 150 mm to remain in compliance with the SEMI standard by making the final thickness included in the final thickness distribution of 350 μm + / - 25 μm; and allows the final thickness of the p-SiC wafer with a diameter of 200 mm to remain in compliance with the specifications generally adopted by the semiconductor industry by making the final thickness included in the final thickness distribution of 500 μm + / - 25 μm, although according to the present invention described below, in order to ensure that the wafer is Smart Cut after bonding with the substrate made of m-SiC TM As a successful result of the process, one or more operations are performed to correct the surface condition of the p-SiC wafer.
[0046] like Figure 1 As shown, the method according to the invention may thus comprise a step R1 of providing a p-SiC wafer. The method according to the invention also comprises a step (in Figure 1 This characterization can mainly involve light scattering haze measurement. This haze measurement can characterize the surface roughness of the front side of the p-SiC wafer. This haze is derived by a method using the optical reflection properties of the surface to be characterized and corresponds to the optical signal scattered by the surface due to the micro-roughness of the surface. For example, the haze measurement can be performed using a KLA-Tencor Surfscan SP1 or SPA2 detection system or using a Lasertec SICA88 detection system.
[0047] Next, the method according to the invention comprises the step of determining whether the characterized surface roughness meets predetermined specifications.
[0048] In certain embodiments, the predetermined specification is a previously determined standard which, once met, is sufficient to achieve complete bonding of the p-SiC wafer to the m-SiC substrate with the front side at the bonding interface. Bonding is called complete bonding when the m-SiC substrate is bonded to the entire front side (except for a peripheral ring having a width of less than 10 mm, preferably less than 6 mm, and more preferably less than 5 mm at all points). In practice, since the substrate generally has a bevel around its edge, the bonding of the m-SiC substrate and the subsequent transfer of the m-SiC thin layer are performed over most of the surface of the p-SiC wafer and not in a peripheral ring extending from the edge of the wafer, the width of which depends mainly on the geometry of the bevel.
[0049] The predetermined specification may be related to an indirect measurement of the surface roughness. In a possible embodiment where the characterization of the surface roughness involves a haze measurement, the predetermined specification may be that the measured haze level must be below a predetermined threshold, or in other words, below a haze level limit previously determined to ensure successful bonding (i.e., in particular complete bonding as defined above).
[0050] If the characterized surface roughness meets the predetermined specifications, the method according to the invention proceeds with bonding the p-SiC wafer to a substrate made of m-SiC, for example using the ADB technique ( Figure 1 The front side of the p-SiC wafer is located at the bonding interface. TM The m-SiC substrate is then separated along the weak plane previously formed by ion implantation, thereby transferring the m-SiC thin layer to the p-SiC wafer to form a composite structure. This separation ( Figure 1 In this regard, Figure 1 The provision of the m-SiC substrate is indicated as D1, and the ion implantation for weakening it is indicated as D2. At the end of the separation D and the transfer of the m-SiC thin layer to the p-SiC wafer, the composite structure is subjected to a finishing treatment ( Figure 1 In the figure, it is represented as F), and on the other hand, the residue of the m-SiC substrate is possibly recovered R so that it can be reused.
[0051] If the surface condition of the front side does not meet the predetermined specifications, the method according to the invention comprises a step of reducing the surface roughness of the front side by removing material from the front side of the p-SiC wafer (in Figure 1 Unlike the previous method of thinning both sides of the p-SiC plate, material removal can be performed only on the front side.
[0052] Removing material from the front side will remove material with a thickness between 3 μm and 10 μm. This can be achieved by grinding the front side. As mentioned before, the grinding of the p-SiC wafer can here only be performed on the front side intended to be bonded to the m-SiC substrate. This grinding of only the front side is possible due to the double-sided grinding previously performed during the wafering process, which balances the stresses between the front side and the back side.
[0053] Grinding may include continuous rough grinding and fine grinding. Rough grinding may be performed with a grinding wheel having an abrasive grain size characterized by a mesh size of less than 5000. The thickness of material removed by rough grinding is preferably less than 10 μm, for example a thickness of 5 μm.
[0054] For its part, fine grinding can be performed with a grinding wheel having an abrasive grain size characterized by a mesh size greater than 5000, for example a mesh size between 8000 and 12000. The thickness of material removed by fine grinding is preferably less than 3 μm.
[0055] In one possible embodiment, removing material from the front side may further include polishing the front side after grinding. The polishing may be chemical polishing or chemical-mechanical polishing. The thickness of the material removed by polishing is preferably less than 1 μm.
[0056] It will be appreciated that if such a reduction in the surface roughness of the front side intended for bonding would remove material of, for example, 10 μm in thickness, the initial thickness of the p-SiC wafer is preferably greater than the thickness expected by the standard, for example a thickness of 365 μm, so that after correction it will have the 350 μm thickness expected by the standard, or so that it can undergo multiple surface condition correction operations while keeping the final thickness above the lower limit of 325 μm expected by the standard.
[0057] Specifically, after first correcting the surface roughness of the front side intended for bonding, the method includes repeatedly characterizing the surface condition of the front side, and bonding is performed when the surface condition characterized by the repeated characterization meets predetermined specifications.
[0058] When the surface roughness characterized by repeated characterization does not meet predetermined specifications, the method may include further reducing the surface roughness of the front side by material removal.
[0059] The method according to the invention may comprise one or more further reductions of the surface roughness of the front side by material removal, each reduction being preceded by characterization of the surface condition. Each further material removal is preferably identical to the first material removal. The first material removal and up to 3 further material removals can typically be completed by removing 3 μm to 10 μm in each material removal, while retaining a final thickness that complies with the SEMI standard.
[0060] Furthermore, the method according to the present invention can be repeated to process a group of wafers all produced by the same wafering process and produce a batch of wafers, each of which can be bonded to a single crystal SiC substrate despite the lack of repeatability in the surface condition of the wafers produced by the wafering process. Therefore, the present invention extends to a method for producing a batch of multicrystalline silicon carbide wafers, the method comprising:
[0061] - providing a set of polycrystalline silicon carbide wafers;
[0062] -For each wafer in the set of wafers:
[0063] o Characterize the surface roughness of the wafer front side;
[0064] o adding the wafer to the batch when the characterized surface roughness meets predetermined specifications for bonding the wafer to the single crystal silicon carbide substrate with the front side at the bonding interface;
[0065] o When the characterized surface roughness does not meet the predetermined specification: reducing the surface roughness of the front side by removing material with a thickness between 3 μm and 10 μm from the front side of the polycrystalline silicon carbide wafer; repeating the characterization of the surface roughness of the front side; when the surface roughness characterized by repeating the characterization step meets the predetermined specification, adding the wafer to the batch.
[0066] The batches of wafers thus formed can then be bonded to single crystal SiC substrates, respectively.
[0067] Each polycrystalline silicon carbide wafer of the provided set of polycrystalline silicon carbide wafers preferably has an initial thickness included within an acceptable thickness interval, and after the surface roughness of the front side is reduced, a final thickness also included within the same acceptable thickness interval.
[0068] In other words, each polycrystalline silicon carbide wafer produced by the method for manufacturing a batch has a final thickness within a target range, and each polycrystalline silicon carbide wafer of the initially provided group of polycrystalline silicon carbide wafers has an initial thickness included in a smaller range within the target range, the central value of the smaller range being higher than the central value of the target range.
Claims
1. A method for processing a polycrystalline silicon carbide wafer, the method comprising the following steps: - characterizing (R2) the surface roughness of the front side of a polycrystalline silicon carbide wafer; - when the characterized surface roughness meets predetermined specifications for bonding the polycrystalline silicon carbide wafer with the front side at the bonding interface to the single-crystalline silicon carbide substrate (C): performing the bonding; -When the characterized surface roughness does not meet the specification, reducing (R3) the surface roughness of the front side by removing material with a thickness between 3μm and 10μm from the front side of the polycrystalline silicon carbide wafer; repeating the characterization of the surface roughness of the front side; when the surface roughness characterized by the repeated characterization step meets the predetermined specification, performing the combination.
2. The method according to claim 1, wherein: Material removal is only carried out on the front side.
3. The method according to any one of claims 1 and 2, wherein: Removing material from the front side includes grinding.
4. The method according to claim 3, wherein: Grinding includes rough grinding and fine grinding in sequence.
5. The method according to claim 4, wherein: Rough grinding is performed with a grinding wheel having an abrasive grit characterized by a mesh size of less than 5000.
6. The method according to any one of claims 4 and 5, wherein: The material thickness removed by rough grinding is less than 10μm.
7. The method according to any one of claims 4 to 6, wherein: Fine grinding is performed with a grinding wheel having an abrasive grit characterized by a mesh size greater than 5000.
8. The method according to any one of claims 4 to 7, wherein: The material thickness removed by fine grinding is less than 3μm.
9. The method according to any one of claims 4 to 8, wherein: Removing material from the front side further includes polishing the front side after grinding.
10. The method according to claim 9, wherein: Polishing is chemical polishing or chemical-mechanical polishing.
11. The method according to any one of claims 9 and 10, wherein: The thickness of material removed by polishing is less than 1μm.
12. The method according to any one of claims 1 to 11, further comprising pre-forming a polycrystalline silicon carbide wafer from a polycrystalline silicon carbide plate, wherein the pre-forming comprises double-sided thinning (wafering) of the polycrystalline silicon carbide plate, and the double-sided wafering comprises, for example, ultra-rough grinding, rough grinding and fine grinding in sequence.
13. The method according to claim 12, wherein: The preforming further comprises the steps of sawing, etching and / or polishing the back side and / or the front side of the polycrystalline silicon carbide plate.
14. The method according to any one of claims 1 to 13, wherein: Characterization of the surface condition of the front side of multicrystalline silicon carbide wafers includes light scattering haze measurements.
15. The method according to any one of claims 1 to 14, comprising: When the surface roughness characterized by repeatedly characterizing the front surface surface roughness does not meet the specification, the surface roughness of the front surface is further reduced by material removal.
16. The method according to any one of claims 1 to 15, wherein: The polycrystalline silicon carbide wafer is initially provided with an initial thickness included within an acceptable thickness interval, and after the surface roughness of the front side is reduced, its final thickness is also included within the same acceptable thickness interval.
17. A method for manufacturing a batch of multicrystalline silicon carbide wafers, each of which has a final thickness within an acceptable thickness interval, the method comprising: - providing a set of polycrystalline silicon carbide wafers, each polycrystalline silicon carbide wafer having an initial thickness included within the same acceptable thickness interval; - For each wafer in the set, in turn: o Characterize the surface roughness of the front side of the wafer (R2); o adding the wafer to the batch when the characterized surface roughness meets predetermined specifications for bonding the wafer to a single crystal silicon carbide substrate with the front side at a bonding interface (C); o When the characterized surface roughness does not meet the predetermined specification: reducing (R3) the surface roughness of the front side by removing material with a thickness between 3 μm and 10 μm from the front side of the polycrystalline silicon carbide wafer; repeating the characterization of the surface roughness of the front side; when the surface roughness characterized by the repeated characterization step meets the predetermined specification, adding the wafer to the batch.
18. The method for manufacturing a batch of multicrystalline silicon carbide wafers according to claim 17, wherein: Each silicon carbide wafer in the provided set of multicrystalline silicon carbide wafers has an initial thickness included in a smaller range within an acceptable thickness interval, with a center value of the smaller range being higher than a center value of the acceptable thickness interval.
19. A method for producing a batch of multilayer structures, each multilayer structure comprising a thin layer of single-crystalline silicon carbide deposited on a polycrystalline silicon carbide wafer, the method comprising, for each wafer of a batch of polycrystalline silicon carbide wafers formed according to any one of claims 17 or 18, bonding a single-crystalline silicon carbide substrate to the front side of the polycrystalline silicon carbide wafer.