High-reliability precise timing device

Abstract

The invention discloses a high-reliability precise time service device, and particularly relates to the field of precise time service, and the device comprises a GNSS antenna, a Beidou satellite receiver, a main control module, a rubidium atomic frequency standard module, a frequency distribution module, a time code generation module, a network time service module, a display control module and a power module. Standard time signals are obtained through the Beidou satellite receiver, time calibration and taming are carried out through the rubidium atomic frequency standard module, and it is ensured that the output time signals and standard time are kept synchronous; the frequency distribution module distributes and amplifies a 10MHz standard frequency signal output by the rubidium clock and then divides the 10MHz standard frequency signal into multiple paths for output; the time code generation module completes 1pps and B code signals; the network time service module provides standard time information generated by the equipment to a computer with a time service requirement in a network by using an NTP standard network time service protocol; and the power supply module provides conversion from 220V to direct current through AC / DC conversion, provides power supply for each functional module and controls the power-on sequence.

Description

Technical Field

[0001] The present invention relates to the technical field of precision time service, and more particularly to a highly reliable precision time service device. Background Art

[0002] A highly reliable and precise timing device is a software tool specially designed to simulate and test the performance of time synchronization systems, which plays a vital role in modern communication and computing systems. With the development of technology, the requirements for time accuracy have been raised from milliseconds to microseconds or even nanoseconds, especially in the fields of distributed systems, network services, financial transactions, etc. The accuracy of time synchronization is directly related to the stability and reliability of the system. A highly reliable and precise timing device can simulate multiple time synchronization protocols, including but not limited to NTP and PTP. NTP is a widely used protocol that can synchronize computer time on the Internet, and its accuracy is usually at the millisecond level. PTP is a higher precision protocol that can achieve time synchronization at the microsecond or even nanosecond level.

[0003] A highly reliable and precise timing device has a wide range of application scenarios. In the fields of education and research, it can help students and researchers better understand the principles and challenges of time synchronization. In system development and testing, it is an indispensable tool for testing and verifying new synchronization algorithms or systems. In addition, it can also be used for performance evaluation to help evaluate the performance of existing time synchronization systems under different conditions, as well as in fault simulation and recovery testing to test the system's fault tolerance and recovery mechanism. Despite providing powerful simulation capabilities, it is still difficult to use in the development and use process.

[0004] However, it still has some disadvantages in actual use, such as clock frequency deviation and drift. In actual applications, due to the influence of hardware and environmental factors, the clock frequency may deviate, and drift may occur after long-term operation. Summary of the invention

[0005] In order to overcome the above-mentioned defects of the prior art, an embodiment of the present invention provides a highly reliable and precise timing device to solve the problems raised in the above-mentioned background technology.

[0006] To achieve the above object, the present invention provides the following technical solutions:

[0007] GNSS antenna: Receives satellite time and frequency signals of BDSB1 / B2 / B3 and GPSL1 / L2 frequencies, and inputs them to the Beidou satellite receiver through RF cables;

[0008] Beidou satellite receiver: Receives Beidou satellite signals through an external antenna. The signals are preamplified by LNA, converted to RF / IF, and sampled by A / D to form an intermediate frequency digital signal, which is then fed into the baseband signal processing unit.

[0009] Main control module: Use the rubidium atomic clock frequency source signal to establish, generate and output the local time reference, and use the satellite to receive the standard time for calibration; use the CAN bus to obtain the working status and working parameters of each module of the equipment in real time, send them to the host computer through SNMP and UDP protocols, and receive the control instructions sent by the host computer to set and modify the working status and parameters of each module;

[0010] Rubidium atomic frequency standard module: generates a time source signal, in which a high-stability crystal oscillator is locked to the rubidium atomic clock;

[0011] Frequency distribution module: divides the 10MHz standard frequency signal output by the rubidium clock into multiple outputs after distribution and amplification;

[0012] Time code generation module: completes 1pps, B code signal, TOD signal generation, level conversion, input and output control, and bus transmission control;

[0013] Network timing module: Use the NTP standard network timing protocol to provide the standard time information generated by the device to computers in the network that have timing requirements;

[0014] Display and control module: With ARM chip as the main control chip, it is designed with buttons and display screen, and has human-computer interaction functions such as information input and working status display;

[0015] Power module: Provides 220V to DC conversion through AC / DC conversion, provides power for each functional module and controls the power-on sequence.

[0016] Preferably, the line adopts a GNSS full-frequency high-precision measurement and mapping antenna. The antenna is optimized for harsh outdoor environments. The antenna adopts a fully enclosed structure design, and the internal module is fixed inside the antenna cover by reinforcement. The antenna cover is made of corrosion-resistant materials.

[0017] Preferably, the Beidou satellite receiver receives standard time, and the Beidou satellite receiver uses the J600 satellite positioning and timing board independently developed by Shanghai Jeles.

[0018] Preferably, the main control module analyzes Beidou satellite signals, obtains satellite data and standard time information, establishes, maintains and outputs the local reference time; exchanges information with the network timing module and the display and control module through the bus, uploads the working status and fault alarm information based on the SNMP / UDP protocol, and receives the control instructions sent by the host computer to set the working status and parameters of each module. The specific definitions of the equipment working status and fault alarm information are described in detail in the interface protocol. The user can clarify the cause of the equipment failure according to the fault code in the protocol and perform targeted operations according to the equipment instruction manual.

[0019] Preferably, in the rubidium atomic frequency standard module, the rubidium atomic clock uses the received military standard time signal as a reference signal to quickly tame and synchronize the internal DDS; when the satellite signal is lost, the military standard time cannot be obtained, and the rubidium atomic clock uses its own frequency source to continue to generate and output the local standard time; the rubidium atomic clock uses the external 1PPS signal as a reference to keep the 1PPS signal output by the module consistent with the external 1PPS signal. Through the phase-locked loop circuit, the constant temperature crystal oscillator with high instantaneous stability and low phase noise is locked.

[0020] Preferably, the frequency distribution module, the 10 MHz output directly adopts the 10 MHz signal output by the rubidium atomic clock, which is directly output in two ways after distribution and amplification; the 10 MHz distribution and amplification adopts an integrated operational amplifier.

[0021] Preferably, the time code generating module, in the satellite receiving mode, processes the time reference signal of the Beidou satellite through the signal processing module and the CPU, outputs the PPS_BP signal, outputs the pulse-second signal (PPS_OUT) through the digital isolator, and outputs the TOD_BP signal, outputs the time message information (TOD_OUT) through the bus transceiver and RS422; the signal processing module receives the pulse-second signal and time message information sent from the bus, the pulse-second signal is output 1PPS_IN through the digital isolator and input into the signal processing module, and the time message information is input into the signal processing module through RS422 and the bus transceiver.

[0022] Preferably, the network timing module and the network timing unit realize the timing function based on the time reference information using the PTP standard network protocol. The PTP protocol runs on an MCU processor supporting the IEEE1588v2 standard, obtains the time deviation through the interaction of messages, and adjusts the frequency through the obtained time deviation.

[0023] Preferably, the display control module uses part of the resources of the main control ARM chip to respond to key input and control the display screen; the display control module has 6 keys, including 4 direction keys "up", "down", "left" and "right", a confirmation key and a return key; the key input is connected to the I / 0 pin of the main control chip, the pin is set as input, and combined with the display screen interface design, the key input control realizes the control part of the display control unit;

[0024] Preferably, the power module supplies power to the device.

[0025] Technical effects and advantages of the present invention:

[0026] 1. A Beidou core timing module used in a high-reliability precision timing device, after zero-value calibration at a third-party metrology agency and optimization processing, the output standard time synchronization uncertainty is ≤30ns. Using this time, the device tames the internal rubidium clock, which can effectively eliminate the impact of a single timing jitter, and the actual time synchronization index is improved;

[0027] 2. A B code output by a high-reliability precision timing device is generated by internal FPGA modulation. Its initial phase is synchronized with the internal time reference 1pps. The generation module itself has a fixed delay, which can be eliminated by calibration. After multiple precise calibrations, the best result can achieve a synchronization error within 10ns. It meets the technical indicator requirement of 0.2us;

[0028] 3. The PTP protocol is currently a mature 1588V2 protocol, which uses the ping-pong principle to achieve accurate network timing through hardware timestamps and two-way comparison measurements. The PTP principle requires symmetric network paths, so the fewer network nodes, the higher the index that can be achieved;

[0029] 4. A high-reliability and precision timing device is always tamed by satellites, so that the time and frequency output by the device are synchronized with the standard time. According to the satellite timing error of 100ns, the relative frequency deviation corresponding to one day is 100ns / 86400s=1.2e-12, which is better than the frequency accuracy index of 3e-12 / day. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a schematic diagram of the device composition of the present invention.

[0031] Figure 2 A schematic diagram of the principle of establishing the time base of the present invention.

[0032] Figure 3 The figure is a flow chart of obtaining time and generating local reference time of the present invention.

[0033] Figure 4 The figure is a schematic diagram of the ephemeris binding process of the present invention.

[0034] Figure 5 Schematic diagram of data interaction, working status and alarm information uploading function of the present invention

[0035] Figure 6 This is a schematic diagram of the principle of the rubidium clock taming module of the present invention.

[0036] Figure 7 Schematic diagram of 1PPS+TOD output principle of the present invention

[0037] Figure 8 Schematic diagram of 1PPS+TOD output principle of the present invention

[0038] Fig. 9 Schematic diagram of the B code sending module workflow of the present invention

[0039] Fig.10 Schematic diagram of the P code element state machine of the present invention

[0040] Fig.11 Schematic diagram of the code element state machine of the present invention

[0041] Fig.12 The schematic diagram of the PTP time synchronization process of the present invention is

[0042] Fig.13 The schematic diagram of the PTP module circuit principle of the present invention is

[0043] Fig.14 Schematic diagram of the display control unit of the present invention

[0044] Fig.15 Schematic diagram of the normal working state processing flow of the display control unit of the present invention

[0045] Fig.16 Schematic diagram of powering on the device of the present invention

[0046] Fig.17 Schematic diagram of the design principle of the power module of the present invention

[0047] Fig.18 The present invention uses RS422 to output the PPS interface flow diagram

[0048] Fig.19 Schematic diagram of the process of using optical fiber to output PPS interface of the present invention

[0049] Fig. 20 This is a schematic diagram of the process of using RS422 to output the ephemeris interface of the present invention. DETAILED DESCRIPTION

[0050] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] See also Figure 1 As shown, the present invention provides a highly reliable and precise timing device, which includes a GNSS antenna, a Beidou satellite receiver, a main control module, a rubidium atomic frequency standard module, a frequency allocation module, a time code generation module, a network timing module, a display control module, and a power supply module;

[0052] GNSS antenna: Receives satellite time and frequency signals of BDSB1 / B2 / B3 and GPSL1 / L2 frequencies, and inputs them to the Beidou satellite receiver through RF cables;

[0053] The GNSS antenna adopts a GNSS full-frequency high-precision measurement and mapping antenna. The antenna is optimized for harsh outdoor environments and meets the requirements of use in various complex environments. The antenna adopts a fully enclosed structure design, and the internal module is fixed inside the antenna cover by reinforcement to improve the overall impact and vibration resistance. The antenna cover is made of corrosion-resistant materials to isolate the internal components of the equipment from the external environment.

[0054] Beidou satellite receiver: Receives Beidou satellite signals through an external antenna. The signals are preamplified by LNA, converted to RF / IF, and sampled by A / D to form an intermediate frequency digital signal, which is then fed into the baseband signal processing unit.

[0055] The Beidou satellite receiver is used to receive standard time. The Beidou satellite receiver uses the J600 satellite positioning and timing board independently developed by Shanghai Jeles. J600 is a military high-performance miniaturized satellite navigation and positioning OEM board for special applications such as airborne, missile-borne, ship-borne, and vehicle-borne. It has the best long code direct capture, high dynamic tracking, and anti-narrowband interference performance in the industry, stable operation, and superior performance.

[0056] Main control module: Use the rubidium atomic clock frequency source signal to establish, generate and output the local time reference, and use the satellite to receive the standard time for calibration; use the CAN bus to obtain the working status and working parameters of each module of the equipment in real time, send them to the host computer through SNMP and UDP protocols, and receive the control instructions sent by the host computer to set and modify the working status and parameters of each module;

[0057] The main control module uses the rubidium atomic clock signal to produce the local standard time signal, and uses the standard time received by the satellite to perform frequency and phase calibration. The calibration method is to tame the frequency of the rubidium atomic clock and change the phase of the output signal of the rubidium atomic clock to achieve the output of the standard time signal;

[0058] Use the backplane CAN bus and 485 to interact with the input unit, power board, output unit, time and frequency module and other sub-card modules, collect and analyze the status information of each module, and perform necessary control on each sub-card module;

[0059] Through the RJ45 network port, it interacts with the host computer monitoring software according to SNMP and custom UDP protocols, reports the collected parameters such as the working status of each module, and receives various control commands from the host computer;

[0060] like Figure 2 As shown, the establishment of the time reference is achieved by calibrating the time signal and frequency signal output by the rubidium atomic clock, wherein the reference signal for calibration is the military standard time received by the Beidou satellite receiver, and the calibration method is to use the time difference measurement technology to measure the phase and frequency deviation between the local time reference and the standard time, and then control the rubidium atomic clock to perform phase and frequency correction according to the deviation to achieve synchronization with the military standard time;

[0061] The core processor communicates with each module inside the device through the CAN bus and 485 bus to complete data interaction, and uses the SNMP protocol and UDP protocol to communicate with the host computer, thereby realizing the operation, maintenance and management of the entire device;

[0062] The main control module analyzes Beidou satellite signals, obtains satellite data and standard time information, establishes, maintains and outputs the local reference time; it exchanges information with the network timing module and the display and control module through the bus, uploads the working status and fault alarm information based on the SNMP / UDP protocol, and receives the control instructions sent by the host computer to set the working status and parameters of each module. The specific definitions of the equipment working status and fault alarm information are described in detail in the interface protocol. Users can identify the cause of the equipment failure based on the fault code in the protocol and perform targeted operations according to the equipment instruction manual;

[0063] like Figure 3As shown, the main control module obtains the standard time and generates the local reference time function. After the satellite receiver parses the satellite signal, it outputs a message containing the current standard time, positioning information and satellite information to the main control module every second. After the main control module receives the message output by the receiver, it parses and sorts the message according to the known protocol, and demodulates the current standard time parameters (including UTC parameters, leap second status, etc.) from the time message. In order to avoid parsing anomalies, an erroneous time is used to update the local time. After successfully obtaining the standard time from the message, the obtained standard time is compared with the local time. When the standard time is not equal to the local time and reaches a certain threshold, the standard time is used to update the local time. When the satellite signal reception is abnormal, or there is no satellite signal and the standard time signal cannot be obtained, the device automatically enters the autonomous time holding state, using the good long-term stability of the rubidium atomic clock to maintain continuous and reliable time output;

[0064] like Figure 4 As shown, the ephemeris binding process is as follows:

[0065] The original ephemeris message is generated by the GNSS receiver after receiving the satellite signal. After the GNSS receiver generates the original ephemeris message, it is sent to the main control module. The main control module recompiles and caches the ephemeris according to the specified data format. When the original ephemeris is updated, the main control module will replace the cached ephemeris data. When a request instruction reaches the main control module, the main control module will output the compiled ephemeris data. When the GNSS receiver has no satellite signal, it will no longer output the original ephemeris data. At this time, if a request message reaches the main control module, the main control module will output the cached ephemeris data.

[0066] During the ephemeris output process, the main control module will monitor the "report data" fed back by the receiving device. If the unpacking result of the last frame reports that the unpacking is successful, it will send a "parameter injection result instruction" and wait for the receiving device to feedback the "parameter injection result report", and then terminate the binding process.

[0067] If there is a report of unpacking error, the main control module will resend from the error frame. If there are three consecutive reports of unpacking errors, the binding process will be terminated and the next request instruction will be waited for;

[0068] like Figure 5 As shown, the main control module has data interaction, working status and alarm information upload and control command receiving and sending functions. The main control module interacts with the network timing module and the display and control module. The interactive data types include the local reference time (year, month, day, hour, minute, second), positioning information, IP information of the network timing module, module running time information, etc.; based on the SNMP / UDP protocol, the module working status and fault alarm information are uploaded; and the reference source, serial port baud rate, IP address, time zone parameters and other setting information transmitted from the display and control module or the network are received and sent.

[0069] Rubidium atomic frequency standard module: generates a time source signal, in which a high-stability crystal oscillator is locked to the rubidium atomic clock;

[0070] The rubidium atomic frequency standard module, such as Figure 6 As shown in the figure, the rubidium atomic clock uses the received military standard time signal as a reference signal to quickly tame and synchronize the internal DDS, overcome the drift of the rubidium oscillator itself, and become a basic synchronous clock unit, so that the frequency and phase output by the rubidium atomic clock are synchronized with the military standard time. When the satellite signal is lost, the military standard time can no longer be obtained. At this time, the rubidium atomic clock uses its own frequency source to continue to maintain the generation and output of the local standard time.

[0071] The rubidium atomic clock uses the external 1PPS signal as a reference, so that the 1PPS signal output by the module is consistent with the external 1PPS signal. Through the phase-locked loop circuit, the high instantaneous stability and low phase noise constant temperature crystal oscillator is locked to obtain a high-precision, high instantaneous stability and low phase noise frequency signal;

[0072] The rubidium atomic frequency standard uses military-grade rubidium atomic clocks. It is planned to use the XHTF1021 of Chengdu Tianao Company or the WR1011T of Wuhan Institute of Physics. The performance indicators of the two rubidium atomic clocks are basically the same and both meet the project requirements. Since the supply cycle of rubidium atomic clocks is relatively long, the final selection will be determined based on the supply cycle during the specific implementation. Rubidium atomic clocks have good frequency stability and accuracy, can operate in the range of -40℃-60℃, and have anti-seismic performance;

[0073] Frequency distribution module: divides the 10MHz standard frequency signal output by the rubidium clock into multiple outputs after distribution and amplification;

[0074] The frequency distribution module has a 10MHz output that directly uses the 10MHz signal output by the rubidium atomic clock, which is directly output in two ways after distribution and amplification; the 10MHz distribution amplifier uses an integrated operational amplifier; in the design of the amplifier circuit, negative feedback is used to stabilize the operating point of the amplifier circuit, increase the constancy of the gain, and at the same time play the role of reducing nonlinear distortion, suppressing noise, and expanding the frequency band; after the negative feedback link is added to the amplifier, although a part of the gain will be sacrificed, it will have a great beneficial effect on a series of performance indicators of the amplifier; a filter circuit is designed at the back end of the amplifier to suppress harmonics and strays and improve the quality of the signal.

[0075] Time code generation module: completes 1pps, B code signal, TOD signal generation, level conversion, input and output control, and bus transmission control;

[0076] The time code generation module is as follows: Figure 7As shown, in the satellite receiving mode, the time reference signal of the Beidou satellite is processed by the signal processing module and the CPU, the PPS_BP signal is output, and the second pulse signal (PPS_OUT) is output through the digital isolator, and the TOD_BP signal is output through the bus transceiver and RS422 to output the time message information (TOD_OUT); the signal processing module receives the second pulse and time message information sent from the bus (obtaining unified timing information), the second pulse is output 1PPS_IN through the digital isolator and input to the signal processing module, the time message information is input to the signal processing module through RS422 and the bus transceiver, and is processed by the signal processing module and the CPU, so as to achieve the unity with the standard time;

[0077] like Figure 8 As shown in the figure, in response to the demand of the integrated electronic hardware interface for synchronous pulse signals, the pull-up power supply is provided by the receiver, so the 1PPS transmitter uses OC gate output. In order to meet the indicator that the rising edge is no more than 1us, the receiver can use a 28V power supply to improve the transmission distance and signal transmission quality.

[0078] like Fig. 9 As shown, the B code encoding module generates a B code signal output according to the reference 1PPS signal from the rubidium clock and the TOD information transmitted by the ARM via the SPI module; the B code sending module includes a 10ms counter, a P code element module, and a code element module;

[0079] The 10ms counter generates a 10ms counting signal, which is used as the basis for generating the 0 code element of 2ms, the 1 code element of 5ms, and the P code element of 8ms.

[0080] like Fig.10 As shown, the P code element module is composed of a two-stage state machine, which is used to generate the P code signal of the B code;

[0081] like Fig.11 As shown, the code element module is composed of a two-stage state machine, which synthesizes a complete DC B code signal according to the external input 1PPS signal and the 56-bit B code signal;

[0082] Network timing module: Use the NTP standard network timing protocol to provide the standard time information generated by the device to computers in the network that have timing requirements;

[0083] The network timing module, such as Fig.12 As shown, the network timing unit uses the PTP standard network protocol to implement the timing function based on the time reference information; the PTP protocol runs on an MCU processor that supports the IEEE1588v2 standard, obtains the time deviation through message interaction, and adjusts the frequency based on the obtained time deviation;

[0084] The specific method of PTP time synchronization is as follows:

[0085] Step C1: The master clock periodically sends out sync messages and records the precise sending time t1 when the sync messages leave the master clock; calculates the time delay and modulates the frequency.

[0086] Step C2: The master clock encapsulates the precise sending time t1 into a Follow_up message and sends it to the slave clock;

[0087] Step C3: The slave clock records the precise arrival time t2 of the sync message arriving at the slave clock;

[0088] Step C4: send a delay_req message from the clock and record the precise sending time t3;

[0089] Step C5: The master clock records the precise arrival time t4 of the delay_req message arriving at the master clock;

[0090] Step C6: the master clock sends a delay_resp message carrying precise timestamp information t4 to the slave clock;

[0091] like Fig.13 As shown in the figure, the PTP module uses an ARM processor to communicate with the main ARM processor. The PTP network timing is to transmit the standard time through TCP / IP to provide accurate, standard, safe and reliable time services for network devices. The PTP protocol is based on the most accurate matching time when the synchronization data packet is transmitted and received. Each slave clock is synchronized with the master clock by exchanging synchronization messages with the master clock. The synchronization process is divided into two stages: offset measurement stage and delay measurement stage.

[0092] There is a 64-bit timestamp register inside the embedded processor. The master clock adjusts the timestamp register by receiving the timing source time reference signal 1PPS to improve the time accuracy of the device. When the GPIO external interrupt port of the embedded processor detects the rising edge of the timing source time reference signal 1PPS, the local time accuracy is fine-tuned according to the lead or lag second pulse. The slave clock outputs the time reference signal 1PPS for other devices as a reference signal for second alignment;

[0093] The embedded processor part is responsible for communicating with the core processing unit and completing the processing of 1PPS and TOD information; it is responsible for the power-on initialization configuration of the Ethernet transceiver;

[0094] PTP timing usually uses multicast mode. The host will actively send sync, followup, and announce packets outward, and the sync packet sending interval is 1 second. The client only needs to actively send a delay request packet to complete the timing, and the interval between active packets is relatively long, exceeding 1 second. Therefore, the master server receives few packets and has less pressure. At the same time, it is not necessary to record the IP and MAC addresses of the slave devices in multicast mode, so the PTP master server can respond to the client's packet request in a shorter time. Assuming that it takes 1ms to respond to a request (in fact, the hardware response is much less than this time), 1000 client timing requests can be completed in 1 second. In actual use, PTP timing has a great relationship with the switch used. A dedicated switch that supports the PTP protocol can achieve very good performance. Ordinary network switches may interfere with multicast packets, which will affect the calculation of link delay to a certain extent, especially when there is a large concurrency. Through actual testing and verification, ordinary switches will not experience a decrease in accuracy when supporting 100 PTP clients.

[0095] The hardware of the PTP module is compatible with NTP timing, but there are some differences in the software. They are designed not to be used at the same time. You can switch between PTP and NTP modes through the buttons on the front panel.

[0096] Display and control module: With ARM chip as the main control chip, it is designed with buttons and display screen, and has human-computer interaction functions such as information input and working status display;

[0097] The display control module, such as Fig.14 As shown, the display control module uses some resources of the main control ARM chip to respond to key input and control the display screen; the display control module has 6 keys, including 4 direction keys ("up", "down", "left" and "right"), a confirmation key and a return key; the key input is connected to the I / 0 pin of the main control chip, the pin is set as input, and combined with the display screen interface design, the key input control realizes the control part of the display control unit;

[0098] The display screen is the core component of the display control unit. This module uses the military-grade display screen of the M31S1322_01_G_3.3V model, which is an OLED display module with the characteristics of high brightness, self-emission, high contrast, wide viewing angle, and wide temperature range.

[0099] like Fig.15 As shown, the method for processing the normal working state of the display and control unit is specifically as follows:

[0100] Step A1: When the device is powered on, the display will display the startup screen first, and then the program will be initialized after the startup screen is displayed, and the main interface will be displayed;

[0101] Step A2: Continuously scan to determine whether a key is pressed. If no key action is detected, maintain the current interface display; if a key action is detected, start the key processing flow, process the key function, analyze the function that the key needs to execute, upload the corresponding parameters, and display it on the display interface accordingly;

[0102] The specific method of IP setting is:

[0103] Step B1: In the main menu, move the cursor to "IP Settings" and press the "Confirm" key to enter the "IP Settings" page;

[0104] Step B2: In the "IP Settings" page, use the up and down keys to select the port to be set, and press the "Confirm" key to enter the corresponding port parameter setting page;

[0105] Step B3: In the port parameter setting page, use the left and right keys to select the corresponding fields of "Address", "Subnet Mask" and "Gateway", and use the up and down keys to adjust the values ​​in the corresponding fields (long press to achieve fast flipping), press the "Confirm" key to confirm the changes, and press the "Return" key to return to the previous menu to cancel the settings;

[0106] The display and control module obtains the local reference time (year, month, day, hour, minute, second), positioning information, module status and other equipment working status information from the main control module, and displays them on the display screen in a concise and beautiful manner to realize user interaction function;

[0107] Power module: Provides 220V to DC conversion through AC / DC conversion, provides power for each functional module and controls the power-on sequence.

[0108] The power module, such as Fig.16 As shown in the figure, the specific method of powering on the device is as follows:

[0109] Step C1: The device is powered on. At this time, the rubidium clock and crystal oscillator enter the preheating state. At the same time, the crystal oscillator is locked to the frequency signal output by the rubidium clock through a phase-locked loop, so that the final output frequency signal has both the long-term stability of the rubidium clock and the short-term stability and low phase noise of the crystal oscillator. The preheating time of the rubidium clock and crystal oscillator requires 3 to 5 minutes. At this time, the D5-D6 status reported by the device heartbeat message is the local data of the navigation device. After the rubidium clock and crystal oscillator are locked, the D5-D6 status reported by the device heartbeat message is the atomic clock time. After the satellite signal is locked, the D5-D6 status is the satellite time data;

[0110] Step C2: When powered on, the satellite receiver powers on and starts searching for available satellites. Usually after 2 to 3 minutes, when the number of available satellites reaches more than 4 and the PDOP is good, the satellite receiver can locate and synchronize timing, and output a 1pps signal and a TOD signal synchronized with the standard time. The timing error of the 1pps signal is usually within 50ns. Before the satellite is locked, the D10 and D11 states reported by the device heartbeat message are that the atomic clock is not synchronized with the satellite time and the satellite second pulse. After the satellite is locked, the state reported by D10 is that the atomic clock is synchronized with the satellite time, and the state reported by D11 is that the atomic clock is not synchronized with the second pulse, because the training has not been completed at this time. After the atomic clock training is completed, the state reported by D11 is that the atomic clock is synchronized with the second pulse;

[0111] Step C3: After the rubidium clock (the crystal oscillator will not be mentioned later because the crystal oscillator is locked to the rubidium clock) is preheated, the main control module generates a 1pps signal based on the 10MHz signal of the rubidium clock, and generates the current TOD signal of the device based on the RTC memory clock. At this time, if there is no satellite lock signal or the training is not completed, the initial phase of the 1pps signal is inaccurate, and the RTC clock is also inaccurate due to its poor accuracy. After the satellite is locked and the training is stable, the device has a stable, accurate and reliable timing signal output. Usually, the time required for each device is different due to individual differences. It usually takes about 30 minutes after powering on;

[0112] Step C4: When the satellite receiver is locked, the output 1pps+TOD and the internally generated 1pps+TOD can be used for continuous time difference measurement. To determine whether the two are consistent, the criterion for consistency of 1pps is less than 100ns; for consistency of TOD, the clock time is completely equal;

[0113] Step C5: When the 1pps+TOD output by the satellite receiver is inconsistent with the 1pps+TOD generated inside the device, the main control module will perform continuous counting. When the number of inconsistencies accumulates to 100 times, the device considers that the satellite time is credible, and adjusts the internal time of the device to synchronize the internal time with the satellite output time. Otherwise, as long as there is one consistent situation, the count will be accumulated again. This design is to avoid occasional timing errors due to interference with the satellite signal, thereby affecting the time output of the entire device. The device clock uses the internal 1pps as the second length and takes the time generated by the driver. Since the internal time is generated by dividing the 10MHz frequency signal, and the 10MHz frequency signal is continuous and stable, it can ensure that the generated 1pps signal is continuous and stable. This part of the function is implemented by hardware, so it can ensure that 1pps will not lose pulses, so it can effectively ensure the continuity and reliability of the time output;

[0114] Step C6: When the 1pps+TOD output by the satellite receiver is consistent with the 1pps+TOD generated inside the device, the main control module will continue to tame the rubidium atomic clock based on the time difference comparison result, so that the frequency of the rubidium atomic clock is consistent with the standard time. Ensure that the time signal and frequency signal output by the device are consistent with the standard time;

[0115] Step C7: The 1pps+TOD output by the main control module is the time base of this device. The subsequent time code generation module, network timing module, etc. all use this time as the base to generate time code and network timing. Because the time base is unified, there will be no inconsistency between various time code signals.

[0116] A surge suppressor is used at the output end of the AC / DC power supply. The surge suppressor consists of an input filter circuit, an anti-reverse connection circuit, a surge suppression, a voltage stabilization circuit, and an output filter circuit.

[0117] Surge protection can meet the ±250V peak pulse voltage, overvoltage 100V / 50ms surge and startup disturbance voltage tests in GJB298-87;

[0118] Basic surge protection features include:

[0119] (1) Steady-state input voltage 9V~36V, transient input voltage 6V~100V;

[0120] (2) Built-in input and output filters, good electromagnetic compatibility;

[0121] (3) Meet GJB 298-87 overvoltage 100V / 50ms surge and ±250V peak;

[0122] (4) Meet the suppression requirements of GJB 298-87 and the starting disturbance voltage;

[0123] (5) With input reverse connection protection, -40V reverse connection protection, 0.5A load, it can work normally after restoring normal power supply voltage;

[0124] (6) Built-in input and output filters meet the requirements of CE102, CS101, CS106, RE102, RE103, and RS103 test items in GJB151B-2013.

[0125] like Fig.17 As shown, after surge suppression, the power supply supplies power to other modules. The 12.0V external power supply is reduced to 5.4V through the DC / DC power supply chip HE9436, and then converted into 5.0V voltage, 3.3V voltage, 2.5V voltage, and 1.5V voltage through the domestic LDO chip ASM1117.

[0126] The software of the time-controlled daughter card is designed with three types of API functions, which are defined as follows:

[0127] (1) Settings class

[0128] void setIPAddress(const QString&ip,const QString&mask,const QString&gateway);

[0129] Set the device's ip address, subnet mask, and default gateway; ip, mask, and gateway are all QString string types.

[0130] void setCommand(const QString&cmd);

[0131] Write operation instructions to the device; "cmd" is the instruction to be input. cmd is a QString string type.

[0132] void setGnssMode(unsigned char mode);

[0133] Set the device's satellite receiver working mode. "mode" is 0 for Beidou input, 1 for GPS input, and 2 for Beidou GPS mixed input. mode is an 8-bit unsigned integer.

[0134] void setIRQcycle(unsigned int cycle);

[0135] Set the device interrupt output frequency, unit: 100ns. (That is, when the cycle value is 10000, the device interrupt output cycle is 1ms and the frequency is 1000Hz). Cycle is a 32-bit unsigned integer.

[0136] void setTimeSource(unsigned char type);

[0137] Set the input signal to be used for reading. "type" is 0 for BD / GPS signal, and 1 for B(DC) / B(AC) code signal. The type data type is an 8-bit unsigned integer.

[0138] (2) Get class

[0139] uint64_t getCurrentDatetime();

[0140] Get the current UTC time of the board. The return value is a 64-bit unsigned integer.

[0141] float getCurrentLongitude();

[0142] Get the current longitude of the board. The return value is a floating point data type.

[0143] float getCurrentLatitude();

[0144] Get the current latitude of the board. The return value is a floating point data type.

[0145] float getCurrentHeight();

[0146] Get the current altitude of the board. The return value is a floating point data type.

[0147] uint64_t* getPulseTime();

[0148] Get the time value corresponding to the rising edge of the input trigger pulse signal, including UTC time and pulse value, accurate to picoseconds. The return value is a 64-bit unsigned integer pointer type.

[0149] QString getErrorOccurred();

[0150] Get the error information of the board. The return value is a string type. If no error occurs, an empty string is returned. The return value is a string type.

[0151] int64_t getCableDelay();

[0152] Get cable delay, which is only available when the signal source is satellite input. The return value is a 64-bit signed integer.

[0153] unsigned char getGnssMode();

[0154] Get the satellite receiver working mode of the device. The return value data type is unsigned 8 bits. The return value is 0 for Beidou input, 1 for GPS input, and 2 for Beidou GPS mixed input. The return value data type is 8-bit unsigned integer.

[0155] QString*getIPAddress();

[0156] Get the device's IP address, subnet mask, and default gateway. The return value is a string pointer type.

[0157] unsigned char getWorkStatus();

[0158] Read the working status of the time code card. 1. When the BD / GPS signal input is set, the return value is 1, which means the satellite signal has been locked normally, and 0 means the satellite signal is not locked; 2. When the B(DC) / B(AC) code signal input is set, the return value is 1, which means there is a signal input, and the return value is 0, which means there is no signal input. The return value is an 8-bit unsigned integer

[0159] (3)Callback function class

[0160] void getIRQ0();

[0161] This function is a callback function. When the variable pulse NPPS signal is triggered, the function will be automatically executed without manual calling.

[0162] void getIRQ1();

[0163] This function is a callback function. When the 1PPS signal is triggered, the function will be automatically executed without manual call.

[0164] When setting up the monitoring and comparison system, the functions of each button are as follows:

[0165] Press the "Confirm" button to enter the next level of setting menu page or confirm parameter modification;

[0166] Press the "Back" button to return to the previous page or cancel the setting;

[0167] Press Press key to turn page up or modify parameter value;

[0168] Press Press key to turn page or modify parameter value;

[0169] Press key to turn the page to the left;

[0170] Press key to turn the page right.

[0171] After pressing the power button, the device starts and enters the initialization phase. After about 30 seconds, you can enter the main menu page to set relevant parameters, such as trigger level, reference clock, reference channel, etc.

[0172] To set the trigger level, press the “Confirm” button on the device home page to enter the main menu page, turn to “Trigger Level Setting”, and press the “Confirm” button to enter. Select the channel you want to set, and press Press the key to set the trigger level value, and confirm and exit after setting to make it effective;

[0173] On the device home page, press the "Confirm" button to enter the main menu page, scroll down to "Reference Clock Settings", and press the "Confirm" button to enter. Use the key to select "internal" or "external" clock source, and confirm and exit after setting to take effect;

[0174] On the main page of the device, press the "Confirm" button to enter the main menu page, scroll down to "Reference Channel Settings", and press the "Confirm" button to enter. Press key to select reference channel, confirm and exit after setting to make it effective;

[0175] On the main page of the device, press the "Confirm" button to enter the main menu page, scroll down to "Internal Reference Calibration", and press the "Confirm" button to enter. Press key to set the internal reference calibration level value. After setting, press Confirm and exit to make it effective.

[0176] Supporting modules and cables include:

[0177] 6 sets of PCIE timing cards, supporting external 1pps timing and PTP timing, the interface is to be determined;

[0178] 1 set of navigation satellite signal receiving antenna, no less than 30m on site;

[0179] 6 sets of RS-422A cables (one end is the aviation plug-in, the other end is to be determined, connected to the timing card), the cable length is not less than 5m;

[0180] 1 set of RS-422A cables (one end is aviation plug, the other end is aviation plug model YMA24TZ1P40, installed 1pps), the cable length is not less than 1000m, and there are 2 backup aviation plugs. A 30m debugging cable is also provided;

[0181] 1 set of RS-422A cables (one end is aviation plug, the other end converts 5V differential signal to 28.5v signal, aviation plug model YMA24TZ1P40+30AP4001, 1pps), cable length not less than 1000m, 2 aviation plug backups. And a 30m debugging cable;

[0182] 1 set of RS-422A cables (one end is an aviation plug, aviation plug model JY27467T13E35SN-H+TJ1784 / 62-12SB, equipped with ephemeris), cable length not less than 1000m, 2 backup aviation plugs. A 30m debugging cable is also provided;

[0183] A set of single-mode optical fiber (one end is aviation plug, the other end is RS422), aviation plug model YMA24TZ1P40+30AP4001, installed 1pps), cable length is not less than 1500m. One matching photoelectric conversion module. And one 30m debugging cable;

[0184] A set of single-mode optical fiber (one end is an aviation plug, the other end is converted to 28.5v signal, aviation plug model YMA24TZ1P40+30AP4001, installed 1pps), the cable length is not less than 1500m. A matching photoelectric conversion module (converts 5V signal to 28.5V at the same time). A 30m debugging cable is also provided;

[0185] A set of fiber optic cables (one end is the aviation plug, the other end is converted to RS422 output), aviation plug model JY27467T13E35SN-H + TJ1784 / 62-12SB, with ephemeris), cable length not less than 1500m, aviation plug and aviation plug backup 2. One photoelectric conversion module. And a 30m debugging cable;

[0186] 2 sets of Ethernet interface cables (one end is an aviation plug-in, the other end is an RJ45 crystal plug for connecting to the switch), the cable length is not less than 5m, and there are 2 backup aviation plug-in plugs;

[0187] 1 set of power cord.

[0188] The cable design method is as follows:

[0189] According to the RS422 transmission protocol and characteristics, the maximum transmission distance can theoretically reach 1200m, which can meet the cable indicators in the technical requirements. However, the 1000m cable is close to the transmission distance limit of RS422, and has high requirements for cables and environment, and the transmission speed is very low. There are many uncertain factors in the 1000m transmission process, and data interruption, packet loss and other problems are prone to occur, and the reliability is low. In comparison, the reliability of optical fiber is better than RS422 transmission, so when designing cables, it is safer to use optical fiber for long-distance data transmission;

[0190] like Fig.18 , Fig.19 , Fig. 20 As shown, a high-reliability precision timing device has 1 optical fiber quasi-second pulse output interface, 8 RS422 quasi-second pulse output interfaces, 1 optical fiber ephemeris output interface, and 1 RS422 ephemeris output interface. For short-distance transmission, the RS422 interface can be used directly. For long-distance transmission, the optical fiber quasi-second pulse output interface can be directly connected to the optical fiber, and the photoelectric conversion module is connected at the receiving end to access the receiving device. The photoelectric conversion module consists of an optical fiber to RS422 module and an RS422 to switch module.

[0191] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A highly reliable and precise timing device, characterized in that: include: GNSS antenna, Beidou satellite receiver, main control module, rubidium atomic frequency standard module, frequency allocation module, time code generation module, network timing module, display and control module, power module; GNSS antenna: Receives satellite time and frequency signals of BDSB1 / B2 / B3 and GPSL1 / L2 frequencies, and inputs them to the Beidou satellite receiver through RF cables; Beidou satellite receiver: Receives Beidou satellite signals through an external antenna. The signals are preamplified by LNA, converted to RF / IF, and sampled by A / D to form an intermediate frequency digital signal, which is then fed into the baseband signal processing unit. Main control module: Use the rubidium atomic clock frequency source signal to establish, generate and output the local time reference, and use the satellite to receive the standard time for calibration; Use the CAN bus to obtain the working status and working parameters of each module of the equipment in real time, send them to the host computer through SNMP and UDP protocols, and receive control instructions sent by the host computer to set and modify the working status and parameters of each module; Rubidium atomic frequency standard module: generates a time source signal, in which a high-stability crystal oscillator is locked to the rubidium atomic clock; Frequency distribution module: divides the 10MHz standard frequency signal output by the rubidium clock into multiple outputs after distribution and amplification; Time code generation module: completes 1pps, B code signal, TOD signal generation, level conversion, input and output control, and bus transmission control; Network timing module: Use the NTP standard network timing protocol to provide the standard time information generated by the device to computers in the network that have timing requirements; Display and control module: With ARM chip as the main control chip, it is designed with buttons and display screen, and has human-computer interaction functions such as information input and working status display; Power module: Provides 220V to DC conversion through AC / DC conversion, provides power for each functional module and controls the power-on sequence.

2. A highly reliable and precise timing device according to claim 1, characterized in that: The antenna adopts a GNSS full-frequency high-precision measurement and mapping antenna. The antenna is optimized for harsh outdoor environments. The antenna adopts a fully enclosed structure design. The internal module is fixed inside the antenna cover by reinforcement, and the antenna cover is made of corrosion-resistant materials.

3. A highly reliable and precise timing device according to claim 1, characterized in that: The Beidou satellite receiver receives standard time and uses the J600 satellite positioning and timing board independently developed by Shanghai Jeles.

4. A highly reliable and precise timing device according to claim 1, characterized in that: The main control module analyzes Beidou satellite signals, obtains satellite data and standard time information, and establishes, maintains and outputs the local reference time; The bus exchanges information with the network timing module and the display and control module, uploads the working status and fault alarm information based on the SNMP / UDP protocol, receives the control instructions sent by the host computer, and sets the working status and parameters of each module; the specific definitions of the equipment working status and fault alarm information are described in detail in the interface protocol, and the user can identify the cause of the equipment failure according to the fault code in the protocol and perform targeted operations according to the equipment instruction manual; After the satellite receiver parses the satellite signal, it outputs a message containing the current standard time, positioning information and satellite information to the main control module every second; after the main control module receives the message output by the receiver, it parses and sorts the message according to the known protocol, and demodulates the current standard time parameters from the time message; in order to avoid parsing abnormalities, an incorrect time is used to update the local time. After successfully obtaining the standard time from the message, the obtained standard time is compared with the local time. When the standard time is not equal to the local time and reaches a certain threshold, the standard time is used to update the local time; when the satellite signal reception is abnormal, or there is no satellite signal and the standard time signal cannot be obtained, the device automatically enters the autonomous time keeping state, and uses the good long-term stability of the rubidium atomic clock to maintain continuous and reliable time output.

5. A highly reliable and precise timing device according to claim 1, characterized in that: The rubidium atomic frequency standard module uses the received military standard time signal as a reference signal to quickly tame and synchronize the internal DDS; when the satellite signal is lost, the military standard time can no longer be obtained. At this time, the rubidium atomic clock uses its own frequency source to continue to maintain the generation and output of the local standard time; the rubidium atomic clock uses the external 1PPS signal as a reference to keep the 1PPS signal output by the module consistent with the external 1PPS signal; Through the phase-locked loop circuit, the constant temperature crystal oscillator with high instantaneous stability and low phase noise is locked.

6. A highly reliable and precise timing device according to claim 1, characterized in that: The frequency distribution module directly outputs 10 MHz signal from the rubidium atomic clock, and directly outputs it in two ways after distribution and amplification; the 10 MHz distribution and amplification uses an integrated operational amplifier.

7. A highly reliable and precise timing device according to claim 1, characterized in that: The time code generation module, in the satellite receiving mode, processes the time reference signal of the Beidou satellite through the signal processing module and the CPU, outputs the PPS_BP signal to output the pulse-per-second signal through the digital isolator, and outputs the TOD_BP signal to output the time message information through the bus transceiver and RS422; The signal processing module receives the second pulse and time message information sent from the bus. The second pulse is input to the signal processing module through the digital isolator output 1PPS_IN, and the time message information is input to the signal processing module through RS422 and bus transceiver.

8. A highly reliable and precise timing device according to claim 1, characterized in that: The network timing module and the network timing unit realize the timing function based on the time reference information and the PTP standard network protocol; the PTP protocol runs on an MCU processor supporting the IEEE1588v2 standard, obtains the time deviation through the interaction of messages, and adjusts the frequency according to the obtained time deviation; The PTP module uses an ARM processor to communicate with the main ARM processor. The PTP network timing is to transmit the standard time through TCP / IP. The PTP protocol is based on the most accurate matching time when the synchronization data packet is transmitted and received. Each slave clock is synchronized with the master clock by exchanging synchronization messages with the master clock. The synchronization process is divided into two stages: offset measurement stage and delay measurement stage; There is a 64-bit timestamp register inside the embedded processor. The master clock adjusts the timestamp register by receiving the time reference signal 1PPS from the timing source to improve the time accuracy of the device. When the GPIO external interrupt port of the embedded processor detects the rising edge of the time reference signal 1PPS from the timing source, the local time accuracy is fine-tuned according to the leading or lagging second pulse. The slave clock outputs the time reference signal 1PPS for other devices as a reference signal for second alignment.

9. A highly reliable and precise timing device according to claim 1, characterized in that: The display control module uses some resources of the main control ARM chip to respond to key input and control the display screen; the display control module has 6 keys, including 4 direction keys "up", "down", "left" and "right", a confirmation key and a return key; the key input is connected to the I / 0 pin of the main control chip, the pin is set as input, combined with the display screen interface design, the key input control realizes the control part of the display control unit; The specific method for processing the normal working state of the display and control unit is as follows: Step A1: When the device is powered on, the display will display the startup screen first, and then the program will be initialized after the startup screen is displayed, and the main interface will be displayed; Step A2: Continuously scan to determine whether a key is pressed. If no key action is detected, maintain the current interface display; if a key action is detected, start the key processing flow, process the key function, analyze the function that the key needs to execute, upload the corresponding parameters, and display it on the display interface accordingly; The specific method of IP setting is: Step B1: In the main menu, move the cursor to "IP Settings" and press the "Confirm" key to enter the "IP Settings" page; Step B2: In the "IP Settings" page, use the up and down keys to select the port to be set, and press the "Confirm" key to enter the corresponding port parameter setting page; Step B3: In the port parameter setting page, use the left and right keys to select the corresponding fields of "Address", "Subnet Mask" and "Gateway", use the up and down keys to adjust the values ​​in the corresponding fields, press the "Confirm" key to confirm the changes, and press the "Return" key to return to the previous menu to cancel the settings.

10. A highly reliable and precise timing device according to claim 1, characterized in that: The power module and the device power-on method are specifically as follows: Step C1: The device is powered on. At this time, the rubidium clock and the crystal oscillator enter the preheating state. At the same time, the crystal oscillator is locked to the frequency signal output by the rubidium clock through a phase-locked loop, so that the final output frequency signal has both the long-term stability of the rubidium clock and the short-term stability and low phase noise of the crystal oscillator. The preheating time of the rubidium clock and the crystal oscillator requires 3 to 5 minutes. At this time, the D5-D6 status reported by the device heartbeat message is the local data of the navigation device. When the rubidium clock and the crystal oscillator are locked, the D5-D6 status reported by the device heartbeat message is the atomic clock time. After the satellite signal is locked, the D5-D6 status is the satellite time data; Step C2: When powered on, the satellite receiver is powered on and starts searching for available satellites. Usually after 2 to 3 minutes, when the number of available satellites reaches more than 4 and the PDOP is good, the satellite receiver can locate and synchronize timing, and output a 1pps signal and a TOD signal synchronized with the standard time. The timing error of the 1pps signal is usually within 50ns. Before the satellite is locked, the D10 and D11 states reported by the device heartbeat message are that the atomic clock is not synchronized with the satellite time and the satellite second pulse. After the satellite is locked, the state reported by D10 is that the atomic clock is synchronized with the satellite time, and the state reported by D11 is that the atomic clock is not synchronized with the second pulse, because the training has not been completed at this time. After the atomic clock training is completed, the state reported by D11 is that the atomic clock is synchronized with the second pulse. Step C3: After the rubidium clock (the crystal oscillator will not be mentioned later because the crystal oscillator is locked to the rubidium clock) is preheated, the main control module generates a 1pps signal based on the 10MHz signal of the rubidium clock, and generates the current TOD signal of the device based on the RTC memory clock; at this time, if there is no satellite lock signal or the taming is not completed, the initial phase of the 1pps signal is inaccurate, and the RTC clock is also inaccurate due to poor accuracy; after the satellite is locked and the taming is stable, the device has a stable, accurate and reliable timing signal output. Usually, each device requires a different time due to individual differences, usually about 30 minutes after booting; Step C4: When the satellite receiver is locked, the output 1pps+TOD and the internally generated 1pps+TOD can be used for continuous time difference measurement. The two are judged to be consistent. For the consistency of 1pps, the judgment criterion is less than 100ns; for the consistency of TOD, the clock time is completely equal. Step C5: When the 1pps+TOD output by the satellite receiver is inconsistent with the 1pps+TOD generated inside the device, the main control module counts continuously. When the number of inconsistencies accumulates to 100 times, the device considers that the satellite time is credible, and adjusts the internal time of the device to synchronize the internal time with the satellite output time. Otherwise, as long as there is a consistent situation, the count will be accumulated again; this design is to avoid the satellite signal being interfered with and the timing result being wrong occasionally, thus affecting the time output of the entire device; the device clock uses the internal 1pps as the second length, and takes the time generated by the driver internally; because the internal time is generated by dividing the 10MHz frequency signal, and the 10MHz frequency signal is continuous and stable, it can ensure that the generated 1pps signal is continuous and stable. This part of the function is implemented by hardware, so it can ensure that 1pps will not lose pulses, so it can effectively ensure the continuity and reliability of the time output; Step C6: When the 1pps+TOD output by the satellite receiver is consistent with the 1pps+TOD generated inside the device, the main control module will continue to tame the rubidium atomic clock based on the time difference comparison result, so that the frequency of the rubidium atomic clock is consistent with the standard time. Ensure that the time signal and frequency signal output by the device are consistent with the standard time; Step C7: The 1pps+TOD output by the main control module is the time base of this device. The subsequent time code generation module, network timing module, etc. all use this time as the base to generate time code and network timing. Because the time base is unified, there will be no inconsistency between various time code signals.

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