Interface calling device and method for calling DSP by CPU of heterogeneous computer system

Abstract

The invention relates to an interface calling device and method for calling a DSP (Digital Signal Processor) by a CPU (Central Processing Unit) of a heterogeneous computer system, which are characterized in that a DSP library program API (Application Program Interface) is called in a DSP program to register into different computing APIs (Application Program Interface) according to multi-class computation required by a user, and the computing APIs are independently called by the CPU, so that in a heterogeneous calling design, main programs of the CPU and the DSP are packaged into API libraries, and the API libraries are independently called by the CPU; according to the method and the system, the programming difficulty of a user is greatly reduced, the user does not need to care about mechanisms and bottom layer implementation details among heterogeneous calling, and only needs to call provided related APIs and data structure bodies, so that the CPU can call the DSP to perform multi-category calculation, and therefore, the CPU calls the DSP to calculate API-level calling in a heterogeneous computer system, and the user experience is improved. The problems that programming is difficult and the process is complex when the CPU calls the DSP to conduct various calculations are solved.

Description

Technical Field

[0001] The invention belongs to the technical field of computer science and engineering, and relates to an interface calling device and method for a CPU of a heterogeneous computer system to call a DSP. Background Art

[0002] In recent years, as heterogeneous computers in the form of central processing unit CPU + digital processing unit DSP have been widely used in the market, a set of efficient, moderately difficult to program, and easy to develop heterogeneous calling technologies or methods has become extremely important for leveraging the advantages of heterogeneous processors. Currently, mature heterogeneous calling methods on the market include OpenCL and TI heterogeneous calling. Among them, although the use of OpenCL can shield the underlying programming framework of various manufacturers in programming and realize the rapid porting of software between different platforms, the environment is complex to build, and the development and porting are difficult, and it is difficult to achieve the best performance of hardware.

[0003] The technology of TI heterogeneous processor DSP core calling is mainly to compile the calculation program that DSP needs to run into an .out file, parse the entire .out file by using the CPU to fire the DSP, move the program segment, data segment, etc. to the corresponding memory space, and execute it by the CPU to fire the DSP. This technology is not flexible enough and can only be used as a single computing task. It is impossible to realize the CPU's independent and flexible calling of multiple DSP calculation programs. Therefore, in heterogeneous computer systems, how to solve the programming difficulties and complex processes faced by the CPU calling the DSP for multiple calculations has important practical significance for corresponding practical applications. Summary of the invention

[0004] In view of the problems existing in the above-mentioned traditional technologies, the present invention proposes an interface calling device for a heterogeneous computer system CPU to call a DSP and an interface calling method for a heterogeneous computer system CPU to call a DSP, which can solve the problems of difficult programming and complicated processes faced by the CPU calling the DSP to perform various calculations.

[0005] In order to achieve the above objectives, the embodiments of the present invention adopt the following technical solutions: On the one hand, an interface calling device for a CPU of a heterogeneous computer system to call a DSP is provided, comprising a CPU and a DSP, wherein the CPU and the DSP interact with each other in heterogeneous computing by using SMC memory / GSM, shared memory and IPC inter-core interrupts, wherein the software stack of the CPU comprises an application, an API library and a driver, wherein the application calls an API provided by the API library to implement calling the DSP for heterogeneous computing, wherein the API library comprises a DSP heterogeneous computing calling library and an SMEM library, and the driver comprises an SMEM driver and a DSP heterogeneous computing calling driver; the DSP program comprises a DSP application program and a DSP library program, wherein the DSP heterogeneous computing kernel program is encapsulated into a DSP library program API, and is called by the DSP application program; The CPU application calls the API provided by the API library to implement the process of calling the DSP for heterogeneous computing, including calling the DSP heterogeneous computing call library's initialization DSP heterogeneous computing call API to initialize the DSP heterogeneous computing call, calling the SMEM library's API to apply for continuous memory blocks from the SMC memory / GSM for storing calculation raw data and calculation result data, and obtaining the continuous memory block physical address, calling the DSP heterogeneous computing call library's API to obtain idle DSPs, obtain the DSP idle calculation API request structure and write the calculation data address and parameters into the calculation API request structure according to the user's calculation task, calling the SMEM library's API to write back and invalidate the cache, calling the DSP heterogeneous computing call library's API to initiate a calculation API request to the DSP, waiting for the DSP to return the calculation completion, calling the SMEM library's API to release the applied continuous memory block, and calling the DSP heterogeneous computing call exit API of the DSP heterogeneous computing call library to exit the DSP heterogeneous computing call; Among them, the process of DSP application calling DSP library program API execution includes initializing DSP platform, creating calculation API function, running DSP heterogeneous calculation kernel program, setting the state of corresponding DSP core to idle state, judging whether CPU initiates IPC interrupt, if so, parsing IPC interrupt flag and sending IPC interrupt to CPU and executing corresponding user-defined calculation API according to the ID of calculation API request initiated by CPU, and setting the state of corresponding DSP core to idle state after DSP completes calculation.

[0006] On the other hand, a method for calling an interface of a CPU in a heterogeneous computer system to call a DSP is provided, comprising the steps of: The application on the CPU side calls the DSP heterogeneous computing call library to initialize the DSP heterogeneous computing call API to initialize the DSP heterogeneous computing call; The application calls the API of the SMEM library to apply for continuous memory blocks from the SMC memory / GSM to store the original calculation data and calculation result data, and obtain the physical address of the continuous memory block; The application calls the API of the DSP heterogeneous computing call library to obtain the idle DSP, obtain the idle DSP computing API request structure, and write the computing data address and parameters into the computing API request structure according to the user computing task; The application calls the API of the SMEM library to write back and invalidate the cache, and calls the API of the DSP heterogeneous computing call library to initiate a computing API request to the DSP; After waiting for DSP to return the calculation, the application calls the SMEM library API to release the requested continuous memory block; Exit DSP heterogeneous computing calls by calling the DSP heterogeneous computing call library's DSP heterogeneous computing call exit API through the application; Among them, the process of DSP application calling DSP library program API execution includes initializing DSP platform, creating calculation API function, running DSP heterogeneous calculation kernel program, setting the state of corresponding DSP core to idle state, judging whether CPU initiates IPC interrupt, if so, parsing IPC interrupt flag and sending IPC interrupt to CPU and executing corresponding user-defined calculation API according to the ID of calculation API request initiated by CPU, and setting the state of corresponding DSP core to idle state after DSP completes calculation.

[0007] One of the above technical solutions has the following advantages and beneficial effects: The interface calling device and method for the CPU of the heterogeneous computer system to call the DSP, by calling the DSP library program API in the DSP program to register as different computing APIs according to the multiple categories of computing that the user needs to perform, and the CPU calls these computing APIs separately. In this way, in the heterogeneous calling design, the main programs of the CPU and DSP are encapsulated into API libraries, which greatly reduces the programming difficulty of users. Users do not need to care about the mechanisms and underlying implementation details between heterogeneous calls. They only need to call the provided related APIs and data structures to realize the CPU calling the DSP to perform multiple categories of computing, thereby realizing the CPU calling the DSP computing API level call in the heterogeneous computer system.

[0008] Compared with the existing technology, it is more flexible to use. At the same time, the main programs for heterogeneous calls to CPU and DSP are encapsulated into API libraries, and the function interface is standardized. The user programming difficulty is greatly reduced. Users do not need to care about the mechanisms and underlying implementation details between heterogeneous calls. They only need to fill in the calculation request data structure and call the provided related API to realize CPU calling DSP for multiple categories of calculations without relying on third-party uncontrollable program libraries. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0010] Figure 1 A block diagram of the overall design of a heterogeneous call system in an embodiment; Figure 2 A schematic diagram of a technical implementation scheme for SMC memory / GSM interactive message data, calculation request data, etc. in one embodiment; Figure 3 A schematic diagram of a software stack implementation scheme of a CPU in one embodiment; Figure 4 A schematic diagram of an execution flow of a user program calling a CPU library program API in one embodiment; Figure 5 A schematic diagram of an overview of modules of a DSP heterogeneous computing kernel program technology implementation solution in one embodiment; Figure 6 A schematic diagram of an execution flow of a DSP user program calling a DSP library program API in one embodiment; Figure 7 A schematic diagram of a DSP core state machine technology implementation scheme in one embodiment; Figure 8 The figure is a flowchart of an interface calling method for a heterogeneous computer system CPU to call a DSP in one embodiment. DETAILED DESCRIPTION

[0011] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and Examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0012] It should be noted that the reference to "embodiment" in this article means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present invention. The presentation of this phrase at various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It will be appreciated by those skilled in the art that the embodiments described herein may be combined with other embodiments. The term "and / or" used in the specification and appended claims of the present invention refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0013] The following will describe the implementation of the present invention in detail with reference to the accompanying drawings in the embodiment diagram of the present invention.

[0014] In one embodiment, Figure 1 As shown, an interface calling device for a heterogeneous computer system CPU to call a DSP is provided, which may include a CPU and a DSP, and the CPU and the DSP interact with each other in heterogeneous computing by using SMC memory / GSM, shared memory, and IPC inter-core interrupts. The software stack of the CPU includes an application, an API library, and a driver. The application calls the API provided by the API library to implement the call to the DSP for heterogeneous computing. The API library includes a DSP heterogeneous computing call library and a SMEM library. The driver includes an SMEM driver and a DSP heterogeneous computing call driver. The DSP program consists of a DSP application and a DSP library program, wherein the DSP heterogeneous computing kernel program is encapsulated into a DSP library program API, which is called by the DSP application.

[0015] The CPU application calls the API provided by the API library to implement the process of calling the DSP for heterogeneous computing, including calling the DSP heterogeneous computing call library's initialization DSP heterogeneous computing call API to initialize the DSP heterogeneous computing call, calling the SMEM library's API to apply for continuous memory blocks from the SMC memory / GSM for storing calculation original data and calculation result data, and obtaining the physical address of the continuous memory block, calling the DSP heterogeneous computing call library's API to obtain an idle DSP, obtain the DSP idle calculation API request structure and write the calculation data address and parameters into the calculation API request structure according to the user's calculation task, calling the SMEM library's API to write back and invalidate the cache, calling the DSP heterogeneous computing call library's API to initiate a calculation API request to the DSP, waiting for the DSP to return the calculation completion, calling the SMEM library's API to release the applied continuous memory block, and calling the DSP heterogeneous computing call exit API of the DSP heterogeneous computing call library to exit the DSP heterogeneous computing call.

[0016] Among them, the process of DSP application calling DSP library program API execution includes initializing DSP platform, creating calculation API function, running DSP heterogeneous calculation kernel program, setting the state of corresponding DSP core to idle state, judging whether CPU initiates IPC interrupt, if so, parsing IPC interrupt flag and sending IPC interrupt to CPU and executing corresponding user-defined calculation API according to the ID of calculation API request initiated by CPU, and setting the state of corresponding DSP core to idle state after DSP completes calculation.

[0017] It can be understood that in the heterogeneous computer system, this embodiment implements the CPU calling the DSP computing API (Application Programming Interface) level call, that is, the user can implement the multiple categories of calculations that need to be performed into different computing APIs in the DSP program, and the CPU calls these computing APIs separately. In the heterogeneous call design, the main programs of the CPU and DSP are encapsulated into an API library, which greatly reduces the programming difficulty of the user. The user does not need to care about the mechanism and underlying implementation details between heterogeneous calls. He only needs to call the relevant APIs and data structures provided by this embodiment to realize the CPU calling the DSP to perform multiple categories of calculations.

[0018] From the overall design point of view, the overall design scheme diagram of heterogeneous calls in heterogeneous computer systems can be as follows: Figure 1 As shown in the figure, in a heterogeneous computer system, the CPU calls the DSP for calculation, mainly using SMC memory (Shared memory controller, i.e. shared memory controller memory) / GSM (Global Shared memory, global shared memory), shared memory, and IPC (Inter-Process Communication) inter-core interrupts for heterogeneous computing interaction. Among them, SMC memory / GSM is used to store interactive message data and calculation parameter data between the CPU and DSP; shared memory is usually DDR, which is used to store the original data and result data of the calculation; IPC inter-core interrupts are used for interrupt interaction between the CPU and DSP cores. IRQ (Interrupt Request) is an interrupt request.

[0019] The interface calling device of the CPU calling DSP in the above-mentioned heterogeneous computer system calls the DSP, and calls the DSP library program API in the DSP program to register different computing APIs according to the multiple categories of computing that the user needs to perform, and the CPU calls these computing APIs separately. In this way, in the heterogeneous calling design, the main programs of the CPU and DSP are encapsulated into API libraries, which greatly reduces the programming difficulty of users. Users do not need to care about the mechanisms and underlying implementation details between heterogeneous calls. They only need to call the provided related APIs and data structures (computation request data structures such as calculation API request structures, calculation parameter data structures, etc.) to realize the CPU calling the DSP to perform multiple categories of computing, thereby realizing the CPU calling the DSP computing API level call in the heterogeneous computer system.

[0020] Compared with the existing technology, it is more flexible to use. At the same time, the main programs for heterogeneous calls to CPU and DSP are encapsulated into API libraries, and the function interface is standardized. The user programming difficulty is greatly reduced. Users do not need to care about the mechanisms and underlying implementation details between heterogeneous calls. They only need to fill in the calculation request data structure and call the provided related API to realize CPU calling DSP for multiple categories of calculations without relying on third-party uncontrollable program libraries.

[0021] In one embodiment, the storage space of SMC memory / GSM is dynamically applied by the application program calling the API of the SMEM library to store the calculation request data structure, and the last 4KB space of SMC memory / GSM is used to store the base address and size of the DSP calculation request data structure variable and the message type of the IPC interrupt sent by the DSP to the CPU; the IPC interrupt sources sent by the CPU to the DSP include INT-0 and INT-1, INT-0 indicates the handshake interrupt sent by the CPU, INT-1 indicates the API request interrupt sent by the CPU, the message type of the IPC interrupt includes bit-0, bit-1 and bit-2, bit-0 indicates the DSP handshake interrupt, bit-1 indicates the normal interrupt of the DSP calculation API request completion, and bit-2 indicates the DSP abnormal interrupt.

[0022] It can be understood that the interrupt types sent by the CPU to the DSP include handshake interrupts and DSP calculation API request interrupts. The interrupt types sent by the DSP to the CPU include handshake response interrupts, calculation completion interrupts, and DSP operation exception interrupts; when the DSP sends an IPC interrupt to the CPU, only one interrupt source is sent, and the interrupt type message is saved in the SMC memory / GSM.

[0023] like Figure 2The figure shows the technical implementation scheme of the interactive message data and calculation parameter data between SMC memory / GSM. Except for the last 4KB in the storage space of SMC memory / GSM, the other storage space is dynamically applied by the CPU to store the calculation request data structure; the last 4KB is used to store the base address and size of the DSP calculation request data structure variable and the message type of the IPC interrupt sent by the DSP to the CPU. The detailed definition of the 4KB space can be shown in Table 1: Table 1

[0024] The CPU reserves the storage space of SMC memory / GSM through the device tree (Device Tree, a data structure that describes hardware. It is used to describe the topology, properties, and connection relationships of devices in a computer system). The SMEM (Shared memory manager, a software component or system module used to manage shared memory resources) driver is responsible for managing this segment of continuous physical memory (that is, the storage space of SMC memory / GSM reserved earlier).

[0025] Technical implementation of storing original calculation data and calculation result data in shared memory (DDR): For convenience and efficiency, DSP needs to use continuous physical memory when obtaining original calculation data and filling in calculation result data. The CPU side reserves a section of continuous DDR physical memory through device tree description and other methods, and the SMEM driver is responsible for managing this section of continuous physical memory. It can be seen that the memory space involved in the process of SMC memory / GSM and shared memory (DDR) realizing their functions is reserved by the CPU side through device tree description of SMC memory / GSM space and a section of DDR space, and the SMEM driver is responsible for managing these continuous physical memories. The SMEM library provides an API, which is called by the CPU application layer and DSP heterogeneous computing library program. Users do not need to care about the underlying implementation at all. Calling the provided API can realize the application, release, virtual-to-real address conversion, cache refresh (cache memory) and invalidation of the corresponding segment memory.

[0026] Specifically, the interactive technology of IPC core interrupts between CPU and DSP is implemented as follows: CPU sends IPC interrupts to DSP, CPU receives IPC interrupts sent by DSP, DSP sends IPC interrupts to CPU, and DSP receives IPC interrupts sent by CPU. The definition of IPC interrupt source type can be as follows: IPC interrupt sources sent by CPU to DSP include (1) INT-0: handshake interrupt sent by CPU, (2) INT-1: API request interrupt; there is only one IPC interrupt source sent by DSP to CPU, and the interrupt type message is stored in SMCmemory / GSM area. After receiving the IPC interrupt sent by DSP, CPU reads the interrupt type message and performs corresponding interrupt processing. The interrupt message bit can be as follows: (a) bit-0: DSP handshake interrupt, (b) bit-1: DSP calculation API request completion normal interrupt, (c) bit-2: DSP abnormal interrupt (such as program runaway, etc.).

[0027] In one embodiment, before the CPU initiates a calculation API request, the corresponding member variables in the calculation request data structure are filled with the calculation API ID (i.e., the unique identity of the API), the address of the original calculation data, the address of the calculation result data, and the calculation parameters to be called; the calculation request data structure is provided with a member variable of an enumeration type for storing the calculation API ID separately, and the API ID setting of the CPU is consistent with the API ID setting of the DSP. In the heterogeneous calculation kernel program of the DSP, the DSP library program API is called to save the function pointer to be calculated in an array and register it as a different calculation API. The subscript of the calculation function array is the API ID that the CPU calls the DSP for calculation; 0 is excluded from the subscript of the calculation function array to prevent invalid calls.

[0028] It can be understood that the technical implementation of CPU and DSP programming includes CPU programming and DSP programming.

[0029] On the one hand, if Figure 3 As shown in the figure, the software stack implementation of the CPU in the CPU programming includes three parts: the application layer, the middleware and the driver layer. Among them, the application layer provides the application program (APP), the middleware mainly provides the API library including the DSP HCC lib library and the SMEM lib library, and the driver layer includes the SMEM Driver (SMEM driver) and the DSP HCC Driver (DSP HCC driver). Under the Linux operating system, the application program (APP) called by the DSP heterogeneous computing interface calls the API provided by the DSP HCC lib library and the SMEMlib library to realize the call of the DSP for heterogeneous computing.

[0030] In one embodiment, the DSP heterogeneous computing call library sends an IPC interrupt to the DSP core, sets the base address and size of the storage area of ​​the calculation request data structure, calls the API provided by the SMEM library to apply for a memory section in the SMC memory / GSM for storing the calculation request data structure, encapsulates DSP heterogeneous computing related functions into a standard API for application calls, implements DSP multi-core state machine maintenance, and implements receiving asynchronous signals sent by the DSP heterogeneous computing call driver.

[0031] The DSP heterogeneous computing call driver obtains IPC register resources, SMC memory / GSM reserved space resources and IPC interrupt numbers from the device tree, operates the underlying hardware, registers interrupt service routines, receives IPC interrupts sent by DSP, and then sends asynchronous signals to the DSP heterogeneous computing call library and provides ioctl interface calls.

[0032] The SMEM library is used to provide the corresponding APIs for implementing the application, release, virtual-to-real physical address conversion, cache refresh and cache invalidation of continuous memory, as well as the ioctl interface for calling the SMEM driver. As the management driver of the shared continuous memory block, the SMEM driver is used to obtain and load the driver module parameters from the device tree, implement configurable continuous physical memory area management, and provide the corresponding ioctl interfaces for the application, release, virtual-to-real physical address conversion, cache refresh and cache invalidation of continuous physical memory areas called by the SMEM library; among which, the continuous physical memory area management includes the management of SMC memory, GSM and shared memory.

[0033] Specifically, the DSP HCC (Heterogeneous Computing Call) library program calls the standard ioctl (input / output control) interface provided by the DSP HCC driver to implement: sending IPC interrupts to the DSP core, setting the base address and size of the storage area for the calculation request data structure, etc.; calling the API provided by the SMEM lib library program to apply for a section of memory in the SMC memory / GSM to store the calculation request data structure; encapsulating DSP heterogeneous computing related functions into a standard API for application programs (APP) to call; implementing DSP multi-core state machine maintenance; and receiving asynchronous signals sent by the DSP HCC driver.

[0034] The DSP HCC driver obtains IPC (Inter-Process Communication) register resources, SMC memory / GSM reserved space resources and IPC interrupt numbers from the device tree, operates IPC registers, SMCmemory / GSM and other underlying hardware; registers interrupt service routines, receives IPC interrupts sent by the DSP, and then sends asynchronous signals to upper-level programs; provides ioctl and other function calls to the DSP HCC library program. The ioctl provided can be as follows: (1) Send an IPC interrupt to the DSP core, (2) Set the base address of the calculation request data structure storage area, and (3) Set the size of the calculation request data structure storage area.

[0035] The SMEM lib library program is a management lib (library) program for shared continuous memory blocks. It provides APIs for continuous memory application, release, virtual-to-physical address conversion, cache refresh and cache invalidation, and calls SMEM Driver ioctl to implement corresponding functions.

[0036] The SMEM driver is a management driver for shared continuous memory blocks. It implements the management of continuous physical memory areas with configurable driver module parameters obtained from the device tree and loaded, including the management of SMC memory, GSM and DDR. It provides ioctls such as application and release of continuous physical memory, virtual-to-real physical address conversion, cache refresh and cache invalidation for SMEM library programs to call.

[0037] In one embodiment, the API library of the CPU software stack provides APIs including initializing DSP heterogeneous computing call API, unloading DSP heterogeneous computing call API, idle acquisition API, core status acquisition API, idle structure acquisition API, CPU calling DSP for heterogeneous computing API, waiting for DSP heterogeneous computing API request completion API, SMEM initialization API, SMEM memory application API, SMEM memory release API, SMEM physical address acquisition API, invalidation Cache API, and write back and invalidation Cache API.

[0038] Specifically, the API design provided by the CPU to the user (application) can be as follows: (1) Initialize the DSP heterogeneous computing call API, including the following functions: call the initialization API in the SMEM lib library program to initialize SMEM; call the memory application API in the SMEM lib library program to apply for a section of memory in the SMC memory / GSM to store the calculation request data structure; call the virtual-to-real address conversion API in the SMEM lib library program to obtain the physical address of the calculation request data structure; initialize the calculation request data structure and set the DSP state to UNKONW ("unknown state"); open the character device registered by the DSP HCC driver. When opening the character device, the DSP HCC driver will register an interrupt service program for receiving DSP IPC interrupts; register the function function for receiving DSP HCC driver asynchronous signals; call the DSP HCC driver through ioctl to set the base address and size of the calculation request data structure storage area; initiate a handshake to the DSP, call the DSP HCC driver through ioctl, and send an IPC interrupt to the DSP to ensure that the DSP is in normal working condition.

[0039] (2) Uninstall DSP heterogeneous computing call API, including the following functions: call the memory release API in the SMEM lib library program to release the requested memory; close the character device registered by the DSP HCC driver.

[0040] (3) Idle acquisition API, used to obtain a DSP core in an idle state. This API polls the status of all DSP cores, finds the first DSP core in an idle state, and returns the core number of the first DSP core in an idle state.

[0041] (4) Core status acquisition API, used to obtain the status of a specified DSP core. This API obtains the status of the DSP core through the core number of the DSP core.

[0042] (5) Idle structure acquisition API, used to obtain the idle computing API request structure of a specified DSP core. This API obtains an idle, unoccupied API request structure of a specified DSP core.

[0043] (6) The CPU calls the DSP to perform heterogeneous computing API, which is used by the CPU to initiate computing API requests to the DSP.

[0044] (7) Waiting for the DSP heterogeneous computing API request to complete the API, which is used to determine whether the DSP heterogeneous computing API request is completed. When calling this API, it will be blocked until the specified DSP completes the computing task and enters the idle state.

[0045] (8) SMEM initialization API, used to initialize the shared memory management module.

[0046] (9) SMEM applies for memory API, allocates continuous memory of specified size from the specified memory block, supports memory allocation from DDR, SMC / GSM, supports whether the allocated memory has cache attributes, and supports byte alignment of the allocated memory as required.

[0047] (10) SMEM release memory API, used to release memory blocks requested using SMEM.

[0048] (11) SMEM obtains the physical address API, which is used to convert the virtual address of the first address of the memory block into a physical address.

[0049] (12) Invalidate Cache API, used to invalidate the cache of the memory area of ​​the specified address and size.

[0050] (13) Write back and invalidate the cache API, which is used to write the cache of the specified address and size memory area back to the memory and invalidate it.

[0051] The user program calls the API provided by the library program in the CPU programming, and the execution process is as follows Figure 4 As shown, dsp_hcc_init is the DSP heterogeneous computing call initialization function, and dsp_hcc_exit is the DSP heterogeneous computing call exit function.

[0052] On the other hand, in DSP programming, it consists of heterogeneous computing kernel programs encapsulated into DSP library programs API libraries (encapsulated into API libraries, users do not need to perceive the specific implementation details of the underlying code, they only need to call the API to customize the computing program) and DSP applications. The module overview of the DSP heterogeneous computing kernel program technology implementation solution is as follows Figure 5 As shown, the functional modules include watchdog, timer, IPC interrupt module, cache module and serial port module, etc.; the management module includes calculation request data structure base address change management module, calculation request data structure management module and DSP multi-core management module, etc.; the calculation API module includes FFT (Fast Fourier Transform), Yolovx pre / post processing and user-defined calculation module, etc.).

[0053] The watchdog module is used to monitor whether the DSP program runs away, and cooperates with the timer to complete the DSP program monitoring function; when the DSP program runs away, the timer does not feed the watchdog on time, and the watchdog will trigger the DSP core reset; after the corresponding DSP core reset is triggered by the watchdog, the DSP core will send an IPC interrupt to the CPU to inform the CPU. The timer module is used to feed the watchdog regularly to prevent the watchdog from triggering the DSP core reset. When the DSP program executes abnormally, such as stuck, if the timer does not feed the watchdog on time, it will trigger the watchdog to reset the DSP core.

[0054] The IPC interrupt module is used to determine the IPC interrupt mode used between the CPU and DSP cores, initiate inter-core communication, and is implemented through the hardware IPC module. The functional description of the DSP IPC interrupt can be as follows: (1) Each DSP core registers the following two interrupts to receive the IPC interrupt sent by the CPU: a. Interrupt INT-0: handshake interrupt sent by the CPU; b. Interrupt INT-1: API request interrupt sent by the CPU. (2) The DSP sends an IPC interrupt to the CPU. There is only one interrupt source. The interrupt type message is stored in the SMCmemory / GSM specific area. The interrupt message can be defined as follows: a. bit-0: DSP handshake interrupt; b. bit-1: DSP API request completion normal interrupt; c. bit-2: DSP abnormal interrupt (such as program runaway, etc.).

[0055] The cache module is used to maintain the DSP core cache and ensure a series of operations to ensure the effective and accurate operation of the DSP cache system. It provides operations such as opening the cache to improve the memory access speed; invalidating the cache, writing back the cache, and closing the cache. The serial port module is used for debugging, printing debugging, log and other information, and outputting them to the terminal. The calculation request data structure base address change management module is used to obtain the base address of the calculation request data structure. After successfully handshaking with the CPU and receiving the IPC interrupt of the calculation task request sent by the CPU, it goes to the agreed SMC memory / GSM area to read the base address of the calculation request data structure. The base address is a non-fixed address and is dynamically applied by the CPU.

[0056] The calculation request data structure management module is used to read and write the corresponding member variables in the calculation request data structure. After successfully shaking hands with the CPU, the state variable of the corresponding DSP core in the calculation request structure is set to the IDLE state; after the DSP completes the calculation, the state of the corresponding DSP core is set to the IDLE state; read the calculation original data, calculation result data storage address and calculation parameters in the calculation request data structure.

[0057] The DSP multi-core management module is used for synchronization of DSP multi-core calculations (using semaphores), etc. When the CPU calls the DSP for multi-core calculations, semaphores are used to synchronize the multi-cores to ensure that the DSP multi-core calculations can be completed synchronously and that the DSP multi-cores have completed the calculations and filled in the interrupt type message before the DSP main core sends the calculation completion interrupt to the CPU.

[0058] The calculation API module depends on the specific calculation. Users can add a calculation function by calling the API provided by the above-mentioned DSP library program. Common calculations include FFT, LSTM (Long Short-Term Memory), matrix transposition, and Yolovx pre / post-processing.

[0059] In one embodiment, the DSP library program API includes an initialization DSP platform API, a computing API creation API, and a startup DSP heterogeneous computing kernel API.

[0060] Specifically, the API design provided by the DSP end for users to call can be as follows: (1) Initialize the DSP platform API. The functions of this API may include: a. Initialize the interrupt vector table, including the first address of the interrupt service function that handles reset, the initialization of the IPC core interrupt, and the initialization of the watchdog timer feeding. b. Get the reset type and check the reset type. If it is a reset caused by the watchdog, an interrupt will be sent to the CPU to notify the DSP program to run away, and then idle. c. Cache initialization, including initialization of L1 Cache (first-level cache) and L2Cache (second-level cache). d. Memory management initialization, initialization of heap management in the space reserved by the CPU. e. DSP state initialization, DSP core state initialization, including core number (ID), program entry address, timer period, reset source RSTTYPE_SRC, DSP request pointer and interrupt flag, etc. f. Initialize the hardware timer. g. Watchdog initialization. h. Signal light synchronization / lock initialization. The signal light is used for multi-core DSP synchronization and lock. i. Cache write back, that is, write all DSP caches back to the memory to ensure cache consistency.

[0061] (2) Compute API creates an API, binds the first address of the user's compute API function to the callback function array member of the DSP's heterogeneous compute kernel, and uses it to call the corresponding API when the CPU issues a request. The order of the function pointers must be consistent with the API call ID (identity identifier) ​​on the CPU side.

[0062] (3) Start the DSP heterogeneous computing kernel API. Wait for the IPC interrupt sent by the CPU. When receiving the IPC interrupt sent by the CPU, enter the IPC interrupt service routine, check the IPC interrupt flag, set the flag in the DSP status management, and the IPC interrupt service routine returns to the main function. In the main function, the DSP performs corresponding operations according to the flag, such as handshake (sending an IPC interrupt handshake to the CPU) and request (calling the corresponding API).

[0063] The user program calls the above DSP library program API, and the execution process is as follows Figure 6 As shown in the figure, cl_init_platform is a function call, which is used to initialize the DSP side and ensure that the hardware and software environment of the DSP platform are in a ready state. The cl_create_program function is called to create a computing API, and the cl_run_kernel function is called to run the DSP heterogeneous computing kernel program.

[0064] The interface calling device for the CPU to call the DSP in the heterogeneous computer system above encapsulates the calculation data, calculation parameters and other data between the CPU and DSP cores into a data structure that can be modified by the user through standardized function call interface and encapsulation driver, underlying code details, and through the structuring of calculation data and calculation parameters, so that the user only needs to use simple API calls on the CPU side and the DSP side and fill in the data structure of the relevant parameters of the DSP calculation according to the agreement to realize the CPU calling the DSP for heterogeneous calculation, without having to understand the complex underlying code and hardware details of the CPU and DSP, which greatly reduces the difficulty of developing heterogeneous calls between cores in heterogeneous computer systems and solves the problem that the CPU calls the DSP core for multi-category calculations and calculation acceleration programming is difficult and the process is complicated in heterogeneous computer systems. At the same time, it supports the CPU to call multiple DSP calculation programs separately, and the DSP program only needs to be loaded once. The user can flexibly add and delete calculation functions, which greatly improves the reusability and flexibility of the CPU calling the DSP calculation program in the heterogeneous computer system.

[0065] It should be noted that the above-mentioned CPU can be a single-core or multi-core CPU, and the DSP can be a single-core or multi-core DSP. In a heterogeneous computer system, the above-mentioned design does not rely on a third-party uncontrollable program library, and implements the CPU calling the DSP computing API level call, calling the DSP library program API in the DSP program, registering it as a different computing API, and the CPU calls these computing APIs separately. Compared with the existing technology, it is more flexible to use; at the same time, the main programs of the heterogeneous calls to the CPU and DSP are encapsulated into an API library, and the function interface is standardized, which greatly reduces the difficulty of user programming. Users do not need to care about the mechanisms and underlying implementation details between heterogeneous calls. They only need to fill in the calculation request data structure and call the relevant API provided to realize the CPU calling the DSP for multiple categories of calculations.

[0066] In one embodiment, the data structure of the DSP multi-core state machine is stored in the DSP function request structure, which is readable and writable by both the CPU and the DSP. The description of each state of the DSP multi-core state machine includes: when the CPU calls the DSP heterogeneous computing call library program initialization function, the CPU will initialize each DSP core state machine and set it to the UNKOWN state; the CPU and the DSP shake hands, and after the DSP receives the handshake interrupt, the DSP core sets the corresponding state machine to the idle state; after the CPU initiates a calculation API request, the CPU changes the DSP core state machine from the IDLE state to the running state; after the DSP completes the calculation, it sets the corresponding DSP core state machine to the idle state; the DSP watchdog triggers a reset, and after re-running the program, the DSP sets the DSP core state machine to the reset state; after the CPU receives the DSP abnormal interrupt, it initiates a handshake process, and after the handshake is successful, the DSP core state machine changes to the idle state; if the handshake fails three times, the CPU sets the DSP core state machine to the damaged state.

[0067] Specifically, the DSP core state machine technology is implemented as follows: Since the DSP hardware does not have a state register that can be directly read by the CPU, software is required to establish and maintain the state machine. The implementation of the DSP core state machine is jointly participated by the CPU and DSP. The operating state of each DSP core is stored in the calculation request data structure, such as Figure 7 As shown, both CPU and DSP can read and write, and each state is described as follows: When the CPU calls the dsp_hcc_init (DSP heterogeneous computing call initialization) function, the CPU will initialize (Init) each DSP core state machine and set it to the UNKOWN state. The CPU and DSP shake hands. After the DSP receives the handshake interrupt, the DSP core sets the corresponding state machine to the IDLE state. After the CPU initiates a calculation API request, the CPU changes the DSP core state machine from the IDLE state to the RUNNING state. After the DSP completes the calculation, the DSP sets the corresponding DSP core state machine to the IDLE state. The watchdog triggers a DSP reset. After rerunning the program, the DSP sets the DSP core state machine to the RESET state. After the CPU receives the DSP abnormal interrupt, it initiates a handshake process. After the handshake succeeds, the DSP core state machine changes to the IDLE state; if the handshake fails three times, the CPU sets the DSP core state machine to the BAD state.

[0068] In one embodiment, Figure 8 As shown, a method for calling an interface of a CPU in a heterogeneous computer system to call a DSP is provided, which may include the following processing steps S10 to S18: S10, calling the DSP heterogeneous computing call library's initialization DSP heterogeneous computing call API through the CPU-side application to initialize the DSP heterogeneous computing call; S12, calling the API of the SMEM library through the application program to apply for a continuous memory block from the SMC memory / GSM for storing the original calculation data and the calculation result data, and obtaining the physical address of the continuous memory block; S14, calling the API of the DSP heterogeneous computing call library through the application program to obtain an idle DSP, obtain an idle DSP computing API request structure, and write the computing data address and parameters into the computing API request structure according to the user computing task; S16, the application calls the API of the SMEM library to write back and invalidate the cache, and calls the API of the DSP heterogeneous computing call library to initiate a computing API request to the DSP; S18, after waiting for DSP to return the calculation completion, the application calls the API of the SMEM library to release the requested continuous memory block; S20, calling the DSP heterogeneous computing call exit API of the DSP heterogeneous computing call library through the application program to exit the DSP heterogeneous computing call; Among them, the process of DSP application calling DSP library program API execution includes initializing DSP platform, creating calculation API function, running DSP heterogeneous calculation kernel program, setting the state of corresponding DSP core to idle state, judging whether CPU initiates IPC interrupt, if so, parsing IPC interrupt flag and sending IPC interrupt to CPU and executing corresponding user-defined calculation API according to the ID of calculation API request initiated by CPU, and setting the state of corresponding DSP core to idle state after DSP completes calculation.

[0069] The interface calling method of the CPU calling DSP in the above heterogeneous computer system is to call the DSP library program API in the DSP program to register different computing APIs according to the multiple categories of calculations that the user needs to perform, and the CPU calls these computing APIs separately. In this way, in the heterogeneous calling design, the main programs of the CPU and DSP are encapsulated into API libraries, which greatly reduces the programming difficulty of users. Users do not need to care about the mechanisms and underlying implementation details between heterogeneous calls. They only need to call the provided related APIs and data structures to realize the CPU calling the DSP to perform multiple categories of calculations, thereby realizing the CPU calling the DSP computing API level call in the heterogeneous computer system.

[0070] Compared with the existing technology, it is more flexible to use. At the same time, the main programs for heterogeneous calls to CPU and DSP are encapsulated into API libraries, and the function interface is standardized. The user programming difficulty is greatly reduced. Users do not need to care about the mechanisms and underlying implementation details between heterogeneous calls. They only need to fill in the calculation request data structure and call the provided related API to realize CPU calling DSP for multiple categories of calculations without relying on third-party uncontrollable program libraries.

[0071] For the specific limitations and explanations of the interface calling method for the heterogeneous computer system CPU to call the DSP, please refer to the corresponding limitations and explanations of the interface calling device for the heterogeneous computer system CPU to call the DSP in the above text, which will not be repeated here.

[0072] It should be understood that although Figure 8 The steps in the method are shown in sequence as indicated by the arrows, but the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of the steps, and the steps can be executed in other orders. Figure 8 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequentially, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0073] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus dynamic random access memory (RambusDRAM, referred to as RDRAM) and interface dynamic random access memory (DRDRAM).

[0074] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0075] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of protection of the invention. It should be pointed out that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the attached claims.

Claims

1. An interface calling device for a heterogeneous computer system CPU to call a DSP, characterized in that: The invention comprises a CPU and a DSP, wherein the CPU and the DSP interact with each other for heterogeneous computing by using SMC memory / GSM, shared memory and IPC inter-core interrupts, the software stack of the CPU comprises an application, an API library and a driver, the application calls an API provided by the API library to implement calling the DSP for heterogeneous computing, the API library comprises a DSP heterogeneous computing call library and a SMEM library, the driver comprises an SMEM driver and a DSP heterogeneous computing call driver, and the heterogeneous computing kernel program of the DSP is encapsulated into a DSP library program API; The application of the CPU calls the API provided by the API library to implement the process of calling the DSP to perform heterogeneous computing, including calling the initialization DSP heterogeneous computing call API of the DSP heterogeneous computing call library to initialize the DSP heterogeneous computing call, calling the API of the SMEM library to apply for a continuous memory block from the SMC memory / GSM for storing calculation original data and calculation result data, and obtaining the physical address of the continuous memory block, calling the API of the DSP heterogeneous computing call library to obtain an idle DSP, obtain the idle DSP calculation API request structure and write the calculation data address and parameters into the calculation API request structure according to the user calculation task, calling the API of the SMEM library to write back and invalidate the cache, calling the API of the DSP heterogeneous computing call library to initiate a calculation API request to the DSP, waiting for the DSP to return the calculation completion, calling the API of the SMEM library to release the applied continuous memory block, and calling the DSP heterogeneous computing call exit API of the DSP heterogeneous computing call library to exit the DSP heterogeneous computing call; Among them, the process of the DSP application of the DSP calling the DSP library program API execution includes initializing the DSP platform, creating a calculation API function, running the DSP heterogeneous computing kernel program, setting the state of the corresponding DSP core to an idle state, judging whether the CPU initiates an IPC interrupt, and if so, parsing the IPC interrupt flag and sending an IPC interrupt to the CPU and executing the corresponding user-defined calculation API according to the ID of the CPU-initiated calculation API request, and after the DSP completes the calculation, setting the state of the corresponding DSP core to an idle state.

2. The interface calling device for a heterogeneous computer system CPU to call a DSP according to claim 1, characterized in that: The storage space of the SMC memory / GSM is dynamically applied by the application program calling the API of the SMEM library to store the calculation request data structure. The last 4KB space of the SMC memory / GSM is used to store the base address and size of the DSP calculation request data structure variable and the message type of the IPC interrupt sent by the DSP to the CPU. The IPC interrupt sources sent by the CPU to the DSP include INT-0 and INT-1, INT-0 indicates the handshake interrupt sent by the CPU, and INT-1 indicates the API request interrupt sent by the CPU. The message type of the IPC interrupt includes bit-0, bit-1 and bit-2, bit-0 indicates the DSP handshake interrupt, bit-1 indicates the normal interrupt of the DSP calculation API request completion, and bit-2 indicates the DSP abnormal interrupt.

3. The interface calling device for a heterogeneous computer system CPU to call a DSP according to claim 2, characterized in that: The API library of the CPU software stack provides APIs including initializing DSP heterogeneous computing call API, unloading DSP heterogeneous computing call API, idle acquisition API, core status acquisition API, idle structure acquisition API, CPU calling DSP to perform heterogeneous computing API, waiting for DSP heterogeneous computing API request completion API, SMEM initialization API, SMEM memory application API, SMEM memory release API, SMEM physical address acquisition API, invalidation Cache API, and write-back and invalidation Cache API; The DSP library program API includes initializing the DSP platform API, creating a computing API, and starting a DSP heterogeneous computing kernel API.

4. The interface calling device for a heterogeneous computer system CPU to call a DSP according to any one of claims 1 to 3, characterized in that: Before the CPU initiates a calculation API request, the calculation API ID to be called, the address of the original calculation data, the address of the calculation result data and the calculation parameters are filled in the corresponding member variables in the calculation request data structure; the calculation request data structure is provided with a member variable of an enumeration type for storing the calculation API ID separately, and the API ID setting of the CPU is consistent with the API ID setting of the DSP; In the heterogeneous computing kernel program of the DSP, the DSP library program API is called to save the function pointers that need to be calculated in an array and registered as different computing APIs. The subscript of the computing function array is the API ID that the CPU calls the DSP for calculation; 0 is excluded in the subscript of the computing function array to prevent invalid calls.

5. The interface calling device for a heterogeneous computer system CPU to call a DSP according to claim 4, characterized in that: The DSP heterogeneous computing call library implements sending an IPC interrupt to the DSP core, setting the base address and size of the storage area of ​​the calculation request data structure, calling the API provided by the SMEM library to apply for a section of memory in the SMC memory / GSM for storing the calculation request data structure, encapsulating DSP heterogeneous computing related functions into a standard API for the application program to call, implementing DSP multi-core state machine maintenance, and receiving asynchronous signals sent by the DSP heterogeneous computing call driver by calling the standard ioctl interface provided by the DSP heterogeneous computing call driver; The DSP heterogeneous computing call driver obtains IPC register resources, SMC memory / GSM reserved space resources and IPC interrupt numbers from the device tree, operates the underlying hardware, registers interrupt service routines, receives IPC interrupts sent by the DSP, sends asynchronous signals to the DSP heterogeneous computing call library, and provides ioctl interface calls; The SMEM library is used to provide corresponding APIs for implementing application, release, virtual-to-physical address conversion, cache refresh and cache invalidation of continuous memory, and an ioctl interface for calling the SMEM driver; The SMEM driver serves as a management driver for shared continuous memory blocks, and is used to obtain and load driver module parameters from a device tree, implement configurable continuous physical memory area management, and provide corresponding ioctl interfaces for application, release, virtual-to-real physical address conversion, cache refresh, and cache invalidation of continuous physical memory areas called by the SMEM library; wherein, continuous physical memory area management includes management of SMC memory, GSM, and shared memory.

6. The interface calling device for a heterogeneous computer system CPU to call a DSP according to claim 5, characterized in that: The data structure of the DSP multi-core state machine is stored in the DSP function request structure, which is readable and writable by both the CPU and the DSP. The description of each state of the DSP multi-core state machine includes: When the CPU calls the DSP heterogeneous computing call library program initialization function, the CPU will initialize each DSP core state machine and set it to the UNKOWN state; The CPU and the DSP perform handshake, and after the DSP receives the handshake interrupt, the DSP core sets the corresponding state machine to an idle state; After the CPU initiates a calculation API request, the CPU changes the DSP core state machine from an IDLE state to a running state; After the DSP completes the calculation, the corresponding DSP core state machine is set to an idle state; The DSP watchdog triggers a reset, and after re-running the program, the DSP sets the DSP core state machine to a reset state; After receiving the abnormal interrupt from DSP, the CPU initiates the handshake process. After the handshake succeeds, the DSP core state machine changes to the idle state. If the handshake fails three times, the CPU sets the DSP core state machine to the damaged state.

7. A method for calling a DSP interface by a CPU in a heterogeneous computer system, characterized in that: Includes steps: The application on the CPU side calls the DSP heterogeneous computing call library to initialize the DSP heterogeneous computing call API to initialize the DSP heterogeneous computing call; The application program calls the API of the SMEM library to apply for a continuous memory block from the SMC memory / GSM for storing the original calculation data and the calculation result data, and obtains the physical address of the continuous memory block; The application program calls the API of the DSP heterogeneous computing call library to obtain an idle DSP, obtain an idle DSP computing API request structure, and write the computing data address and parameters into the computing API request structure according to the user computing task; The application program calls the API of the SMEM library to write back and invalidate the cache, and calls the API of the DSP heterogeneous computing call library to initiate a computing API request to the DSP; After waiting for DSP to return the calculation, the application program calls the API of the SMEM library to release the applied continuous memory block; Exit the DSP heterogeneous computing call by calling the DSP heterogeneous computing call exit API of the DSP heterogeneous computing call library through the application program; Among them, the process of the DSP application of the DSP calling the DSP library program API execution includes initializing the DSP platform, creating a calculation API function, running the DSP heterogeneous computing kernel program, setting the state of the corresponding DSP core to an idle state, judging whether the CPU initiates an IPC interrupt, and if so, parsing the IPC interrupt flag and sending an IPC interrupt to the CPU and executing the corresponding user-defined calculation API according to the ID of the CPU-initiated calculation API request, and after the DSP completes the calculation, setting the state of the corresponding DSP core to an idle state.

8. The interface calling method for a heterogeneous computer system CPU to call a DSP according to claim 7, characterized in that: The storage space of the SMC memory / GSM is dynamically applied by the application program calling the API of the SMEM library to store the calculation request data structure. The last 4KB space of the SMC memory / GSM is used to store the base address and size of the DSP calculation request data structure variable and the message type of the IPC interrupt sent by the DSP to the CPU. The IPC interrupt sources sent by the CPU to the DSP include INT-0 and INT-1, INT-0 indicates the handshake interrupt sent by the CPU, and INT-1 indicates the API request interrupt sent by the CPU. The message type of the IPC interrupt includes bit-0, bit-1 and bit-2, bit-0 indicates the DSP handshake interrupt, bit-1 indicates the normal interrupt of the DSP calculation API request completion, and bit-2 indicates the DSP abnormal interrupt.

9. The interface calling method for a heterogeneous computer system CPU to call a DSP according to claim 8, characterized in that: The API library of the CPU software stack provides APIs including initializing DSP heterogeneous computing call API, unloading DSP heterogeneous computing call API, idle acquisition API, core status acquisition API, idle structure acquisition API, CPU calling DSP to perform heterogeneous computing API, waiting for DSP heterogeneous computing API request completion API, SMEM initialization API, SMEM memory application API, SMEM memory release API, SMEM physical address acquisition API, invalidation Cache API, and write-back and invalidation Cache API; The DSP library program API includes initializing the DSP platform API, creating a computing API, and starting a DSP heterogeneous computing kernel API.

10. The interface calling method for a heterogeneous computer system CPU to call a DSP according to claim 7, characterized in that: The data structure of the DSP multi-core state machine is stored in the DSP function request structure, which is readable and writable by both the CPU and the DSP. The description of each state of the DSP multi-core state machine includes: When the CPU calls the DSP heterogeneous computing call library program initialization function, the CPU will initialize each DSP core state machine and set it to the UNKOWN state; The CPU and the DSP perform handshake, and after the DSP receives the handshake interrupt, the DSP core sets the corresponding state machine to an idle state; After the CPU initiates a calculation API request, the CPU changes the DSP core state machine from an IDLE state to a running state; After the DSP completes the calculation, the corresponding DSP core state machine is set to an idle state; The DSP watchdog triggers a reset, and after re-running the program, the DSP sets the DSP core state machine to a reset state; After receiving the DSP abnormal interrupt, the CPU initiates a handshake process. After the handshake succeeds, the DSP core state machine changes to an idle state; if the handshake fails three times, the CPU sets the DSP core state machine to a damaged state.

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