A cone-shaped dielectric array InGaN quantum dot structure and a preparation method thereof

Abstract

The application discloses a kind of conical dielectric array InGaN quantum dot structure and preparation method, including substrate, GaN template layer, conical dielectric array layer, first InGaN quantum dot layer, first GaN barrier layer, second InGaN quantum dot layer, second GaN barrier layer;GaN template layer is grown on substrate;Conical dielectric array layer is grown on GaN template layer;First InGaN quantum dot layer is grown on GaN template layer;First GaN barrier layer is uniformly grown and completely covers on first InGaN quantum dot layer;Second InGaN quantum dot layer is grown on first GaN barrier layer;Second GaN barrier layer is uniformly grown and completely covers on second InGaN quantum dot layer;Multiple periodic InGaN quantum dot layer, GaN barrier layer, are repeatedly grown on second GaN barrier layer in sequence, form multilayer InGaN quantum dot structure.The application can realize the accurate adjustment of quantum dot density, size, distribution etc., and the grown InGaN quantum dot has the advantages of simple process and high crystal quality.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor materials technology, specifically relating to a conical dielectric array InGaN quantum dot structure and its preparation method. Background Technology

[0002] In recent years, significant progress has been made in the fabrication technology of GaN-based semiconductor materials, greatly promoting the rapid development of optoelectronic devices such as visible light-emitting diodes (LEDs) and laser diodes (LDs) in display and lighting fields. However, traditional GaN-based light-emitting devices typically employ InGaN / GaN multiple quantum well structures grown with polar surfaces as the active region. Although polar-surface-grown materials have higher quality, the quantum confinement Stark effect (QCSE) induced by its strong built-in electric field causes spatial separation of electrons and holes in the quantum well, leading to a decrease in radiative recombination efficiency. Furthermore, GaN-based materials generally suffer from high dislocation density, which further affects the improvement of device luminous efficiency.

[0003] To overcome the aforementioned problems, InGaN quantum dot materials with three-dimensional confinement structures, capable of effectively suppressing the QCSE effect and shielding dislocations, have become a research hotspot in the field of GaN-based luminescent materials. However, traditional InGaN quantum dots are prepared based on the self-assembly SK growth mode, which has strong randomness, resulting in quantum dots with uneven distribution and poor size consistency, thus limiting the improvement of quantum dot material performance. To improve the uniformity of InGaN quantum dots, some researchers have proposed using selective region growth technology, which involves etching out neatly arranged and regularly shaped "window regions" before epitaxial growth of InGaN to form uniformly distributed quantum dots. However, after the InGaN quantum dot layer is grown, this method still requires etching to remove excess InGaN material outside the "window regions," complicating the overall fabrication process. Furthermore, the etching process may damage the InGaN quantum dots, which is detrimental to the preparation of high-quality InGaN quantum dot materials. Summary of the Invention

[0004] To overcome the shortcomings of existing technologies, this invention provides a conical dielectric array InGaN quantum dot structure and its fabrication method, comprising a substrate, a GaN template layer, a conical dielectric array layer, a first InGaN quantum dot layer, a first GaN barrier layer, a second InGaN quantum dot layer, and a second GaN barrier layer; the GaN template layer is grown on the substrate; the conical dielectric array layer is grown on the GaN template layer; the first InGaN quantum dot layer is grown on the GaN template layer; the first GaN barrier layer is uniformly grown and completely covers the first InGaN quantum dot layer; the second InGaN quantum dot layer is grown on the first GaN barrier layer; the second GaN barrier layer is uniformly grown and completely covers the second InGaN quantum dot layer; multiple periodically arranged InGaN quantum dot layers and GaN barrier layers are sequentially and repeatedly grown on the second GaN barrier layer to form a multilayer InGaN quantum dot structure. This invention can achieve precise control over the density, size, and distribution of quantum dots, and the grown InGaN quantum dots have the advantages of simple processing and high crystal quality.

[0005] The technical solution adopted by this invention to solve its technical problem is as follows:

[0006] A tapered dielectric array InGaN quantum dot structure includes a substrate, a GaN template layer, a tapered dielectric array layer, a first InGaN quantum dot layer, a first GaN barrier layer, a second InGaN quantum dot layer, and a second GaN barrier layer.

[0007] The GaN template layer is grown on the substrate;

[0008] The tapered dielectric array layer is grown on a GaN template layer;

[0009] The first InGaN quantum dot layer is grown on the first GaN template layer;

[0010] The first GaN barrier layer is uniformly grown and completely covers the first InGaN quantum dot layer;

[0011] The second InGaN quantum dot layer is grown on the first GaN barrier layer;

[0012] The second GaN barrier layer grows uniformly and completely covers the second InGaN quantum dot layer;

[0013] Multiple InGaN quantum dot layers and GaN barrier layers arranged in a periodic manner are sequentially grown on a second GaN barrier layer to form a multilayer InGaN quantum dot structure.

[0014] Preferably, the lateral size, density, and distribution of the quantum dots in the first InGaN quantum dot layer are controlled by the conical dielectric array layer, that is, only the spacer regions between the conical dielectric array units can grow and form InGaN quantum dots.

[0015] Preferably, the substrate is made of sapphire, silicon, silicon carbide, gallium nitride, or gallium arsenide; the conical dielectric array layer 12 is formed of silicon oxide, silicon nitride, hafnium oxide, or aluminum oxide insulating dielectric material.

[0016] Preferably, the array units in the conical dielectric array layer are uniformly distributed at the nanoscale using electron beam lithography, nanoimprinting, and self-aligned multiple exposure techniques.

[0017] Preferably, the conical dielectric array layer is a cone-shaped or pyramid-shaped structure with a sharp top and smooth, inclined sidewalls, formed by drilling and etching technology using isotropic etching processes.

[0018] Preferably, the height of the dielectric array unit in the conical dielectric array layer is greater than the height of the quantum dot in the first InGaN quantum dot layer; the thickness of the first GaN barrier layer is greater than the height of the array unit in the conical dielectric layer; and the thickness of the second GaN barrier layer is greater than the height of the quantum dot in the second InGaN quantum dot layer.

[0019] Preferably, under the influence of stress coupling, the multilayer InGaN quantum dot structure is consistent with the distribution of quantum dots in the first InGaN quantum dot layer, forming a multilayer self-aligned structure.

[0020] A method for fabricating a conical dielectric array InGaN quantum dot structure includes the following steps:

[0021] Step 1: Take a substrate made of sapphire, silicon, silicon carbide, gallium nitride, or gallium arsenide; perform high-temperature cleaning on the substrate in a hydrogen atmosphere at 1000-1200℃ for 5-20 minutes, and then perform nitriding treatment.

[0022] Step 2: Grow a GaN template layer on the substrate;

[0023] Step 3: Deposit insulating dielectric material on GaN template layer, and use electron beam lithography, nanoimprinting, self-aligned multiple exposure micro-nano processing technology, combined with isotropic etching process drilling technology, to form a cone-shaped dielectric array layer with a uniform array at the nanoscale.

[0024] Step 4: Epitaxially grow InGaN quantum dot material at the gap positions of the dielectric array units in the tapered dielectric array layer to form the first InGaN quantum dot layer;

[0025] Step 5: Grow the first GaN barrier layer, covering the first InGaN quantum dot layer and the tapered dielectric array layer;

[0026] Step 6: On the first GaN barrier layer, grow a second InGaN quantum dot layer, and use stress coupling to form an InGaN quantum dot layer with a self-aligned structure;

[0027] Step 7: Grow a second GaN barrier layer and cover it with a second InGaN quantum dot layer;

[0028] Step 8: On the second GaN barrier layer, repeatedly grow multiple cycles of InGaN quantum dot layers and GaN barrier layers to complete the growth of self-aligned multilayer InGaN quantum dots.

[0029] The beneficial effects of this invention are as follows:

[0030] 1. Since InGaN quantum dots are obtained by epitaxial growth on GaN template layers at the gap positions of tapered array units, high-quality selected area epitaxial growth of InGaN quantum dots can be achieved, which is beneficial to improving the crystal quality of quantum dots.

[0031] 2. Due to the use of micro-nano fabrication processes such as electron beam lithography, nanoimprinting, and self-aligned multiple exposure, it is possible to obtain the size and arrangement of the nanoscale conical dielectric array unit, ensuring that subsequent epitaxial growth can obtain nanoscale InGaN quantum dots.

[0032] 3. Since InGaN quantum dots are grown in the gaps between the conical dielectric array cells, the position, size, and density of the subsequently grown InGaN quantum dots can be precisely controlled by adjusting the size, spacing, and distribution of the dielectric array cells.

[0033] 4. Since the etching process only targets the insulating dielectric unit, while InGaN quantum dots are formed by epitaxial growth on the GaN template layer, the potential damage to InGaN quantum dots caused by the etching process is minimized.

[0034] 5. Due to the sloping and smooth sidewalls of the conical dielectric array unit, the subsequently grown InGaN material is less likely to deposit on the surface of the dielectric array unit. Therefore, it is unnecessary to remove the InGaN film deposited on the dielectric surface in subsequent processes. This avoids the step of etching to remove excess InGaN material outside the window growth region, which is required in traditional selective area growth techniques. This not only simplifies the quantum dot growth process but, more importantly, effectively avoids potential damage to the quantum dots caused by additional etching processes, preventing the generation of surface defects and contributing to improved crystal quality of the quantum dots. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the epitaxial structure of the InGaN quantum dots of this invention.

[0036] Figure 2 This is a flowchart illustrating the fabrication process of the InGaN quantum dots of this invention. Detailed Implementation

[0037] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0038] This invention proposes an InGaN quantum dot growth method that allows for precise control over the size, position, and density of InGaN quantum dots without causing etching damage, and is characterized by its simplicity. Compared to the highly randomized SK growth mode, this invention enables precise adjustment of the density, size, and distribution of quantum dots. Compared to traditional selective growth techniques, the InGaN quantum dots grown using this invention offer advantages such as simple fabrication and high crystal quality.

[0039] The purpose of this invention is to use nanoscale etching technology to form an array of pointed conical units, and to use the pattern of the conical dielectric array layer to control the lateral size, density and distribution of quantum dots.

[0040] A conical dielectric array InGaN quantum dot structure includes:

[0041] Substrate 10, the material of which is sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide;

[0042] GaN template layer 11 is grown on substrate 10;

[0043] A conical dielectric array layer 12 is grown on a GaN template layer 11;

[0044] The first InGaN quantum dot layer 13 is grown on the first GaN template layer 11;

[0045] The first GaN barrier layer 14 is uniformly grown and completely covers the first InGaN quantum dot layer 13;

[0046] The second InGaN quantum dot layer 15 is grown on the first GaN barrier layer 14;

[0047] The second GaN barrier layer 16 is uniformly grown and completely covers the second InGaN quantum dot layer 15;

[0048] Multiple periodically arranged InGaN quantum dot layers and GaN barrier layers are sequentially grown on a second GaN barrier layer to form a high-density multilayer InGaN quantum dot structure.

[0049] In the first InGaN quantum dot layer 13, the lateral size, density and distribution of the quantum dots are controlled by the conical dielectric array layer 12, that is, only the spacer regions between the conical dielectric array units can grow and form InGaN quantum dots.

[0050] The conical dielectric array layer 12 is formed of insulating dielectric materials such as silicon oxide, silicon nitride, hafnium oxide, and aluminum oxide;

[0051] The array units in the conical dielectric array layer 12 are uniformly distributed at the nanoscale using techniques such as electron beam lithography, nanoimprinting, and self-aligned multiple exposure.

[0052] The conical dielectric array layer 12 is a cone-shaped or pyramid-shaped structure with a sharp top and smooth inclined sidewalls, formed by drilling and etching technology using isotropic etching process.

[0053] Since the conical dielectric array layer 12 is an insulating dielectric material with a sharp top and smooth inclined sidewalls, the subsequently grown InGaN material is not easy to adhere to the conical dielectric array unit, thus preventing the formation of an InGaN thin film on the surface of the dielectric array unit.

[0054] The height of the dielectric array unit in the tapered dielectric array layer 12 should be greater than the height of the quantum dots in the first InGaN quantum dot layer 13;

[0055] The thickness of the first GaN barrier layer 14 should be greater than the height of the array cells in the conical dielectric layer 12;

[0056] Due to the stress coupling effect of the bottom first InGaN quantum dot layer 13, the quantum dots in the second InGaN quantum dot layer 15 are distributed in the same way as those in the first InGaN quantum dot layer 13.

[0057] The thickness of the second GaN barrier layer 16 should be greater than the height of the quantum dots in the second InGaN quantum dot layer 15;

[0058] Under the influence of stress coupling, the subsequently grown multilayer InGaN quantum dots are distributed in the same way as the quantum dots in the first InGaN quantum dot layer 13, forming a multilayer self-aligned structure.

[0059] A method for fabricating a cone-shaped dielectric array of InGaN quantum dots includes the following steps:

[0060] Step 1: Take a substrate 10, the material of which is sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide;

[0061] Step 2: Grow a GaN template layer 11 on the substrate 10;

[0062] Step 3: Deposit insulating dielectric material on GaN template layer 11, and use nanoscale processing techniques such as electron beam lithography, nanoimprinting, and self-aligned multiple exposure, combined with isotropic etching process to form a cone-shaped dielectric array layer 12 with a uniform array at the nanoscale.

[0063] Step 4: Epitaxially grow InGaN quantum dot material at the gap positions of the dielectric array units of the tapered dielectric array layer 12 to form the first InGaN quantum dot layer 13;

[0064] Step 5: Grow the first GaN barrier layer 14, covering the aforementioned first InGaN quantum dot layer 13 and tapered dielectric array layer 12;

[0065] Step 6: On the first GaN barrier layer 14, a second InGaN quantum dot layer 15 is grown, and an InGaN quantum dot layer with a self-aligned structure is formed by utilizing stress coupling.

[0066] Step 7: Grow the second GaN barrier layer 16 and cover it with the second InGaN quantum dot layer 15;

[0067] Step 8: On the second GaN barrier layer, repeatedly grow multiple cycles of InGaN quantum dot layers and GaN barrier layers to complete the growth of self-aligned multilayer InGaN quantum dots.

[0068] Example:

[0069] See Figure 1 The present invention provides an InGaN quantum dot structure of a conical dielectric array, comprising:

[0070] Substrate 10, the material of which is sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide;

[0071] GaN template layer 11 is grown on substrate 10. This GaN template layer is obtained using a two-step growth method: first, a low-temperature GaN buffer layer with a thickness less than 50 nm is grown, followed by a high-temperature GaN layer with a thickness of 1-3 μm. The GaN epitaxial layer can be doped according to actual needs, typically with N-type Si doping at a concentration greater than 10¹⁸ cm⁻¹. -3 .

[0072] A conical dielectric array layer 12 is grown on a GaN template layer 11. The array units in the conical dielectric array layer 12 are uniformly distributed at the nanoscale using techniques such as electron beam lithography, nanoimprint lithography, and self-aligned multiple exposure. The structure of the conical dielectric array units is a cone or pyramid shape with a sharp top and smooth, sloping sidewalls, formed using isotropic etching techniques.

[0073] The first InGaN quantum dot layer 13 is grown on the first GaN template layer 11. Since the conical dielectric array layer 12 is an insulating dielectric material with a sharp top and smooth inclined sidewalls, the subsequently grown InGaN material is not easily attached to the conical dielectric array unit, so that no InGaN film is formed on the surface of the dielectric array unit, ensuring that the entire first InGaN quantum dot layer is epitaxially grown in the gap position of the conical dielectric array unit.

[0074] A second InGaN quantum dot layer 15 is grown on the first GaN barrier layer 14, and an InGaN quantum dot layer with a self-aligned structure is formed by utilizing stress coupling.

[0075] A second GaN barrier layer 16 is grown and covered with a second InGaN quantum dot layer 15;

[0076] On the second GaN barrier layer 16, multiple cycles of InGaN quantum dot layers and GaN barrier layers are sequentially grown to complete the growth of self-aligned multilayer InGaN quantum dots. The growth conditions are the same as described above.

[0077] See Figure 2 and combined Figure 1 As shown, the present invention provides a method for fabricating an InGaN quantum dot structure of a conical dielectric array, comprising the following steps:

[0078] Step 1: Take a substrate 10, the material of which is sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide; perform high-temperature cleaning treatment on the substrate in a hydrogen atmosphere at 1000-1200℃ for 5-20 minutes, and then perform nitriding treatment.

[0079] Step 2: Grow a GaN template layer 11 on substrate 10. This GaN template layer is obtained using a two-step growth method: first, grow a low-temperature GaN buffer layer with a thickness of less than 50 nm, and then grow a high-temperature GaN layer with a thickness of 1–3 μm. The GaN epitaxial layer can be doped according to actual needs, generally with N-type Si doping at a concentration greater than 10%. 18 cm -3 More specifically, the growth method for the low-temperature GaN buffer layer is as follows: controlling the flow rate of trimethylgallium to be 8–20 sccm, the flow rate of NH3 to be 500–1200 sccm, the reaction pressure to be 133–400 mbar, the growth time to be 80–500 s, and the growth temperature to be 450–600 °C. The growth method for the high-temperature GaN layer is as follows: controlling the flow rate of trimethylgallium to be 50–150 sccm, the flow rate of NH3 to be 3000–8000 sccm, the reaction pressure to be 133–400 mbar, the growth time to be 500–3000 s, and the growth temperature to be 1100–1300 °C.

[0080] Step 3: An insulating dielectric material is deposited on the GaN template layer 11, and nanoscale processing techniques such as electron beam lithography, nanoimprint lithography, and self-aligned multiple exposure are combined with isotropic etching to form a uniform array of conical dielectric array layers 12 with nanoscale dimensions. The conical dielectric array unit is a cone or pyramid shape with a sharp top and smooth, sloping sidewalls, formed using isotropic etching. The isotropic etching technique utilizes plasma or wet etching processes to uniformly etch the material in all directions, forming a structure with a sharp top and smooth sidewalls. The etching gas used is CF4 / O2 or SF / N2, the etching rate is 10–20 nm / min, the etching temperature is 20–40 °C, and the etching time is 10–30 s.

[0081] Step 4: Epitaxially grow InGaN quantum dot material at the gaps between the dielectric array units of the conical dielectric array layer 13 to form the first InGaN quantum dot layer 12. Since the conical dielectric array layer 12 is an insulating dielectric material with a sharp top and smooth, sloping sidewalls, the subsequently grown InGaN material is less likely to adhere to the conical dielectric array units, thus preventing the formation of an InGaN thin film on the surface of the dielectric array units. This ensures that the entire first InGaN quantum dot layer is epitaxially grown within the gaps between the conical dielectric array units. Specifically, the growth method for the InGaN quantum dot layer is as follows: controlling the flow rate of trimethylindium to be 200–400 sccm, the flow rate of triethylgallium to be 20–100 sccm, the flow rate of NH3 to be 5000–10000 sccm, the growth temperature to be 800–900℃, and the growth time to be 50–150 s.

[0082] Step 5: Grow the first GaN barrier layer 14, covering the aforementioned first InGaN quantum dot layer 13 and cone-shaped dielectric array layer 12.

[0083] Specifically, the GaN barrier layer has a thickness of 10–20 nm and ensures that it covers at least all InGaN quantum dots. Adjusting its thickness can change the coupling strength between the quantum dots in each layer. The growth method is as follows: the flow rate of NH3 is controlled at 5000–10000 sccm, the flow rate of triethylgallium is controlled at 20–100 sccm, the growth temperature is controlled at 800–900℃, and the growth time is controlled at 100–300 s.

[0084] Step 6: On the first GaN barrier layer 14, a second InGaN quantum dot layer 15 is grown, and an InGaN quantum dot layer with a self-aligned structure is formed by stress coupling. The self-alignment principle ensures that the second InGaN quantum dot layer 15 corresponds vertically to the first InGaN quantum dot layer 13, guaranteeing that the subsequently grown quantum dots are also distributed in a high-density and uniform manner.

[0085] Step 7: Grow the second GaN barrier layer 16 and cover it with the second InGaN quantum dot layer 15;

[0086] Step 8: On the second GaN barrier layer, repeatedly grow multiple cycles of InGaN quantum dot layers and GaN barrier layers to complete the growth of self-aligned multilayer InGaN quantum dots. The growth conditions are the same as described above.

Claims

1. A conical dielectric array InGaN quantum dot structure, characterized in that, It includes a substrate, a GaN template layer, a tapered dielectric array layer, a first InGaN quantum dot layer, a first GaN barrier layer, a second InGaN quantum dot layer, and a second GaN barrier layer; The GaN template layer is grown on the substrate; The tapered dielectric array layer is grown on a GaN template layer; The first InGaN quantum dot layer is grown on the first GaN template layer; the first InGaN quantum dot layer is entirely epitaxially grown in the spacer region between the tapered dielectric array units in the tapered dielectric array layer, and will not grow on the surface of the tapered dielectric array units. The first GaN barrier layer is uniformly grown and completely covers the first InGaN quantum dot layer; The second InGaN quantum dot layer is grown on the first GaN barrier layer; The second GaN barrier layer grows uniformly and completely covers the second InGaN quantum dot layer; Multiple periodically arranged InGaN quantum dot layers and GaN barrier layers are sequentially and repeatedly grown on a second GaN barrier layer to form a multilayer InGaN quantum dot structure. The array units in the conical dielectric array layer are uniformly distributed at the nanoscale using electron beam lithography, nanoimprinting, or self-aligned multiple exposure techniques; the conical dielectric array layer is a cone-shaped or pyramid-shaped structure with a sharp top and smooth, inclined sidewalls, formed using isotropic etching technology. The conical dielectric array layer is formed of silicon oxide, silicon nitride, hafnium oxide, or aluminum oxide insulating dielectric material.

2. The conical dielectric array InGaN quantum dot structure according to claim 1, characterized in that, The lateral size and distribution of the quantum dots in the first InGaN quantum dot layer are controlled by the tapered dielectric array layer.

3. The conical dielectric array InGaN quantum dot structure according to claim 1, characterized in that, The substrate is made of sapphire, silicon, silicon carbide, gallium nitride, or gallium arsenide.

4. The conical dielectric array InGaN quantum dot structure according to claim 1, characterized in that, The height of the dielectric array unit in the conical dielectric array layer is greater than the height of the quantum dot in the first InGaN quantum dot layer; the thickness of the first GaN barrier layer is greater than the height of the array unit in the conical dielectric layer; and the thickness of the second GaN barrier layer is greater than the height of the quantum dot in the second InGaN quantum dot layer.

5. The conical dielectric array InGaN quantum dot structure according to claim 1, characterized in that, Under the influence of stress coupling, the multilayer InGaN quantum dot structure is consistent with the distribution of quantum dots in the first InGaN quantum dot layer, forming a multilayer self-aligned structure.

6. A method for fabricating a conical dielectric array InGaN quantum dot structure as described in claim 1, characterized in that, Includes the following steps: Step 1: Take a substrate made of sapphire, silicon, silicon carbide, gallium nitride, or gallium arsenide; perform high-temperature cleaning on the substrate in a hydrogen atmosphere at 1000-1200℃ for 5-20 minutes, and then perform nitriding treatment. Step 2: Grow a GaN template layer on the substrate; Step 3: Deposit insulating dielectric material on GaN template layer, and use electron beam lithography, nanoimprinting or self-aligned multiple exposure micro-nano processing technology, combined with isotropic etching process drilling technology, to form a cone-shaped dielectric array layer with a uniform array at the nanoscale. Step 4: Epitaxially grow InGaN quantum dot material at the gap positions of the dielectric array units in the tapered dielectric array layer to form the first InGaN quantum dot layer; Step 5: Grow the first GaN barrier layer, covering the first InGaN quantum dot layer and the tapered dielectric array layer; Step 6: On the first GaN barrier layer, grow a second InGaN quantum dot layer, and use stress coupling to form an InGaN quantum dot layer with a self-aligned structure; Step 7: Grow a second GaN barrier layer and cover it with a second InGaN quantum dot layer; Step 8: On the second GaN barrier layer, repeatedly grow multiple cycles of InGaN quantum dot layers and GaN barrier layers to complete the growth of self-aligned multilayer InGaN quantum dots.

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