Package structure and method for improving heat dissipation and warpage of product

Abstract

The application discloses a packaging structure for improving product heat dissipation and warping, which is beneficial to reduce product warping, increase product heat dissipation capacity and improve packaging reliability. The packaging structure comprises a substrate, an IC chip, a second reinforcing layer, a plastic sealing body, a first passivation glue layer, a second passivation glue layer and a pad. The substrate is provided with the IC chip above the first reinforcing layer, the periphery of the IC chip is surrounded by the second reinforcing layer, the plastic sealing body is filled on the surface of the substrate where the IC chip is arranged, the plastic sealing body is filled in the area between the IC chip and the second reinforcing layer, the second reinforcing layer and the plastic sealing body are arranged at the height of the IC chip, an equivalent packaging plane is formed, the first passivation glue layer is stacked on the equivalent packaging plane, the first passivation glue layer is provided with a wiring, the bottom of the wiring is connected with the IC chip, and the upper layer of the wiring is exposed and connected with the corresponding pad.

Description

Technical Field

[0001] The present invention relates to the technical field of IC chip packaging, in particular to a packaging structure for improving product heat dissipation and warping. The present invention also provides a packaging method for the packaging structure. Background Art

[0002] With the advancement of packaging technology, the technology is moving towards smaller package volumes and higher packaging density. In plastic encapsulation technology, the surface of the substrate where the IC chip is mounted is encapsulated by the plastic encapsulation body. This presents a challenge in dissipating heat from the IC chip mounted on the substrate. Furthermore, because the substrate and the plastic encapsulation body are made of different materials, the substrate can experience significant warping during the cooling phase of the entire plastic encapsulation process, leading to serious product quality issues in subsequent manufacturing processes. Therefore, there is an urgent need to develop a new packaging structure that can improve the heat dissipation performance of the plastic encapsulation structure while reducing substrate warping during the manufacturing process, thereby improving the reliability of the packaged product. Summary of the Invention

[0003] In response to the above problems, the present invention provides a packaging structure that improves product heat dissipation and warping, which is beneficial to reducing product warping, increasing product heat dissipation capacity, and improving packaging reliability.

[0004] A packaging structure for improving heat dissipation and warping of a product, characterized in that it includes:

[0005] a substrate having a first strengthening layer built therein;

[0006] IC chips;

[0007] Second reinforcement layer;

[0008] Plastic packaging;

[0009] First passivation glue layer;

[0010] Second passivation glue layer;

[0011] and pads;

[0012] The IC chip is arranged above the first reinforcing layer of the substrate, the outer periphery of the IC chip is surrounded by the assembled second reinforcing layer, the plastic package is filled in the surface of the substrate where the IC chip is arranged, the second reinforcing layer and the plastic package are arranged at the height of the IC chip to form an equivalent packaging plane, the first passivation glue layer is arranged on the equivalent packaging plane, the first passivation glue layer is provided with wiring, the bottom of the wiring is connected with the IC chip, the upper layer of the wiring is exposed and connected with the corresponding pad, and the upper surface of the first passivation glue layer is provided with the second passivation glue layer, and the upper surface of the pad is protruded from the second passivation glue layer.

[0013] The first reinforcing layer and the second reinforcing layer are made of the same material, which is a material with high thermal conductivity and high strength, and has low conductivity or insulation performance.

[0014] Further features are as follows.

[0015] The material of the first reinforcing layer and the second reinforcing layer is silicon.

[0016] The first reinforcing layer is located in the middle position region in the thickness direction of the substrate, and the distance between the upper surface of the first reinforcing layer and the upper surface of the substrate is equal to the distance between the lower surface of the first reinforcing layer and the lower surface of the substrate, which ensures that the substrate can be used on both sides.

[0017] The second reinforcing layer surrounds the outer periphery of the overall structure composed of the IC chip to form a closed structure.

[0018] Alternatively, the second reinforcing layer is scattered in the corresponding four edge positions of the overall structure composed of the IC chip to form a surrounding structure with gaps.

[0019] The upper surface of the pad is provided with a solder ball or a plated tin-silver layer.

[0020] The packaging method for improving product heat dissipation and warping is used to package the packaging structure for improving product heat dissipation and warping, and the packaging method comprises the following steps.

[0021] S1, embedding a first reinforcing layer in a set region of a substrate;

[0022] S2, pasting an IC chip and a second reinforcing layer on the upper surface of the substrate, and then plastic packaging the upper surface of the substrate by a plastic package;

[0023] S3, leading out the electrical signal of the IC chip;

[0024] S4, cutting into a single Die.

[0025] In step S1, a groove is etched on the substrate, and then a first strengthening layer is embedded in the etched groove. Then, the upper area of ​​the etched groove is filled with the same material as the substrate to form an integral substrate.

[0026] Alternatively, before the substrate is formed, the first strengthening layer is pre-set on the corresponding material area of ​​the substrate, and the remaining plastic packaging material of the substrate covers the first strengthening layer, and then enters the mold to complete the overall plastic packaging to obtain the entire substrate;

[0027] Step S3 includes the following steps: setting a first passivation glue layer, exposing the circuit position through a mask, then rewiring, then setting a second passivation glue layer, and exposing the pad position through a process glue, and finally planting balls or electroplating a tin-silver layer on the pad.

[0028] After adopting the structure of the present invention, the first strengthening layer fills the inner cavity of the substrate, and the second strengthening layer is provided on the upper surface of the substrate corresponding to the four sides of the IC chip, which makes the substrate have anti-warping performance. In addition, the second strengthening layer is provided around the IC chip. Since the first strengthening layer and the second strengthening layer are made of the same material with high thermal conductivity and high strength, the heat generated by the IC chip can be reliably dissipated to the periphery through the strengthening layer, which is beneficial to reducing product warping, increasing the product's heat dissipation capacity, and improving packaging reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a schematic structural diagram of a specific embodiment of the present invention;

[0030] Figure 2 This is a schematic structural diagram of a second specific embodiment of the present invention;

[0031] Figure 3 is a schematic diagram of arrangement mode 1 of the second strengthening layer of the present invention;

[0032] Figure 4 is a schematic diagram of a second arrangement of the second strengthening layer of the present invention;

[0033] Figure 5 Schematic diagram of the process of the method of the present invention;

[0034] The names corresponding to the serial numbers in the figure are as follows:

[0035] Substrate 10 , IC chip 20 , second strengthening layer 30 , plastic package 40 , first passivation adhesive layer 50 , second passivation adhesive layer 60 , pad 70 , first strengthening layer 80 , wiring 90 , planting ball 100 , electroplated tin-silver layer 110 . DETAILED DESCRIPTION

[0036] A packaging structure that improves product heat dissipation and warping, see Figures 1-4, which includes a substrate 10, an IC chip 20, a second strengthening layer 30, a plastic package 40, a first passivation glue layer 50, a second passivation glue layer 60, and a pad 70;

[0037] The substrate 10 has a first strengthening layer 80 built into it;

[0038] An IC chip 20 is arranged on the substrate 10 directly above the first strengthening layer 80. A plurality of assembled second strengthening layers 30 are arranged around the periphery of the IC chip 20. A plastic encapsulation body 40 is filled on the surface of the substrate 10 where the IC chip 20 is arranged. The plastic encapsulation body 40 is filled in the area between the IC chip 20 and the second strengthening layer 30. The second strengthening layer 30 and the plastic encapsulation body 40 are arranged at the same height as the IC chip 20 to form an equivalent packaging plane. A first passivation adhesive layer 50 is stacked on the equivalent packaging plane. The first passivation adhesive layer 50 is provided with a wiring 90. The bottom of the wiring 90 is connected to the IC chip 20. The upper layer of the wiring 90 is exposed and connected to the corresponding pad 70. The upper surface of the first passivation adhesive layer 50 is provided with a second passivation adhesive layer 60. The upper surface of the pad 70 is protruding from the second passivation adhesive layer 60.

[0039] The first strengthening layer 80 and the second strengthening layer 30 are made of the same material, which is a material with high thermal conductivity and high strength, and has low electrical conductivity or insulation properties;

[0040] The first strengthening layer 80 and the second strengthening layer 30 are made of silicon;

[0041] The first strengthening layer 80 is located in the middle area of ​​the thickness direction of the substrate 10. The distance between the upper surface of the first strengthening layer 80 and the upper surface of the substrate 10 is equal to the distance between the lower surface of the first strengthening layer 80 and the lower surface of the substrate 10, which ensures that the substrate 10 can be double-sided.

[0042] Specific embodiment 1, see Figure 1 and Figure 3 The second strengthening layer 30 is disposed around the periphery of the overall structure composed of the IC chip 20 to form a closed structure; the ball 100 is planted on the upper surface of the pad 70 .

[0043] Specific embodiment 2, see Figure 2 and Figure 4 The second strengthening layer 30 is composed of four independent strengthening structures distributed on the corresponding four sides of the overall structure composed of the IC chip 20 to form an enclosed structure with gaps; the upper surface of the pad 70 is provided with an electroplated tin-silver layer 110.

[0044] Packaging methods to improve product heat dissipation and warpage, see Figure 5 :It is used to improve the heat dissipation of products and the packaging of the warping packaging structure, and includes the following steps:

[0045] S1, embedding a first strengthening layer 80 in a set area of ​​the substrate 10;

[0046] Etching the groove on the substrate 10, then embedding the first reinforcing layer 80 into the etched groove, then filling the upper area of the etched groove with the same material of the substrate 10, forming the whole substrate 10;

[0047] Or, before the substrate 10 is shaped, the first reinforcing layer 80 is preset on the corresponding material area of the substrate 10, and the remaining plastic sealing material of the substrate 10 covers the first reinforcing layer 80, then the whole plastic sealing is completed in the mold to obtain the whole substrate 10;

[0048] S2, the IC chip 20 and the second reinforcing layer 30 are pasted on the upper surface of the substrate 10, and then the upper surface of the substrate 10 is plastic sealed by the plastic sealing body 40;

[0049] S3, the electrical signal of the IC chip 20 is led out;

[0050] The first passivation glue layer 50 is set, the circuit position is exposed through the mask, then the rewiring 90 is set, then the second passivation glue layer 60 is set, and the pad 70 position is exposed through the process glue, and finally the ball 100 or the tin-silver layer 110 is plated on the pad 70;

[0051] S4, cutting into a single Die.

[0052] The beneficial effects are as follows: the first reinforcing layer is filled in the inner cavity of the substrate, and the second reinforcing layer is arranged around the IC chip on the upper surface of the substrate, which makes the substrate have the anti-warping performance, and the second reinforcing layer is arranged around the IC chip, and the first reinforcing layer and the second reinforcing layer are made of the same material, which is a material with high thermal conductivity and high strength, so that the heat generated by the IC chip can be reliably dispersed to the periphery through the reinforcing layer, which is beneficial to reduce the product warping, and is beneficial to increase the product heat dissipation capacity and improve the packaging reliability.

[0053] It is apparent for those skilled in the art that the present application is not limited to the details of the above-described exemplary embodiments, but can be implemented in other concrete forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered in all respects as illustrative and not restrictive, the scope of the present application being defined by the appended claims rather than the above description, and it is intended to include all changes falling within the meaning and scope of equivalents of the claims. Any reference signs in the claims should not be considered as limiting the claims involved.

[0054] Furthermore, it should be understood that although the specification is described in terms of embodiments, not every embodiment includes every feature described. The specification can include implicit combinations of explicitly mentioned features and / or explicit combinations of implicitely mentioned features. Each embodiment depends on the explicit combinations of features and / or the implicit combinations of features made specifically within that embodiment, and each such embodiment can be combined with every other such embodiment to create further embodiments.

Claims

1. A packaging structure for improving heat dissipation and warping of a product, characterized in that: It includes: a substrate having a first strengthening layer built therein; IC chips; Second reinforcement layer; Plastic packaging; First passivation glue layer; Second passivation glue layer; and pads; An IC chip is arranged on the substrate directly above the first strengthening layer, and a plurality of assembled second strengthening layers are arranged around the periphery of the IC chip. The plastic encapsulation body is filled on the surface of the substrate where the IC chip is arranged, and is filled in the area between the IC chip and the second strengthening layer. The height of the second strengthening layer and the plastic encapsulation body is flush with the height of the IC chip to form an equivalent packaging plane. The first passivation adhesive layer is stacked on the equivalent packaging plane. The first passivation adhesive layer is provided with wiring, the bottom of the wiring is connected to the IC chip, the upper layer of the wiring is exposed and connected to the corresponding pad, the upper surface of the first passivation adhesive layer is provided with the second passivation adhesive layer, and the upper surface of the pad is protruding from the second passivation adhesive layer. The first strengthening layer and the second strengthening layer are made of the same material, which is a material with high thermal conductivity and high strength, and has low electrical conductivity or insulation performance.

2. The packaging structure for improving product heat dissipation and warping according to claim 1, characterized in that: The first strengthening layer and the second strengthening layer are made of silicon.

3. The packaging structure for improving heat dissipation and warping of a product according to claim 1, characterized in that: The first strengthening layer is located in the middle of the substrate in the thickness direction, and the distance between the upper surface of the first strengthening layer and the upper surface of the substrate is equal to the distance between the lower surface of the first strengthening layer and the lower surface of the substrate.

4. The packaging structure for improving product heat dissipation and warping according to claim 1, characterized in that: The second strengthening layer is arranged around the periphery of the overall structure composed of the IC chip to form a closed structure.

5. The packaging structure for improving product heat dissipation and warping according to claim 1, characterized in that: The second strengthening layer consists of four independent strengthening structures distributed on the corresponding four sides of the overall structure composed of the IC chip to form an enclosed structure with gaps.

6. The packaging structure for improving heat dissipation and warping of a product according to claim 1, characterized in that: The upper surface of the pad is provided with a ball planting or an electroplated tin-silver layer.

7. A packaging method for improving product heat dissipation and warpage, which is used to package the packaging structure for improving product heat dissipation and warpage according to any one of claims 1 to 6, characterized in that: It includes the following steps: S1. embedding a first strengthening layer in a set area of ​​the substrate; S2, pasting the IC chip and the second strengthening layer on the upper surface of the substrate, and then plastic-sealing the upper surface of the substrate with a plastic sealing body; S3, lead out the electrical signal of the IC chip; S4. Cut into single dies.

8. The packaging method for improving product heat dissipation and warpage according to claim 7, wherein: In step S1 , a groove is etched on the substrate, and then a first strengthening layer is embedded in the etched groove. Then, the upper area of ​​the post-etched groove is filled with the same material as the substrate to form an integral substrate.

9. The packaging method for improving product heat dissipation and warpage according to claim 7, wherein: In step S1 , before the substrate is formed, a first strengthening layer is preset in a corresponding material area of ​​the substrate, and the remaining molding compound of the substrate covers the first strengthening layer, and then enters a mold to complete the overall molding to obtain an integral substrate.

10. The packaging method for improving heat dissipation and warping of a product according to claim 7, characterized in that: Step S3 includes the following steps: setting a first passivation glue layer, exposing the circuit position through a mask, then rewiring, then setting a second passivation glue layer, and exposing the pad position through a process glue, and finally planting balls or electroplating a tin-silver layer on the pad.

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