Video decoder device based on V4L2 and control method thereof

Abstract

The invention discloses a video decoder device based on V4L2 (Video 4L2). The video stream analysis module, the decoding state control module, the DPB management module and the register content generation module are functional modules realized by software and are located in a Linux user space. And the V4L2 video equipment driver framework is a function module realized by software and is positioned in a Linux kernel space. The hardware video decoder module is a hardware module. The work of most control software of the stateless hardware video decoder is realized in the Linux user space, interaction with the V4L2 video equipment drive program framework located in the Linux kernel space is carried out only by the transfer control register group, the realization difficulty of the control software is reduced, the software function debugging and upgrading are more convenient, and the implementation efficiency is improved. And when problems occur, the stability of the whole Linux system is not influenced generally. And meanwhile, control software of the Linux user space can be realized in a closed source manner, so that intellectual property can be protected.

Description

Technical Field

[0001] The present application relates to a digital video decoder. Background Art

[0002] Video decoding is the inverse process of video encoding, which is to parse, dequantize, and inversely transform the encoded video data (usually called bitstream or video stream to be decoded) according to the rules set during encoding, and finally restore the original video signal.

[0003] The Decoded Picture Buffer (DPB) is a buffer in the video decoder for storing decoded video frames. The video decoder stores the decoded video frames in the DPB and manages them as needed. The decoded video frames in the DPB can be used as reference frames for the video frames to be decoded and participate in the decoding process, or they can be output to the display end for display.

[0004] V4L2 (Video For Linux 2) is a driver framework for video device management in the Linux kernel, which provides a unified interface for applications to access underlying video devices. V4L2 allows applications to access and control video devices through a unified interface, enabling developers to write video processing applications that are independent of hardware devices, improving the portability and reusability of the code and accelerating the development process of video processing software.

[0005] From the perspective of hardware implementation, hardware video decoders can be divided into stateful decoders and stateless decoders. Stateful hardware video decoders are generally composed of hardware accelerator modules and microcontroller modules. Stateless hardware video decoders generally do not contain microcontroller modules, but only consist of hardware accelerator modules. Many control functions of stateless hardware video decoders need to be completed by control software running on the CPU.

[0006] On an embedded device based on the Linux kernel, when designing a stateless hardware video decoder based on the V4L2 video device driver framework, the control software (part or all of the work such as parsing of the video stream, maintenance of video stream decoding status information, management of the DPB, etc.) is generally implemented as a Linux kernel module, which will bring the following disadvantages.

[0007] First, when an application controls a stateless hardware video decoder through the V4L2 video device driver framework, it needs to pre-define a large number of V4L2 control primitives that vary according to different encoding standards and are closely related to the syntax of the encoding standards, which is a lot of work.

[0008] Second, since the Linux kernel follows the GPL open source agreement, this requires that the control software of the stateless hardware video decoder based on V4L2 must also follow the GPL open source agreement, which is not conducive to protecting the manufacturer's software intellectual property rights and may lead to the loss of core algorithms and technologies (video stream parsing, DBP management, etc.).

[0009] Third, the upgrade and debugging of the control software of the V4L2-based stateless hardware video decoder are bound to the upgrade and debugging of the Linux kernel module, which is inconvenient to operate. Once a problem occurs, it is easy to affect the stability of the entire Linux system. Summary of the invention

[0010] The technical problem to be solved by this application is to develop a video decoder device based on the V4L2 video device driver framework, including a stateless hardware video decoder, so as to overcome the shortcomings of the existing control software upgrade and debugging inconvenience, while protecting the manufacturer's core algorithms and technologies.

[0011] To solve the above technical problems, the present application proposes a video decoder device based on V4L2, including a video stream parsing module, a decoding state control module, a DPB management module, a register content generation module, a V4L2 video device driver framework, and a hardware video decoder module. The video stream parsing module, the decoding state control module, the DPB management module, and the register content generation module are functional modules implemented by software and are located in the Linux user space. The V4L2 video device driver framework is a functional module implemented by software and is located in the Linux kernel space. The hardware video decoder module is a hardware module. The video stream parsing module is used to parse the video stream to be decoded, separate the video stream to be decoded into video stream header information and video frames to be decoded, and provide them to the decoding state control module and the V4L2 video device driver framework respectively. The decoding state control module is used to parse the video stream header information, and generate decoder control information in combination with the reference frame management information provided by the DPB management module and provide it to the register content generation module; it is also used to generate DPB control information based on the content of the video stream header information, and provide it to the DPB management module for updating the control parameters of the DPB management module. The DPB management module is used to perform DPB management on the decoded video images provided by the V4L2 video device driver framework, and generate reference frame management information to provide to the decoding state control module for subsequent decoding of the video stream header information to be decoded; it is also used to output the decoded video images. The register content generation module is used to generate a control register group corresponding to each video frame to be decoded by the hardware video decoder module using the decoder control information provided by the decoding state control module, and provide it to the V4L2 video device driver framework. The V4L2 video device driver framework is used to transmit the video frame to be decoded and the corresponding control register group to the hardware video decoder module, and after the video frame decoding is completed, collect the corresponding decoded video image and provide it to the DPB management module. The hardware video decoder module is used to decode the video frame to be decoded under the control of the control register group of each video frame to be decoded; it is also used to generate the corresponding decoded video image after the video frame decoding is completed.

[0012] Furthermore, the V4L2 video device driver framework is the only interface for functional modules implemented by other software to access the hardware video decoder module.

[0013] Furthermore, the hardware video decoder module is a stateless hardware video decoder.

[0014] Furthermore, the register content generation module and the V4L2 video device driver framework transmit the control register group information used in decoding each video frame through a shared command cache; the shared command cache is a cache area on the memory, which can be accessed by both the Linux user space and the Linux kernel space through memory mapping.

[0015] Furthermore, before decoding each video frame, the register content generation module writes the control register group information used in decoding the video frame into the shared command cache, and the V4L2 video device driver framework reads the control register group information in the shared command cache and transmits it to the hardware video decoder for use in decoding.

[0016] Furthermore, the V4L2 video device driver framework pre-allocates one or more v4l2_buffer structures for software encapsulation of video frames to be decoded; each v4l2_buffer structure is only used to encapsulate one video frame to be decoded; when the number of video frames to be decoded exceeds the number of v4l2_buffer structures, the v4l2_buffer structure is recycled, that is, the v4l2_buffer structure corresponding to the decoded video frame is recycled and used to encapsulate the next video frame to be decoded and used for its decoding process.

[0017] Furthermore, each v4l2_buffer structure has a one-to-one correspondence with a shared command buffer, and the shared command buffer is used to store the control register group information of the video frame to be decoded encapsulated by the corresponding v4l2_buffer structure.

[0018] Furthermore, a shared command buffer is composed of two parts: a shared command buffer header and a shared command buffer load; the content of the shared command buffer header is generated when the shared command buffer is allocated; the content of the shared command buffer load is generated before decoding each video frame to be decoded; the shared command buffer load part includes one or more subframe register group information. When decoding a video frame to be decoded, if it is not divided into multiple subframes, the entire video frame is regarded as a subframe, and the shared command buffer load part of the shared command buffer only stores one subframe register group information; if the video frame to be decoded is divided into multiple subframes for decoding, the shared command buffer load part of the shared command buffer stores a corresponding number of multiple subframe register group information, and each subframe corresponds to a subframe register group information.

[0019] Furthermore, during the video frame decoding process, if the number of subframes divided by a certain video frame to be decoded is less than or equal to the maximum capacity of the subframe register group of the shared command cache corresponding to the v4l2_buffer structure that encapsulates the video frame, each subframe corresponds to a subframe register group information in the shared command cache, and the actual capacity of the subframe register group in the shared command cache is equal to the number of subframes divided by the video frame to be decoded. If the number of subframes divided by a certain video frame to be decoded is greater than the maximum capacity of the subframe register group of the shared command cache corresponding to the v4l2_buffer structure that encapsulates the video frame, the old shared command cache is destroyed and a new shared command cache is reallocated, and the new shared command cache satisfies that the maximum capacity of the subframe register group is greater than or equal to the number of subframes divided by the video frame to be decoded, and is used to store the subframe register group information corresponding to each subframe of the video frame to be decoded.

[0020] The present application also proposes a control method for a video decoder based on V4L2, comprising the following steps. Step S1: The video stream parsing module parses the video stream to be decoded, separates the video stream to be decoded into video stream header information and video frames to be decoded, and provides them to the decoding state control module and the V4L2 video device driver framework respectively. Step S2: The decoding state control module parses the video stream header information, and combines the reference frame management information provided by the DPB management module to generate decoder control information and provide it to the register content generation module; at the same time, the decoding state control module also generates DPB control information based on the content of the video stream header information, and provides it to the DPB management module for updating the control parameters of the DPB management module. Step S3: The register content generation module uses the decoder control information provided by the decoding state control module to generate a control register group corresponding to the video frame to be decoded, and provides it to the V4L2 video device driver framework for controlling the decoding process of the video frame to be decoded by the hardware video decoder module. Step S4: Before decoding the video frame, the V4L2 video device driver framework transmits the video frame to be decoded and the corresponding control register group to the hardware video decoder module. Step S5: The hardware video decoder module decodes each video frame to be decoded under the control of its corresponding control register group; after the decoding of the video frame to be decoded is completed, the hardware video decoder module generates its corresponding decoded video image. Step S6: After the decoding of the video frame is completed, the V4L2 video device driver framework collects the decoded video image corresponding to the decoded video frame and sends it to the DPB management module. Step S7: The DPB management module performs DPB management on the decoded video image, generates reference frame management information and provides it to the decoding state control module for subsequent decoding of the video stream header information to be decoded; at the same time, the DPB management module also outputs the decoded video image.

[0021] The technical effect achieved by the present application is: most of the control software work of the stateless hardware video decoder is implemented in the Linux user space, and the control of the stateless hardware video decoder is realized only by passing the control register group to interact with the V4L2 video device driver framework located in the Linux kernel space. The method proposed in the present application does not require pre-definition of a large number of V4L2 control primitives, which greatly reduces the difficulty of implementing the control software. At the same time, since most of the control software work is implemented in the Linux user space, it is not necessary to comply with the GPL open source agreement and can be implemented in a closed source manner, which is conducive to protecting the manufacturer's software intellectual property rights and core technology algorithms. In addition, most of the control software work is implemented in the Linux user space, which makes software function debugging and upgrading more convenient, and when problems occur, it generally does not affect the stability of the entire Linux system. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a structural diagram of a video decoder device based on V4L2 proposed in this application.

[0023] Figure 2 It is a schematic diagram of the format of the shared command cache proposed in this application.

[0024] Figure 3 It is a flowchart of the V4L2-based video decoder method proposed in this application.

[0025] Explanation of the reference numerals in the figure: video stream parsing module 11, decoding state control module 12, DPB management module 13, register content generation module 14, V4L2 video device driver framework 15, hardware video decoder module 16. DETAILED DESCRIPTION

[0026] See also Figure 1 The V4L2-based video decoder device proposed in this application is mainly composed of a video stream parsing module 11, a decoding state control module 12, a DPB management module 13, a register content generation module 14, a V4L2 video device driver framework 15, and a hardware video decoder module 16. The first five modules are functional modules implemented by software, and the last module is a hardware module. Among them, the V4L2 video device driver framework 15 is located in the Linux kernel space and is implemented by the Linux kernel module. The remaining software-implemented functional modules are all located in the Linux user space, and can be implemented without the Linux kernel module, and do not need to comply with the GPL open source agreement, and can be implemented in a closed source manner.

[0027] The video stream parsing module 11 is used to parse the video stream to be decoded, separate the video stream to be decoded into video stream header information and video frames to be decoded, and provide them to the decoding state control module 12 and the V4L2 video device driver framework 15 respectively.

[0028] The decoding state control module 12 is used to parse (decode) the video stream header information, and generate decoder control information in combination with the reference frame management information provided by the DPB management module 13, and provide it to the register content generation module 14. The decoding state control module 12 is also used to generate DPB control information based on the content of the video stream header information, and provide it to the DPB management module 13 for updating the control parameters of the DPB management module 13.

[0029] The DPB management module 13 is used to perform DPB management on the decoded video images provided by the V4L2 video device driver framework 15, and generate reference frame management information to provide to the decoding state control module 12 for subsequent decoding of the video stream header information to be decoded. The DPB management module 13 is also used to output the decoded video images that can be displayed for display on the display terminal.

[0030] The register content generation module 14 is used to generate a control register group for controlling the hardware video decoder module 16 to decode the video frame to be decoded using the decoder control information provided by the decoding state control module 12, and provide it to the V4L2 video device driver framework 15.

[0031] The V4L2 video device driver framework 15 is the only interface for the functional modules implemented by other software to access the hardware video decoder module 16. It is responsible for transmitting the video frames to be decoded and the corresponding control register groups to the hardware video decoder module 16 for decoding, and after the video frame decoding is completed, it collects the corresponding decoded video images and provides them to the DPB management module 13.

[0032] The hardware video decoder module 16 is a stateless hardware video decoder used to complete the actual video decoding work. The hardware video decoder module 16 is used to decode the video frame to be decoded under the control of the control register group of each video frame to be decoded; and is also used to generate a corresponding decoded video image after the video frame decoding is completed.

[0033] In the present application, the control register group information required for decoding each video frame is transmitted between the register content generation module 14 located in the Linux user space and the V4L2 video device driver framework 15 located in the Linux kernel space through the "shared command cache" mechanism. The shared command cache is a cache area on the memory of an embedded device based on the Linux kernel, which is used to store the control register group information when decoding the video frame. The shared command cache is accessed by both the register content generation module 14 located in the Linux user space and the V4L2 video device driver framework 15 located in the Linux kernel space through memory mapping (mmap for short). For example, the shared command cache is allocated in the Linux kernel space, can be accessed in the Linux kernel space, and is mapped to the Linux user space through memory mapping for access by the Linux user space.

[0034] Before decoding each video frame, the register content generation module 14 writes the control register group information required for decoding the video frame into the shared command cache, and then the V4L2 video device driver framework 15 reads the control register group information in the shared command cache and transmits it to the hardware video decoder 16 for use in decoding.

[0035] The V4L2 video device driver framework 15 pre-allocates one or more v4l2_buffer structures to be used for software encapsulation of the video frames to be decoded, so that the V4L2 video device driver framework 15 can manage them. Each v4l2_buffer structure is only used to encapsulate one video frame to be decoded. Each v4l2_buffer structure has a unique serial number, which is used to identify and distinguish different v4l2_buffer structures. Assuming that N v4l2_buffer structures are allocated, the serial number is 0, 1, 2, ..., N-1. When the number of video frames to be decoded exceeds the number of v4l2_buffer structures, these v4l2_buffer structures will be recycled, that is, the v4l2_buffer structures corresponding to the decoded video frames are recycled, used to encapsulate the next video frame to be decoded, and used for its decoding process.

[0036] Each v4l2_buffer structure has a one-to-one correspondence with a shared command buffer, which is used to store the control register group information of the video frame to be decoded encapsulated by the corresponding v4l2_buffer structure. The serial number of the shared command buffer is equal to the serial number of the corresponding v4l2_buffer structure. Therefore, the number of v4l2_buffer structures is consistent with the number of shared command buffers.

[0037] See also Figure 2 ,A shared command buffer consists of two parts: a shared command buffer header and a shared command buffer payload. The content of the shared command buffer header is generated when the shared command buffer is allocated; the content of the shared command buffer payload is generated before decoding of each video frame to be decoded. Figure 2 The "subframe register group" in contains the control register group corresponding to the decoding of a subframe of the video frame to be decoded. When decoding the video frame to be decoded, if it is not divided into multiple subframes, the entire video frame can be regarded as a subframe, and only one subframe register group information needs to be saved in the shared command cache; if the video frame to be decoded is divided into multiple subframes for decoding, multiple subframe register group information will be saved in the shared command cache, and each subframe will correspond to one subframe register group information.

[0038] Figure 2 In the shared command cache, the meanings of the various fields are as follows. The shared command cache serial number is a unique identifier of a shared command cache, which is the same as the serial number of the v4l2_buffer structure corresponding to the shared command cache. The shared command cache size refers to the memory size occupied by the shared command cache, in bytes. The shared command cache offset refers to the offset used by the shared command cache when performing memory mapping. The maximum capacity of the subframe register group refers to the maximum number of subframe register groups that can be saved in the shared command cache, that is, the maximum number of subframes that the shared command cache supports and can divide the video frame to be decoded. The actual capacity of the subframe register group refers to the number of subframe register groups actually saved in the shared command cache, that is, the number of subframes actually divided when the video frame to be decoded is decoded. Decoding auxiliary control information means that in addition to the register group information, the shared command cache can also pass some decoding auxiliary control information to control the state of the hardware video decoder. For example, auxiliary control information for DVFS (Dynamic Voltage and Frequency Scaling) can be passed. The subframe register group information refers to the control register group information corresponding to a subframe of a video frame to be decoded. If the video frame to be decoded is divided into several subframes for decoding, there will be several subframe register group information in the shared command buffer, and each subframe corresponds to one subframe register group information.

[0039] During the video frame decoding process, if the number of subframes divided by a certain video frame to be decoded is less than or equal to the maximum capacity of the subframe register group of the shared command cache corresponding to the v4l2_buffer structure that encapsulates the video frame, each subframe will correspond to a subframe register group information in the shared command cache, and the actual capacity of the subframe register group in the shared command cache is equal to the number of subframes divided by the video frame to be decoded. If the number of subframes divided by a certain video frame to be decoded is greater than the maximum capacity of the subframe register group of the shared command cache corresponding to the v4l2_buffer structure that encapsulates the video frame, the old shared command cache needs to be destroyed and a new shared command cache is reallocated, and it satisfies that the maximum capacity of the subframe register group is greater than or equal to the number of subframes divided by the video frame to be decoded, and is used to save the subframe register group information corresponding to each subframe of the video frame to be decoded.

[0040] The shared command cache mechanism described above can flexibly support the situation where the video frame to be decoded is divided into one or more subframes for decoding, and there is no need to extend or modify the existing V4L2 video device driver framework 15, making software function expansion and upgrading more convenient.

[0041] See also Figure 3 The control method of the video decoder based on V4L2 proposed in this application includes the following steps. Figure 3 The method shown corresponds to Figure 1 The device shown.

[0042] Step S1: the video stream parsing module 11 parses the video stream to be decoded, separates the video stream to be decoded into video stream header information and video frames to be decoded, and provides them to the decoding state control module 12 and the V4L2 video device driver framework 15 respectively.

[0043] Step S2: The decoding state control module 12 parses the video stream header information, and generates decoder control information in combination with the reference frame management information provided by the DPB management module 13, and provides it to the register content generation module 14. At the same time, the decoding state control module 12 also generates DPB control information based on the content of the video stream header information, and provides it to the DPB management module 13 for updating the control parameters of the DPB management module 13.

[0044] Step S3: The register content generation module 14 generates a control register group corresponding to the video frame to be decoded using the decoder control information provided by the decoding state control module 12, and provides it to the V4L2 video device driver framework 15 for controlling the hardware video decoder module 16 to decode the video frame to be decoded.

[0045] Step S4: Before decoding the video frame, the V4L2 video device driver framework 15 transmits the video frame to be decoded and the corresponding control register set to the hardware video decoder module 16.

[0046] Step S5: The hardware video decoder module 16 decodes each to-be-decoded video frame under the control of its corresponding control register group. After the to-be-decoded video frame is decoded, the hardware video decoder module 16 generates its corresponding decoded video image.

[0047] Step S6: After the video frame decoding is completed, the V4L2 video device driver framework 15 collects the decoded video image corresponding to the decoded video frame and sends it to the DPB management module 13.

[0048] Step S7: The DPB management module 13 performs DPB management on the decoded video image, generates reference frame management information and provides it to the decoding state control module 12 for subsequent decoding of the video stream header information to be decoded. At the same time, the DPB management module 13 also outputs the displayable decoded video image for display on the display terminal.

[0049] The steps S1 to S4 are all performed before the video frame is decoded, and the steps S6 to S7 are all performed after the video frame is decoded.

[0050] Compared with the prior art, the present application has the following beneficial effects.

[0051] First, in the present application, the decoding state control module 12 generates a control register group for controlling the decoding process of the video frame through the register content generation module 14. Among the various software modules located in the Linux user space, only the register content generation module 14 interacts with the V4L2 video device driver framework 15 located in the Linux kernel space, and during the interaction, only the control register group needs to be transferred, without pre-defining a large number of V4L2 control primitives that vary according to different coding standards, which greatly reduces the difficulty of implementing the control software.

[0052] Second, in this application, only the V4L2 video device driver framework 15 is located in the Linux kernel space. The video stream parsing module 11, the decoding state control module 12, the DPB management module 13, and the register content generation module 14 are all located in the Linux user space, and do not need to comply with the GPL open source agreement, and can be implemented in a closed source manner, which is conducive to protecting the manufacturer's software intellectual property rights and core technology algorithms.

[0053] Third, in this application, the video stream parsing module 11, the decoding state control module 12, the DPB management module 13, and the register content generation module 14 are all located in the Linux user space, rather than in the Linux kernel space, so that software function debugging and upgrading are more convenient, and when problems occur, they generally do not affect the stability of the entire Linux system.

[0054] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should all be included in the protection scope of the present application.

Claims

1. A video decoder device based on V4L2, characterized in that: Including video stream parsing module, decoding state control module, DPB management module, register content generation module, V4L2 video device driver framework, hardware video decoder module; The video stream parsing module, decoding state control module, DPB management module, and register content generation module are functional modules implemented by software and are located in the Linux user space; The V4L2 video device driver framework is a functional module implemented by software and is located in the Linux kernel space; The hardware video decoder module is a hardware module; The video stream parsing module is used to parse the video stream to be decoded, separate the video stream to be decoded into video stream header information and video frames to be decoded, and provide them to the decoding state control module and the V4L2 video device driver framework respectively; The decoding state control module is used to parse the video stream header information and, in combination with the reference frame management information provided by the DPB management module, generate decoder control information and provide it to the register content generation module; it is also used to generate DPB control information based on the content of the video stream header information and provide it to the DPB management module for updating the control parameters of the DPB management module; The DPB management module is used to perform DPB management on the decoded video image provided by the V4L2 video device driver framework, and generate reference frame management information to provide to the decoding state control module for subsequent decoding of the video stream header information to be decoded; it is also used to output the decoded video image; The register content generation module is used to generate a control register group of the hardware video decoder module corresponding to each video frame to be decoded using the decoder control information provided by the decoding state control module, and provide the control register group to the V4L2 video device driver framework; The V4L2 video device driver framework is used to transmit the video frame to be decoded and the corresponding control register group to the hardware video decoder module, and after the video frame decoding is completed, the corresponding decoded video image is collected and provided to the DPB management module; The hardware video decoder module is used to decode each video frame to be decoded under the control of the control register group of the video frame to be decoded; and is also used to generate a corresponding decoded video image after the video frame decoding is completed.

2. The V4L2-based video decoder device according to claim 1, wherein: The V4L2 video device driver framework is the only interface for functional modules implemented by other software to access the hardware video decoder module.

3. The V4L2-based video decoder device according to claim 1, wherein: The hardware video decoder module is a stateless hardware video decoder.

4. The V4L2-based video decoder device according to claim 1, wherein: The register content generation module and the V4L2 video device driver framework use a shared command cache to transfer the control register group information used when decoding each video frame; the shared command cache is a cache area on the memory that can be accessed by both the Linux user space and the Linux kernel space through memory mapping.

5. The video decoder device based on V4L2 according to claim 4, characterized in that Before decoding each video frame, the register content generation module writes the control register group information used in decoding the video frame into the shared command buffer. The V4L2 video device driver framework reads the control register group information in the shared command buffer and transmits it to the hardware video decoder for use in decoding.

6. The V4L2-based video decoder device according to claim 4, wherein: The V4L2 video device driver framework pre-allocates one or more v4l2_buffer structures for software encapsulation of video frames to be decoded; each v4l2_buffer structure is used to encapsulate only one video frame to be decoded; when the number of video frames to be decoded exceeds the number of v4l2_buffer structures, the v4l2_buffer structure is recycled, that is, the v4l2_buffer structure corresponding to the decoded video frame is recycled and used to encapsulate the next video frame to be decoded and used in its decoding process.

7. The V4L2-based video decoder device according to claim 6, wherein: Each v4l2_buffer structure has a one-to-one correspondence with a shared command buffer, which is used to store the control register group information of the video frame to be decoded encapsulated by the corresponding v4l2_buffer structure.

8. The V4L2-based video decoder device according to claim 7, wherein: A shared command buffer consists of a shared command buffer header and a shared command buffer payload. The shared command buffer header is generated when the shared command buffer is allocated. The shared command buffer payload is generated before each video frame to be decoded. The shared command buffer payload includes information about one or more sub-frame register groups. When decoding a video frame to be decoded, if it is not divided into multiple sub-frames, the entire video frame is regarded as a sub-frame, and the shared command cache load part of the shared command cache only stores one copy of the sub-frame register group information; if the video frame to be decoded is divided into multiple sub-frames for decoding, the shared command cache load part of the shared command cache stores a corresponding number of multiple copies of the sub-frame register group information, and each sub-frame corresponds to a copy of the sub-frame register group information.

9. The V4L2-based video decoder device according to claim 8, wherein: During the video frame decoding process, if the number of subframes divided by a video frame to be decoded is less than or equal to the maximum capacity of the subframe register group of the shared command cache corresponding to the v4l2_buffer structure that encapsulates the video frame, each subframe corresponds to a subframe register group information in the shared command cache, and the actual capacity of the subframe register group in the shared command cache is equal to the number of subframes divided by the video frame to be decoded; If the number of subframes divided by a video frame to be decoded is greater than the maximum capacity of the subframe register group of the shared command cache corresponding to the v4l2_buffer structure that encapsulates the video frame, the old shared command cache is destroyed and a new shared command cache is reallocated. The new shared command cache satisfies that the maximum capacity of the subframe register group is greater than or equal to the number of subframes divided by the video frame to be decoded, and is used to save the subframe register group information corresponding to each subframe of the video frame to be decoded.

10. A control method for a video decoder based on V4L2, characterized in that: The method includes the following steps: Step S1: The video stream parsing module parses the video stream to be decoded, separates the video stream to be decoded into video stream header information and video frames to be decoded, and provides them to the decoding state control module and the V4L2 video device driver framework respectively; Step S2: The decoding state control module parses the video stream header information and, in combination with the reference frame management information provided by the DPB management module, generates decoder control information and provides it to the register content generation module. At the same time, the decoding state control module also generates DPB control information based on the content of the video stream header information and provides it to the DPB management module for updating the control parameters of the DPB management module. Step S3: The register content generation module uses the decoder control information provided by the decoding state control module to generate a control register group corresponding to the video frame to be decoded, and provides it to the V4L2 video device driver framework for controlling the hardware video decoder module to decode the video frame to be decoded; Step S4: Before decoding the video frame, the V4L2 video device driver framework transmits the video frame to be decoded and the corresponding control register group to the hardware video decoder module; Step S5: The hardware video decoder module decodes each to-be-decoded video frame under the control of its corresponding control register group; after decoding of the to-be-decoded video frame is completed, the hardware video decoder module generates its corresponding decoded video image; Step S6: After the video frame decoding is completed, the V4L2 video device driver framework collects the decoded video image corresponding to the decoded video frame and sends it to the DPB management module; Step S7: The DPB management module performs DPB management on the decoded video image, generates reference frame management information and provides it to the decoding state control module for subsequent decoding of the header information of the video stream to be decoded; at the same time, the DPB management module also outputs the decoded video image.

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