LED chip with high luminous efficiency and preparation method thereof

Abstract

The invention discloses a high-luminous-efficiency LED chip and a preparation method thereof, and relates to the field of semiconductor photoelectric devices. The preparation method comprises the steps of providing an epitaxial wafer; the device comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer which are stacked in sequence; forming a transparent conductive layer on the epitaxial wafer; etching to form an exposed region exposing the first semiconductor layer; forming a first electrode and a second electrode; wherein the first electrode is formed on the first semiconductor layer in the exposed area, and the second electrode is formed on the second semiconductor layer; taking silicon and copper as target materials, and sputtering to form a first composite film; annealing the first composite film in an oxygen-containing atmosphere at 550-700 DEG C to obtain a second composite film; forming a silicon oxide film on the second composite film; holes are formed in the second composite film and the silicon oxide film in the areas where the first electrode and the second electrode are located, so that the first electrode and the second electrode are at least partially exposed. According to the invention, the light extraction efficiency and reliability of the LED chip can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor optoelectronic devices, and in particular to a high light extraction efficiency LED chip and a preparation method thereof. Background Art

[0002] LED (Light Emitting Diode) is a semiconductor light-emitting device that can convert electrical energy into light energy. With the development and progress of LED chip manufacturing technology, it has gradually become a new mainstream lighting source after incandescent lamps and fluorescent lamps. LED has the advantages of small size, fast response, long life, environmental protection and energy saving, and is widely used in lighting, display screens and other fields. The LED chip is composed of an epitaxial layer and a chip layer. The epitaxial layer generally includes a substrate, an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer; the chip layer is composed of a current blocking layer, a transparent conductive layer, an electrode and a passivation layer from bottom to top. The light of the LED chip is emitted from the epitaxial layer, and is emitted into the air through the transparent conductive layer and the passivation layer. The passivation layer is generally made of SiO2 material and deposited by PECVD equipment. The existing passivation layer is a single film material with a refractive index of about 1.48, an air refractive index of 1, and a transparent conductive layer refractive index of 1.8-2.0. The refractive index of the three is very different, and total reflection is easy to occur, resulting in low light extraction efficiency. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a method for preparing a high light extraction efficiency LED chip, which can improve the light extraction efficiency of the LED chip.

[0004] Another technical problem to be solved by the present invention is to provide an LED chip with high light extraction efficiency.

[0005] In order to solve the above problems, the present invention discloses a method for preparing an LED chip with high light extraction efficiency, which comprises: Providing an epitaxial wafer, the epitaxial wafer comprising a substrate, a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence; forming a transparent conductive layer on the epitaxial wafer; wherein the transparent conductive layer is formed on the second semiconductor layer; Etching to form an exposed area exposing the first semiconductor layer; Forming a first electrode and a second electrode to obtain an intermediate; wherein the first electrode is formed on the first semiconductor layer in the exposed area, and the second electrode is formed on the transparent conductive layer; Using silicon and copper as targets, sputtering to form a first composite film on the surface of the intermediate; annealing the first composite film in an oxygen-containing atmosphere at 550-700° C. to obtain a second composite film; forming a silicon oxide film on the second composite film; Openings are made in the second composite film and the silicon oxide film in the regions where the first electrode and the second electrode are located, so as to at least partially expose the first electrode and the second electrode.

[0006] As an improvement of the above technical solution, in the step of sputtering the first composite film on the surface of the intermediate using silicon and copper as targets, the sputtering power of the copper target is 10-20W, the sputtering power of the silicon target is 30-60W, and the sputtering time is 2-5min; the sputtering gas is Ar, the gas pressure is 4-8mtorr, and the sputtering temperature is 20-50°C; In the step of annealing the first composite film in an oxygen-containing atmosphere at 550-700° C. to obtain the second composite film, the annealing atmosphere is air, the annealing time is 0.3-1 h, and the annealing is performed in a PECVD chamber.

[0007] As an improvement of the above technical solution, with silicon and copper as targets, in the step of sputtering the surface of the intermediate to form the first composite film, the copper target is first sputtered for 10 to 20 seconds, then the copper target and the silicon target are co-sputtered for 2 to 4 minutes, and finally the silicon target is sputtered for 20 to 40 seconds; The step of annealing the first composite film at 550-700° C. in an oxygen-containing atmosphere to obtain the second composite film comprises: Annealing the first composite film once in an Ar or N2 atmosphere at 800-900°C; The first composite film after the primary annealing is subjected to a secondary annealing in an oxygen-containing atmosphere at 550-700° C. to obtain a second composite film.

[0008] As an improvement of the above technical solution, in the step of annealing the first composite film once in an Ar or N2 atmosphere at 800-900°C, the annealing atmosphere is Ar, the annealing time is 5-20 minutes, and the annealing is performed in a PECVD chamber; In the step of performing a secondary annealing on the first composite film after the primary annealing at 550-700° C. in an oxygen-containing atmosphere to obtain a second composite film, the annealing atmosphere is air, the annealing time is 0.3-1 h, and the annealing is performed in a PECVD chamber.

[0009] As an improvement of the above technical solution, in the step of forming a silicon oxide film on the second composite film, a first silicon oxide film and a second silicon oxide film are sequentially formed on the second composite film; The porosity of the first silicon oxide film is smaller than the porosity of the second silicon oxide film; and the thickness of the first silicon oxide film is smaller than the thickness of the second silicon oxide film.

[0010] As an improvement of the above technical solution, the porosity of the first silicon oxide film is 15-30%, and the porosity of the second silicon oxide film is 35-55%; The thickness of the first silicon oxide film is 5-50 nm, and the thickness of the second silicon oxide film is 20-100 nm.

[0011] As an improvement of the above technical solution, the first silicon oxide film and the second silicon oxide film are both formed by PECVD; during the formation process, the radio frequency power is 80-100W, the pressure of the PECVD chamber is 80-120Pa, and the temperature is 200-250°C; The flow ratio of SiH 4 to N 2 O during the formation of the first silicon oxide film is greater than the flow ratio of SiH 4 to N 2 O during the formation of the second silicon oxide film.

[0012] As an improvement of the above technical solution, during the formation of the first silicon oxide film, the flow rate of SiH4 is 400-600 sccm, and the flow rate of N2O is 1800-2000 sccm; During the formation of the second silicon oxide film, the flow rate of SiH4 is 100-300 sccm, and the flow rate of N2O is 1800-2000 sccm.

[0013] As an improvement of the above technical solution, the thickness of the second composite film is 30-50 nm; The transparent conductive layer is an ITO layer or an AZO layer, and its thickness is 40-80 nm.

[0014] Correspondingly, the present invention further discloses a high light extraction efficiency LED chip, which is prepared by the above-mentioned preparation method of the high light extraction efficiency LED chip.

[0015] The implementation of the present invention has the following beneficial effects: In a method for preparing a high light extraction efficiency LED chip according to an embodiment of the present invention, a first composite film of Si-Cu material is firstly sputtered on an epitaxial wafer, and then annealed in an oxygen-containing atmosphere to convert the composite film into SiO2-Cu x O composite film (second composite film), and then a silicon oxide film is formed on the second composite film, and the two together constitute a passivation structure. This passivation structure can cooperate well with the transparent conductive layer to improve the light extraction efficiency; at the same time, the passivation structure also maintains good density, has excellent passivation performance, and improves the reliability of the LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a flow chart of a method for preparing a high light extraction efficiency LED chip according to an embodiment of the present invention; Figure 2 is a schematic structural diagram of an epitaxial wafer in one embodiment of the present invention; Figure 3 is a schematic diagram of the structure of the epitaxial wafer after step S2 in one embodiment of the present invention; Figure 4 is a schematic diagram of the structure of the epitaxial wafer after step S3 in one embodiment of the present invention; Figure 5 is a schematic diagram of the structure of the intermediate after step S4 in one embodiment of the present invention; Figure 6 is a schematic diagram of the structure of the intermediate after step S6 in one embodiment of the present invention; Figure 7 is a schematic diagram of the structure of the intermediate after step S7 in one embodiment of the present invention; Figure 8 is a schematic diagram of the structure of a silicon oxide film in one embodiment of the present invention; Fig. 9 2 is a schematic diagram of the structure of a high light extraction efficiency LED chip according to an embodiment of the present invention; In the figure, 1 is the epitaxial wafer, 11 is the substrate, 12 is the first semiconductor layer, 13 is the active layer, 14 is the second semiconductor layer, 2 is the transparent conductive layer, 3 is the exposed area, 4 is the first electrode, 5 is the second electrode, 6 is the second composite film, 7 is the silicon oxide film, 71 is the first silicon oxide film, 72 is the second silicon oxide film, and 8 is the opening. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limiting the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0018] In the description of the present application, it should be understood that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0019] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0020] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the present application provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use scenarios of other materials.

[0021] See also Figure 1 The present invention discloses a method for preparing a high light extraction efficiency LED chip, which comprises the following steps: S1: Provide epitaxial wafers; See also Figure 2 , the epitaxial wafer 1 includes a substrate 11, and a first semiconductor layer 12, an active layer 13, and a second semiconductor layer 14 sequentially arranged on the substrate 11. Specifically, the LED chip of the present invention may be a red, green, yellow, or purple LED chip, and different types of semiconductor layers and active layers may be selected based on the control of the emission wavelength. Exemplarily, in one embodiment, when the LED chip is a blue LED chip or a green LED chip, the first semiconductor layer 12 may be an N-type GaN layer, the active layer 13 may be an InGaN-GaN type multi-quantum well layer, and the second semiconductor layer 14 may be a P-type GaN layer, but is not limited thereto. In another embodiment, when the LED chip is a purple LED chip, the first semiconductor layer 12 may be an N-type AlGaN layer, the active layer 13 may be an AlGaN-AlGaN type multi-quantum well layer, and the second semiconductor layer 14 may be a P-type AlGaN layer, but is not limited thereto.

[0022] Preferably, in some embodiments, the epitaxial wafer may further include a buffer layer, an electron blocking layer, a P-type contact layer, etc., but is not limited thereto.

[0023] S2: forming a transparent conductive layer on the epitaxial wafer; Specifically, see Figure 3, the transparent conductive layer 2 can be formed by PVD, electron beam evaporation and other processes, but is not limited thereto. Preferably, in some embodiments, the transparent conductive layer is formed by PVD, which can be combined with the subsequent formation process of the first composite film to improve the process efficiency. More preferably, sputtering is performed with an ITO target and / or an AZO target, the sputtering temperature is 20-50°C, the sputtering power is 80-150W, the sputtering gas is Ar, and the gas pressure is 3-5mtorr.

[0024] Specifically, the transparent conductive layer 2 is an ITO layer, an IZO layer, an AZO layer, an ATO layer or an FTO layer, but is not limited thereto. Preferably, it is an AZO layer or an ITO layer. Such a transparent conductive layer 2 can be compounded with sputtered Cu to improve light transmittance and conductivity, thereby improving light extraction efficiency and optimizing current distribution.

[0025] Specifically, the thickness of the transparent conductive layer 2 is 40-100 nm, preferably 40-80 nm.

[0026] S3: etching to form an exposed area exposing the first semiconductor layer; Specifically, see Figure 4 The exposed area 3 may be formed by a photolithography and etching process, or a mask may be formed first and then the exposed area may be formed by etching, but the present invention is not limited thereto.

[0027] Specifically, the etching process may be a wet etching process or a dry etching process (such as ICP or RIE). Preferably, the dry etching process is used for etching.

[0028] Specifically, in some embodiments, the transparent conductive layer, the second semiconductor layer, the active layer and a preset amount of the first semiconductor layer can be removed by an etching process to form an exposed area. Alternatively, the transparent conductive layer can be first removed by an etching process and then a second etching process can be performed to form an exposed area.

[0029] S4: forming a first electrode and a second electrode to obtain an intermediate; Specifically, see Figure 5 The first electrode 4 and the second electrode 5 can be formed by PVD, electron beam evaporation and other processes, but are not limited thereto. The first electrode 4 and the second electrode 5 can be formed simultaneously or step by step.

[0030] Correspondingly, the first electrode 4 and the second electrode 5 have the same or different compositions, and both are composed of one or more of the commonly used Al metal layer, Cr metal layer, Pt metal layer, Ag metal layer, and Au metal layer in the art.

[0031] S5: using silicon and copper as targets, sputtering to form a first composite film on the surface of the intermediate; Specifically, sputtering is performed by a magnetron sputtering process. The sputtering power of the copper target is 10-20 W, the sputtering power of the silicon target is 30-60 W, and the sputtering time is 2-5 min; the sputtering gas is Ar, the gas pressure is 4-8 mtorr, and the sputtering temperature is 20-50 ° C. Based on the above sputtering process, a Si-Cu composite film, i.e., a first composite film, is formed on the surface of the intermediate, and the first composite film covers the surface of the transparent conductive layer 2, the first electrode 4, and the second electrode 5, as well as the side walls of the first semiconductor layer 12, the active layer 13, and the second semiconductor layer 14. It should be noted that the surfaces of the transparent conductive layer 2, the first electrode 4, and the second electrode 5 include the upper surface and the side walls.

[0032] Specifically, the copper target and the silicon target can be sputtered together or in steps. Preferably, in some embodiments, the copper target is sputtered for 10 to 20 seconds, then the copper target and the silicon target are sputtered together for 2 to 4 minutes, and finally the silicon target is sputtered for 20 to 40 seconds. Based on this sputtering process, supplemented by a subsequent specific annealing process, the Cu particles can be fused with part of the transparent conductive layer 2, thereby improving the light transmittance and conductivity of the transparent conductive layer 2 and optimizing its current expansion performance.

[0033] S6: annealing the first composite film in an oxygen-containing atmosphere to obtain a second composite film; Specifically, see Figure 6 By annealing, the Si-Cu composite film can be converted into SiO2-Cu x O composite film (second composite film 6), the second composite film 6 has a high refractive index, which can improve the light extraction efficiency; secondly, it has a high density, which can effectively prevent water vapor from penetrating into the LED chip and improve its reliability; thirdly, it has good insulation, and cooperates with the subsequently formed silicon oxide film 7 to play a good passivation role. Specifically, based on the annealing temperature, oxygen concentration, etc., a SiO2-CuO composite film or a SiO2-Cu2O composite film can be formed. Preferably, the first composite film is converted into a SiO2-Cu2O film, which has a higher density.

[0034] Specifically, the oxygen-containing atmosphere may be air atmosphere, oxygen atmosphere, nitrous oxide atmosphere, but is not limited thereto. Preferably, it is air atmosphere. The annealing temperature is 550-700° C., preferably 550-600° C. The annealing time is 0.1-1 h, preferably 0.3-1 h.

[0035] Specifically, the annealing can be performed in a PECVD chamber to be integrated with the subsequent formation process of the silicon oxide film 7 to improve production efficiency.

[0036] Preferably, in some embodiments, when the copper target is sputtered first, the copper and silicon targets are co-sputtered, and the silicon target is sputtered last, step S6 includes: S61: annealing the first composite film in an Ar or N2 atmosphere; S62: performing a second annealing on the first composite film after the first annealing in an oxygen-containing atmosphere to obtain a second composite film; Based on the above annealing process, firstly, part of the Cu nanoparticles are embedded in the transparent conductive layer during the first annealing process, which optimizes its light transmittance and current spreading performance. Secondly, the first composite film is converted into SiO2-Cu by the second annealing process. x O composite membrane (second composite membrane 6) optimizes various performances.

[0037] Specifically, the primary annealing temperature is 800-900° C., preferably 800-850° C. The primary annealing duration is 5-30 min, preferably 5-20 min. The annealing atmosphere is Ar or N2, preferably Ar.

[0038] Specifically, the oxygen-containing atmosphere during the secondary annealing process may be an air atmosphere, an oxygen atmosphere, or a laughing gas atmosphere, but is not limited thereto. Preferably, it is an air atmosphere. The temperature of the secondary annealing is 550 to 700° C., preferably 550 to 600° C. The duration of the secondary annealing is 0.1 to 1 hour, preferably 0.3 to 1 hour.

[0039] Specifically, the thickness of the second composite film 6 obtained through the above sputtering and annealing process is 20-80 nm, preferably 30-50 nm.

[0040] S7: forming a silicon oxide film on the second composite film; Specifically, see Figure 7 , the silicon oxide film 7 can be formed by MOCVD, PECVD and other processes, but is not limited thereto. Preferably, in some embodiments, the silicon oxide film 7 is formed by PECVD. Specifically, the process gas used includes SiH4, Ar, N2 and / or N2O, the RF power is 80-100W, the deposition temperature is 200-250°C, and the pressure of the PECVD chamber during deposition is 80-120Pa, but is not limited thereto.

[0041] Preferably, see Figure 8In some embodiments, a first silicon oxide film 71 and a second silicon oxide film 72 are sequentially formed on the second composite film 6, wherein the porosity of the first silicon oxide film 71 is less than the porosity of the second silicon oxide film 72; the thickness of the first silicon oxide film 71 is less than the thickness of the second silicon oxide film 72. Based on this arrangement, the light extraction efficiency can be further optimized. It should be noted that by increasing the porosity, the transmittance of the silicon oxide film can be increased, but excessive porosity also makes it at risk of being tunneled, weakening the passivation performance. The present invention first arranges a dense second composite film 6 under the silicon oxide film 7, and then a silicon oxide film 7 with a higher porosity can be used, which optimizes the light extraction efficiency while also ensuring better passivation performance.

[0042] More specifically, the porosity of the first silicon oxide film 71 is 15-30%, and the porosity of the second silicon oxide film 72 is 35-55%; the thickness of the first silicon oxide film 71 is 5-50 nm, and the thickness of the second silicon oxide film 72 is 20-100 nm. The first silicon oxide film 71 has a relatively small thickness, which can optimize the light transmittance and improve the overall formation efficiency of the silicon oxide film 7.

[0043] Specifically, in order to form the first silicon oxide film 71 and the second silicon oxide film 72 with the above porosity, the SiH4 / N2O (volume flow ratio) during the formation of the first silicon oxide film 71 is controlled to be greater than the SiH4 / N2O (volume flow ratio) during the formation of the second silicon oxide film 72.

[0044] More specifically, during the formation of the first silicon oxide film 71, the flow rate of SiH4 is 400-600 sccm, the flow rate of N2O is 1800-2000 sccm, the RF power is 80-100 W, the pressure of the PECVD chamber is 80-120 Pa, and the temperature is 200-250° C. During the formation of the second silicon oxide film 72, the flow rate of SiH4 is 100-300 sccm, the flow rate of N2O is 1800-2000 sccm, the RF power is 80-100 W, the pressure of the PECVD chamber is 80-120 Pa, and the temperature is 200-250° C.

[0045] S8: Opening holes in the second composite film and the silicon oxide film in the regions where the first electrode and the second electrode are located to at least partially expose the first electrode and the second electrode.

[0046] Specifically, see Fig. 9 The opening 8 may be formed by a photolithography and etching process, or a mask may be formed first and then the opening 8 may be formed by etching, but the present invention is not limited thereto.

[0047] Specifically, the etching process may be a wet etching process or a dry etching process (such as ICP or RIE). Preferably, the dry etching process is used for etching.

[0048] In summary, in the method for preparing a high light extraction efficiency LED chip according to an embodiment of the present invention, a first composite film of Si-Cu material is firstly sputtered on an epitaxial wafer, and then annealed in an oxygen-containing atmosphere to convert it into SiO2-Cu x O composite film (second composite film 6), and then a silicon oxide film 7 is formed on the second composite film 6, and the two together form a passivation structure, which can cooperate well with the transparent conductive layer 2 to improve the light extraction efficiency. At the same time, the passivation structure also maintains good compactness, has excellent passivation performance, and improves the reliability of the LED chip.

[0049] Correspondingly, the present invention also discloses a high light extraction efficiency LED chip, which is prepared by the above-mentioned preparation method.

[0050] The present invention will be further described below with specific embodiments: Example 1 This embodiment provides a method for preparing an LED chip with high light extraction efficiency, which comprises the following steps: (1) Providing epitaxial wafers; Wherein, the epitaxial wafer comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence; (2) forming a transparent conductive layer on the second semiconductor layer by PVD; Wherein, the transparent conductive layer is an ITO layer, and its thickness is 80nm; (3) etching to form an exposed area exposing the first semiconductor layer; (4) forming a first electrode and a second electrode by evaporation to obtain an intermediate; Wherein, the first electrode is formed on the first semiconductor layer in the exposed area, and the second electrode is formed on the transparent conductive layer; (5) using silicon and copper as targets, sputtering to form a first composite film on the surface of the intermediate; The two were co-sputtered, the sputtering power of the copper target was 15W, the sputtering power of the silicon target was 50W, the sputtering time was 5min; the sputtering gas was Ar, the gas pressure was 6mtorr, and the sputtering temperature was 25°C.

[0051] (6) annealing the first composite film in an oxygen-containing atmosphere to obtain a second composite film; The annealing atmosphere is air, the annealing temperature is 620° C., the annealing time is 0.5 h, and the annealing is performed in a PECVD chamber. The thickness of the second composite film formed by annealing is 40 nm.

[0052] (7) forming a silicon oxide film on the second composite film; The silicon oxide film is formed by PECVD, wherein the flow rate of SiH4 is 200 sccm, the flow rate of N2O is 1880 sccm, the RF power is 85 W, the pressure of the PECVD chamber is 100 Pa, and the temperature is 240° C. The thickness of the silicon oxide film is 100 nm.

[0053] (8) Opening holes in the second composite film and the silicon oxide film in the regions where the first electrode and the second electrode are located to expose the first electrode and the second electrode.

[0054] Example 2 This embodiment provides a method for preparing an LED chip with high light extraction efficiency, which comprises the following steps: (1) Providing epitaxial wafers; Wherein, the epitaxial wafer comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence; (2) forming a transparent conductive layer on the second semiconductor layer by PVD; Wherein, the transparent conductive layer is an ITO layer, and its thickness is 80nm; (3) etching to form an exposed area exposing the first semiconductor layer; (4) forming a first electrode and a second electrode by evaporation to obtain an intermediate; Wherein, the first electrode is formed on the first semiconductor layer in the exposed area, and the second electrode is formed on the transparent conductive layer; (5) using silicon and copper as targets, sputtering to form a first composite film on the surface of the intermediate; The two were co-sputtered, the sputtering power of the copper target was 15W, the sputtering power of the silicon target was 50W, the sputtering time was 5min; the sputtering gas was Ar, the gas pressure was 6mtorr, and the sputtering temperature was 25°C.

[0055] (6) annealing the first composite film once in an Ar atmosphere; The annealing time is 5 minutes, the annealing temperature is 820°C, and the annealing is carried out in a PECVD chamber.

[0056] (7) annealing the first composite film after the primary annealing for a secondary time in an oxygen-containing atmosphere to obtain a second composite film; The annealing atmosphere is air, the annealing temperature is 620° C., the annealing time is 0.5 h, and the annealing is performed in a PECVD chamber. The thickness of the second composite film formed by annealing is 40 nm.

[0057] (8) forming a silicon oxide film on the second composite film; The silicon oxide film is formed by PECVD, wherein the flow rate of SiH4 is 200 sccm, the flow rate of N2O is 1880 sccm, the RF power is 85 W, the pressure of the PECVD chamber is 100 Pa, and the temperature is 240° C. The thickness of the silicon oxide film is 100 nm.

[0058] (9) Opening holes in the second composite film and the silicon oxide film in the regions where the first electrode and the second electrode are located to expose the first electrode and the second electrode.

[0059] Example 3 This embodiment provides a method for preparing an LED chip with high light extraction efficiency, which comprises the following steps: (1) Providing epitaxial wafers; Wherein, the epitaxial wafer comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence; (2) forming a transparent conductive layer on the second semiconductor layer by PVD; Wherein, the transparent conductive layer is an ITO layer, and its thickness is 80nm; (3) etching to form an exposed area exposing the first semiconductor layer; (4) forming a first electrode and a second electrode by evaporation to obtain an intermediate; Wherein, the first electrode is formed on the first semiconductor layer in the exposed area, and the second electrode is formed on the transparent conductive layer; (5) using silicon and copper as targets, sputtering to form a first composite film on the surface of the intermediate; The copper target was sputtered for 20 seconds, the copper target and silicon target were sputtered for 4 minutes, and the silicon target was sputtered for 40 seconds. The sputtering power of the copper target was 15W, the sputtering power of the silicon target was 50W, the sputtering gas was Ar, the gas pressure was 6mtorr, and the sputtering temperature was 25°C.

[0060] (6) annealing the first composite film once in an Ar atmosphere; The annealing time is 5 minutes, the annealing temperature is 820°C, and the annealing is carried out in a PECVD chamber.

[0061] (7) annealing the first composite film after the primary annealing for a secondary time in an oxygen-containing atmosphere to obtain a second composite film; The annealing atmosphere is air, the annealing temperature is 620° C., the annealing time is 0.5 h, and the annealing is performed in a PECVD chamber. The thickness of the second composite film formed by annealing is 40 nm.

[0062] (8) forming a silicon oxide film on the second composite film; The silicon oxide film is formed by PECVD, wherein the flow rate of SiH4 is 200 sccm, the flow rate of N2O is 1880 sccm, the RF power is 85 W, the pressure of the PECVD chamber is 100 Pa, and the temperature is 240° C. The thickness of the silicon oxide film is 100 nm.

[0063] (9) Opening holes in the second composite film and the silicon oxide film in the regions where the first electrode and the second electrode are located to expose the first electrode and the second electrode.

[0064] Example 4 This embodiment provides a method for preparing an LED chip with high light extraction efficiency, which comprises the following steps: (1) Providing epitaxial wafers; Wherein, the epitaxial wafer comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence; (2) forming a transparent conductive layer on the second semiconductor layer by PVD; Wherein, the transparent conductive layer is an ITO layer, and its thickness is 80nm; (3) etching to form an exposed area exposing the first semiconductor layer; (4) forming a first electrode and a second electrode by evaporation to obtain an intermediate; Wherein, the first electrode is formed on the first semiconductor layer in the exposed area, and the second electrode is formed on the transparent conductive layer; (5) using silicon and copper as targets, sputtering to form a first composite film on the surface of the intermediate; The copper target was sputtered for 20 seconds, the copper target and silicon target were sputtered for 4 minutes, and the silicon target was sputtered for 40 seconds. The sputtering power of the copper target was 15W, the sputtering power of the silicon target was 50W, the sputtering gas was Ar, the gas pressure was 6mtorr, and the sputtering temperature was 25°C.

[0065] (6) annealing the first composite film once in an Ar atmosphere; The annealing time is 5 minutes, the annealing temperature is 820°C, and the annealing is carried out in a PECVD chamber.

[0066] (7) annealing the first composite film after the primary annealing for a secondary time in an oxygen-containing atmosphere to obtain a second composite film; The annealing atmosphere is air, the annealing temperature is 620° C., the annealing time is 0.5 h, and the annealing is performed in a PECVD chamber. The thickness of the second composite film formed by annealing is 40 nm.

[0067] (8) forming a first silicon oxide film and a second silicon oxide film in sequence on the second composite film; Among them, the first silicon oxide film and the second silicon oxide film are formed by PECVD. The porosity of the first silicon oxide film is 22% and the thickness is 10nm; the porosity of the second silicon oxide film is 44% and the thickness is 90nm.

[0068] During the formation of the first silicon oxide film, the flow rate of SiH4 was 450 sccm, the flow rate of N2O was 1880 sccm, the RF power was 90 W, the pressure of the PECVD chamber was 90 Pa, and the temperature was 230° C. During the formation of the second silicon oxide film, the flow rate of SiH4 was 200 sccm, the flow rate of N2O was 1880 sccm, the RF power was 90 W, the pressure of the PECVD chamber was 90 Pa, and the temperature was 230° C.

[0069] (9) Opening holes in the second composite film and the silicon oxide film in the regions where the first electrode and the second electrode are located to expose the first electrode and the second electrode.

[0070] Comparative Example 1 This comparative example provides a method for preparing an LED chip, which differs from Example 1 in that: The second composite film is not formed, that is, steps (5) to (6) are not included.

[0071] The rest is the same as Example 1.

[0072] Comparative Example 2 This comparative example provides a method for preparing an LED chip, which differs from Example 1 in that: No silicon oxide film is formed, that is, step (7) is not included.

[0073] The rest is the same as Example 1.

[0074] Comparative Example 3 This comparative example provides a method for preparing an LED chip, which differs from Example 1 in that: The first composite film is not annealed, ie, step (6) is not included.

[0075] The rest is the same as Example 1.

[0076] According to the preparation methods of Examples 1 to 4 and Comparative Examples 1 to 3, a 10 mil*24 mil front-mounted LED chip was prepared and tested, specifically including: (1) Test its brightness at 200 mA, and calculate the brightness improvement rate based on the data of the comparative example, wherein the brightness improvement rate = (brightness of the embodiment / comparative example-brightness of comparative example 1) / brightness of comparative example 1×100%; (2) Light up the LED chip for 1000 hours at 85°C, 85% RH, and 5mA current. Use -10V to test the leakage characteristics. If ≥1μA, it is considered a leakage failure, and if less than 1μA, it is considered valid.

[0077] The specific test data are shown in the following table:

[0078] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0079] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A method for preparing a high light extraction efficiency LED chip, characterized in that: include: Providing an epitaxial wafer, the epitaxial wafer comprising a substrate, a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence; forming a transparent conductive layer on the epitaxial wafer; wherein the transparent conductive layer is formed on the second semiconductor layer; Etching to form an exposed area exposing the first semiconductor layer; Forming a first electrode and a second electrode to obtain an intermediate; wherein the first electrode is formed on the first semiconductor layer in the exposed area, and the second electrode is formed on the transparent conductive layer; Using silicon and copper as targets, sputtering to form a first composite film on the surface of the intermediate; annealing the first composite film in an oxygen-containing atmosphere at 550-700° C. to obtain a second composite film; forming a silicon oxide film on the second composite film; Openings are made in the second composite film and the silicon oxide film in the regions where the first electrode and the second electrode are located, so as to at least partially expose the first electrode and the second electrode.

2. The method for preparing a high light extraction efficiency LED chip according to claim 1, characterized in that: In the step of sputtering the first composite film on the surface of the intermediate using silicon and copper as targets, the sputtering power of the copper target is 10-20W, the sputtering power of the silicon target is 30-60W, the sputtering time is 2-5min; the sputtering gas is Ar, the gas pressure is 4-8mtorr, and the sputtering temperature is 20-50°C; In the step of annealing the first composite film in an oxygen-containing atmosphere at 550-700° C. to obtain the second composite film, the annealing atmosphere is air, the annealing time is 0.3-1 h, and the annealing is performed in a PECVD chamber.

3. The method for preparing a high light extraction efficiency LED chip according to claim 1, characterized in that: Using silicon and copper as targets, in the step of sputtering to form a first composite film on the surface of the intermediate, first sputter the copper target for 10 to 20 seconds, then sputter the copper target and the silicon target for 2 to 4 minutes, and finally sputter the silicon target for 20 to 40 seconds; The step of annealing the first composite film at 550-700° C. in an oxygen-containing atmosphere to obtain the second composite film comprises: Annealing the first composite film once in an Ar or N2 atmosphere at 800-900°C; The first composite film after the primary annealing is subjected to a secondary annealing in an oxygen-containing atmosphere at 550-700° C. to obtain a second composite film.

4. The method for preparing a high light extraction efficiency LED chip according to claim 3, characterized in that: In the step of annealing the first composite film in an Ar or N2 atmosphere at 800-900°C, the annealing atmosphere is Ar, the annealing time is 5-20 minutes, and the annealing is performed in a PECVD chamber; In the step of performing a secondary annealing on the first composite film after the primary annealing at 550-700° C. in an oxygen-containing atmosphere to obtain a second composite film, the annealing atmosphere is air, the annealing time is 0.3-1 h, and the annealing is performed in a PECVD chamber.

5. The method for preparing a high light extraction efficiency LED chip according to claim 1, characterized in that: In the step of forming a silicon oxide film on the second composite film, a first silicon oxide film and a second silicon oxide film are sequentially formed on the second composite film; The porosity of the first silicon oxide film is smaller than the porosity of the second silicon oxide film; The thickness of the first silicon oxide film is smaller than the thickness of the second silicon oxide film.

6. The method for preparing a high light extraction efficiency LED chip according to claim 5, characterized in that: The porosity of the first silicon oxide film is 15-30%, and the porosity of the second silicon oxide film is 35-55%; The thickness of the first silicon oxide film is 5-50 nm, and the thickness of the second silicon oxide film is 20-100 nm.

7. The method for preparing a high light extraction efficiency LED chip according to claim 5, characterized in that: The first silicon oxide film and the second silicon oxide film are both formed by PECVD; during the formation process, the radio frequency power is 80-100W, the pressure of the PECVD chamber is 80-120Pa, and the temperature is 200-250°C; The flow ratio of SiH 4 to N 2 O during the formation of the first silicon oxide film is greater than the flow ratio of SiH 4 to N 2 O during the formation of the second silicon oxide film.

8. The method for preparing a high light extraction efficiency LED chip according to claim 5, characterized in that: During the formation of the first silicon oxide film, the flow rate of SiH4 is 400-600 sccm, and the flow rate of N2O is 1800-2000 sccm; During the formation of the second silicon oxide film, the flow rate of SiH4 is 100-300 sccm, and the flow rate of N2O is 1800-2000 sccm.

9. The method for preparing a high light extraction efficiency LED chip according to claim 1, characterized in that: The thickness of the second composite film is 30-50 nm; The transparent conductive layer is an ITO layer or an AZO layer, and its thickness is 40-80 nm.

10. A high light extraction efficiency LED chip, characterized in that: The LED chip is prepared by the method for preparing a high light extraction efficiency LED chip as described in any one of claims 1 to 9.

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