Preparation method of ITO transparent conductive layer and LED chip

Abstract

The invention discloses a preparation method of an ITO transparent conductive layer and an LED chip. The preparation method comprises the following steps: depositing a first ITO layer by adopting magnetron sputtering and carrying out first annealing; performing first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer; a second ITO layer is deposited on the patterned first ITO layer through magnetron sputtering, and second annealing is carried out; etching the second ITO layer subjected to the second annealing for the second time to obtain a patterned second ITO layer; wherein the sputtering power for depositing the first ITO layer is smaller than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than that of the second annealing; the time of the first etching is longer than the time of the second etching. According to the invention, the ITO transparent conductive layer and the epitaxial structure form good ohmic contact and have higher penetration rate at the same time.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a method for preparing an ITO transparent conductive layer and an LED chip. Background Art

[0002] When preparing LED devices, in order to improve the light extraction efficiency, it is necessary to set a thin film material with good conductivity and high light transmittance between the light emitting surface and the electrode. Indium tin oxide (ITO) has the advantages of high conductivity, high transmittance in the visible light region, good chemical stability, high adhesion, and convenient pattern processing. It is often used as a transparent conductive layer in semiconductor optoelectronic devices.

[0003] The existing ITO transparent conductive layer is generally composed of the first ITO layer and the second ITO layer. The first ITO layer forms a good ohmic contact with the epitaxial structure and acts as a protective layer to prevent the second ITO layer deposited at high power from damaging the epitaxial structure. Finally, the ITO transparent conductive layer is annealed at high temperature to improve the transmittance and reduce the sheet resistance. However, the current ITO transparent conductive layer has a low transmittance, resulting in low brightness of the LED chip. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a method for preparing an ITO transparent conductive layer, wherein the ITO transparent conductive layer forms good ohmic contact with the epitaxial structure and has a higher penetration rate.

[0005] Another technical problem to be solved by the present invention is to provide an LED chip, the brightness of which is significantly improved.

[0006] In order to solve the above problems, the present invention discloses a method for preparing an ITO transparent conductive layer, comprising the following steps:

[0007] Depositing the first ITO layer by magnetron sputtering and performing the first annealing;

[0008] Performing a first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer;

[0009] Depositing a second ITO layer on the patterned first ITO layer by magnetron sputtering, and performing a second annealing;

[0010] Performing a second etching on the second ITO layer after the second annealing to obtain a patterned second ITO layer; the patterned second ITO layer covers the upper surface and side surfaces of the patterned first ITO layer;

[0011] Among them, the sputtering power for depositing the first ITO layer is less than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than the annealing temperature of the second annealing; and the time of the first etching is longer than the time of the second etching.

[0012] As an improvement of the above technical solution, the sum of the thicknesses of the first ITO layer and the second ITO layer is 40nm to 300nm, and the thickness ratio of the first ITO layer to the second ITO layer is 1:(0.3 to 0.5).

[0013] As an improvement of the above technical solution, the first annealing comprises the following steps:

[0014] Heat up to 200°C to 220°C at a heating rate of 8°C / s to 15°C / s, and keep warm for 30s to 60s;

[0015] The temperature was raised to 520°C to 580°C at a heating rate of 5°C / s to 10°C / s, and kept at that temperature for 120s to 300s. Meanwhile, O2 was introduced at a flow rate of 0.8mL / min to 1.5mL / min.

[0016] As an improvement of the above technical solution, the second annealing comprises the following steps:

[0017] The temperature was raised to 320°C to 380°C at a heating rate of 5°C / s to 10°C / s, and kept at that temperature for 120s to 300s. O2 was introduced at the same time, and the flow rate of O2 was 0.8mL / min to 1.5mL / min.

[0018] As an improvement of the above technical solution, during the magnetron sputtering deposition of the first ITO layer, the Ar flow rate is 50mL / min~100mL / min, the sputtering power is 80W~200W, the sputtering gas pressure is 1mTorr~3mTorr, and the O2 flow rate is 0.2mL / min~0.8mL / min.

[0019] As an improvement of the above technical solution, during the magnetron sputtering deposition of the second ITO layer, the Ar flow rate is 50mL / min~100mL / min, the sputtering power is 300W~500W, the sputtering gas pressure is 1mTorr~3mTorr, and the O2 flow rate is 0.2mL / min~0.8mL / min.

[0020] As an improvement of the above technical solution, the first etching comprises the following steps:

[0021] Disposing a first photoresist layer on the first ITO layer, and performing photolithography on the first photoresist layer to expose a to-be-etched area of ​​the first ITO layer;

[0022] After the area to be etched is plasma cleaned, a first wet etching is performed; the etching solution concentration of the first wet etching is 10 -6 mol / L~10 -4 mol / L, etching time is 20s~500s;

[0023] The remaining first photoresist layer on the first ITO layer is removed.

[0024] As an improvement of the above technical solution, the second etching comprises the following steps:

[0025] Disposing a second photoresist layer on the second ITO layer, and performing photolithography on the second photoresist layer to expose a to-be-etched area of ​​the second ITO layer;

[0026] After the area to be etched is plasma cleaned, a second wet etching is performed; the etching solution concentration of the second wet etching is 10 -6 mol / L~10 -4 mol / L, etching time is 20s~500s;

[0027] The remaining second photoresist layer on the second ITO layer is removed.

[0028] As an improvement of the above technical solution, the ratio of the wet etching time of the first etching to the wet etching time of the second etching is 1:(0.6-0.8).

[0029] Correspondingly, the present invention also discloses an LED chip, comprising the ITO transparent conductive layer prepared by the above preparation method.

[0030] The implementation of the present invention has the following beneficial effects: the preparation method of the ITO transparent conductive layer provided by the present invention comprises depositing a first ITO layer and a second ITO layer, annealing and etching the first ITO layer at a high temperature, and annealing and etching the second ITO layer at a low temperature. By using different deposition processes, annealing processes and etching processes for the first ITO layer and the second ITO layer, the second ITO layer with high transmittance completely covers the first ITO layer, and the ITO transparent conductive layer has good ohmic contact with the epitaxial structure and has a higher transmittance, thereby improving the brightness of the LED chip. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0032] The present invention provides a method for preparing an ITO transparent conductive layer, comprising the following steps:

[0033] S1, depositing the first ITO layer by magnetron sputtering and performing the first annealing;

[0034] S2, performing a first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer;

[0035] S3, depositing a second ITO layer on the patterned first ITO layer by magnetron sputtering, and performing a second annealing;

[0036] S4, etching the second ITO layer after the second annealing for the second time for the second time to obtain a patterned second ITO layer; the patterned second ITO layer covers the upper surface and side surfaces of the patterned first ITO layer.

[0037] The sputtering power for depositing the first ITO layer is less than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than the annealing temperature of the second annealing; and the time of the first etching is longer than the time of the second etching.

[0038] The preparation method of the ITO transparent conductive layer provided by the present invention comprises low-power magnetron sputtering deposition of the first ITO layer and high-power magnetron sputtering deposition of the second ITO layer, high-temperature annealing and etching of the first ITO layer, low-temperature annealing and etching of the second ITO layer, the sputtering power of the first ITO layer is low, forming a denser film layer, which can form a good ohmic contact with the epitaxial structure after high-temperature annealing, and maintain the low operating voltage of the LED chip, and the sputtering power of the second ITO layer is high, and low-temperature annealing is combined to obtain a rougher film layer with high penetration. In addition, through a specific etching process, the boundary of the obtained second ITO layer is wider than the boundary of the first ITO layer, that is, the patterned second ITO layer completely covers the upper surface and side of the patterned first ITO layer, thereby preventing the etching solution of the second ITO layer from penetrating into the first ITO layer, and avoiding defects such as gaps and bumps that may appear at the boundary of the first ITO layer. By using different deposition processes, annealing processes and etching processes for the first ITO layer and the second ITO layer, the second ITO layer with high transmittance completely covers the first ITO layer. The ITO transparent conductive layer has good ohmic contact with the epitaxial structure and has a higher transmittance, thereby improving the brightness of the LED chip.

[0039] In one embodiment, the sum of the thickness of the first ITO layer and the second ITO layer is 40nm to 300nm, exemplified by 50nm, 100nm, 150nm, 200nm or 250nm, but not limited thereto. The light transmittance is highly dependent on the thickness of the ITO transparent conductive layer. Within a certain range, the light transmittance decreases with the increase of the thickness of the ITO transparent conductive layer. Especially in the near-infrared region, a large number of free electrons in the ITO transparent conductive layer interact with the incident light, resulting in the polarization of the light, thereby significantly reducing the transmission spectrum, thereby affecting the dielectric constant, and ultimately having an adverse effect on the light transmittance. However, at the same time, the resistivity decreases with the increase of the thickness of the ITO transparent conductive layer, and the ITO transparent conductive layer with a lower resistivity is more conducive to improving the efficiency of solar cells. Through the preparation method of the ITO transparent conductive layer provided by the present invention, the thickness of the obtained ITO transparent conductive layer is large and has good light transmittance.

[0040] In a preferred embodiment, the thickness ratio of the first ITO layer to the second ITO layer is 1:(0.3-0.5), exemplarily 1:0.32, 1:0.36, 1:0.4, 1:0.42 or 1:0.46, but not limited thereto. If the thickness of the second ITO layer is too large, the light transmittance will be reduced; if the thickness of the second ITO layer is too small, it is difficult to effectively improve the light transmittance, and the quality of the first ITO layer will be adversely affected.

[0041] Specifically, the first ITO layer is deposited by low-power magnetron sputtering. In one embodiment, the flow rate of Ar is 50mL / min to 100mL / min, and 55mL / min, 60mL / min, 70mL / min, 80mL / min or 90mL / min are exemplary, but not limited to this; the sputtering power is 80W to 200W, and 90W, 100W, 120W, 160W or 180W are exemplary, but not limited to this; the sputtering gas pressure is 1mTorr to 3mTorr, and 1.25mTorr, 1.5mTorr, 2mTorr, 2.25mTorr or 2.5mTorr are exemplary, but not limited to this; the flow rate of O2 is 0.2mL / min to 0.8mL / min, and 0.3mL / min, 0.4mL / min, 0.5mL / min, 0.6mL / min or 0.7mL / min are exemplary, but not limited to this.

[0042] In a preferred embodiment, the first annealing comprises the following steps:

[0043] S11, heating to 200°C to 220°C at a heating rate of 8°C / s to 15°C / s, and keeping the temperature for 30s to 60s;

[0044] S12. Heat to 520°C-580°C at a heating rate of 5°C / s-10°C / s, keep warm for 120s-300s, and introduce O2 at a flow rate of 0.8mL / min-1.5mL / min.

[0045] Specifically, a specific heating program is used to raise the temperature to 520°C to 580°C, exemplarily 530°C, 540°C, 550°C, 560°C or 570°C, but not limited thereto; the holding time at 520°C to 580°C is 120s to 300s, exemplarily 150s, 180s, 210s, 240s or 270s, but not limited thereto; the flow rate of O2 is 0.8mL / min to 1.5mL / min, exemplarily 0.9mL / min, 1mL / min, 1.2mL / min, 1.3mL / min or 1.4mL / min, but not limited thereto. The first ITO layer is subjected to high temperature annealing. As the annealing temperature increases, the grain size and porosity of the first ITO layer are significantly reduced, the microscopic surface structure of the first ITO layer is densified, and the resistivity is reduced. In addition, a specific temperature rise program is used to anneal the first ITO layer, so as to further improve the high temperature annealing quality of the first ITO layer, thereby further improving the crystallization quality of the first ITO layer, reducing resistance and increasing light transmittance.

[0046] Specifically, in one embodiment, the first etching includes the following steps:

[0047] S21, disposing a first photoresist layer on the first ITO layer, and performing photolithography on the first photoresist layer to expose a to-be-etched area of ​​the first ITO layer;

[0048] S22, after the area to be etched is plasma cleaned, the first wet etching is performed; the etching solution concentration of the first wet etching is 10 -6 mol / L~10 -4 mol / L, etching time is 20s~500s;

[0049] S23, removing the remaining first photoresist layer on the first ITO layer.

[0050] Specifically, the second ITO layer is deposited by high-power magnetron sputtering. In one embodiment, the flow rate of Ar is 50mL / min to 100mL / min, and 55mL / min, 60mL / min, 70mL / min, 80mL / min or 90mL / min are exemplified, but not limited to; the sputtering power is 300W to 500W, and 320W, 350W, 400W, 450W or 480W are exemplified, but not limited to; the sputtering gas pressure is 1mTorr to 3mTorr, and 1.25mTorr, 1.5mTorr, 2mTorr, 2.25mTorr or 2.5mTorr are exemplified, but not limited to; the flow rate of O2 is 0.2mL / min to 0.8mL / min, and 0.3mL / min, 0.4mL / min, 0.5mL / min, 0.6mL / min or 0.7mL / min are exemplified, but not limited to.

[0051] In a preferred embodiment, the second annealing comprises the following steps:

[0052] S31. Heat to 320°C-380°C at a heating rate of 5°C / s-10°C / s, keep warm for 120s-300s, and introduce O2 at a flow rate of 0.8mL / min-1.5mL / min.

[0053] Specifically, the temperature is raised to 320°C to 380°C in a specific heating program, exemplarily 330°C, 340°C, 350°C, 360°C or 370°C, but not limited thereto; the holding time at 320°C to 380°C is 120s to 300s, exemplarily 150s, 180s, 210s, 240s or 270s, but not limited thereto; the flow rate of O2 is 0.8mL / min to 1.5mL / min, exemplarily 0.9mL / min, 1mL / min, 1.2mL / min, 1.3mL / min or 1.4mL / min, but not limited thereto. The second ITO layer is subjected to low temperature annealing in a specific heating program, the grains of the second ITO layer are tiny and the gaps between the grains are large, a large amount of visible light can pass through the sample, and the film has a high visible light transmittance.

[0054] Specifically, in one embodiment, the second etching includes the following steps:

[0055] S41, disposing a second photoresist layer on the second ITO layer, and performing photolithography on the second photoresist layer to expose a to-be-etched area of ​​the second ITO layer;

[0056] S42, after plasma cleaning the area to be etched, a second wet etching is performed; the etching solution concentration of the second wet etching is 10 -6mol / L~10 -4 mol / L, etching time is 20s~500s;

[0057] S43, removing the remaining second photoresist layer on the second ITO layer.

[0058] It is understandable that the process of photolithography of the first photoresist layer and the second photoresist layer includes yellow light uniform coating, exposure, development and other processes. Preferably, in the present invention, the same photoresist is used for exposing the first photoresist layer and the second photoresist layer, that is, the patterns made by the two photolithography are completely consistent, and the wet etching time of the first etching is controlled to be greater than the wet etching time of the second etching, so that the second ITO layer of the patterning is accurately covered on the first ITO layer of the patterning. In the prior art, generally, annealing and patterning are performed after depositing two layers of ITO layers, that is, the two layers of ITO layers are only patterned once to obtain an ITO layer with completely consistent structure. However, the first ITO layer and the second ITO layer of the present application are subjected to different annealing treatments respectively, so in order to further ensure the quality of the first ITO layer, the present invention is patterned to the first ITO layer and the second ITO layer respectively. In a preferred embodiment, the ratio of the wet etching time of the first etching to the wet etching time of the second etching is 1:(0.6-0.8), exemplarily 1:0.62, 1:0.64, 1:0.7, 1:0.72 or 1:0.74, but not limited thereto. By controlling the ratio of the wet etching time of the first etching to the wet etching time of the second etching, the high-quality complete coating of the first ITO layer by the second ITO layer is achieved, thereby ensuring the quality of the first ITO layer.

[0059] Correspondingly, the present invention also provides an LED chip, comprising an ITO transparent conductive layer obtained by the above-mentioned preparation method. Specifically, in one embodiment, the LED chip comprises a substrate and an epitaxial structure deposited on the substrate, a current blocking layer, an ITO transparent conductive layer, a passivation layer and an electrode. Among them, the substrate can be a sapphire substrate, a Si substrate or a SiC substrate, but is not limited thereto. The epitaxial structure includes but is not limited to a first semiconductor layer, an MQW layer and a second semiconductor layer sequentially stacked on the substrate, wherein the first semiconductor layer can be an N-type GaN layer, an N-type AlGaN layer, or an N-type GaAs layer, but is not limited thereto; the MQW layer can be an InGaN / GaN layer, an InGaN / AlGaN layer or an AlGaN / AlGaN layer, but is not limited thereto; the second semiconductor layer can be a P-type GaN layer, a P-type AlGaN layer, or a P-type GaAs layer, but is not limited thereto. The electrode comprises a first electrode and a second electrode, the first electrode being electrically connected to the first semiconductor layer through the passivation layer, and the second electrode being electrically connected to the second ITO layer through the passivation layer.

[0060] The present invention will be further described below with specific embodiments:

[0061] Example 1

[0062] This embodiment provides a method for preparing an ITO transparent conductive layer, comprising the following steps:

[0063] S1. Depositing the first ITO layer by magnetron sputtering and performing the first annealing.

[0064] Wherein, the thickness of the first ITO layer is 60 nm.

[0065] During the magnetron sputtering deposition of the first ITO layer, the Ar flow rate was 80 mL / min, the sputtering power was 160 W, the sputtering pressure was 1.5 mTorr, and the O2 flow rate was 0.5 mL / min.

[0066] The first annealing includes the following steps:

[0067] S11. Heat to 550°C at a heating rate of 4°C / s and keep warm for 180s. At the same time, introduce O2 at a flow rate of 1mL / min.

[0068] S2, performing a first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer.

[0069] The first etching comprises the following steps:

[0070] S21, disposing a first photoresist layer on the first ITO layer, and performing photolithography on the first photoresist layer to expose a to-be-etched area of ​​the first ITO layer;

[0071] S22, after the area to be etched is plasma cleaned, the first wet etching is performed; the etching solution concentration of the first wet etching is 10 -5 mol / L, etching time is 300s;

[0072] S23, removing the remaining first photoresist layer on the first ITO layer.

[0073] S3. Depositing a second ITO layer on the patterned first ITO layer by magnetron sputtering, and performing a second annealing.

[0074] Wherein, the thickness of the second ITO layer is 60 nm.

[0075] During the magnetron sputtering deposition of the second ITO layer, the Ar flow rate was 80 mL / min, the sputtering power was 400 W, the sputtering pressure was 1.5 mTorr, and the O2 flow rate was 0.5 mL / min.

[0076] The second annealing includes the following steps:

[0077] S31. Heat to 350°C at a heating rate of 4°C / s and keep warm for 180s. At the same time, introduce O2 at a flow rate of 1mL / min.

[0078] S4, etching the second ITO layer after the second annealing for the second time for the second time to obtain a patterned second ITO layer; the patterned second ITO layer covers the upper surface and side surfaces of the patterned first ITO layer.

[0079] Wherein, the second etching comprises the following steps:

[0080] S41, disposing a second photoresist layer on the second ITO layer, and performing photolithography on the second photoresist layer to expose a to-be-etched area of ​​the second ITO layer;

[0081] S42, after the area to be etched is plasma cleaned, a second wet etching is performed; the etching solution concentration of the second wet etching is 10 -5 mol / L, etching time is 240s;

[0082] S43, removing the remaining second photoresist layer on the second ITO layer.

[0083] Example 2

[0084] This embodiment provides a method for preparing an ITO transparent conductive layer. The difference between this method and Embodiment 1 is that the thickness of the first ITO layer is 80 nm, and the thickness of the second ITO layer is 30 nm.

[0085] The rest are the same as in Example 1.

[0086] Example 3

[0087] This embodiment provides a method for preparing an ITO transparent conductive layer, which is different from Embodiment 2 in that the first annealing includes the following steps:

[0088] S11, heating to 210°C at a heating rate of 12°C / s, keeping warm for 40s;

[0089] S12. Heat to 580°C at a heating rate of 7°C / s, keep warm for 180s, and introduce O2 at a flow rate of 1mL / min.

[0090] The rest is the same as Example 2.

[0091] Example 4

[0092] This embodiment provides a method for preparing an ITO transparent conductive layer, which is different from Embodiment 3 in that the second annealing includes the following steps:

[0093] S31. Heat to 350°C at a heating rate of 6°C / s and keep warm for 180s. At the same time, introduce O2 at a flow rate of 1mL / min.

[0094] Comparative Example 1

[0095] This comparative example provides a method for preparing an ITO transparent conductive layer, comprising the following steps:

[0096] S1. Depositing the first ITO layer by magnetron sputtering.

[0097] S2. Depositing a second ITO layer on the first ITO layer by magnetron sputtering.

[0098] S3. Anneal the ITO transparent conductive layer, raise the temperature to 550°C at a heating rate of 4°C / s, and keep the temperature for 180s. At the same time, introduce O2 at a flow rate of 1 mL / min.

[0099] S4, etching the annealed ITO transparent conductive layer to obtain a patterned ITO transparent conductive layer.

[0100] The rest are the same as in Example 1.

[0101] Performance testing:

[0102] The ITO transparent conductive layer prepared in Examples 1 to 4 and Comparative Example 1 was applied to the LED chip, and the transmittance and sheet resistance at different wavelengths were tested. The specific results are shown in the following table:

[0103]

[0104] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A method for preparing an ITO transparent conductive layer, characterized in that: The following steps are involved: Depositing the first ITO layer by magnetron sputtering and performing the first annealing; Performing a first etching on the first ITO layer after the first annealing to obtain a patterned first ITO layer; Depositing a second ITO layer on the patterned first ITO layer by magnetron sputtering, and performing a second annealing; Performing a second etching on the second ITO layer after the second annealing to obtain a patterned second ITO layer; the patterned second ITO layer covers the upper surface and side surfaces of the patterned first ITO layer; Among them, the sputtering power for depositing the first ITO layer is less than the sputtering power for depositing the second ITO layer; the annealing temperature of the first annealing is higher than the annealing temperature of the second annealing; and the time of the first etching is longer than the time of the second etching.

2. The method for preparing an ITO transparent conductive layer according to claim 1, wherein: The sum of the thicknesses of the first ITO layer and the second ITO layer is 40 nm to 300 nm, and the thickness ratio of the first ITO layer to the second ITO layer is 1:(0.3 to 0.5).

3. The method for preparing an ITO transparent conductive layer according to claim 1, wherein: The first annealing comprises the following steps: Heat up to 200°C to 220°C at a heating rate of 8°C / s to 15°C / s, and keep warm for 30s to 60s; The temperature was raised to 520°C to 580°C at a heating rate of 5°C / s to 10°C / s, and kept at that temperature for 120s to 300s. Meanwhile, O2 was introduced at a flow rate of 0.8mL / min to 1.5mL / min.

4. The method for preparing an ITO transparent conductive layer according to claim 1, wherein: The second annealing comprises the following steps: The temperature was raised to 320°C to 380°C at a heating rate of 5°C / s to 10°C / s, and kept at that temperature for 120s to 300s. O2 was introduced at the same time, and the flow rate of O2 was 0.8mL / min to 1.5mL / min.

5. The method for preparing an ITO transparent conductive layer according to claim 1, wherein: During magnetron sputtering deposition of the first ITO layer, the flow rate of Ar is 50 mL / min to 100 mL / min, the sputtering power is 80 W to 200 W, the sputtering pressure is 1 mTorr to 3 mTorr, and the flow rate of O2 is 0.2 mL / min to 0.8 mL / min.

6. The method for preparing an ITO transparent conductive layer according to claim 1, characterized in that: During magnetron sputtering deposition of the second ITO layer, the flow rate of Ar is 50 mL / min to 100 mL / min, the sputtering power is 300 W to 500 W, the sputtering pressure is 1 mTorr to 3 mTorr, and the flow rate of O2 is 0.2 mL / min to 0.8 mL / min.

7. The method for preparing an ITO transparent conductive layer according to claim 1, characterized in that: The first etching comprises the following steps: Disposing a first photoresist layer on the first ITO layer, and performing photolithography on the first photoresist layer to expose a to-be-etched area of ​​the first ITO layer; After the area to be etched is plasma cleaned, a first wet etching is performed; the etching solution concentration of the first wet etching is 10 -6 mol / L~10 -4 mol / L, etching time is 20s~500s; The remaining first photoresist layer on the first ITO layer is removed.

8. The method for preparing an ITO transparent conductive layer according to claim 1, wherein: The second etching comprises the following steps: Disposing a second photoresist layer on the second ITO layer, and performing photolithography on the second photoresist layer to expose a to-be-etched area of ​​the second ITO layer; After the area to be etched is plasma cleaned, a second wet etching is performed; the etching solution concentration of the second wet etching is 10 -6 mol / L~10 -4 mol / L, etching time is 20s~500s; The remaining second photoresist layer on the second ITO layer is removed.

9. The method for preparing an ITO transparent conductive layer according to claim 1, wherein: The ratio of the wet etching time of the first etching to the wet etching time of the second etching is 1:(0.6-0.8).

10. An LED chip, characterized in that: The invention comprises an ITO transparent conductive layer prepared by the preparation method according to any one of claims 1 to 9.

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