Bottom-up molybdenum gap filling

Abstract

The embodiment of the invention relates to a molybdenum gap filling method. Additional embodiments provide a method of forming a molybdenum gap filler without substantial voids. Some embodiments of the present disclosure relate to higher aspect ratio features, including DRAM memory cells.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to methods of depositing molybdenum films within substrate features. More specifically, embodiments of the present disclosure are directed to methods of providing bottom-up gap fill via a cyclic deposition-etch process. Background Art

[0002] The gap fill process is integrated with several semiconductor manufacturing processes. The gap fill process can be used to fill the gap (or feature) with insulating or conductive materials. For example, shallow trench isolation, intermetallic dielectric layer, passivation layer, dummy gate are typically implemented by the gap fill process.

[0003] As device geometries continue to shrink (eg, critical dimensions <20 nm, <10 nm, and smaller) and thermal budgets decrease, defect-free filling of voids becomes increasingly difficult due to limitations of conventional deposition processes.

[0004] Most conventional deposition methods, especially chemical vapor deposition methods, deposit more material on the substrate surface than within the features, especially near the bottom of the features.

[0005] Therefore, after the gap fill deposition is completed, the film on the substrate surface must be removed by an etching process. This additional processing step reduces yield and increases manufacturing costs.

[0006] Other gapfill methods rely on atomic layer deposition to form the metal gapfill material. These methods typically produce conformal films on all substrate surfaces. Therefore, these methods also require etching of the material deposited outside the feature, but they also often produce gapfills with seams in the middle as the film forms from the sidewalls and meets in the middle.

[0007] Therefore, there is a need for a gap fill method that allows for greater throughput and is deposited in a bottom-up manner to avoid defects in the gap fill. Summary of the invention

[0008] One or more embodiments of the present disclosure are directed to a method of depositing a molybdenum gap filler. The method includes: exposing a substrate surface having at least one feature formed therein to a first molybdenum precursor and a reducing agent to form a first gap filler within the at least one feature. The at least one feature has an opening, two sidewalls, and extends from a top surface to a bottom surface to a depth. Exposing the substrate surface to a second molybdenum halide precursor to remove a portion of the first gap filler, and repeating the formation of the first gap filler.

[0009] Additional embodiments of the present disclosure are directed to a method of depositing a molybdenum gap filler. The method includes: exposing a substrate surface having at least one feature formed therein to MoO2Cl2 and H2 to form a first gap filler within the at least one feature. The at least one feature has an opening, two sidewalls, and extends from a top surface to a bottom surface to a depth. The feature has an aspect ratio greater than or equal to about 100:1. Exposing the substrate surface to MoCl5 to remove a portion of the first gap filler, and repeating the formation and removal of the first gap filler to completely fill the at least one feature. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to understand the above-mentioned features of the present disclosure in detail, the present disclosure briefly summarized above may be described in more detail with reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings only illustrate typical embodiments of the present disclosure and should not be considered as limiting the scope thereof, as the present disclosure may allow other equivalent embodiments. The embodiments as described herein are illustrated in the accompanying drawings by way of example and not limitation, in which the same reference numerals indicate similar elements.

[0011] Figure 1 A process flow diagram illustrating a deposition method according to one or more embodiments;

[0012] FIG. 2A to FIG. 2D illustrates a cross-sectional view of a substrate during processing according to one or more embodiments; and

[0013] Figure 3 A schematic top view of a multi-chamber processing system is shown in accordance with one or more embodiments. DETAILED DESCRIPTION

[0014] Before describing several exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of construction or processing steps set forth in the following description. The present disclosure is capable of other embodiments and can be practiced or carried out in various ways.

[0015] As used herein, the term "about" means approximately or close to, and in the context of a stated value or range, means a variation of ±15% or less from the stated value. For example, values ​​that differ by ±14%, ±10%, ±5%, ±2%, ±1%, ±0.5%, or ±0.1% would meet the definition of about.

[0016] As used in this specification and the appended claims, the term "substrate" or "wafer" refers to a surface or portion of a surface on which a process acts. It will also be understood by those skilled in the art that, unless the context clearly indicates otherwise, reference to a substrate may refer to only a portion of a substrate. In addition, reference to depositing on a substrate may mean both a bare substrate and a substrate having one or more films or features deposited or formed thereon.

[0017] As used herein, "substrate surface" refers to any substrate surface or material surface formed on a substrate on which film processing is performed during the manufacturing process. For example, depending on the application, substrate surfaces on which processing may be performed include: materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide; and any other materials such as metals, metal nitrides, metal alloys and other conductive materials. Substrates include, but are not limited to, semiconductor wafers. The substrate may be exposed to a pretreatment process to polish, etch, reduce, oxidize, hydroxylate, anneal and / or bake the substrate surface. In addition to performing film processing directly on the surface of the substrate itself, in the present disclosure, any film processing step disclosed may also be performed on an underlying layer formed on the substrate as disclosed in more detail below, and the term "substrate surface" is intended to include such an underlying layer as referred to in the context. Thus, for example, where a film / layer or portion of a film / layer has been deposited onto a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0018] The substrate surface may have one or more features formed therein, one or more layers formed thereon, and combinations thereof. The shape of the feature may be any suitable shape, including but not limited to spikes, grooves, holes, and vias (circular or polygonal). As used in this sense, the term "feature" refers to any intentional surface irregularity. Suitable examples of features include, but are not limited to, grooves having a bottom, two sidewalls, and a top extending into the substrate, and vias having one or more sidewalls extending into the substrate to the bottom.

[0019] The term "on" indicates that there is direct contact between elements. The term "directly on" indicates that there is direct contact between elements, with no intervening elements.

[0020] As used in this specification and the appended claims, the terms "precursor," "reactant," "reactive gas," and the like are used interchangeably to represent any gaseous species that can react with a substrate surface.

[0021] Embodiments of the present disclosure advantageously provide methods of depositing a molybdenum gap filler in a bottom-up manner. Further embodiments advantageously provide methods of depositing a gap filler with reduced defects (eg, voids).

[0022] Embodiments of the present disclosure are described by way of drawings showing processes and substrates according to one or more embodiments of the present disclosure. The processes, schemes, and resulting substrates shown are merely illustrative of the disclosed processes, and those skilled in the art will recognize that the disclosed processes are not limited to the described applications.

[0023] refer to Figures 1 to 2C , the present disclosure is directed to a method 100 of depositing a molybdenum gap filler. Figure 1 A process flow diagram of a deposition method 100 according to one or more embodiments of the present disclosure is depicted. FIG. 2A to FIG. 2D A substrate 200 is depicted during processing according to one or more embodiments of the present disclosure.

[0024] Figure 2A A substrate 200 having a substrate surface 205 is illustrated. As described above, a substrate surface refers to an exposed surface of a substrate on which a layer may be formed. The substrate surface 205 has at least one feature 210 formed therein. Although only a single feature is shown in the drawings, those skilled in the art will recognize that multiple features may be affected in a similar manner by the disclosed method.

[0025] At least one feature 210 has an opening 212 having a width W. The opening 212 is formed in a top surface 215 of the substrate 200. The feature 210 also has one or more sidewalls 214 and extends a depth D from the top surface 215 to a bottom 216. Although straight, vertical sidewalls are shown, the disclosed methods may also be performed on sloped, irregular, or concave sidewalls.

[0026] In some embodiments, the width W of the opening 212 is greater than or equal to about 10 nm, greater than or equal to about 15 nm, greater than or equal to about 20 nm, greater than or equal to about 25 nm, greater than or equal to about 30 nm, or greater than or equal to about 35 nm. In some embodiments, the width W is in the range of about 5 nm to about 15 nm, or in the range of about 10 nm to about 35 nm.

[0027] In some embodiments, the depth D of feature 210 is greater than or equal to about 50 nm, greater than or equal to about 75 nm, greater than or equal to about 100 nm, greater than or equal to about 150 nm, greater than or equal to about 200 nm, or greater than or equal to about 250 nm. In some embodiments, the depth D is in the range of about 100 nm to about 200 nm, or in the range of about 200 nm to about 250 nm.

[0028] Those skilled in the art will recognize the increasing challenges of depositing metal gap fillers in features with narrowing widths (also referred to as critical dimensions (CD)) and / or increasing depths. The aspect ratio of at least one feature 210 is defined as the depth D divided by the width W of the feature 210. In some embodiments, at least one feature has an aspect ratio (D:W) of greater than or equal to about 20:1, greater than or equal to about 50:1, or greater than or equal to about 100:1.

[0029] As described above, in some embodiments, substrate 200 includes a plurality of features 210. Some embodiments of the present disclosure advantageously provide a molybdenum gap fill for forming a DRAM memory cell. In other words, in some embodiments, at least one feature forms a memory cell of a DRAM.

[0030] refer to Figure 1 and Figure 2B , method 100 begins with operation 110. At 110, a first gap filler 220 is formed within at least one feature 210 on substrate surface 205. In some embodiments, as Figure 2B As shown in FIG. 2 , a first gap filler 220 is deposited on top surface 215 and bottom surface 216. Although it is believed that at least some of the gap fill material is formed on sidewalls 214, the sidewall deposition is not shown in the figure for the sake of clarity.

[0031] At operation 110, a first gap filler 220 is formed by exposing the substrate surface to a first molybdenum precursor and a reducing agent. In some embodiments, the first molybdenum precursor and the reducing agent are simultaneously exposed to the substrate. In some embodiments, both the first molybdenum precursor and the reducing agent are constantly flowed into the processing space above the substrate. In some embodiments, the first molybdenum precursor is constantly flowed, and the reducing agent is pulsed or intermittently flowed.

[0032] In some embodiments, the first molybdenum precursor comprises a molybdenum oxyhalide. In some embodiments, the first molybdenum precursor comprises or consists essentially of MoO2Cl2. The reducing agent may be any suitable reducing agent. In some embodiments, the reducing agent comprises or consists essentially of hydrogen (H2). As used in this sense, a process gas "consisting essentially of" the reactants comprises greater than about 95%, greater than about 98%, greater than about 99%, or greater than about 99.5% of the reactants on a molar basis, excluding any inert diluent or carrier gas.

[0033] In some embodiments, the first gap filler 220 has a top thickness T on the top surface 215. T , and has a bottom thickness T on the bottom 216 B In some embodiments, the top thickness TT Greater than the bottom thickness T B In some embodiments, the top thickness T T At least In some embodiments, the bottom thickness T B At least In some embodiments, the bottom thickness T B In about to about within the range.

[0034] In some embodiments, operation 110 represents a chemical vapor deposition (CVD) process. In some embodiments, the temperature of the CVD process is in a range of about 450° C. to about 600° C., or in a range of about 500° C. to about 600° C. In some embodiments, the CVD process is performed without plasma.

[0035] After forming the first gap filler 220, the method 100 continues to operation 120. In some embodiments, before performing operation 120, the substrate surface 205 is purged of any remaining reactant gas.

[0036] refer to Figure 2C , the method 100 continues at operation 120, where the substrate surface 205 is exposed to a second molybdenum halide precursor to remove a portion of the first gap filler 220. In some embodiments, the thickness of the first gap filler 220 on the top surface 215 is reduced by an amount greater than the thickness of the first gap filler on the bottom surface 216. In some embodiments, the first gap filler 220 is completely removed from the top surface 215. In some embodiments, about 10% of the first gap filler 220 is removed after exposure to the second molybdenum halide precursor. to about A first gap filler thickness within a range.

[0037] Without being bound by theory, one possible explanation is that the first gap filler on the top surface is more easily etched than the first gap filler at the bottom of the feature which is better protected because the top surface is more exposed to the second molybdenum halide.

[0038] The second molybdenum halide can be any suitable compound that reacts with the first gap filler to etch / remove the first gap filler. The second molybdenum halide includes one or more halide ligands. In some embodiments, the second molybdenum halide includes one or more of MoCl5 or MoF6. In some embodiments, the second molybdenum halide consists essentially of MoCl5.

[0039] In some embodiments, the second molybdenum halide is delivered from a heated ampoule with a carrier gas. The carrier gas can be any suitable inert gas that does not react with the first metal halide or otherwise change the first metal halide. In some embodiments, the carrier gas comprises argon. In some embodiments, the ampoule is heated to a temperature in the range of about 90°C to about 105°C.

[0040] After a predetermined amount of the first gap filler has been removed or a predetermined period of exposure to the second molybdenum halide precursor has elapsed, the substrate surface 205 is purged of any remaining reactant gas before proceeding to decision point 130 .

[0041] At decision point 130, it is determined whether the first gap filler 220 has reached a predetermined thickness. If so, the method 100 ends. If not, the method 100 returns to operation 110 to form additional first gap fillers 220. The cycle of deposition (operation 110) and etching (operation 120) is repeated until the predetermined thickness of the first gap filler 220 is achieved.

[0042] refer to Figure 2D In some embodiments, the deposition and etching cycles are repeated to fill the entire depth D of the at least one feature 210. In some embodiments, the number of deposition and etching cycles is in a range of about 200 to about 400 cycles, or in a range of about 250 to about 350 cycles.

[0043] The inventors surprisingly discovered that by using a deposition and etching cycle, rather than simply extending the deposition operation, the first gap filler 220 can be formed without closing the opening of at least one feature. Without being bound by theory, it is believed that because the etching operation 120 removes more material from the top surface 215 than from the bottom surface 216, the inventors are able to fill features with higher aspect ratios without "pinching off" the opening or forming voids within the feature. In some embodiments, the method 100 forms a first gap filler without substantial voids. In this sense, the width of a "substantial" void is greater than or equal to 1 nm. In some embodiments, the first gap filler is formed within at least one feature 210 without any substantial seams. In this sense, the width of a "substantial" seam is less than or equal to 1 nm.

[0044] Furthermore, the disclosed method advantageously forms the first gap filler 220 in a "bottom-up" manner. "Bottom-up manner" means that the method 100 accumulates little or no first gap filler 220 on the top surface 215 and / or the sidewalls 214, and the formation of the first gap filler 220 occurs primarily on the bottom 216. Thus, the first gap filler 220 grows upward from the bottom 216 of the at least one feature 210.

[0045] In some embodiments, the first gap filler 220 is deposited in a non-conformal manner. In some embodiments, the first gap filler 220 is etched in a non-conformal manner. "Non-conformal manner" means depositing or etching a material with a variable thickness (formed or removed) across the substrate surface 205. For example, in some embodiments, the thickness of the first gap filler removed from the bottom 216 can be less than the thickness of the first gap filler 220 removed from the top surface 215.

[0046] In some embodiments, the processing conditions of method 100 may be controlled. In some embodiments, the processing environment is maintained at a predetermined pressure during method 100. In some embodiments, the pressure is maintained in a range of about 5 Torr to about 35 Torr, or in a range of about 25 Torr to about 50 Torr.

[0047] Figure 3 3 is a schematic top view of an exemplary multi-chamber processing system 300 according to an embodiment of the present disclosure. The processing system 300 generally includes a factory interface 302; load lock chambers 304, 306; transfer chambers 308, 310 with corresponding transfer robots 312, 314; holding chambers 316, 318; and processing chambers 320, 322, 324, 326, 328, 330. As described in detail herein, wafers in the processing system 300 can be processed in each chamber and transferred between each chamber without exposing the wafer to an ambient environment external to the processing system 300 (e.g., an atmospheric ambient environment, such as may exist in a wafer fab). For example, the wafer can be processed in each chamber and transferred between each chamber under a low pressure (e.g., less than or equal to about 300 Torr) or vacuum environment without breaking the low pressure or vacuum environment between various processes performed on the wafer in the processing system 300. Thus, the processing system 300 can provide an integrated solution for some processing of the wafer.

[0048] Examples of processing systems that may be appropriately modified according to the teachings provided herein include or An integrated processing system or other suitable processing system is commercially available from Applied Materials, Inc. located in Santa Clara, Calif. It is contemplated that other processing systems, including systems from other manufacturers, may also be adapted to benefit from the aspects described herein.

[0049] exist Figure 3In the example shown, the factory interface 302 includes a docking station 340 and a factory interface robot 342 to facilitate wafer transfer. The docking station 340 is configured to receive one or more front opening unified pods (FOUPs) 344. In some examples, each factory interface robot 342 generally includes a blade 348 disposed on one end of the corresponding factory interface robot 342, and the blade 348 is configured to transfer the wafer from the factory interface 302 to the load lock chamber 304, 306.

[0050] The load lock chambers 304, 306 have respective ports 350, 352 coupled to the factory interface 302 and respective ports 354, 356 coupled to the transfer chamber 308. The transfer chamber 308 also has respective ports 358, 360 coupled to the holding chambers 316, 318 and respective ports 362, 364 coupled to the processing chambers 320, 322. Similarly, the transfer chamber 310 has respective ports 366, 368 coupled to the holding chambers 316, 318 and respective ports 370, 372, 374, 376 coupled to the processing chambers 324, 326, 328, 330. Ports 354, 356, 358, 360, 362, 364, 366, 368, 370, 372, 374, 376 may be, for example, slit valve openings having slit valves for transferring wafers therethrough by transfer robots 312, 314 and for providing a seal between respective chambers to prevent gas from passing therethrough. Generally, any port is open in order to transfer a wafer therethrough. Otherwise, the port is closed.

[0051] The load lock chambers 304, 306, transfer chambers 308, 310, holding chambers 316, 318, and processing chambers 320, 322, 324, 326, 328, 330 may be fluidly coupled to a gas and pressure control system (not specifically illustrated). The gas and pressure control system may include one or more gas pumps (e.g., turbo pumps, cryopumps, roughing pumps), gas sources, various valves, and conduits that are fluidly coupled to the various chambers. In operation, the factory interface robot 342 transfers the wafer from the FOUP 344 to the load lock chamber 304 or 306 through the port 350 or 352. The gas and pressure control system then evacuates the load lock chamber 304 or 306. The gas and pressure control system further maintains the transfer chambers 308, 310 and the holding chambers 316, 318 in an internal low pressure or vacuum environment (which may include an inert gas). Thus, evacuating the load lock chamber 304 or 306 facilitates the transfer of wafers between, for example, the atmospheric environment of the factory interface 302 and the low pressure or vacuum environment of the transfer chamber 308 .

[0052] The wafer is in the evacuated load lock chamber 304 or 306, and the transfer robot 312 transfers the wafer from the load lock chamber 304 or 306 to the transfer chamber 308 through the port 354 or 356. The transfer robot 312 can then transfer the wafer to any one of the processing chambers 320, 322 and / or between any of the processing chambers 320, 322 for processing through the corresponding ports 362, 364, and transfer the wafer to the holding chamber 316, 318 through the corresponding ports 358, 360 for holding for further transfer. Similarly, the transfer robot 314 can access the wafer in the holding chamber 316 or 318 through the port 366 or 368, and can transfer the wafer to any of the processing chambers 324, 326, 328, 330 and / or transfer between any of the processing chambers 324, 326, 328, 330 for processing through the corresponding ports 370, 372, 374, 376, and transfer the wafer to the holding chamber 316, 318 for holding for further transfer through the corresponding ports 366, 368. The transfer and holding of the wafer within and between the chambers can be performed in a low pressure or vacuum environment provided by a gas and pressure control system.

[0053] The processing chambers 320, 322, 324, 326, 328, 330 may be any suitable chamber for processing wafers. In some embodiments, the processing chamber 320 may be capable of performing an annealing process, the processing chamber 322 may be capable of performing a cleaning process, and the processing chambers 324, 326, 328, 330 may be capable of performing an epitaxial growth process. In some examples, the processing chamber 322 may be capable of performing a cleaning process, the processing chamber 320 may be capable of performing an etching process, and the processing chambers 324, 326, 328, 330 may be capable of performing a corresponding epitaxial growth process. The processing chamber 322 may be a SiCoNi® chamber available from Applied Materials, Inc., Santa Clara, California. TM The processing chamber 320 may be a Selectra available from Applied Materials, Inc., Santa Clara, California. TM Etching chamber.

[0054] The system controller 390 is coupled to the processing system 300 for controlling the processing system 300 or components thereof. For example, the system controller 390 can control the operation of the processing system 300 using direct control of the chambers 304, 306, 308, 316, 318, 310, 320, 322, 324, 326, 328, 330 of the processing system 300 or by controlling controllers associated with the chambers 304, 306, 308, 316, 318, 310, 320, 322, 324, 326, 328, 330. In operation, the system controller 390 can collect data and feedback from the various chambers to coordinate the performance of the processing system 300.

[0055] The system controller 390 generally includes a central processing unit (CPU) 392, a memory 394, and support circuits 396. The CPU 392 may be one of any form of general purpose processor that may be used in an industrial environment. The memory 394 or non-transitory computer readable medium may be accessed by the CPU 392 and may be one or more of the following memories: random-access memory (RAM), read only memory (ROM), floppy disk, hard disk, or any other form of local or remote digital storage. The support circuits 396 are coupled to the CPU 392 and may include cache, clock circuits, input / output subsystems, power supplies, or the like. The various methods disclosed herein may generally be implemented under the control of the CPU 392 by the CPU 392 executing computer instruction codes stored in the memory 394 (or the memory of a particular processing chamber), for example, as software routines. When the computer instruction codes are executed by the CPU 392, the CPU 392 controls the chamber to perform processing according to the various methods.

[0056] Other processing systems may use other configurations. For example, more or fewer processing chambers may be coupled to the transfer device. In the illustrated example, the transfer device includes transfer chambers 308, 310 and holding chambers 316, 318. In other examples, more or fewer transfer chambers (e.g., one transfer chamber) and / or more or fewer holding chambers (e.g., no holding chamber) may be implemented as a transfer device in the processing system.

[0057] The processes may typically be stored as software routines in a memory of the system controller 390 that, when executed by the processor, cause the processing chamber to perform the processes of the present disclosure. The software routines may also be stored and / or executed by a second processor (not shown) that is remote from the hardware controlled by the processor. Some or all of the methods of the present disclosure may also be performed in hardware. Thus, the processes may be implemented in software and performed using a computer system, in hardware as, for example, an application specific integrated circuit or other type of hardware, or as a combination of software and hardware. When executed by the processor, the software routines convert a general purpose computer into a special purpose computer (controller) that controls the operation of the chamber, thereby performing the processes.

[0058] Embodiments of the present disclosure are directed to non-transitory computer-readable media. In one or more embodiments, the non-transitory computer-readable medium includes instructions that, when executed by a controller of a processing chamber, cause the processing chamber to perform operations of any method described herein (e.g., deposition method 100). In one or more embodiments, the controller causes the processing chamber to perform operations of deposition method 100. In one or more embodiments, the controller causes the processing chamber to perform an operation of depositing a second metal material on a substrate surface having at least one feature therein (operation 110). The at least one feature includes at least one surface that defines a via having a bottom surface and at least one sidewall. In one or more embodiments, the controller causes the processing chamber to perform an operation of exposing to a first metal halide and a reducing agent to form a first metal gap filler within at least one feature (operation 120).

[0059] For ease of description, spatially relative terms, such as "under," "below," "lower," "above," "upper," and the like, may be used herein to describe the relationship of one element or feature to another element or feature shown in the drawings. It should be understood that the spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation depicted in the drawings. For example, if the device in the drawings is turned over, elements described as being "under" or "below" other elements or features will be oriented "above" the other elements or features. Thus, the exemplary term "under" may encompass both above and below orientations. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein are interpreted accordingly.

[0060] In the context of describing the materials and methods discussed herein (especially in the context of the following claims), the use of the terms "a", "an", and "the" and similar designators should be understood to cover the singular and the plural, unless otherwise specified herein or clearly contradicted by context. Unless otherwise specified herein, the recitation of numerical ranges herein is intended merely to serve as a shorthand method of individually referring to each individual value falling within the range, and each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order, unless otherwise specified herein or clearly contradicted by context. The use of any and all examples or exemplary language (e.g., "such as") provided herein is intended merely to better illustrate the materials and methods and does not constitute a limitation on the scope unless otherwise claimed. No language in the specification should be construed to indicate that any unclaimed element is essential to the practice of the disclosed materials and methods.

[0061] References in this specification to "one embodiment," "certain embodiments," "one or more embodiments," or "an embodiment" mean that the particular features, structures, materials, or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present disclosure. Therefore, the appearance of phrases such as "in one or more embodiments," "in certain embodiments," "in an embodiment," or "in an embodiment" throughout this specification does not necessarily refer to the same embodiment of the present disclosure. In one or more embodiments, the particular features, structures, materials, or characteristics are combined in any suitable manner.

[0062] Although the present disclosure has been described with reference to specific embodiments, it should be understood that these embodiments are only used to illustrate the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and changes may be made to the methods and apparatus of the present disclosure without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure is intended to include modifications and changes within the scope of the appended claims and their equivalents.

Claims

1. A method for depositing a molybdenum gap filler, the method comprising: exposing a substrate surface having at least one feature formed therein to a first molybdenum precursor and a reducing agent to form a first gap filler within the at least one feature, the at least one feature having an opening, two sidewalls and extending from a top surface to a bottom to a depth; exposing the substrate surface to a second molybdenum halide precursor to remove a portion of the first gap filler; and The first gap filler is repeatedly formed.

2. The method of claim 1 , wherein the aspect ratio of the at least one feature is greater than or equal to approximately 50:

1.

3. The method of claim 2, wherein the aspect ratio of the at least one feature is greater than or equal to approximately 100:

1. The method of claim 1 , wherein the at least one feature forms a memory cell of a DRAM. The method of claim 1 , wherein the first gap-filler is formed by a CVD process. The method of claim 5 , wherein the CVD process is performed in the absence of plasma.

7. The method of claim 1, wherein the first molybdenum precursor comprises an oxyhalide.

8. The method of claim 7, wherein the first molybdenum precursor consists essentially of MoO2Cl2.

9. The method according to claim 1, wherein: During the formation of the first gap filler, the substrate is maintained at a temperature in a range of about 500° C. to about 600° C.

10. The method of claim 1, wherein the first gap filler has a thickness of about 1000 nm on the bottom of the at least one feature prior to exposure to the second molybdenum halide. to about within the range.

11. The method of claim 1, wherein the substrate surface is cleaned after forming the first gap filler and before exposing to the second molybdenum halide.

12. The method of claim 1, wherein the second molybdenum halide consists essentially of MoCl5.

13. The method of claim 1, wherein removing the portion of the first gap filler removes approximately to about Thickness within the range.

14. The method of claim 1, wherein the portion of the first gap fill is removed from near the top of the at least one feature, and the method forms the first gap filler in a bottom-up manner. 15 . The method of claim 1 , wherein the first gap filler includes a void, and removing a portion of the first gap filler removes the void.

16. The method of claim 15, wherein the method forms a molybdenum gap filler without substantial voids.

17. The method of claim 1, wherein the substrate surface is cleaned after exposure to the second molybdenum halide and before repeating the forming of the first gap fill.

18. The method according to claim 1, further comprising: The first gap fill is repeatedly formed and removed to fill the at least one feature.

19. The method of claim 18, wherein the forming and removing constitute a deposition-etch cycle, and the cycle is performed a number of times ranging from about 200 to about 400 times.

20. A method of depositing a molybdenum gap filler, the method comprising: exposing a surface of a substrate having at least one feature formed therein to MoO2Cl2 and H2 to form a first gap filler in the at least one feature, the at least one feature having an opening, two sidewalls and extending from a top surface to a bottom to a depth, the feature having an aspect ratio greater than or equal to about 100:1; exposing the substrate surface to MoCl5 to remove a portion of the first gap fill; and The forming and removing of the first gap fill is repeated to completely fill the at least one feature.

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