Package-on-package structure and forming method thereof

Abstract

The invention discloses a stacked packaging structure and a forming method thereof, and the stacked packaging structure comprises a first substrate; the chip stacking structure is located on the upper surface of the first substrate, the chip stacking structure comprises a plurality of first semiconductor chips which are sequentially stacked in the direction perpendicular to the upper surface of the first substrate, and the chip stacking structure is electrically connected with the first substrate; the first functional surface of the first part of the first flexible circuit board is mounted on the top surface of the chip stacking structure and is electrically connected with the chip stacking structure, and the second part of the first flexible circuit board is bent to the side surface of the chip stacking structure; a part of the third functional surface of the second flexible circuit board is mounted on the second functional surface of the second part of the first flexible circuit board and is electrically connected with the first flexible circuit board; and the second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected with the second flexible circuit board. And the number of chips mounted on the upper surface of the first substrate is increased.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging, and in particular to a stacked packaging structure and a method for forming the same. Background Art

[0002] As chip miniaturization becomes increasingly difficult and the market's pursuit of chip high performance continues, the industry has begun to explore breakthroughs in the field of packaging. In recent years, advanced chip packaging technologies such as 2.5D packaging technology and 3D packaging technology have become a focus of attention for foundries, packaging and testing plants, chip design manufacturers, and EDA manufacturers.

[0003] 2.5D packaging technology or 3D packaging technology is to stack the same or different chips together to form a stacked packaging structure. The main advantages of 2.5D packaging technology and 3D packaging technology include: by stacking multiple chips in a direction perpendicular to the substrate surface to form a chip stacking structure, the integration and performance of the chip are improved; the connection between multiple chips in the chip stacking structure is realized by vertical connection, rather than the traditional planar connection, so the total wiring length between chips can be reduced to increase bandwidth, improve signal delay, and thus improve the reliability and stability of the packaging structure.

[0004] In a stacked packaging structure formed by using 2.5D packaging technology or 3D packaging technology, in addition to forming a chip stacking structure on a substrate, other chips (such as a control chip, a CPU chip or a GPU chip) are also mounted on the substrate surface on one side or around the chip stacking structure to improve the performance of the stacked packaging structure. However, other existing chips are mounted with their active surfaces parallel to the surface of the substrate, which will cause other chips to occupy a larger surface area of ​​the substrate when mounted, thereby limiting the number of chips mounted on the surface of the substrate, limiting further improvement of the function and performance of the packaging structure. Summary of the invention

[0005] The problem to be solved by the present application is how to increase the number of chips mounted on the surface of the first substrate to improve the function and performance of the stacked packaging structure.

[0006] To solve the above problems, an embodiment of the present application provides a stacked package structure, including: A stacked package structure, characterized by comprising: a first substrate including an upper surface and a lower surface opposite to each other; a chip stacking structure, located on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence in a direction perpendicular to the upper surface of the first substrate, and the chip stacking structure being electrically connected to the first substrate; a first flexible circuit board, the first flexible circuit board comprising a first functional surface and a second functional surface opposite to each other, the first flexible circuit board further comprising a first portion and at least one second portion connected to the first portion, the first functional surface of the first portion of the first flexible circuit board being mounted on the top surface of the chip stacking structure and being electrically connected to the chip stacking structure, and the second portion of the first flexible circuit board being bent to a side surface of the chip stacking structure; a second flexible circuit board, the second flexible circuit board comprising a third functional surface and a fourth functional surface opposite to each other, a portion of the third functional surface of the second flexible circuit board being mounted on the second functional surface of the second portion of the first flexible circuit board and being electrically connected to the first flexible circuit board; The second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected to the second flexible circuit board.

[0007] In an optional embodiment, each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface, the first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

[0008] In an optional embodiment, the first flexible circuit board has a second circuit, the first part and the first functional surface of the second part of the first flexible circuit board have a plurality of discrete first pads, the second functional surface of the second part of the first flexible circuit board has a plurality of discrete second pads, and the first pads and the second pads are electrically connected to the first circuit; The second flexible circuit board has a third circuit, the third functional surface of the second flexible circuit board has a plurality of discrete third pads, the fourth functional surface of the second flexible circuit board has a plurality of discrete fourth pads, and the third pads and the fourth pads are electrically connected to the third circuit.

[0009] In an optional embodiment, the first functional surface of the first part of the first flexible circuit board is mounted on the top surface of the chip stacking structure and is electrically connected to the chip stacking structure, comprising: first pads on the first functional surface of the first part of the first flexible circuit board are soldered together with corresponding second external terminals on the second surface of the topmost semiconductor chip in the chip stacking structure through first solder bumps; The third functional surface of the second flexible circuit board is mounted on the second functional surface of the second part of the first flexible circuit board and is electrically connected to the first flexible circuit board, comprising: the third pad on the third functional surface of the second flexible circuit board is soldered to the corresponding second pad on the second functional surface of the second part of the first flexible circuit board through the second solder bump; The second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected to the second flexible circuit board, including: the second semiconductor chip is soldered to the fourth pad corresponding to the fourth functional surface of the second flexible circuit board through the third solder bump.

[0010] In an optional embodiment, the second functional surface of the second part of the first flexible circuit board is attached to the side surface of the chip stacking structure.

[0011] In an optional embodiment, the second functional surface of the second part of the first flexible circuit board is directly attached to the side surface of the chip stacking structure through an adhesive layer.

[0012] In an optional embodiment, the stacked packaging structure also includes a third semiconductor chip, which is mounted on the first functional surface of the second part of the first flexible circuit board and is electrically connected to the corresponding first pad on the first functional surface of the second part through a fourth solder bump; the surface of the third semiconductor chip away from the first functional surface of the second part of the first flexible circuit board is directly attached to the side of the chip stacking structure through an adhesive layer.

[0013] In an optional embodiment, there is no electrical connection between the second flexible circuit board and the first substrate.

[0014] In an optional embodiment, the second flexible circuit board is electrically connected to the first substrate.

[0015] In an optional embodiment, the electrical connection between the second flexible circuit board and the first substrate includes: a portion of the second flexible circuit board is bent and extends parallel to a portion of the upper surface of the first substrate, and the bent portion of the second flexible circuit board is welded and electrically connected to a first upper pad corresponding to the upper surface of the first substrate via a connecting solder ball.

[0016] In an optional embodiment, the electrical connection between the second flexible circuit board and the first substrate includes: the second flexible circuit board and the first substrate are a soft-rigid combination board, the second flexible circuit board is flexible, the first substrate is rigid, and the second flexible circuit board is partially embedded in the first substrate and electrically connected to the first substrate.

[0017] In an optional embodiment, the electrical connection between the second flexible circuit board and the first substrate includes: the first substrate also includes a plurality of side surfaces between the upper surface and the lower surface, and the second flexible circuit board extends from at least one side surface of the first substrate to the lower surface of the first substrate and is electrically connected to the first substrate from the lower surface of the first substrate.

[0018] In an optional embodiment, the second flexible circuit board is electrically connected to the first substrate, including: the first substrate is also a flexible board, the first substrate and the second flexible circuit board are an integrated structure with electrical connection, and the second flexible circuit board is bent upward from at least one side of the first substrate.

[0019] In an optional embodiment, the first lower pad surface of the lower surface of the first substrate has a raised first external solder bump; the stacked packaging structure also includes: a second substrate, the second substrate has a fourth circuit, the upper surface of the second substrate has a second upper pad, the lower surface of the second substrate has a second lower pad, the second upper pad and the second lower pad are electrically connected to the fourth circuit; the first substrate is located on the second substrate, and the first external solder bump on the lower surface of the first substrate is welded together with the second upper pad corresponding to the upper surface of the second substrate; the second lower pad surface of the lower surface of the second substrate has a raised second external solder bump.

[0020] In an optional embodiment, the number of the second parts in the first flexible circuit board is one or more; when there are multiple second parts, the multiple second parts are respectively bent to different sides of the chip stacking structure.

[0021] In an optional embodiment, the number of the second flexible circuit boards is one or more; when the number of the second flexible circuit boards is one, one second flexible circuit board is electrically connected to one or more second parts of the first flexible circuit board; when the number of the second flexible circuit boards is multiple, multiple second flexible circuit boards are respectively electrically connected to multiple second parts of the first flexible circuit board.

[0022] In an optional embodiment, the number of the second semiconductor chips is one or more; when the number of the second semiconductor chips is multiple, the multiple second semiconductor chips are stacked sequentially on the fourth functional surface of the second flexible circuit board in a direction parallel to the upper surface of the first substrate, or the multiple second semiconductor chips are mounted at different positions on the fourth functional surface of the second flexible circuit board.

[0023] In an optional embodiment, the second semiconductor chip includes a third surface and a fourth surface relative to each other and a plurality of side surfaces located between the third surface and the fourth surface, the third surface having a third external terminal, the third external terminal of the third surface of the second semiconductor chip is electrically connected to a fourth pad corresponding to the fourth functional surface of the second flexible circuit board through the third solder bump; the side of the second semiconductor chip close to the upper surface of the first substrate has a side pad, and the side pad is soldered together with the first upper pad corresponding to the upper surface of the first substrate through a fifth solder bump.

[0024] On the other hand, the embodiment of the present application further provides a method for forming a stacked package structure, including: Providing a first substrate, the first substrate comprising an upper surface and a lower surface opposite to each other; forming a chip stacking structure on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence in a direction perpendicular to the upper surface of the first substrate, and the chip stacking structure being electrically connected to the first substrate; A first flexible circuit board is provided, wherein the second flexible circuit board comprises a first functional surface and a second functional surface opposite to each other, wherein the first flexible circuit board comprises a first portion and at least one second portion connected to the first portion, wherein the first functional surface of the first portion of the first flexible circuit board is mounted on the top surface of the chip stacking structure and is electrically connected to the chip stacking structure, and the second portion of the first flexible circuit board is bent to a side surface of the chip stacking structure, Providing a second flexible circuit board, wherein the second flexible circuit board includes a third functional surface and a fourth functional surface opposite to each other, and mounting a portion of the third functional surface of the second flexible circuit board on the second functional surface of the second portion of the first flexible circuit board and electrically connecting the second flexible circuit board to the first flexible circuit board; A second semiconductor chip is provided, and the second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected to the second flexible circuit board.

[0025] In an optional embodiment, each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface, the first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

[0026] In an optional embodiment, the first flexible circuit board has a second circuit, the first functional surfaces of the first part and the second part of the first flexible circuit board have a plurality of discrete first pads, the second functional surface of the second part of the first flexible circuit board has a plurality of discrete second pads, and the first pads and the second pads are electrically connected to the first circuit; the second flexible circuit board has a third circuit, the third functional surface of the second flexible circuit board has a plurality of discrete third pads, the fourth functional surface of the second flexible circuit board has a plurality of discrete fourth pads, and the third pads and the fourth pads are electrically connected to the third circuit; Mounting the first functional surface of the first part of the first flexible circuit board on the top surface of the chip stacking structure and electrically connecting the first functional surface of the first part of the first flexible circuit board to the chip stacking structure includes: soldering the first pads on the first functional surface of the first part of the first flexible circuit board to the corresponding second external terminals on the second surface of the topmost semiconductor chip in the chip stacking structure through the first solder bump; Mounting part of the third functional surface of the second flexible circuit board on the second functional surface of the second part of the first flexible circuit board and electrically connecting the second flexible circuit board to the first flexible circuit board comprises: soldering the third pad on the part of the third functional surface of the second flexible circuit board to the corresponding second pad on the second functional surface of the second part of the first flexible circuit board through the second solder bump; Mounting on the fourth functional surface of the second flexible circuit board and electrically connecting with the second flexible circuit board includes: soldering the second semiconductor chip to the fourth pad corresponding to the fourth functional surface of the second flexible circuit board through the third solder bump.

[0027] In an optional embodiment, the forming method further includes: attaching the second functional surface of the second part of the first flexible circuit board to the side surface of the chip stacking structure.

[0028] In an optional embodiment, the second functional surface of the second part of the first flexible circuit board is directly attached to the side surface of the chip stacking structure through an adhesive layer.

[0029] In an optional embodiment, the formation method also includes: providing a third semiconductor chip, mounting the third semiconductor chip on the first functional surface of the second part of the first flexible circuit board and electrically connecting the third semiconductor chip to the corresponding first pad on the first functional surface of the second part through a fourth solder bump; and directly attaching the surface of the second semiconductor chip away from the first functional surface of the second part of the first flexible circuit board to the side of the chip stacking structure through an adhesive layer.

[0030] The advantages of the technical solution of this application are: In the stacked packaging structure and its forming method mentioned above in the present application, the first functional surface of the first part of the first flexible circuit board of the stacked packaging structure is mounted on the top surface of the chip stacking structure and is electrically connected to the chip stacking structure, and the second part of the first flexible circuit board is bent to the side of the chip stacking structure; the third functional surface of part of the second flexible circuit board is mounted on the second functional surface of the second part of the first flexible circuit board and is electrically connected to the first flexible circuit board; the second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected to the second flexible circuit board. Since the first flexible circuit board, the second flexible circuit board and the second semiconductor chip in the stacked packaging structure of the present application have the aforementioned specific mounting positions, and the first functional surface and the second functional surface of the second part of the first flexible circuit board are not parallel to the upper surface of the first substrate, the third functional surface and the fourth functional surface of the second flexible circuit board are not parallel to the upper surface of the first substrate, and the functional surface of the second semiconductor chip is also not parallel to the upper surface of the first substrate, the area of ​​the upper surface of the first substrate occupied by the first flexible circuit board, the second flexible circuit board and the second semiconductor chip will be smaller, so that more other chips or devices can be mounted on the upper surface of the first substrate, so that the function and performance of the packaging structure are further improved; and the existence of the first flexible circuit board and the second flexible circuit board makes the chip The connection path between the stacking structure and the external substrate or device is increased, which can increase the bandwidth on the one hand (the chip stacking structure can not only be directly electrically connected to the first substrate, but also be electrically connected to the first substrate and the second semiconductor chip and / or the third semiconductor chip introduced later through the first flexible circuit board and the second flexible circuit board), and on the other hand, it can achieve more functional expansion and performance improvement of the packaging structure while occupying a smaller surface area on the first substrate (for example, a second semiconductor chip with a specific function or a plurality of second semiconductor chips with the same or different functions can be mounted on the fourth functional surface of the second flexible circuit board, and a third semiconductor chip with a specific function or a plurality of third semiconductor chips with the same or different functions can be mounted on the first functional surface of the second part of the first flexible circuit board). BRIEF DESCRIPTION OF THE DRAWINGS

[0031] To facilitate understanding and explanation of the features and advantages of the present application, in the following figures, the components are not necessarily drawn to scale, and components with similar related properties or features may have the same or similar reference numerals.

[0032] Figure 1 A schematic top view of a stacked package structure according to an embodiment of the present application; Figure 2 For an embodiment of the present application Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 3 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 4 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 5 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 6 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 7 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 8 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig. 9 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained along the middle cutting line AA1. DETAILED DESCRIPTION

[0033] The specific implementation manner of the packaging structure and the method for forming the same provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0034] On the one hand, an embodiment of the present application provides a stacked packaging structure.

[0035] Figure 1 A schematic top view of a stacked package structure according to an embodiment of the present application; Figure 2 For an embodiment of the present application Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained along the middle cutting line AA1.

[0036] refer to Figure 1 and Figure 1 , the packaging structure comprises: A first substrate 101, wherein the first substrate 101 includes an upper surface and a lower surface opposite to each other; A chip stacking structure 20 is located on the upper surface of the first substrate 101, the chip stacking structure 20 includes a plurality of first semiconductor chips 201 stacked in sequence along a direction perpendicular to the upper surface of the first substrate 101, and the chip stacking structure 20 is electrically connected to the first substrate 101; A first flexible circuit board 111, wherein the first flexible circuit board 111 comprises a first functional surface and a second functional surface opposite to each other, and the first flexible circuit board 111 further comprises a first portion and at least one second portion connected to the first portion, wherein the first functional surface of the first portion of the first flexible circuit board 111 is mounted on the top surface of the chip stacking structure 20 and is electrically connected to the chip stacking structure 20, and the second portion of the first flexible circuit board 111 is bent to a side surface of the chip stacking structure 20; A second flexible circuit board 112, wherein the second flexible circuit board 112 comprises a third functional surface and a fourth functional surface opposite to each other, wherein a portion of the third functional surface of the second flexible circuit board 112 is mounted on the second functional surface of the second portion of the first flexible circuit board 111 and is electrically connected to the first flexible circuit board 111; The second semiconductor chip 202 is mounted on the fourth functional surface of the second flexible circuit board 112 and is electrically connected to the second flexible circuit board 112 .

[0037] Specifically, the first substrate 101 in the stacked package structure serves as a support carrier and a connection carrier in the packaging process. In one embodiment, the substrate 101 may include an upper surface and a lower surface relative to each other, the upper surface of the first substrate 101 has a plurality of discrete first upper pads (not shown in the figure), the lower surface of the first substrate 101 has a plurality of discrete first lower pads (not shown in the figure), the first substrate 101 has a first circuit (not shown in the figure), part of the first circuit can be used for electrical connection between the first upper pads on the upper surface of the first substrate 101 and the first lower pads corresponding to the lower surface of the first substrate 101, part of the first circuit can also be used for electrical connection between part of the first upper pads on the upper surface of the first substrate 101, and part of the first circuit can also be used for electrical connection between part of the first lower pads on the lower surface of the first substrate 101. The first upper pads on the upper surface of the first substrate 101 can be electrically connected to the chip stacking structure or other devices mounted on the first substrate, and the first external solder bumps 102 can be formed on the first lower pads on the lower surface of the first substrate 101, and the first external solder bumps 102 are used to connect with other devices, other first substrates or packaging structures. The material of the first upper pad, the first lower pad and the first circuit is metal, and specifically can be one or more of aluminum, copper, nickel, tin, titanium, tungsten, platinum, chromium, tantalum, gold and silver. The material of the first external solder bump 102 is tin or a tin alloy, and the tin alloy is one or more of tin-silver, tin-zinc, tin-lead, tin-indium, tin-gold, tin-copper, tin-silver-copper, tin-silver-zinc, tin-bismuth-indium, tin-zinc-indium or tin-silver-antimony.

[0038] The chip stacking structure 20 in the stacked package structure includes a plurality of first semiconductor chips 201 stacked in sequence along a direction perpendicular to the upper surface of the first substrate 101 , and the number of the first semiconductor chips 201 may be two, three, four or more. Figure 2 In the description, the chip stacking structure 20 having four first semiconductor chips 201 is taken as an example.

[0039] The functions of the plurality of first semiconductor chips 201 in the chip stacking structure 20 are the same or different. In one embodiment, when the functions of the plurality of first semiconductor chips 201 are the same, the internal structures of the plurality of first semiconductor chips 201 are the same. In another embodiment, when the functions of the plurality of first semiconductor chips 201 are the same, the internal structures of the plurality of first semiconductor chips 201 are different.

[0040] According to different functions, the first semiconductor chip 201 may include a logic chip and / or a memory chip. In one embodiment, the logic chip may include but is not limited to a gate array, a cell substrate array, an embedded array, a structured application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), a complex programmable logic device (CPLD), a graphics processing unit (GPU), a central processing unit (CPU), a microprocessing unit (MPU), a microcontroller unit (MCU), a logic integrated circuit (IC), an application processor (AP), a display driver IC (DDI), a radio frequency (RF) chip, a power chip or a complementary metal oxide semiconductor (CMOS) image sensor. In one embodiment, the memory chip may include but is not limited to a dynamic random access memory (DRAM), a static random access memory (SRAM), a magnetoresistive random access memory (MRAM), a phase-change memory (PRAM), a resistive random access memory (RRAM) or a non-volatile memory chip (such as a flash memory).

[0041] In one embodiment, all the first semiconductor chips 201 in the chip stacking structure 20 have the same function. In a specific embodiment, all the first semiconductor chips 201 in the chip stacking structure 20 are memory chips, such as Figure 2The four first semiconductor chips 201 in the chip stacking structure 20 are all memory chips. In another specific embodiment, all the first semiconductor chips 201 in the chip stacking structure 20 may also be logic chips.

[0042] In another embodiment, the functions of some of the first semiconductor chips 201 in the chip stacking structure 20 are different from the functions of other first semiconductor chips 201. In a specific embodiment, one or two first semiconductor chips 201 at the bottom layer of the chip stacking structure 20 are logic chips, and other first semiconductor chips 201 at the upper layer of the chip stacking structure 20 are memory chips. The logic chip is used to control and manage the storage process, reading process (and deletion process) of the memory chip. For example, Figure 2 The bottom-most first semiconductor chip 201 in the chip stacking structure 20 is a logic chip, and the three first semiconductor chips 201 on the upper layer are memory chips.

[0043] There is electrical connection between the upper first semiconductor chip 201 and the lower first semiconductor chip 201 in the chip stacking structure 20 , and there is electrical connection between the bottom first semiconductor chip 201 and the first substrate 101 in the chip stacking structure 20 . In one embodiment, each first semiconductor chip 201 in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip 201 has an integrated circuit therein, and the integrated circuit can be a storage circuit or a logic control circuit. The first surface has a plurality of discrete first external terminals, and the first external terminals can be solder balls 205 or solder balls 206 protruding from the first surface. The second surface has a plurality of discrete second external terminals, and the second external terminals can be through-hole connection structures 207 (such as silicon through-via connection structures, TSV) that can be exposed on the second surface. The first external terminals and the second external terminals are electrically connected to the integrated circuit. When multiple first semiconductor chips 201 are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip 201 is stacked downward on the second surface of the lower first semiconductor chip 201, and the first external terminal on the first surface of the upper first semiconductor chip 201 is electrically connected to the second external terminal on the second surface of the lower first semiconductor chip 201. Specifically, the solder ball 205 on the first surface of the first semiconductor chip 201 in the upper layer is electrically connected to the exposed through-hole connection structure 207 on the second surface of the first semiconductor chip 201 in the lower layer, and the solder ball 206 (first external terminal) on the first surface of the first semiconductor chip 201 in the bottom layer of the chip stacking structure 20 is electrically connected to the corresponding first upper pad on the upper surface of the first substrate 101, the solder ball 205 is a smaller micro solder ball, and the solder ball 206 can be a relatively larger C4 solder ball.

[0044] Continue to refer Figure 1 and Figure 2In the stacked package structure, the first flexible circuit board 111 is also called a soft board or FPC (Flexible Printed Circuit, FPC). The first flexible circuit board 111 can not only be used for the electrical connection between the chip stacking structure 20 and the second flexible circuit board 112 arranged on one side or around the chip stacking structure 20 from the top surface, but also can be used for the interconnection between some second external terminals on the second surface of the topmost first semiconductor chip 201 in the chip stacking structure 20. In one embodiment, the first flexible circuit board 111 includes a first functional surface and a second functional surface opposite to each other, the first flexible circuit board 111 also includes a first part and at least one second part connected to the first part, the first flexible circuit board 111 has a second circuit (not shown in the figure), the first functional surface of the first part and the second part of the first flexible circuit board 111 has a plurality of discrete first pads (not shown in the figure), the second functional surface of the second part of the first flexible circuit board 111 has a plurality of discrete second pads (not shown in the figure), and the first pad and the second pad are electrically connected to the first circuit. The first functional surface of the first part of the first flexible circuit board 111 is mounted on the top surface of the chip stacking structure 20 and the first solder pad of the first part is electrically connected to the chip stacking structure 20. The second part of the first flexible circuit board 111 is bent to the side of the chip stacking structure 20, and the second solder pad on the second functional surface of the second part can be electrically connected to the second flexible circuit board 112.

[0045] In one embodiment, the first functional surface of the first part of the first flexible circuit board 111 is mounted on the top surface of the chip stacking structure 20 and is electrically connected to the chip stacking structure 20, including: the first pads on the first functional surface of the first part of the first flexible circuit board 111 are soldered together with the corresponding second external terminals on the second surface of the topmost first semiconductor chip 201 in the chip stacking structure 20 through the first solder bumps 113. The material of the first solder bumps 113 can be tin or tin alloy.

[0046] In one embodiment, when the second portion of the first flexible circuit board 111 is bent to the side of the chip stacking structure 20, the first functional surface and the second functional surface of the second portion of the first flexible circuit board 111 are not parallel to the upper surface of the first substrate 101. Specifically, the first functional surface and the second functional surface of the second portion of the first flexible circuit board 111 may be perpendicular to the upper surface of the first substrate 101, or form an angle less than 90 degrees with the upper surface of the first substrate 101, so as to reduce the lateral area occupied on the upper surface of the first substrate 100.

[0047] The second flexible circuit board 112 is also called a soft board or FPC (Flexible Printed Circuit, FPC). The second flexible circuit board 112 can be used not only for the electrical connection between the first flexible circuit board 111 and the second semiconductor chip 202, but also for the electrical connection between different external terminals on the second semiconductor chip 202. In one embodiment, the second flexible circuit board 112 includes a third functional surface and a fourth functional surface opposite to each other. Part of the third functional surface of the second flexible circuit board 112 is mounted on the second functional surface of the second part of the first flexible circuit board 111 and is electrically connected to the first flexible circuit board 111. When the second flexible circuit board 112 is mounted on the second functional surface of the second part of the first flexible circuit board 111, the third functional surface and the fourth functional surface of the second flexible circuit board 112 are not parallel to the upper surface of the first substrate 101. Specifically, the third functional surface and the fourth functional surface of the second flexible circuit board 112 can be perpendicular to the upper surface of the first substrate 101, or form an angle less than 90 degrees with the upper surface of the first substrate 101, so as to reduce the lateral area occupied on the upper surface of the first substrate 100. In one embodiment, the second flexible circuit board 212 has a third circuit (not shown in the figure), the third functional surface of the second flexible circuit board 212 has a plurality of discrete third pads (not shown in the figure), and the fourth functional surface of the second flexible circuit board 212 has a plurality of discrete fourth pads (not shown in the figure), and the third pads and the fourth pads are electrically connected to the third circuit.

[0048] In one embodiment, a portion of the third functional surface of the second flexible circuit board 112 is mounted on the second functional surface of the second part of the first flexible circuit board 111 and is electrically connected to the first flexible circuit board 111, including: a third soldering pad on a portion of the third functional surface of the second flexible circuit board 112 is soldered together with a corresponding second soldering pad on the second functional surface of the second part of the first flexible circuit board 111 through a second solder bump 114.

[0049] A second semiconductor chip 202 electrically connected to the fourth functional surface of the second flexible circuit board 112 is also mounted thereon, and the functional surface of the second semiconductor chip 202 (the surface on which the external terminals are formed and opposite to the fourth functional surface of the second flexible circuit board 112) is also not parallel to the upper surface of the first substrate 101. Specifically, the functional surface of the second semiconductor chip 202 may be perpendicular to the upper surface of the first substrate 101, or form an angle less than 90 degrees with the upper surface of the first substrate 101. Therefore, the first flexible circuit board 111, the second flexible circuit board 112 and the second semiconductor chip 202 in the stacked packaging structure of the present application have the aforementioned specific mounting positions, the first functional surface and the second functional surface of the second part of the first flexible circuit board 111 are not parallel to the upper surface of the first substrate 101, the third functional surface and the fourth functional surface of the second flexible circuit board 112 are not parallel to the upper surface of the first substrate 101, and the functional surface of the second semiconductor chip 202 is also not parallel to the upper surface of the first substrate 101, so that the area of ​​the upper surface of the first substrate 101 occupied by the first flexible circuit board 111, the second flexible circuit board 112 and the second semiconductor chip 202 will be smaller, so that more other chips or devices can be mounted on the upper surface of the first substrate 101, so that the function and performance of the packaging structure are further improved; and the existence of the first flexible circuit board 111 and the second flexible circuit board 112 In this way, the connection path between the chip stacking structure 20 and the external substrate or device is increased, which can increase the bandwidth on the one hand (the chip stacking structure 20 can not only be directly electrically connected to the first substrate 101, but also be electrically connected to the first substrate 101 and the second semiconductor chip 202 and / or the third semiconductor chip introduced later through the first flexible circuit board 111 and the second flexible circuit board 112), and on the other hand, it can achieve more functional expansion and performance improvement of the packaging structure while occupying a smaller surface area of ​​the first substrate 101 (for example, a second semiconductor chip 202 with a specific function or a plurality of second semiconductor chips 202 with the same or different functions can be mounted on the fourth functional surface of the second flexible circuit board 112, and a third semiconductor chip with a specific function or a plurality of third semiconductor chips with the same or different functions can be mounted on the first functional surface of the second part of the first flexible circuit board 111).

[0050] The second semiconductor chip 202 may have different functions from the first semiconductor chip 201 in the chip stacking structure 20, or may have the same function. In one embodiment, the second semiconductor chip 202 may be a logic chip or a memory chip. In one embodiment, the second semiconductor chip 202 is mounted on the fourth functional surface of the second flexible circuit board 112 and is electrically connected to the second flexible circuit board 112, including: the second semiconductor chip 202 is soldered to the fourth pad corresponding to the fourth functional surface of the second flexible circuit board 112 through the third solder bump 212. The material of the third solder bump 212 may be tin or a tin alloy.

[0051] The number of the second semiconductor chips 202 is one or more. In one embodiment, when the number of the second semiconductor chips 202 is multiple, the multiple second semiconductor chips 202 are sequentially stacked on the fourth functional surface of the second flexible circuit board 112 along a direction parallel to the upper surface of the first substrate 100, or the multiple second semiconductor chips 202 are mounted at different positions on the fourth functional surface of the second flexible circuit board 112.

[0052] Continue to refer Figure 1 and Figure 2 The chip stacking structure 20 includes a relative top surface and a bottom surface, and a plurality of side surfaces located between the top surface and the bottom surface. In one embodiment, the chip stacking structure 20 is a cubic structure. The chip stacking structure 20 may include a top surface and a bottom surface and four side surfaces located between the top surface and the bottom surface. The first surface of the first semiconductor chip 201 at the bottom layer in the chip stacking structure 20 corresponds to the bottom surface, and the second surface of the first semiconductor chip 201 at the top layer in the chip stacking structure 20 corresponds to the top surface.

[0053] The number of the second parts in the first flexible circuit board 111 is one or more. In one embodiment, when there are multiple second parts, the multiple second parts are electrically connected to the first part, and the number of the second parts can correspond to the number of sides of the chip stacking structure 20. For example, when there are four sides of the chip stacking structure 20, the number of the multiple second parts can be two, three or four, and the multiple second parts are bent to different sides of the chip stacking structure 20. In one example, Figure 1 As shown, the chip stacking structure 20 has four sides, the second parts of the first flexible circuit board 111 are four, the four second parts are connected to the first part from four sides of the first part of the first flexible circuit board 111, and the four second parts are bent to the four sides of the chip stacking structure 20 respectively.

[0054] The number of the second flexible circuit board 112 is one or more. In one embodiment, when the number of the second flexible circuit board 112 is one, one second flexible circuit board 112 is electrically connected to one or more second parts of the first flexible circuit board 111. In another embodiment, when the number of the second flexible circuit board 112 is multiple, multiple second flexible circuit boards 112 are respectively electrically connected to multiple second parts of the first flexible circuit board 111. The second flexible circuit board 112 and the first flexible circuit board 111 can be arranged on multiple sides (two, three or four sides, or all sides) of the chip stacking structure 20, so as to increase the surface area where the second flexible circuit board 112 and the first flexible circuit board 111 can be arranged, so that when occupying a smaller area of ​​the upper surface of the first substrate 101, the second flexible circuit board 112 and the first flexible circuit board 111 can not only provide more conduction paths to further improve the bandwidth, but also the fourth functional surface of the second flexible circuit board 112 can mount more second semiconductor chips 202, and the first functional surface of the second part of the first flexible circuit board 111 can mount more third semiconductor chips, so as to further expand the function of the stacked packaging structure and improve the performance of the stacked packaging structure.

[0055] The second functional surface of the second portion of the first flexible circuit board 111 is attached to the side surface of the chip stacking structure 20. Figure 1 and Figure 2 The second functional surface of the second part of the first flexible circuit board 111 is directly attached to the side of the chip stacking structure through the adhesive layer 106.

[0056] In one embodiment, the stacked package structure further includes other semiconductor chips or devices 204, which are mounted on the upper surface of the first substrate 101 on one side of the chip stacking structure 20. Specifically, the external terminals of the semiconductor chips or devices 204 are electrically connected to the upper surface of the first substrate 101 through the sixth solder bumps 214. The other semiconductor chips or devices 204 can be electrically connected to the chip stacking structure 20 through part of the first circuit in the first substrate 101 to communicate or exchange or transfer data, such as being electrically connected to the first semiconductor chip 201 at the bottom of the chip stacking structure 20. Alternatively, the other semiconductor chips or devices 204 can also be electrically connected to the second semiconductor chip 202 through part of the first circuit in the first substrate 101 and part of the third circuit in the second flexible circuit board 112 to communicate or exchange or transfer data. Alternatively, the other semiconductor chips or devices 204 may also be electrically connected to the chip stacking structure 20 and the second semiconductor chip 202 through part of the first circuit in the first substrate 101 and part of the third circuit in the second flexible circuit board 112 to communicate or exchange or transfer data.

[0057] The second flexible circuit board 112 may be electrically connected to the first substrate 101 or not. Figure 1 and 2 , when the second flexible circuit board 112 and the first substrate 101 may not be electrically connected, a side of the second flexible circuit board 112 close to the upper surface of the first substrate 101 may be suspended on the upper surface of the first substrate 101, directly located on the upper surface of the first substrate 101, or adhered to the upper surface of the first substrate 101 through an adhesive layer. The specific situation that the second flexible circuit board 112 and the first substrate 101 may not be electrically connected will be described in detail in the subsequent embodiments.

[0058] Another embodiment of the present application also provides a stacked packaging structure, please refer to Figure 1 and Figure 3 The difference between this embodiment and the previous embodiment is that: the second flexible circuit board 112 is electrically connected to the first substrate 101, and the specific method of the electrical connection is that a part of the second flexible circuit board 112 is bent and extends parallel to a part of the upper surface of the first substrate 101, and the bent part of the second flexible circuit board 112 is welded and electrically connected to the first upper pad corresponding to the upper surface of the first substrate 101 through the connecting solder ball 116.

[0059] Another embodiment of the present application also provides a stacked packaging structure, please refer to Figure 1 and Figure 4 The difference between this embodiment and the previous embodiment is that: the second flexible circuit board 112 is electrically connected to the first substrate 101, and the specific manner of the electrical connection is that the second flexible circuit board 112 and the first substrate 101 are a soft-hard combination board, the second flexible circuit board 112 is flexible, the first substrate 101 is rigid, and the second flexible circuit board 112 is partially embedded in the first substrate 101 and electrically connected to the first substrate 101. Specifically, one end of the second flexible circuit board 112 is embedded in the first substrate 101 and electrically connected to the first substrate 101. When the second flexible circuit board 112 and the first substrate 101 are a hard-soft combination board, the second flexible circuit board 112 and the first substrate 101 can be manufactured together, and the connection accuracy between the second flexible circuit board 112 and the first substrate 101 is improved. Since one end of the second flexible circuit board 112 is fixed to the first substrate 101, the difficulty of mounting the second flexible circuit board 112 can be reduced and the mounting accuracy can be provided. In addition, when the second flexible circuit board 112 is connected to the first substrate 101, there is no need to pass through solder bumps, which improves the signal transmission rate between the flexible circuit board 112 and the first substrate 101.

[0060] Another embodiment of the present application also provides a stacked packaging structure, please refer to Figure 1 and Figure 5 The difference between this embodiment and the previous embodiment is that: the second semiconductor chip 202 includes a third surface and a fourth surface opposite to each other and a plurality of side surfaces located between the third surface and the fourth surface, the third surface has a third external terminal, and the third external terminal of the third surface of the second semiconductor chip 202 is electrically connected to a fourth pad corresponding to the fourth functional surface of the second flexible circuit board 112 through a third solder bump 212; the side of the second semiconductor chip 202 close to the upper surface of the first substrate has a side pad 216, and the side pad 216 is soldered together with the first upper pad corresponding to the upper surface of the first substrate 101 through a fifth solder bump 215.

[0061] Another embodiment of the present application also provides a stacked packaging structure, please refer to Figure 1 and Figure 6, the difference between this embodiment and the previous embodiment is that: the second flexible circuit board 112 may or may not be electrically connected to the first substrate 101, and the stacked package structure further includes a third semiconductor chip 203, the third semiconductor chip 203 is mounted on the first functional surface of the second part of the first flexible circuit board 111 and is electrically connected to the corresponding first pad on the first functional surface of the second part of the first flexible circuit board 111 through the fourth solder bump 213; the surface of the third semiconductor chip 203 away from the first functional surface of the second part of the first flexible circuit board 111 is directly attached to the side of the chip stacking structure 20 through the adhesive layer 106. The third semiconductor chip 203 mounted in this specific manner occupies a smaller lateral area on the first substrate 101, so that it can further expand the functions of the package structure and further improve the performance while occupying a smaller surface area on the first substrate 101. The second semiconductor chip 202 may have different functions from the first semiconductor chip 201 in the chip stacking structure 20, or may have the same function. In one embodiment, the second semiconductor chip 202 may be a logic chip or a memory chip.

[0062] Another embodiment of the present application also provides a stacked packaging structure, please refer to Figure 1 and Figure 7 , the difference between this embodiment and the previous embodiment is that: the second flexible circuit board 112 is electrically connected to the first substrate 101, and the specific manner of the electrical connection is that the first substrate 101 is also a flexible board, the first substrate 101 and the second flexible circuit board 112 are an integrated structure with electrical connection, and the second flexible circuit board 112 is bent upward from at least one side of the first substrate 101. Specifically, the first substrate 101 includes four sides, the second flexible circuit board 112 is bent upward from one side of the first substrate 101, or the second flexible circuit board 112 is bent upward from two sides of the first substrate 101, or the second flexible circuit board 112 is bent upward from three sides of the first substrate 101, or the second flexible circuit board 112 is bent upward from four sides of the first substrate 101.

[0063] Another embodiment of the present application also provides a stacked packaging structure, please refer to Figure 1 and Figure 8The difference between this embodiment and the previous embodiment is that: the second flexible circuit board 112 is electrically connected to the first substrate 101, and the specific manner of the electrical connection is that the first substrate 101 is also a flexible board, the first substrate 101 and the second flexible circuit board 112 are an integrated structure with electrical connection, and the second flexible circuit board 112 is bent upward from at least one side of the first substrate 101; the third semiconductor chip 203 is mounted on the first functional surface of the second part of the first flexible circuit board 111 and is electrically connected to the corresponding first pad on the first functional surface of the second part of the first flexible circuit board 111 through the fourth solder protrusion 213; the surface of the third semiconductor chip 203 away from the first functional surface of the second part of the first flexible circuit board 111 is directly attached to the side of the chip stacking structure 20 through the adhesive layer 106.

[0064] Another embodiment of the present application also provides a stacked packaging structure, please refer to Figure 1 and Fig. 9 , the difference between this embodiment and the previous embodiment is that: the second flexible circuit board 112 is electrically connected to the first substrate 101, and the specific manner of the electrical connection is that the first substrate 101 is also a flexible board, the first substrate 101 and the second flexible circuit board 112 are an integrated structure with electrical connection, and the first lower pad surface of the lower surface of the first substrate 101 has a raised first external solder bump 102; the stacked package structure also includes: a second substrate 121, the second substrate 121 has a fourth circuit, the upper surface of the second substrate has a second upper pad, the lower surface of the second substrate 121 has a second lower pad, and the second upper pad and the second lower pad are electrically connected to the fourth circuit; the first substrate 101 is located on the second substrate 121, and the first external solder bump 102 on the lower surface of the first substrate 101 is welded to the second upper pad corresponding to the upper surface of the second substrate 121; the second lower pad surface of the lower surface of the second substrate 121 has a raised second external solder bump 122. The other semiconductor chips or devices 204 are mounted on the upper surface of the second substrate 121 and are electrically connected to the second substrate 121 .

[0065] Another embodiment of the present application also provides a stacked packaging structure. The difference between this embodiment and the previous embodiment is that the second flexible circuit board 112 is electrically connected to the first substrate 101, and the specific method of the electrical connection is that the first substrate also includes multiple side surfaces located between the upper surface and the lower surface, and the second flexible circuit board extends from at least one side surface of the first substrate to the lower surface of the first substrate and is electrically connected to the first substrate from the lower surface of the first substrate.

[0066] Another aspect of the present application embodiment further provides a method for forming a stacked package structure. Figure 1 , a method for forming a stacked package structure, comprising: Providing a first substrate 101, wherein the first substrate 101 includes an upper surface and a lower surface opposite to each other; A chip stacking structure 20 is formed on the upper surface of the first substrate 101, wherein the chip stacking structure 20 includes a plurality of first semiconductor chips 201 stacked in sequence in a direction perpendicular to the upper surface of the first substrate 101, and the chip stacking structure 20 is electrically connected to the first substrate 101; Providing a first flexible circuit board 111, wherein the first flexible circuit board 112 includes a first functional surface and a second functional surface opposite to each other, wherein the first flexible circuit board 111 includes a first portion and at least one second portion connected to the first portion, wherein the first functional surface of the first portion of the first flexible circuit board 111 is mounted on the top surface of the chip stacking structure 20 and is electrically connected to the chip stacking structure 20, and the second portion of the first flexible circuit board 111 is bent to a side surface of the chip stacking structure 20; Providing a second flexible circuit board 112, wherein the second flexible circuit board 112 includes a third functional surface and a fourth functional surface opposite to each other, and mounting a portion of the third functional surface of the second flexible circuit board 112 on the second functional surface of the second portion of the first flexible circuit board 111 and electrically connecting the second flexible circuit board 111; A second semiconductor chip 202 is provided. The second semiconductor chip 202 is mounted on the fourth functional surface of the second flexible circuit board 112 and is electrically connected to the second flexible circuit board 112 .

[0067] In one embodiment, each first semiconductor chip 201 in the chip stacking structure 20 includes a first surface and a second surface opposite to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip 201 has an integrated circuit. The first surface has a plurality of discrete first external terminals, and the second surface has a plurality of discrete second external terminals. The first external terminals and the second external terminals are electrically connected to the integrated circuit. When the plurality of first semiconductor chips 201 are stacked in sequence along a direction perpendicular to the upper surface of the first substrate 101, the first surfaces of the upper first semiconductor chips 201 are stacked downward on the lower first semiconductor chips 201. The second surface of the first semiconductor chip 201, and the first external terminal of the first surface of the upper first semiconductor chip 201 is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip 201; the first substrate 101 has a first circuit, the upper surface of the first substrate 101 has a plurality of discrete first upper pads, the lower surface of the first substrate 101 has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip 201 is electrically connected to the corresponding first upper pad on the upper surface of the first substrate 101.

[0068] In one embodiment, the first flexible circuit board 111 has a second circuit, the first functional surfaces of the first part and the second part of the first flexible circuit board 111 have a plurality of discrete first pads, the second functional surface of the second part of the first flexible circuit board 111 has a plurality of discrete second pads, and the first pads and the second pads are electrically connected to the first circuit; the first flexible circuit board 112 has a third circuit, the third functional surface of the first flexible circuit board 112 has a plurality of discrete third pads, the fourth functional surface of the first flexible circuit board 112 has a plurality of discrete fourth pads, and the third pads and the fourth pads are electrically connected to the third circuit; Mounting the first functional surface of the first part of the first flexible circuit board 111 on the top surface of the chip stacking structure 20 and electrically connecting it to the chip stacking structure 20 includes: soldering the first pads on the first functional surface of the first part of the first flexible circuit board 111 to the corresponding second external terminals on the second surface of the topmost first semiconductor chip 201 in the chip stacking structure 20 through the first solder bump 113; Mounting part of the third functional surface of the second flexible circuit board 112 on the second functional surface of the second part of the first flexible circuit board 111 and electrically connecting the second flexible circuit board 111 includes: soldering the third pad on the part of the third functional surface of the second flexible circuit board 112 to the corresponding second pad on the second functional surface of the second part of the first flexible circuit board 111 through the second solder bump 114; Mounting on the fourth functional surface of the second flexible circuit board 112 and electrically connecting with the second flexible circuit board 112 includes: soldering the second semiconductor chip 202 to the fourth pad corresponding to the fourth functional surface of the second flexible circuit board 112 through the third solder bump 212 .

[0069] In one embodiment, the forming method further includes: attaching the second functional surface of the second part of the first flexible circuit board 111 to the side surface of the chip stacking structure 20 .

[0070] In one embodiment, the second functional surface of the second portion of the first flexible circuit board 111 is formed by an adhesive layer 106 (see Figure 2-5 Any figure) is directly attached to the side of the chip stacking structure 20.

[0071] In one embodiment, reference Figure 6 or Figure 8 The formation method also includes: providing a third semiconductor chip 203, mounting the third semiconductor chip 203 on the first functional surface of the second part of the first flexible circuit board 111 and electrically connecting the third semiconductor chip 203 to the corresponding first pad on the first functional surface of the second part through a fourth solder bump 213; directly attaching the surface of the third semiconductor chip 203 away from the first functional surface of the second part of the first flexible circuit board 111 to the side of the chip stacking structure 20 through an adhesive layer 106.

[0072] It should be noted that the parts in the embodiment of the method for forming the aforementioned stacked packaging structure that are the same or similar to those in the embodiment of the aforementioned stacked packaging structure will not be repeated in the embodiment of the method for forming the stacked packaging structure. Please refer to the limitations or descriptions of the corresponding parts in the embodiment of the aforementioned stacked packaging structure for details.

[0073] Although the present application has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present application. Any technical personnel in this field can use the methods and technical contents disclosed above to make possible changes and modifications to the technical solution of the present application without departing from the spirit and scope of the present application. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are within the protection scope of the technical solution of the present application.

Claims

1. A stacked package structure, characterized in that: include: a first substrate including an upper surface and a lower surface opposite to each other; a chip stacking structure, located on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence along a direction perpendicular to the upper surface of the first substrate, and the chip stacking structure being electrically connected to the first substrate; a first flexible circuit board, the first flexible circuit board comprising a first functional surface and a second functional surface opposite to each other, the first flexible circuit board further comprising a first portion and at least one second portion connected to the first portion, the first functional surface of the first portion of the first flexible circuit board being mounted on the top surface of the chip stacking structure and being electrically connected to the chip stacking structure, and the second portion of the first flexible circuit board being bent to a side surface of the chip stacking structure; a second flexible circuit board, the second flexible circuit board comprising a third functional surface and a fourth functional surface opposite to each other, a portion of the third functional surface of the second flexible circuit board being mounted on the second functional surface of the second portion of the first flexible circuit board and being electrically connected to the first flexible circuit board; The second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected to the second flexible circuit board.

2. The stacked package structure according to claim 1, wherein: Each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

3. The stacked package structure according to claim 2, wherein: The first flexible circuit board has a second circuit, the first part and the first functional surface of the second part of the first flexible circuit board have a plurality of discrete first pads, the second functional surface of the second part of the first flexible circuit board has a plurality of discrete second pads, and the first pads and the second pads are electrically connected to the first circuit; The second flexible circuit board has a third circuit, the third functional surface of the second flexible circuit board has a plurality of discrete third pads, the fourth functional surface of the second flexible circuit board has a plurality of discrete fourth pads, and the third pads and the fourth pads are electrically connected to the third circuit.

4. The stacked package structure according to claim 3, wherein: The first functional surface of the first part of the first flexible circuit board is mounted on the top surface of the chip stacking structure and is electrically connected to the chip stacking structure, comprising: first pads on the first functional surface of the first part of the first flexible circuit board are soldered together with corresponding second external terminals on the second surface of the topmost semiconductor chip in the chip stacking structure through first solder bumps; The third functional surface of the second flexible circuit board is mounted on the second functional surface of the second part of the first flexible circuit board and is electrically connected to the first flexible circuit board, comprising: the third pad on the third functional surface of the second flexible circuit board is soldered to the corresponding second pad on the second functional surface of the second part of the first flexible circuit board through the second solder bump; The second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected to the second flexible circuit board, including: the second semiconductor chip is soldered to the fourth pad corresponding to the fourth functional surface of the second flexible circuit board through the third solder bump.

5. The stacked package structure according to claim 3, wherein: The second functional surface of the second part of the first flexible circuit board is attached to the side surface of the chip stacking structure.

6. The package stack structure according to claim 5, wherein: The second functional surface of the second part of the first flexible circuit board is directly attached to the side surface of the chip stacking structure through an adhesive layer.

7. The package stack structure according to claim 5, wherein: The stacked packaging structure also includes a third semiconductor chip, which is mounted on the first functional surface of the second part of the first flexible circuit board and is electrically connected to the corresponding first pad on the first functional surface of the second part through a fourth solder bump; the surface of the third semiconductor chip away from the first functional surface of the second part of the first flexible circuit board is directly attached to the side of the chip stacking structure through an adhesive layer.

8. The stacked package structure according to claim 1, 6 or 7, wherein: The second flexible circuit board is not electrically connected to the first substrate.

9. The stacked package structure according to claim 1, 6 or 7, characterized in that: The second flexible circuit board is electrically connected to the first substrate.

10. The package-on-package structure according to claim 9, wherein: The electrical connection between the second flexible circuit board and the first substrate includes: a portion of the second flexible circuit board is bent and extends parallel to a portion of the upper surface of the first substrate, and the bent portion of the second flexible circuit board is welded and electrically connected to a first upper pad corresponding to the upper surface of the first substrate through a connecting solder ball.

11. The package-on-package structure according to claim 9, wherein: The second flexible circuit board is electrically connected to the first substrate, including: the second flexible circuit board and the first substrate are a soft-hard combination board, the second flexible circuit board is flexible, the first substrate is rigid, and the second flexible circuit board is partially embedded in the first substrate and electrically connected to the first substrate.

12. The package-on-package structure according to claim 9, wherein: The second flexible circuit board is electrically connected to the first substrate, including: the first substrate also includes a plurality of side surfaces between an upper surface and a lower surface, and the second flexible circuit board extends from at least one side surface of the first substrate to a lower surface of the first substrate and is electrically connected to the first substrate from the lower surface of the first substrate.

13. The package-on-package structure according to claim 9, wherein: The second flexible circuit board is electrically connected to the first substrate, including: the first substrate is also a flexible board, the first substrate and the second flexible circuit board are an integrated structure with electrical connection, and the second flexible circuit board is bent upward from at least one side of the first substrate.

14. The package stack structure according to claim 13, wherein: A first lower pad surface of the lower surface of the first substrate has a raised first external solder bump; The stacked packaging structure also includes: a second substrate, having a fourth circuit therein, an upper surface of the second substrate having a second upper solder pad, a lower surface of the second substrate having a second lower solder pad, the second upper solder pad and the second lower solder pad being electrically connected to the fourth circuit; the first substrate is located on the second substrate, and a first external solder bump on the lower surface of the first substrate is soldered together with a second upper solder pad corresponding to the upper surface of the second substrate; and a second lower solder pad surface on the lower surface of the second substrate has a raised second external solder bump.

15. The package-on-package structure according to claim 1, 6 or 7, wherein: The number of the second parts in the first flexible circuit board is one or more; when there are multiple second parts, the multiple second parts are respectively bent to different sides of the chip stacking structure.

16. The package-on-package structure according to claim 15, wherein: The number of the second flexible circuit boards is one or more; when the number of the second flexible circuit boards is one, one second flexible circuit board is electrically connected to one or more second parts of the first flexible circuit board; when the number of the second flexible circuit boards is multiple, multiple second flexible circuit boards are respectively electrically connected to multiple second parts of the first flexible circuit board.

17. The stacked package structure according to claim 6 or 7, characterized in that: The number of the second semiconductor chips is one or more; when the number of the second semiconductor chips is multiple, the multiple second semiconductor chips are stacked in sequence on the fourth functional surface of the second flexible circuit board in a direction parallel to the upper surface of the first substrate, or the multiple second semiconductor chips are mounted at different positions on the fourth functional surface of the second flexible circuit board.

18. The package-on-package structure according to claim 17, wherein: The second semiconductor chip includes a third surface and a fourth surface relative to each other and a plurality of side surfaces between the third surface and the fourth surface, the third surface having a third external terminal, the third external terminal of the third surface of the second semiconductor chip being electrically connected to a fourth pad corresponding to the fourth functional surface of the second flexible circuit board through the third solder bump; the side surface of the second semiconductor chip close to the upper surface of the first substrate has a side pad, and the side pad is soldered together with a first upper pad corresponding to the upper surface of the first substrate through a fifth solder bump.

19. A method for forming a stacked package structure, characterized in that: include: Providing a first substrate, the first substrate comprising an upper surface and a lower surface opposite to each other; forming a chip stacking structure on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence in a direction perpendicular to the upper surface of the first substrate, and the chip stacking structure being electrically connected to the first substrate; A first flexible circuit board is provided, wherein the second flexible circuit board comprises a first functional surface and a second functional surface opposite to each other, wherein the first flexible circuit board comprises a first portion and at least one second portion connected to the first portion, wherein the first functional surface of the first portion of the first flexible circuit board is mounted on the top surface of the chip stacking structure and is electrically connected to the chip stacking structure, and the second portion of the first flexible circuit board is bent to a side surface of the chip stacking structure, Providing a second flexible circuit board, wherein the second flexible circuit board includes a third functional surface and a fourth functional surface opposite to each other, and mounting a portion of the third functional surface of the second flexible circuit board on the second functional surface of the second portion of the first flexible circuit board and electrically connecting the second flexible circuit board to the first flexible circuit board; A second semiconductor chip is provided, and the second semiconductor chip is mounted on the fourth functional surface of the second flexible circuit board and is electrically connected to the second flexible circuit board.

20. The method for forming a package-on-package structure according to claim 19, wherein: Each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

21. The method for forming a package-on-package structure according to claim 20, wherein: The first flexible circuit board has a second circuit, the first functional surfaces of the first part and the second part of the first flexible circuit board have a plurality of discrete first pads, the second functional surface of the second part of the first flexible circuit board has a plurality of discrete second pads, and the first pads and the second pads are electrically connected to the first circuit; the second flexible circuit board has a third circuit, the third functional surface of the second flexible circuit board has a plurality of discrete third pads, the fourth functional surface of the second flexible circuit board has a plurality of discrete fourth pads, and the third pads and the fourth pads are electrically connected to the third circuit; Mounting the first functional surface of the first part of the first flexible circuit board on the top surface of the chip stacking structure and electrically connecting the first functional surface of the first part of the first flexible circuit board to the chip stacking structure includes: soldering the first pads on the first functional surface of the first part of the first flexible circuit board to the corresponding second external terminals on the second surface of the topmost semiconductor chip in the chip stacking structure through the first solder bump; Mounting part of the third functional surface of the second flexible circuit board on the second functional surface of the second part of the first flexible circuit board and electrically connecting the second flexible circuit board to the first flexible circuit board comprises: soldering the third pad on the part of the third functional surface of the second flexible circuit board to the corresponding second pad on the second functional surface of the second part of the first flexible circuit board through the second solder bump; Mounting on the fourth functional surface of the second flexible circuit board and electrically connecting with the second flexible circuit board includes: soldering the second semiconductor chip to the fourth pad corresponding to the fourth functional surface of the second flexible circuit board through the third solder bump.

22. The method for forming a package-on-package structure according to claim 21, wherein: The forming method further includes: attaching the second functional surface of the second part of the first flexible circuit board to the side surface of the chip stacking structure.

23. The method for forming a package-on-package structure according to claim 22, wherein: The second functional surface of the second part of the first flexible circuit board is directly attached to the side surface of the chip stacking structure through an adhesive layer.

24. The method for forming a package-on-package structure according to claim 22, wherein: The formation method also includes: providing a third semiconductor chip, mounting the third semiconductor chip on the first functional surface of the second part of the first flexible circuit board and electrically connecting the third semiconductor chip to the corresponding first pad on the first functional surface of the second part through a fourth solder bump; and directly attaching the surface of the second semiconductor chip away from the first functional surface of the second part of the first flexible circuit board to the side of the chip stacking structure through an adhesive layer.

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