Package-on-package structure and forming method thereof

Abstract

The invention discloses a stacked packaging structure and a forming method thereof, and the stacked packaging structure comprises a first substrate which comprises an upper surface and a lower surface which are opposite to each other; the chip stacking structure is located on the upper surface of the first substrate, the chip stacking structure comprises a plurality of first semiconductor chips which are sequentially stacked in the direction perpendicular to the upper surface of the first substrate, and the chip stacking structure is electrically connected with the first substrate; the flexible circuit board is mounted on at least one side surface of the chip stacking structure and comprises a first functional surface and a second functional surface which are opposite to each other, and the first functional surface is close to the corresponding side surface of the chip stacking structure and is perpendicular to the upper surface of the first substrate; the second functional surface is far away from the corresponding side surface of the chip stacking structure and is perpendicular to the upper surface of the first substrate, and a second semiconductor chip electrically connected with the flexible circuit board is mounted on the second functional surface of the flexible circuit board. And the number of chips mounted on the upper surface of the first substrate is increased.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging, and in particular to a stacked packaging structure and a method for forming the same. Background Art

[0002] As chip miniaturization becomes increasingly difficult and the market's pursuit of chip high performance continues, the industry has begun to explore breakthroughs in the field of packaging. In recent years, advanced chip packaging technologies such as 2.5D packaging technology and 3D packaging technology have become a focus of attention for foundries, packaging and testing plants, chip design manufacturers, and EDA manufacturers.

[0003] 2.5D packaging technology or 3D packaging technology is to stack the same or different chips together to form a stacked packaging structure. The main advantages of 2.5D packaging technology and 3D packaging technology include: by stacking multiple chips in a direction perpendicular to the substrate surface to form a chip stacking structure, the integration and performance of the chip are improved; the connection between multiple chips in the chip stacking structure is realized by vertical connection, rather than the traditional planar connection, so the total wiring length between chips can be reduced to increase bandwidth, improve signal delay, and thus improve the reliability and stability of the packaging structure.

[0004] In a stacked packaging structure formed by using 2.5D packaging technology or 3D packaging technology, in addition to forming a chip stacking structure on a substrate, other chips (such as a control chip, a CPU chip or a GPU chip) are also mounted on the substrate surface on one side or around the chip stacking structure to improve the performance of the stacked packaging structure. However, other existing chips are mounted with their active surfaces parallel to the surface of the substrate, which will cause other chips to occupy a larger surface area of ​​the substrate when mounted, thereby limiting the number of chips mounted on the surface of the substrate, limiting further improvement of the function and performance of the packaging structure. Summary of the invention

[0005] The problem to be solved by the present application is how to increase the number of chips mounted on the surface of the first substrate to improve the function and performance of the stacked packaging structure.

[0006] To solve the above problems, an embodiment of the present application provides a stacked package structure, including: a first substrate including an upper surface and a lower surface opposite to each other; a chip stacking structure located on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the chip stacking structure being electrically connected to the first substrate; A flexible circuit board mounted on at least one side of the chip stacking structure, the flexible circuit board comprising a first functional surface and a second functional surface relative to each other, the first functional surface being close to the corresponding side of the chip stacking structure and perpendicular to the upper surface of the first substrate, the second functional surface being away from the corresponding side of the chip stacking structure and perpendicular to the upper surface of the first substrate, and the second functional surface of the flexible circuit board being mounted with a second semiconductor chip electrically connected to the flexible circuit board.

[0007] In an optional embodiment, each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface, the first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

[0008] In an optional embodiment, the first side surface of the first semiconductor chip has a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the corresponding second pad on the second functional surface of the flexible circuit board; the first pad on the first functional surface of the flexible circuit board is electrically connected to the first side pad on the first side surface of the corresponding first semiconductor chip in the chip stacking structure.

[0009] In an optional embodiment, the flexible circuit board is mounted on at least one side of the chip stacking structure, and the first pad on the first functional surface of the flexible circuit board is electrically connected to the first side pad on the first side of the corresponding first semiconductor chip in the chip stacking structure, including: the first pad on the first functional surface of the flexible circuit board is welded together and electrically connected to the first side pad on the first side of the corresponding first semiconductor chip in the chip stacking structure through a first solder bump; The second semiconductor chip is electrically connected to the second pad corresponding to the second functional surface of the flexible circuit board, including: the second semiconductor chip is electrically connected to the second pad corresponding to the second functional surface of the flexible circuit board through a second solder bump.

[0010] In an optional embodiment, the flexible circuit board also includes a plurality of second side surfaces located between the first functional surface and the second functional surface, and a second side surface of the flexible circuit board close to the upper surface of the first substrate is suspended on the upper surface of the first substrate or attached to the upper surface of the first substrate.

[0011] In an optional embodiment, the first side surface of the first semiconductor chip does not have a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board also has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the corresponding second pads; the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure.

[0012] In an optional embodiment, the flexible circuit board is mounted on at least one side of the chip stacking structure, and the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure, including: the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure through an adhesive layer.

[0013] In an optional embodiment, the stacked packaging structure also includes a third semiconductor chip, which is mounted on the first functional surface of the flexible circuit board and electrically connected to the corresponding first pad on the first functional surface through a third solder bump; the flexible circuit board is mounted on at least one side of the chip stacking structure, and the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure, including: the third semiconductor chip mounted on the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure through an adhesive layer.

[0014] In an optional embodiment, the flexible printed circuit board is electrically connected to the first substrate.

[0015] In an optional embodiment, the electrical connection between the flexible circuit board and the first substrate includes: a portion of the flexible circuit board is bent and extends parallel to a portion of the upper surface of the first substrate, and the bent portion of the flexible circuit board is welded and electrically connected to a first upper pad corresponding to the upper surface of the first substrate via a connecting solder ball.

[0016] In an optional embodiment, the flexible circuit board is electrically connected to the first substrate, including: the flexible circuit board and the first substrate are a soft-rigid combination board, the flexible circuit board is flexible, the first substrate is rigid, and the flexible circuit board is partially embedded in the first substrate and electrically connected to the first substrate.

[0017] In an optional embodiment, the flexible circuit board is electrically connected to the first substrate, including: the first substrate also includes a plurality of side surfaces located between the upper surface and the lower surface, and the flexible circuit board extends from at least one side surface of the first substrate to the lower surface of the first substrate and is electrically connected to the first substrate from the lower surface of the first substrate.

[0018] In an optional embodiment, the flexible circuit board is electrically connected to the first substrate, including: the first substrate is also a flexible board, the first substrate and the flexible circuit board are an integrated structure with electrical connection, and the flexible circuit board is bent upward from at least one side of the first substrate.

[0019] In an optional embodiment, the first lower pad surface of the lower surface of the first substrate has a raised first external solder bump; the stacked packaging structure also includes: a second substrate, the second substrate has a third circuit, the upper surface of the second substrate has a second upper pad, the lower surface of the second substrate has a second lower pad, the second upper pad and the second lower pad are electrically connected to the third circuit; the first substrate is located on the second substrate, and the first external solder bump on the lower surface of the first substrate is welded together with the second upper pad corresponding to the upper surface of the second substrate; the second lower pad surface of the lower surface of the second substrate has a raised second external solder bump.

[0020] In an optional embodiment, a portion of the flexible circuit board is bent and extends parallel to the second surface of the topmost first semiconductor chip in the chip stacking structure, and is electrically connected to the second external terminal of the second surface portion of the topmost first semiconductor chip.

[0021] In an optional embodiment, the flexible circuit board is located on an upper surface of the first substrate on one side or multiple sides of the chip stacking structure.

[0022] In an optional embodiment, the number of the second semiconductor chips is one or more; when the number of the second semiconductor chips is multiple, the multiple second semiconductor chips are stacked sequentially on the second functional surface of the flexible circuit board in a direction parallel to the upper surface of the first substrate, or the multiple second semiconductor chips are mounted at different positions on the second functional surface of the flexible circuit board.

[0023] In an optional embodiment, the second semiconductor chip includes a third surface and a fourth surface relative to each other and a plurality of side surfaces located between the third surface and the fourth surface, the third surface having a third external terminal, the third external terminal of the third surface of the second semiconductor chip is electrically connected to a second pad corresponding to the second functional surface of the flexible circuit board through the second solder bump; the side of the second semiconductor chip close to the upper surface of the first substrate has a second side pad, and the second side pad is soldered together with a first upper pad corresponding to the upper surface of the first substrate through a fourth solder bump.

[0024] Another embodiment of the present application further provides a method for forming a stacked package structure, comprising: Providing a first substrate, the first substrate comprising an upper surface and a lower surface opposite to each other; forming a chip stacking structure on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence along a direction perpendicular to the upper surface of the first substrate, and the chip stacking structure is electrically connected to the first substrate; A flexible circuit board is mounted on at least one side of the chip stacking structure, the flexible circuit board includes a first functional surface and a second functional surface relative to each other, the first functional surface is close to the corresponding side of the chip stacking structure and is perpendicular to the upper surface of the first substrate, the second functional surface is away from the corresponding side of the chip stacking structure and is perpendicular to the upper surface of the first substrate, and a second semiconductor chip electrically connected to the flexible circuit board is mounted on the second functional surface of the flexible circuit board.

[0025] In an optional embodiment, each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface, the first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

[0026] In an optional embodiment, the first side surface of the first semiconductor chip has a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the corresponding second pad on the second functional surface of the flexible circuit board; the first pad on the first functional surface of the flexible circuit board is electrically connected to the first side pad on the first side surface of the corresponding first semiconductor chip in the chip stacking structure.

[0027] In an optional embodiment, mounting a flexible circuit board on at least one side of the chip stacking structure, and electrically connecting a first pad on a first functional surface of the flexible circuit board with a first side pad on a first side of a corresponding first semiconductor chip in the chip stacking structure comprises: welding and electrically connecting the first pad on the first functional surface of the flexible circuit board with the first side pad on the first side of the corresponding first semiconductor chip in the chip stacking structure through a first solder bump; Electrically connecting the second semiconductor chip to the second pad corresponding to the second functional surface of the flexible circuit board includes: electrically connecting the second semiconductor chip to the second pad corresponding to the second functional surface of the flexible circuit board through a second solder bump.

[0028] In an optional embodiment, the first side surface of the first semiconductor chip does not have a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board also has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the corresponding second pads; mounting the flexible circuit board on at least one side surface of the chip stacking structure includes: attaching the first functional surface of the flexible circuit board to the side surface of the chip stacking structure.

[0029] In an optional embodiment, attaching the first functional surface of the flexible circuit board to the side surface of the chip stacking structure includes: attaching the first functional surface of the flexible circuit board to the side surface of the chip stacking structure through an adhesive layer.

[0030] In an optional embodiment, the stacked packaging structure also includes a third semiconductor chip, which is mounted on the first functional surface of the flexible circuit board and electrically connected to the corresponding first pad on the first functional surface through a third solder bump; attaching the first functional surface of the flexible circuit board to the side of the chip stacking structure includes: attaching the third semiconductor chip mounted on the first functional surface of the flexible circuit board to the side of the chip stacking structure through an adhesive layer.

[0031] In an optional embodiment, the flexible printed circuit board is electrically connected to the first substrate.

[0032] The advantages of the technical solution of this application are: In the stacking packaging structure of the present application, since the flexible circuit board is mounted on at least one side surface of the chip stacking structure, and the second semiconductor chip is mounted on the second functional surface of the flexible circuit board away from the corresponding side surface of the chip stacking structure, that is, compared with the existing method of mounting the device parallel to the upper surface of the first substrate, in the present application, the flexible circuit board and the second semiconductor chip are both mounted in a direction perpendicular to the upper surface of the first substrate, so that the area of ​​the upper surface of the first substrate occupied by the flexible circuit board and the second semiconductor chip is reduced, so that more other chips or devices can be mounted on the upper surface of the first substrate, so that the function and performance of the packaging structure are further improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] To facilitate understanding and explanation of the features and advantages of the present application, in the following figures, the components are not necessarily drawn to scale, and components with similar related properties or features may have the same or similar reference numerals.

[0034] Figure 1 A schematic top view of a stacked package structure according to an embodiment of the present application; Figure 2 For an embodiment of the present application Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 3 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 4 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 5 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 6 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 7 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Figure 8 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig. 9 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig.10 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig.11 Another embodiment of the present application is Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig.12 A schematic top view of a stacked package structure according to another embodiment of the present application; Fig.13 For an embodiment of the present application Fig.12 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig.14 Another embodiment of the present application is Fig.12 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig.15 Another embodiment of the present application is Fig.12 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1; Fig.16 Another embodiment of the present application is Fig.12 Schematic diagram of the cross-sectional structure of the stacked package structure obtained along the middle cutting line AA1. DETAILED DESCRIPTION

[0035] The specific implementation manner of the packaging structure and the method for forming the same provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0036] On one hand, the present application provides a stacked packaging structure. The stacked packaging structure of the present application is described in detail below in some embodiments with reference to the accompanying drawings.

[0037] Figure 1 A schematic top view of a stacked package structure according to an embodiment of the present application; Figure 2 For an embodiment of the present application Figure 1 Schematic diagram of the cross-sectional structure of the stacked package structure obtained along the middle cutting line AA1. Fig.12 A schematic top view of a stacked package structure according to another embodiment of the present application; Fig.13 For an embodiment of the present application Fig.12 Schematic diagram of the cross-sectional structure of the stacked package structure obtained by the middle cutting line AA1 refer to Figure 1 and Figure 2 or reference Fig.12 and Fig.13 , the stacked package structure comprises: A first substrate 101, wherein the first substrate 101 includes an upper surface and a lower surface opposite to each other; a chip stacking structure 20 located on the upper surface of the first substrate 101, the chip stacking structure 20 comprising a plurality of first semiconductor chips 201 stacked in sequence in a direction perpendicular to the upper surface of the first substrate 101, and the chip stacking structure 20 is electrically connected to the first substrate 101; A flexible circuit board 103 is mounted on at least one side of the chip stacking structure 20, and the flexible circuit board 103 includes a first functional surface and a second functional surface relative to each other, the first functional surface is close to the corresponding side of the chip stacking structure 20 and perpendicular to the upper surface of the first substrate 101, the second functional surface is away from the corresponding side of the chip stacking structure 20 and perpendicular to the upper surface of the first substrate 101, and the second functional surface of the flexible circuit board 103 is mounted with a second semiconductor chip 202 electrically connected to the flexible circuit board 103.

[0038] Specifically, the first substrate 101 in the stacked package structure serves as a support carrier and a connection carrier in the packaging process. In one embodiment, the substrate 101 may include an upper surface and a lower surface relative to each other, the upper surface of the first substrate 101 has a plurality of discrete first upper pads (not shown in the figure), the lower surface of the first substrate 101 has a plurality of discrete first lower pads (not shown in the figure), the first substrate 101 has a first circuit (not shown in the figure), part of the first circuit can be used for electrical connection between the first upper pads on the upper surface of the first substrate 101 and the first lower pads corresponding to the lower surface of the first substrate 101, part of the first circuit can also be used for electrical connection between part of the first upper pads on the upper surface of the first substrate 101, and part of the first circuit can also be used for electrical connection between part of the first lower pads on the lower surface of the first substrate 101. The first upper pads on the upper surface of the first substrate 101 can be electrically connected to the chip stacking structure or other devices mounted on the first substrate, and the first external solder bumps 102 can be formed on the first lower pads on the lower surface of the first substrate 101, and the first external solder bumps 102 are used to connect with other devices, other first substrates or packaging structures. The material of the first upper pad, the first lower pad and the first circuit is metal, and specifically can be one or more of aluminum, copper, nickel, tin, titanium, tungsten, platinum, chromium, tantalum, gold and silver. The material of the first external solder bump 102 is tin or a tin alloy, and the tin alloy is one or more of tin-silver, tin-zinc, tin-lead, tin-indium, tin-gold, tin-copper, tin-silver-copper, tin-silver-zinc, tin-bismuth-indium, tin-zinc-indium or tin-silver-antimony.

[0039] The chip stacking structure 20 in the stacked package structure includes a plurality of first semiconductor chips 201 stacked in sequence along a direction perpendicular to the upper surface of the first substrate 101 , and the number of the first semiconductor chips 201 may be two, three, four or more. Figure 2 (or Fig.13 ) is described by taking the chip stacking structure 20 having four first semiconductor chips 201 as an example.

[0040] The functions of the plurality of first semiconductor chips 201 in the chip stacking structure 20 are the same or different. In one embodiment, when the functions of the plurality of first semiconductor chips 201 are the same, the internal structures of the plurality of first semiconductor chips 201 are the same. In another embodiment, when the functions of the plurality of first semiconductor chips 201 are the same, the internal structures of the plurality of first semiconductor chips 201 are different.

[0041] According to different functions, the first semiconductor chip 201 may include a logic chip and / or a memory chip. In one embodiment, the logic chip may include but is not limited to a gate array, a cell substrate array, an embedded array, a structured application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), a complex programmable logic device (CPLD), a graphics processing unit (GPU), a central processing unit (CPU), a microprocessing unit (MPU), a microcontroller unit (MCU), a logic integrated circuit (IC), an application processor (AP), a display driver IC (DDI), a radio frequency (RF) chip, a power chip or a complementary metal oxide semiconductor (CMOS) image sensor. In one embodiment, the memory chip may include but is not limited to a dynamic random access memory (DRAM), a static random access memory (SRAM), a magnetoresistive random access memory (MRAM), a phase-change memory (PRAM), a resistive random access memory (RRAM) or a non-volatile memory chip (such as a flash memory).

[0042] In one embodiment, all the first semiconductor chips 201 in the chip stacking structure 20 have the same function. In a specific embodiment, all the first semiconductor chips 201 in the chip stacking structure 20 are memory chips, such as Figure 2 (or Fig.13 ) In the chip stacking structure 20, the four first semiconductor chips 201 are all memory chips. In another specific embodiment, all the first semiconductor chips 201 in the chip stacking structure 20 may also be logic chips.

[0043] In another embodiment, the functions of some of the first semiconductor chips 201 in the chip stacking structure 20 are different from the functions of other first semiconductor chips 201. In a specific embodiment, one or two first semiconductor chips 201 at the bottom layer of the chip stacking structure 20 are logic chips, and other first semiconductor chips 201 at the upper layer of the chip stacking structure 20 are memory chips. The logic chip is used to control and manage the storage process, reading process (and deletion process) of the memory chip. For example, Figure 1 (or Fig.13 ) In the chip stacking structure 20, the bottom-most first semiconductor chip 201 is a logic chip, and the three first semiconductor chips 201 on the upper layer are memory chips.

[0044] There is an electrical connection between the first semiconductor chip 201 in the upper layer of the chip stacking structure 20 and the first semiconductor chip 201 in the lower layer, and there is an electrical connection between the first semiconductor chip 201 at the bottom layer of the chip stacking structure 20 and the first substrate 101. In one embodiment, each of the first semiconductor chips 201 in the chip stacking structure includes a first surface and a second surface opposite to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip 201 has an integrated circuit, which can be a storage circuit or a logic control circuit. The first surface has a plurality of discrete first external terminals, which can be solder balls 205 or solder balls 206 protruding from the first surface. The second surface has a plurality of discrete second external terminals, which can be through-hole connection structures 207 (such as through-silicon via connection structures, TSV) exposed on the second surface. The first external terminals and the second external terminals are electrically connected to the integrated circuit. The plurality of first semiconductor chips 201 are sequentially connected in a direction perpendicular to the upper surface of the first substrate. When stacking, the first surface of the upper first semiconductor chip 201 is stacked downward on the second surface of the lower first semiconductor chip 201, and the first external terminal of the first surface of the upper first semiconductor chip 201 is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip 201. Specifically, the solder ball 205 on the first surface of the upper first semiconductor chip 201 is electrically connected to the exposed through-hole connection structure 207 on the second surface of the lower first semiconductor chip 201. The solder ball 206 (first external terminal) on the first surface of the bottom first semiconductor chip 201 in the chip stacking structure 20 is electrically connected to the corresponding first upper pad on the upper surface of the first substrate 101. The solder ball 205 is a micro solder ball with a smaller size, and the solder ball 206 can be a C4 solder ball with a relatively larger size. It should be noted that, in one embodiment, the top first semiconductor chip 201 in the chip stacking structure 20 may not have a through-hole connection structure 207 (such as a through silicon via connection structure, TSV).

[0045] A flexible circuit board 103 is mounted on at least one side of the chip stacking structure 20 in the stacked packaging structure. The flexible circuit board 103 includes a first functional surface and a second functional surface relative to each other. The first functional surface is close to the corresponding side of the chip stacking structure 20 and is perpendicular to the upper surface of the first substrate 101, and the second functional surface is away from the corresponding side of the chip stacking structure 20 and is perpendicular to the upper surface of the first substrate 101. The second functional surface of the flexible circuit board 103 is mounted with a second semiconductor chip 202 electrically connected to the flexible circuit board 103. Since the flexible circuit board 103 is mounted on at least one side surface of the chip stacking structure 20, and the second semiconductor chip 202 is mounted on the second functional surface of the flexible circuit board 103 away from the corresponding side surface of the chip stacking structure 20, that is, compared with the existing method of mounting the device parallel to the upper surface of the first substrate 101, in the present application, the flexible circuit board 103 and the second semiconductor chip 202 are both mounted in a direction perpendicular to the upper surface of the first substrate 101, so that the area of ​​the upper surface of the first substrate 101 occupied by the flexible circuit board 103 and the second semiconductor chip 202 is reduced, so that more other chips or devices can be mounted on the upper surface of the first substrate 101, so that the function and performance of the packaging structure are further improved.

[0046] The flexible circuit board 103 is also called a soft board or FPC (Flexible Printed Circuit, FPC). In one embodiment, the flexible circuit board 103 has a second circuit, the first functional surface of the flexible circuit board 103 has a plurality of discrete first pads, the second functional surface of the flexible circuit board 103 has a plurality of discrete second pads, and the first pads and the second pads are electrically connected to the second circuit.

[0047] The chip stacking structure 20 may include multiple side surfaces, and the flexible circuit board 103 is mounted on at least one side surface of the chip stacking structure 20, including: the flexible circuit board 103 is mounted on one of the side surfaces of the chip stacking structure 20, or the flexible circuit board 103 is mounted on two or more side surfaces of the chip stacking structure 20. In one embodiment, the chip stacking structure 20 is a cubic structure, and the chip stacking structure 20 may include a top surface and a bottom surface and four side surfaces located between the top surface and the bottom surface. The flexible circuit board 103 is mounted on at least one side surface of the chip stacking structure 20, and specifically includes: the flexible circuit board 103 is mounted on only one side surface of the chip stacking structure 20, or the flexible circuit board 103 is mounted on two adjacent or non-adjacent side surfaces of the chip stacking structure 20, or the flexible circuit board 103 is mounted on three side surfaces of the chip stacking structure 20, or the flexible circuit board 103 is mounted on four side surfaces of the chip stacking structure 20. In one embodiment, when the flexible circuit board 103 is mounted on two or more sides of the chip stacking structure 20 , there may be multiple flexible circuit boards 103 . In some cases, one flexible circuit board 103 may be bent and then mounted on multiple sides of the chip stacking structure 20 .

[0048] The second semiconductor chip 202 mounted on the second functional surface of the flexible circuit board 103 and electrically connected to the flexible circuit board 103 may have different functions from the first semiconductor chip 201 in the chip stacking structure 20, or may have the same function. In one embodiment, the second semiconductor chip 202 may be a logic chip or a memory chip. In one embodiment, the electrical connection between the second semiconductor chip 202 and the flexible circuit board 103 includes: the second semiconductor chip 202 is electrically connected to the second pad corresponding to the second functional surface of the flexible circuit board 103. Specifically, the second semiconductor chip 202 may be electrically connected to the second pad corresponding to the second functional surface of the flexible circuit board 103 through a second solder bump 212, and the material of the second solder bump 212 may be tin or a tin alloy.

[0049] When the flexible circuit board 103 is mounted on at least one side of the chip stacking structure 20, there may be a variety of different electrical connection methods between the flexible circuit board 103 and the chip stacking structure 20 and the first substrate 101 to meet the different connection requirements and functional requirements of the stacked packaging structure, so as to further improve the performance of the stacked packaging structure. In one embodiment, the flexible circuit board 103 is directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20, and is directly electrically connected to the first substrate 101 or there is no direct electrical connection. In another embodiment, the flexible circuit board 103 is not directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20, but is directly electrically connected to the first substrate 101. In the following, in different embodiments, when the flexible circuit board 103 is mounted on at least one side of the chip stacking structure 20, there may be a variety of specific electrical connection methods between the flexible circuit board 103 and the chip stacking structure 20 and the first substrate 101, which will be described in detail.

[0050] When the flexible circuit board 103 is directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20, and is not directly electrically connected to the first substrate 101, in one embodiment, continue to refer to Figure 1 and Figure 2The first side surface of the first semiconductor chip 201 in the chip stacking structure 20 has a first side pad 209, and the second side pad 209 is electrically connected to the integrated circuit in the first semiconductor chip 201. The material of the first side pad 209 is metal. The first side pad 209 can be made when the first semiconductor chip 201 is made (for example, when the internal wiring of the first semiconductor chip 201 is made); the direct electrical connection between the flexible circuit board 103 and the first semiconductor chip 201 in the chip stacking structure 20 includes: the first pad of the first functional surface of the flexible circuit board 103 is electrically connected to the first side pad 209 of the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure 20, and specifically, the first pad of the first functional surface of the flexible circuit board 103 is welded and electrically connected to the first side pad 209 of the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure 20 through the first solder bump 104, and the material of the first solder bump 104 can be tin or tin alloy. When there is no direct electrical connection between the flexible circuit board 103 and the first substrate 101, it can include a variety of different settings. Specifically, the flexible circuit board 103 also includes multiple second side surfaces located between the first functional surface and the second functional surface, and one of the second side surfaces of the flexible circuit board 103 close to the upper surface of the first substrate 101 is suspended on the upper surface of the first substrate 101, or one of the second side surfaces of the flexible circuit board 103 close to the upper surface of the first substrate 101 is attached to the upper surface of the first substrate 101, so that there is no direct electrical connection between the flexible circuit board 103 and the first substrate 101.

[0051] When the flexible circuit board 103 is directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20 and directly electrically connected to the first substrate 101, in another embodiment, please refer to Figure 3 , which is implemented as follows: the first pad on the first functional surface of the flexible circuit board 103 is welded and electrically connected to the first side pad 209 on the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure 20 through the first solder bump 104; a portion of the flexible circuit board 103 is bent and extends parallel to a portion of the upper surface of the first substrate 101, and the bent portion of the flexible circuit board 101 is welded and electrically connected to the first upper pad corresponding to the upper surface of the first substrate 101 through the connecting solder ball 105.

[0052] When the flexible circuit board 103 is directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20 and directly electrically connected to the first substrate 101, in another embodiment, please refer to Figure 4, which is implemented as follows: the first pad of the first functional surface of the flexible circuit board 103 is soldered and electrically connected to the first side pad 209 of the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure 20 through the first solder bump 104; the flexible circuit board 103 and the first substrate 101 are a hard-flex board, the flexible circuit board 103 is flexible, the first substrate 101 is rigid, the flexible circuit board 103 is partially embedded in the first substrate 101 and electrically connected to the first substrate 101, specifically, one end of the flexible circuit board 103 is embedded in the first substrate 101 and electrically connected to the first substrate 101. When the flexible circuit board 103 and the first substrate 101 are a hard-flex board, the flexible circuit board 103 and the first substrate 101 can be manufactured together.

[0053] When the flexible circuit board 103 is directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20 and directly electrically connected to the first substrate 101, in another embodiment, please refer to Figure 5 , which is implemented as follows: the first pad of the first functional surface of the flexible circuit board 103 is soldered and electrically connected to the first side pad 209 of the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure 20 through the first solder bump 104; the first substrate 101 also includes multiple side surfaces between the upper surface and the lower surface, the flexible circuit board 103 extends from at least one side surface of the first substrate 101 to the lower surface of the first substrate 101 and is electrically connected to the first substrate 101 from the lower surface of the first substrate 101, specifically, the flexible circuit board 103 can extend from one side surface or multiple side surfaces of the first substrate 101 to a part of the lower surface or the entire lower surface of the first substrate 101 and is electrically connected to the first substrate 101 from the lower surface of the first substrate 101. It should be noted that, in this embodiment, the first external solder bump 102 is formed on the second functional surface of the part of the flexible circuit board 103 extending to the part of the lower surface or the entire lower surface of the first substrate 101, or the first external solder bump 102 can also be formed on the lower surface of the first substrate 101 that is not covered by the extended flexible circuit board 103.

[0054] When the flexible circuit board 103 is directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20 and directly electrically connected to the first substrate 101, in another embodiment, please refer to Figure 6, which is implemented in the following manner: the first pad of the first functional surface of the flexible circuit board 103 is soldered and electrically connected to the first side pad 209 of the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure 20 through the first solder bump 104; the first substrate 101 is also a flexible board, the first substrate 101 and the flexible circuit board 103 are an integrated structure with electrical connection, and the flexible circuit board 103 is bent upward from at least one side of the first substrate 101. Specifically, the first substrate 101 includes four sides, the flexible circuit board 103 is bent upward from one side of the first substrate 101, or the flexible circuit board 103 is bent upward from two sides of the first substrate 101, or the flexible circuit board 103 is bent upward from three sides of the first substrate 101, or the flexible circuit board 103 is bent upward from four sides of the first substrate 101.

[0055] In one embodiment, when the first substrate 101 is also a flexible board, and the first substrate 101 and the flexible circuit board 103 are an integrated structure with electrical connection, refer to Figure 7 , the first pad on the first functional surface of the flexible circuit board 103 is welded and electrically connected to the first side pad 209 on the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure 20 through the first solder protrusion 104; the stacking packaging structure also includes: a second substrate 111, the second substrate 111 has a third circuit, the upper surface of the second substrate 111 has a second upper pad, the lower surface of the second substrate 111 has a second lower pad, the second upper pad and the second lower pad are electrically connected to the third circuit; the first substrate 101 is located on the second substrate 111, and the first external solder protrusion 102 on the lower surface of the first substrate 101 is welded to the second upper pad corresponding to the upper surface of the second substrate 111; the second lower pad surface of the lower surface of the second substrate 111 has a raised second external solder protrusion 112.

[0056] When the flexible circuit board 103 is not directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20, but is directly electrically connected to the first substrate 101, in one embodiment, continue to refer to Fig.12 and Fig.13 , Fig.13 for Fig.12The schematic cross-sectional structure diagram obtained along the cutting line AA1 direction is implemented as follows: the first side surface of the first semiconductor chip 201 in the chip stacking structure 20 does not have a first side pad; the flexible circuit board 103 includes a plurality of second sides opposite to the first functional surface and the second functional surface and between the first functional surface and the second functional surface, and the first functional surface of the flexible circuit board 103 is attached to the side surface of the chip stacking structure 20. Specifically, the first functional surface of the flexible circuit board 103 is attached to the side surface of the chip stacking structure 20 through an adhesive layer 106, and the adhesive layer 106 can be a viscous resin film or resin glue. A second side surface of the flexible circuit board 103 close to the upper surface of the first substrate 101 has a third side pad (not shown in the figure), and the third side pad is directly electrically connected to the corresponding first upper pad (not shown in the figure) on the upper surface of the first substrate 101 through a solder bump 110.

[0057] When the flexible circuit board 103 is not directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20, but is directly electrically connected to the first substrate 101, in another embodiment, Fig.14 , which is implemented as follows: the first functional surface of the flexible circuit board 103 is attached to the side of the chip stacking structure 20 through the adhesive layer 106. The flexible circuit board 103 and the first substrate 101 are a hard-soft board, the flexible circuit board 103 is flexible, the first substrate 101 is rigid, the flexible circuit board 103 is partially embedded in the first substrate 101 and is electrically connected to the first substrate 101, specifically, one end of the flexible circuit board 103 is embedded in the first substrate 101 and is electrically connected to the first substrate 101. When the flexible circuit board 103 and the first substrate 101 are a hard-soft board, the flexible circuit board 103 and the first substrate 101 can be manufactured together.

[0058] In another embodiment, the first functional surface of the flexible circuit board 103 is attached to the side of the chip stacking structure 20 through the adhesive layer 106, so that there is no direct electrical connection between the flexible circuit board 103 and the first semiconductor chip 201 in the chip stacking structure 20, and the flexible circuit board 103 and the first substrate 101 are directly electrically connected in addition to the above Fig.13 and Fig.14 In addition to the implementation shown in the embodiment above, Figure 3 , Figure 5 , Figure 6 or Figure 7 The implementation shown.

[0059] When the flexible circuit board 103 is not directly electrically connected to the first semiconductor chip 201 in the chip stacking structure 20, but is directly electrically connected to the first substrate 101, in another embodiment, Fig.15 , which is implemented as follows: the first functional surface of the flexible circuit board 103 also has a plurality of discrete first pads (not shown in the figure), and the first pads are electrically connected to the second circuit (not shown in the figure) in the flexible circuit board 103; the stacked package structure also includes a third semiconductor chip 203, and the third semiconductor chip 203 is mounted on the first functional surface of the flexible circuit board 103 and is electrically connected to the corresponding first pads on the first functional surface through the third solder bump 213; the third semiconductor chip 203 is attached to the side of the chip stacking structure 20 through the adhesive layer 106, that is, the first functional surface of the flexible circuit board 103 The flexible circuit board 103 is attached or mounted on the side of the chip stacking structure 20 through the third semiconductor chip 203 and the adhesive layer 106, and there is no direct electrical connection between the flexible circuit board 103 and the first semiconductor chip 201 in the chip stacking structure 20, while there is a direct electrical connection between the flexible circuit board 103 and the first substrate 101. The implementation method can be: a third side pad (not shown in the figure) on a second side of the flexible circuit board 103 close to the upper surface of the first substrate 101 is directly electrically connected to the corresponding first upper pad (not shown in the figure) on the upper surface of the first substrate 101 through a solder bump 110, or through Fig.16 The first substrate 101 shown is also a flexible board, and the first substrate 101 and the flexible circuit board 103 are realized as an integrated structure with electrical connection, or are realized by other specific connection methods between the flexible circuit board 103 and the first substrate 101 described in any of the aforementioned embodiments.

[0060] In one embodiment, reference Figure 8 In the stacked package structure, a portion of the flexible circuit board 103 is bent and extends parallel to the second surface of the topmost first semiconductor chip 201 in the chip stacking structure 20, and is electrically connected to the second external terminal of the second surface portion of the topmost first semiconductor chip 201 through the solder bump. The connection port between the flexible circuit board 103 and the chip stacking structure 20 is further improved, which is conducive to improving the bandwidth.

[0061] In one embodiment, in the stacked package structure, the number of the second semiconductor chips 202 is one or more; when the number of the second semiconductor chips 202 is more than one, refer to Fig.11 , a plurality of the second semiconductor chips 202 are sequentially stacked on the second functional surface of the flexible circuit board 103 in a direction parallel to the upper surface of the first substrate 101, or, with reference to Fig. 9The plurality of second semiconductor chips 202 are mounted on different positions of the second functional surface of the flexible circuit board 103. This further increases the number of chips packaged in a certain area in the stacked package structure.

[0062] In one embodiment, reference Fig.10 or Fig.11 The second semiconductor chip 202 includes a third surface and a fourth surface relative to each other and a plurality of side surfaces between the third surface and the fourth surface, the third surface having a third external terminal (not shown in the figure), the third external terminal on the third surface of the second semiconductor chip 202 is electrically connected to a second pad corresponding to the second functional surface of the flexible circuit board 103 through a second solder bump 212; the side of the second semiconductor chip 202 close to the upper surface of the first substrate 101 has a second side pad 214, the second side pad 214 is soldered together with a first upper pad corresponding to the upper surface of the first substrate 101 through a fourth solder bump 215.

[0063] In one embodiment, the stacked package structure further includes other semiconductor chips or devices 204, and the other semiconductor chips or devices 204 are mounted on the upper surface of the first substrate 101 on one side of the chip stacking structure 20 (refer to Figure 2 , Figure 3 , Figure 4 , Fig.13 , Fig.14 or Fig.15 ) or the upper surface of the second substrate 111 (reference Figure 7 ). The other semiconductor chips or devices 204 can be electrically connected to the chip stacking structure 20 through part of the first circuit in the first substrate 101 to communicate or exchange or transfer data, such as being electrically connected to a first semiconductor chip at the bottom of the chip stacking structure 20. Or the other semiconductor chips or devices 204 can also be electrically connected to the second semiconductor chip 202 through part of the first circuit in the first substrate 101 and part of the second circuit in the flexible circuit board 103 to communicate or exchange or transfer data. Or the other semiconductor chips or devices 204 can also be electrically connected to the chip stacking structure 20 and the second semiconductor chip 202 at the same time through part of the first circuit in the first substrate 101 and part of the second circuit in the flexible circuit board 103 to communicate or exchange or transfer data.

[0064] Another embodiment of the present application further provides a method for forming a stacked package structure, referring to Figure 1 and Figure 2 or Fig.12 and Fig.13 ,include: Providing a first substrate 101, wherein the first substrate 101 includes an upper surface and a lower surface opposite to each other; A chip stacking structure 20 is formed on the upper surface of the first substrate 101, wherein the chip stacking structure 20 includes a plurality of first semiconductor chips 201 stacked in sequence in a direction perpendicular to the upper surface of the first substrate 101, and the chip stacking structure 20 is electrically connected to the first substrate 101; A flexible circuit board 103 is mounted on at least one side of the chip stacking structure 20, and the flexible circuit board 103 includes a first functional surface and a second functional surface relative to each other, the first functional surface is close to the corresponding side of the chip stacking structure 20 and perpendicular to the upper surface of the first substrate 101, the second functional surface is away from the corresponding side of the chip stacking structure 20 and perpendicular to the upper surface of the first substrate 101, and the second functional surface of the flexible circuit board 103 is mounted with a second semiconductor chip 202 electrically connected to the flexible circuit board 103.

[0065] In one embodiment, each first semiconductor chip 201 in the chip stacking structure 20 includes a first surface and a second surface opposite to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip 201 has an integrated circuit. The first surface has a plurality of discrete first external terminals, and the second surface has a plurality of discrete second external terminals. The first external terminals and the second external terminals are electrically connected to the integrated circuit. When the plurality of first semiconductor chips 201 are stacked in sequence along a direction perpendicular to the upper surface of the first substrate 101, the first surfaces of the upper first semiconductor chips 201 are stacked downward on the lower first semiconductor chips 201. The second surface of the first semiconductor chip 201, and the first external terminal of the first surface of the upper first semiconductor chip 201 is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip 201; the first substrate 101 has a first circuit, the upper surface of the first substrate 101 has a plurality of discrete first upper pads, the lower surface of the first substrate 101 has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip 201 is electrically connected to the corresponding first upper pad on the upper surface of the first substrate 101.

[0066] In one embodiment, reference Figure 1 and Figure 2, the first side surface of the first semiconductor chip 201 has a first side pad 209; the flexible circuit board 103 has a second circuit, the first functional surface of the flexible circuit board 103 has a plurality of discrete first pads, the second functional surface of the flexible circuit board 103 has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the second pad corresponding to the second functional surface of the flexible circuit board 103; the first pad on the first functional surface of the flexible circuit board 103 is electrically connected to the first side pad 209 on the first side surface of the corresponding first semiconductor chip 201 in the chip stacking structure.

[0067] In one embodiment, mounting a flexible circuit board 103 on at least one side of the chip stacking structure 20, and electrically connecting a first pad on a first functional surface of the flexible circuit board 103 with a first side pad 209 on a first side of a corresponding first semiconductor chip 201 in the chip stacking structure comprises: soldering and electrically connecting the first pad on the first functional surface of the flexible circuit board 103 with the first side pad 209 on a first side of a corresponding first semiconductor chip 201 in the chip stacking structure through a first solder bump 104; In one embodiment, electrically connecting the second semiconductor chip 202 to the second pad corresponding to the second functional surface of the flexible circuit board 103 includes: electrically connecting the second semiconductor chip 202 to the second pad corresponding to the second functional surface of the flexible circuit board 103 through the second solder bump 212 .

[0068] In one embodiment, reference Fig.12 and Fig.13 , the first side surface of the first semiconductor chip 201 does not have a first side pad 209; the flexible circuit board 103 has a second circuit, the first functional surface of the flexible circuit board 103 also has a plurality of discrete first pads, the second functional surface of the flexible circuit board 103 has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor core 202 is electrically connected to the corresponding second pads; mounting the flexible circuit board 103 on at least one side surface of the chip stacking structure 20 includes: attaching the first functional surface of the flexible circuit board 103 to the side surface of the chip stacking structure 20.

[0069] In one embodiment, reference Fig.12 Attaching the first functional surface of the flexible circuit board 103 to the side surface of the chip stacking structure 20 includes: attaching the first functional surface of the flexible circuit board 103 to the side surface of the chip stacking structure 20 through an adhesive layer 106 .

[0070] In one embodiment, reference Fig.15The stacked packaging structure also includes a third semiconductor chip 203, which is mounted on the first functional surface of the flexible circuit board 103 and electrically connected to the corresponding first pad on the first functional surface through a third solder bump 213; attaching the first functional surface of the flexible circuit board 103 to the side of the chip stacking structure 20 includes: attaching the third semiconductor chip 203 mounted on the first functional surface of the flexible circuit board 103 to the side of the chip stacking structure through an adhesive layer 106.

[0071] In one embodiment, the flexible printed circuit board 103 is electrically connected to the first substrate 101 .

[0072] It should be noted that the parts in the embodiment of the method for forming the aforementioned stacked packaging structure that are the same or similar to those in the embodiment of the aforementioned stacked packaging structure will not be repeated in the embodiment of the method for forming the stacked packaging structure. Please refer to the limitations or descriptions of the corresponding parts in the embodiment of the aforementioned stacked packaging structure for details.

[0073] Although the present application has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present application. Any technical personnel in this field can use the methods and technical contents disclosed above to make possible changes and modifications to the technical solution of the present application without departing from the spirit and scope of the present application. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are within the protection scope of the technical solution of the present application.

Claims

1. A stacked package structure, characterized in that: include: a first substrate including an upper surface and a lower surface opposite to each other; a chip stacking structure located on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the chip stacking structure being electrically connected to the first substrate; A flexible circuit board mounted on at least one side of the chip stacking structure, the flexible circuit board comprising a first functional surface and a second functional surface relative to each other, the first functional surface being close to the corresponding side of the chip stacking structure and perpendicular to the upper surface of the first substrate, the second functional surface being away from the corresponding side of the chip stacking structure and perpendicular to the upper surface of the first substrate, and the second functional surface of the flexible circuit board being mounted with a second semiconductor chip electrically connected to the flexible circuit board.

2. The stacked package structure according to claim 1, wherein: Each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

3. The stacked package structure according to claim 2, wherein: The first side surface of the first semiconductor chip has a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the corresponding second pad on the second functional surface of the flexible circuit board; the first pad on the first functional surface of the flexible circuit board is electrically connected to the first side pad on the first side surface of the corresponding first semiconductor chip in the chip stacking structure.

4. The stacked package structure according to claim 3, wherein: The flexible circuit board is mounted on at least one side of the chip stacking structure, and the first pad on the first functional surface of the flexible circuit board is electrically connected to the first side pad on the first side of the corresponding first semiconductor chip in the chip stacking structure, including: the first pad on the first functional surface of the flexible circuit board is welded together and electrically connected to the first side pad on the first side of the corresponding first semiconductor chip in the chip stacking structure through a first solder bump; The second semiconductor chip is electrically connected to the second pad corresponding to the second functional surface of the flexible circuit board, including: the second semiconductor chip is electrically connected to the second pad corresponding to the second functional surface of the flexible circuit board through a second solder bump.

5. The stacked package structure according to claim 3, wherein: The flexible circuit board also includes a plurality of second side surfaces between the first functional surface and the second functional surface, and a second side surface of the flexible circuit board close to the upper surface of the first substrate is suspended on the upper surface of the first substrate or attached to the upper surface of the first substrate.

6. The package stack structure according to claim 2, wherein: The first side surface of the first semiconductor chip does not have a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board also has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the corresponding second pads; the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure.

7. The stacked package structure according to claim 6, wherein: The flexible circuit board is mounted on at least one side of the chip stacking structure, and the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure, including: the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure through an adhesive layer.

8. The package stack structure according to claim 6, wherein: The stacked packaging structure also includes a third semiconductor chip, which is mounted on the first functional surface of the flexible circuit board and electrically connected to the corresponding first pad on the first functional surface through a third solder bump; the flexible circuit board is mounted on at least one side of the chip stacking structure, and the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure, including: the third semiconductor chip mounted on the first functional surface of the flexible circuit board is attached to the side of the chip stacking structure through an adhesive layer.

9. The stacked package structure according to claim 3, 7 or 8, characterized in that: The flexible circuit board is electrically connected to the first substrate.

10. The package-on-package structure according to claim 9, wherein: The flexible circuit board is electrically connected to the first substrate, comprising: a portion of the flexible circuit board is bent and extends parallel to a portion of the upper surface of the first substrate, and the bent portion of the flexible circuit board is welded and electrically connected to a first upper pad corresponding to the upper surface of the first substrate through a connecting solder ball.

11. The package-on-package structure according to claim 9, wherein: The flexible circuit board is electrically connected to the first substrate, including: the flexible circuit board and the first substrate are a combination of soft and hard boards, the flexible circuit board is flexible, the first substrate is rigid, and the flexible circuit board is partially embedded in the first substrate and electrically connected to the first substrate.

12. The package-on-package structure according to claim 9, wherein: The flexible circuit board is electrically connected to the first substrate, including: the first substrate also includes a plurality of side surfaces between an upper surface and a lower surface, the flexible circuit board extends from at least one side surface of the first substrate to a lower surface of the first substrate and is electrically connected to the first substrate from the lower surface of the first substrate.

13. The package-on-package structure according to claim 9, wherein: The flexible circuit board is electrically connected to the first substrate, including: the first substrate is also a flexible board, the first substrate and the flexible circuit board are an integrated structure with electrical connection, and the flexible circuit board is bent upward from at least one side of the first substrate.

14. The package stack structure according to claim 13, wherein: A first lower pad surface of the lower surface of the first substrate has a raised first external solder bump; The stacked packaging structure also includes: a second substrate, wherein the second substrate has a third circuit, the upper surface of the second substrate has a second upper solder pad, the lower surface of the second substrate has a second lower solder pad, the second upper solder pad and the second lower solder pad are electrically connected to the third circuit; the first substrate is located on the second substrate, and the first external solder bump on the lower surface of the first substrate is welded together with the second upper solder pad corresponding to the upper surface of the second substrate; the second lower solder pad surface of the lower surface of the second substrate has a raised second external solder bump.

15. The package-on-package structure according to claim 3, 7 or 8, wherein: A portion of the flexible circuit board is bent and extends parallel to the second surface of the topmost first semiconductor chip in the chip stacking structure, and is electrically connected to the second external terminal of the second surface portion of the topmost first semiconductor chip.

16. The package-on-package structure according to claim 3, 7 or 8, wherein: The flexible circuit board is located on an upper surface of the first substrate at one or more sides of the chip stacking structure.

17. The package-on-package structure according to claim 4, 7 or 8, wherein: The number of the second semiconductor chips is one or more; when the number of the second semiconductor chips is multiple, the multiple second semiconductor chips are stacked sequentially on the second functional surface of the flexible circuit board along a direction parallel to the upper surface of the first substrate, or the multiple second semiconductor chips are mounted at different positions on the second functional surface of the flexible circuit board.

18. The package-on-package structure according to claim 17, wherein: The second semiconductor chip includes a third surface and a fourth surface relative to each other and a plurality of side surfaces between the third surface and the fourth surface, the third surface having a third external terminal, the third external terminal of the third surface of the second semiconductor chip being electrically connected to a second pad corresponding to the second functional surface of the flexible circuit board through the second solder bump; the side surface of the second semiconductor chip close to the upper surface of the first substrate has a second side pad, the second side pad being soldered together with a first upper pad corresponding to the upper surface of the first substrate through a fourth solder bump.

19. A method for forming a stacked package structure, characterized in that: include: Providing a first substrate, the first substrate comprising an upper surface and a lower surface opposite to each other; forming a chip stacking structure on the upper surface of the first substrate, the chip stacking structure comprising a plurality of first semiconductor chips stacked in sequence along a direction perpendicular to the upper surface of the first substrate, and the chip stacking structure is electrically connected to the first substrate; A flexible circuit board is mounted on at least one side of the chip stacking structure, the flexible circuit board includes a first functional surface and a second functional surface relative to each other, the first functional surface is close to the corresponding side of the chip stacking structure and is perpendicular to the upper surface of the first substrate, the second functional surface is away from the corresponding side of the chip stacking structure and is perpendicular to the upper surface of the first substrate, and a second semiconductor chip electrically connected to the flexible circuit board is mounted on the second functional surface of the flexible circuit board.

20. The method for forming a package-on-package structure according to claim 19, wherein: Each first semiconductor chip in the chip stacking structure includes a first surface and a second surface relative to each other, and a first side surface located between the first surface and the second surface. The first semiconductor chip has an integrated circuit, the first surface has a plurality of discrete first external terminals, the second surface has a plurality of discrete second external terminals, and the first external terminals and the second external terminals are electrically connected to the integrated circuit; when multiple first semiconductor chips are stacked in sequence along a direction perpendicular to the upper surface of the first substrate, the first surface of the upper first semiconductor chip is stacked downward on the second surface of the lower first semiconductor chip, and the first external terminal of the first surface of the upper first semiconductor chip is electrically connected to the second external terminal of the second surface of the lower first semiconductor chip; the first substrate has a first circuit, the upper surface of the first substrate has a plurality of discrete first upper pads, the lower surface of the first substrate has a plurality of discrete first lower pads, the first upper pads and the first lower pads are electrically connected to the first circuit, and the first external terminal of the first surface of the bottom layer of the first semiconductor chip is electrically connected to the corresponding first upper pad on the upper surface of the first substrate.

21. The method for forming a package-on-package structure according to claim 20, wherein: The first side surface of the first semiconductor chip has a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, the first pads and the second pads are electrically connected to the second circuit; the second semiconductor chip is electrically connected to the corresponding second pad on the second functional surface of the flexible circuit board; the first pad on the first functional surface of the flexible circuit board is electrically connected to the first side pad on the first side surface of the corresponding first semiconductor chip in the chip stacking structure.

22. The method for forming a package-on-package structure according to claim 21, wherein: Mounting a flexible circuit board on at least one side of the chip stacking structure, and electrically connecting a first pad on a first functional surface of the flexible circuit board to a first side pad on a first side of a corresponding first semiconductor chip in the chip stacking structure comprises: welding and electrically connecting the first pad on the first functional surface of the flexible circuit board to the first side pad on the first side of the corresponding first semiconductor chip in the chip stacking structure through a first solder bump; Electrically connecting the second semiconductor chip to the second pad corresponding to the second functional surface of the flexible circuit board includes: electrically connecting the second semiconductor chip to the second pad corresponding to the second functional surface of the flexible circuit board through a second solder bump.

23. The method for forming a package-on-package structure according to claim 20, wherein: The first side surface of the first semiconductor chip does not have a first side pad; the flexible circuit board has a second circuit, the first functional surface of the flexible circuit board also has a plurality of discrete first pads, the second functional surface of the flexible circuit board has a plurality of discrete second pads, and the first pads and the second pads are electrically connected to the second circuit; The second semiconductor chip is electrically connected to the corresponding second pad; mounting a flexible circuit board on at least one side of the chip stacking structure includes: attaching a first functional surface of the flexible circuit board to the side of the chip stacking structure.

24. The method for forming a package-on-package structure according to claim 23, wherein: Attaching the first functional surface of the flexible circuit board to the side surface of the chip stacking structure includes: attaching the first functional surface of the flexible circuit board to the side surface of the chip stacking structure through an adhesive layer.

25. The method for forming a package-on-package structure according to claim 23, wherein: The stacked package structure further includes a third semiconductor chip, which is mounted on the first functional surface of the flexible circuit board and electrically connected to the corresponding first pad on the first functional surface through a third solder bump; Attaching the first functional surface of the flexible circuit board to the side surface of the chip stacking structure includes: attaching the third semiconductor chip mounted on the first functional surface of the flexible circuit board to the side surface of the chip stacking structure through an adhesive layer.

26. The method for forming a package-on-package structure according to claim 21, 24 or 25, wherein: The flexible circuit board is electrically connected to the first substrate.

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