Mesh decoding device, mesh decoding method, and program product

Abstract

Provided are a mesh decoding device, a mesh decoding method, and a program product, a displacement amount decoding unit (206) of a mesh decoding device (200) having: an arithmetic decoding unit (206B) that generates a binary syntax by arithmetically decoding a displacement amount bit stream; a bypass arithmetic decoding unit (206A2) that generates a binary syntax by arithmetically decoding the displacement amount bitstream fixed context value by performing bypass calculation decoding; a multi-system conversion unit (206F) that generates a syntax by multi-system conversion of the binary syntax; and a coefficient level value decoding unit (206F2) that generates a coefficient level value on the basis of the syntax.

Description

Technical Field

[0001] The invention relates to a grid decoding device, a grid decoding method and a program product. Background Art

[0002] Non-patent document 1 discloses a technique for dividing a grid into a simple basic grid and a detailed displacement amount, and decoding the displacement amount by a video codec.

[0003] Prior art literature

[0004] Non-patent literature

[0005] Non-patent document 1: Khaled Mammou, Jungsun Kim, Alexis Tourapis, DimitriPodborski, Krasimir Kolarov, “[V-CG] Apple's Dynamic Mesh Coding CfP Response,” ISO / IEC JTC 1 / SC 29 / WG 7m5928, April 2022. Summary of the invention

[0006] Problems to be solved by the invention

[0007] However, in the technology disclosed in non-patent document 1, there is a problem that the image codec used for decoding the displacement has a large amount of calculation. Therefore, the present invention is made in view of the above-mentioned problem, and its purpose is to provide a grid decoding device, grid decoding method and program product that can reduce the amount of calculation.

[0008] Means for solving problems

[0009] The first technical solution of the present invention is a grid decoding device, the main purpose of which is to have: a displacement decoding unit, which is configured to decode the displacement bit stream to generate and output the displacement, and the displacement decoding unit has: an arithmetic decoding unit, which is configured to generate a binary syntax by arithmetically decoding the displacement bit stream; a bypass arithmetic decoding unit, which is configured to arithmetically decode the fixed context value of the displacement bit stream by performing bypass calculation decoding to generate a binary syntax; a multi-numbering unit, which is configured to generate the syntax by multi-numbering the binary syntax; a coefficient level value decoding unit, which is configured to generate a coefficient level value according to the syntax; an inverse quantization unit, which is configured to generate a transform coefficient by inverse quantizing the coefficient level value; and an inverse wavelet transform unit, which is configured to generate a displacement by performing an inverse wavelet transform on the transform coefficient.

[0010] The second technical solution of the present invention is a grid decoding method, the main purpose of which is to have a process for decoding a displacement bit stream to generate and output a displacement, and the process includes: a process for generating a binary syntax by arithmetically decoding the displacement bit stream; a process for generating a binary syntax by arithmetically decoding a fixed context value of the displacement bit stream through bypass calculation decoding; a process for generating the syntax by multi-arying the binary syntax; a process for generating a coefficient level value according to the syntax; a process for generating a transform coefficient by inverse quantizing the coefficient level value; and a process for generating a displacement by performing an inverse wavelet transform on the transform coefficient.

[0011] The third technical solution of the present invention is a program product, which includes a program that enables a computer to function as a grid decoding device. The main purpose of the program product is that the grid decoding device has: a displacement decoding unit, which is configured to decode the displacement bit stream to generate and output the displacement, and the displacement decoding unit has: an arithmetic decoding unit, which is configured to generate a binary syntax by arithmetically decoding the displacement bit stream; a bypass arithmetic decoding unit, which is configured to arithmetically decode the fixed context value of the displacement bit stream by performing bypass calculation decoding to generate a binary syntax; a multi-numbering unit, which is configured to generate the syntax by multi-numbering the binary syntax; a coefficient level value decoding unit, which is configured to generate a coefficient level value according to the syntax; an inverse quantization unit, which is configured to generate a transform coefficient by inverse quantizing the coefficient level value; and an inverse wavelet transform unit, which is configured to generate a displacement by performing an inverse wavelet transform on the transform coefficient.

[0012] Effects of the Invention

[0013] According to the present invention, a trellis decoding device, a trellis decoding method and a program product capable of reducing the amount of calculation can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a diagram showing an example of the configuration of a mesh processing system 1 according to an embodiment.

[0015] Figure 2 This is a diagram showing an example of functional blocks of a trellis decoding device 200 according to an embodiment.

[0016] Figure 3 1 is a diagram showing an example of a functional block of the displacement amount decoding unit 206 of the trellis decoding device 200 according to an embodiment.

[0017] Figure 4 This is a diagram showing an example of a syntactic structure.

[0018] Figure 5The diagram shows an example of a syntax that can be determined as being for decoding to be omitted by the decoding omission determination unit 206A1 and an example of a coefficient that becomes a target for arithmetic decoding to be bypassed by the bypass decoding determination unit 206A2.

[0019] Figure 6 This is a flowchart showing an example of the operation of the displacement amount decoding unit 206.

[0020] Figure 7 This is a flowchart showing an example of an operation determined by the syntax of coefficient units.

[0021] Explanation of symbols

[0022] 1: Grid processing system;

[0023] 100: grid encoding device;

[0024] 200: grid decoding unit;

[0025] 201: multiplexing and separation unit;

[0026] 202: basic grid decoding unit;

[0027] 203: sub-division part;

[0028] 204: grid decoding unit;

[0029] 205: Patch Integration Department;

[0030] 206: displacement decoding unit;

[0031] 206A1: decoding omission determination unit;

[0032] 206A2: Bypass the decoding determination unit;

[0033] 206A3: bypass the arithmetic decoding unit;

[0034] 206B: Arithmetic decoding unit;

[0035] 206C: context value updating unit;

[0036] 206D: context buffer;

[0037] 206E: context selection unit;

[0038] 206F: Multi-numbering unit;

[0039] 206F2: coefficient level value decoding unit;

[0040] 206G: inter-frame prediction unit;

[0041] 206H: frame buffer;

[0042] 206I: adder;

[0043] 206J: Anti-quantification Department;

[0044] 206K: Inverse wavelet transform unit;

[0045] 207: Image decoding unit. DETAILED DESCRIPTION

[0046] Below, while referring to the attached Figure 1 The embodiments of the present invention are described below. In addition, the structural elements in the following embodiments can be appropriately replaced with existing structural elements, etc., and various changes including combinations with other existing structural elements can be made. Therefore, the content of the invention described in the claims is not limited based on the description of the following embodiments.

[0047] <First Embodiment>

[0048] Below, refer to Figure 1 to Figure 7 , the grid processing system involved in this embodiment is described.

[0049] Figure 1 1 is a diagram showing an example of the structure of the grid processing system 1 according to the present embodiment. Figure 1 As shown, the grid processing system 1 has a grid encoding device 100 and a grid decoding device 200 .

[0050] Figure 2 This is a diagram showing an example of functional blocks of the trellis decoding device 200 according to the present embodiment.

[0051] like Figure 2 As shown, the trellis decoding device 200 includes a demultiplexing unit 201 , a basic trellis decoding unit 202 , a sub-division unit 203 , a trellis decoding unit 204 , a patch integration unit 205 , a displacement decoding unit 206 and a video decoding unit 207 .

[0052] The demultiplexing unit 201 is configured to separate the multiplexed bit stream into a base grid bit stream, a displacement bit stream, and a texture bit stream.

[0053] The base grid decoding unit 202 is configured to decode the base grid bit stream, generate and output a base grid.

[0054] The sub-division unit 203 is configured to generate and output the added sub-division vertices and connection information thereof based on the basic mesh decoded by the basic mesh decoding unit 202 according to the sub-division method indicated by the control information.

[0055] Here, the base mesh, the added sub-division vertices, and the connection information thereof are collectively referred to as a “sub-division mesh”.

[0056] The mesh decoding unit 204 is configured to generate and output a decoded mesh using the sub-division mesh generated by the sub-division unit 203 and the displacement amount decoded by the displacement amount decoding unit 206 .

[0057] The patch integration unit 205 is configured to integrate and output a plurality of patches of the decoded meshes generated by the mesh decoding unit 206 .

[0058] The displacement amount decoding unit 206 is configured to decode the displacement amount bit stream and generate and output the displacement amount.

[0059] The video decoding unit 207 is configured to decode and output textures by video coding. For example, the video decoding unit 207 can use HEVC of Non-Patent Document 1.

[0060] (Displacement Decoding Unit 206)

[0061] like Figure 3 As shown, the displacement decoding unit 206 has a decoding omission determination unit 206A1, a bypass decoding determination unit 206A2, a bypass arithmetic decoding unit 206A3, an arithmetic decoding unit 206B, a context value update unit 206C, a context buffer 206D, a context selection unit 206E, a multi-numbering unit 206F, a coefficient level value decoding unit F2, an inter-frame prediction unit 206G, a frame buffer 206H, an adder 206I, an inverse quantization unit 206J and an inverse wavelet transform unit 206K.

[0062] The decoding omission determination unit 206A1 is configured to determine whether to omit a portion of the decoding of a portion of the syntax and regard it as a predetermined value.

[0063] The bypass decoding determination unit 206A2 is configured to determine whether the received displacement amount bit stream is to be sent to the arithmetic decoding unit 206B or to bypass the arithmetic decoding unit 206A3.

[0064] The arithmetic decoding unit 206B is configured to generate binary syntax by performing arithmetic decoding on the received displacement bit stream. Specifically, the arithmetic decoding unit 206B is configured to output binary syntax by performing arithmetic decoding on the received displacement bit stream while updating the context value.

[0065] The context value updating unit 206C is configured to update the context value using binary syntax and output the updated context value to the context buffer 206D.

[0066] The context selection unit 206E is configured to generate and output a context value (output context value) using the context value and syntax read from the context buffer 206D.

[0067] The context buffer 206D is configured to acquire and accumulate context values ​​and syntax. The context buffer 206D is configured to output the context value and syntax to the context selection unit 206E in response to control information (not shown).

[0068] The bypass arithmetic decoding unit 206A3 is configured to generate a binary syntax by performing arithmetic decoding on the received displacement bit stream fixed context value.

[0069] The multi-byte conversion unit 206F is configured to generate and output syntax by multi-byteing the binary syntax received from the arithmetic decoding unit 206B or the bypass arithmetic decoding unit 206A3. The generated (calculated) syntax is output to the coefficient level value decoding unit 206F2 and the context buffer 206D.

[0070] The coefficient level value decoding unit 206F2 is configured to generate and output coefficient level values ​​based on the syntax received from the multi-numbering unit 206F.

[0071] The inter-frame prediction unit 206G is configured to generate and output a predicted displacement using the reference frame read from the frame buffer 206H.

[0072] The frame buffer 206H is configured to obtain and accumulate coefficient level values ​​from the adder 2061. The frame buffer 206H is configured to output coefficient level values ​​of corresponding vertices in the reference frame in response to control information (not shown).

[0073] The adder 206I is configured to obtain the coefficient level value (prediction residual) from the coefficient level value decoding unit 206F2 and obtain the coefficient level value from the frame buffer 206H. The adder 206I is configured to add the prediction residual and the coefficient level value, generate and output the coefficient level value (decoded displacement). The generated (calculated) coefficient level value (decoded displacement) is output to the inverse quantization unit 206J and the frame buffer 206H.

[0074] The inverse quantization unit 206J is configured to generate and output transform coefficients by inverse quantizing the received coefficient level values ​​(decoded displacement amounts).

[0075] The inverse wavelet transform unit 206K is configured to generate and output a displacement amount by performing an inverse wavelet transform on the transform coefficient received from the inverse quantization unit 206J.

[0076] Here, the inverse wavelet transform is the inverse transform of the inverse wavelet transform. The inverse wavelet transform is a method that uses a wavelet function as a basis, amplifies low-frequency components, and reduces high-frequency components, thereby being able to analyze spatial and frequency information at the same time.

[0077] (Syntactic structure)

[0078] Below, refer to Figures 4-5 Explain the syntactic structure.

[0079] First, the coefficient level value of the decoded displacement is represented by three vectors of N dimension in each frame. N represents the total number of sub-division vertices. 3 represents a basic number and can be set arbitrarily.

[0080] For example, the coefficient level values ​​can be set to three directions: normal direction, tanegnt direction and bi-tangent direction based on each sub-divided vertex. Each vector is divided into blocks or sub-blocks and encoded in units of blocks or sub-blocks.

[0081] Each vector may be equally divided so that each block has the same size. The remaining elements are formed into blocks with the largest size. Alternatively, each vector may be divided so that each block has a different size.

[0082] For example, the block size may be determined by the sub-division level indicated by the control information and the total number of coefficient level values ​​of each level (n1, n2, ...). Here, the sub-division level indicates the number of sub-divisions. For example, when the sub-division level is 4, it may be composed of 4 blocks of sizes n1, n2, n3, and n4, respectively.

[0083] Each block is further divided into small sub-blocks. The block can be equally divided in such a way that the size of each sub-block is the same. For the remaining elements, the sub-blocks are formed with the largest size. The size of the sub-blocks can be different for each block.

[0084] Figure 4 This is a diagram showing an example of a syntax structure. The syntax can be defined as a whole, a block, a sub-block, or a coefficient.

[0085] First, the syntax defined as a whole is explained. last_sig_coeff_prefix represents the prefix of the coordinate position of the non-zero coefficient at the beginning of the scan order. last_sig_coeff_suffix represents the suffix of the coordinate position of the non-zero coefficient at the beginning of the scan order. For example, the prefix is ​​expressed by binarization of the truncated slice, and the suffix is ​​expressed by a fixed length.

[0086] Second, the syntax defined in units of blocks will be described. coded_block_flag is a flag indicating that a block has a non-zero coefficient. Only one of these flags is defined for each block.

[0087] Third, the syntax defined in units of sub-blocks will be described. coded_subblock_flag is a flag indicating that a sub-block has a non-zero coefficient. Only one of the flags is defined for each sub-block.

[0088] Fourth, the syntax defined in coefficient units is described. sig_coeff_flag is a flag indicating whether the coefficient is non-zero. coeff_abs_level_greater1_flag is a flag indicating whether the absolute value of the coefficient (non-zero coefficient) is greater than or equal to 2. coeff_sign_flag is a flag indicating the sign code of the coefficient. coeff_abs_level_remaining indicates the value obtained by subtracting the values ​​expressed by sig_coeff_flag and coeff_abs_level_greater1_flag from the absolute value of the coefficient. coeff_abs_level_remaining is expressed, for example, by a k-order exponential Golomb code.

[0089] (Arithmetic Decoding Unit 206B)

[0090] The arithmetic decoding unit 206B targets binary. The arithmetic decoding unit 206B defines a number axis from 0 to 1, divides and uses the interval. The interval is divided by the occurrence probability of binary (hereinafter referred to as context value).

[0091] The binary decimal is input to the arithmetic decoding unit 206B, and the arithmetic decoding unit 206B decodes the original value according to which interval on the number axis the binary decimal is included in. The context value is received from the context selection unit 206E for each bit of the input signal and is used for decoding.

[0092] (Context Value Updater 206C)

[0093] The context value updating unit 206C is configured to update the context value every time 1 bit is decoded.

[0094] Here, the context value updating unit sets a symbol with a high probability of occurrence between 0 and 1 as MPS (Most Probable Symbol) and sets a symbol with a low probability of occurrence as LPS (Least Probable Symbol).

[0095] The context value updating unit 206C may use the probability update table to slightly update the probability value when MPS occurs, and to significantly update the probability value when LPS occurs.

[0096] (Bypassing the arithmetic decoding unit 206A3)

[0097] The bypass arithmetic decoding unit 206A3 is configured to perform arithmetic decoding using context values ​​in the same manner as the arithmetic decoding unit 206B.

[0098] Here, in the bypass arithmetic decoding unit 206A3, the context value is always set to a fixed value, so that context update and context selection are unnecessary, and calculation time can be reduced.

[0099] (Decoding Omission Determination Unit 206A1)

[0100] The decoding omission determination unit 206A1 may be configured to determine whether to omit decoding of coded_block_flag in a part of the blocks and regard it as a predetermined value.

[0101] Furthermore, the decoding omission determination unit 206A1 may be configured to determine whether to omit decoding of coded_subblock_flag in a part of sub-blocks and regard it as a predetermined value.

[0102] For example, when the total number of decoded values ​​reaches a predetermined threshold, the decoding omission determination unit 206A1 may omit decoding of all remaining coded_block_flags and regard them as 1.

[0103] For example, when the total number of decoded values ​​of 1 reaches a predetermined threshold, the decoding omission determination unit 206A1 may omit decoding of all remaining coded_block_flags and regard them as 1.

[0104] For example, when the total number of decoded values ​​reaches a predetermined threshold, the decoding omission determination unit 206A1 may omit decoding of all remaining coded_subblock_flags and regard them as 1.

[0105] For example, when the total number of decoded values ​​of 1 reaches a predetermined threshold, the decoding omission determination unit 206A1 may omit decoding of all remaining coded_subblock_flags and regard them as 1.

[0106] exist Figure 5 2 shows an example of a syntax that can be determined by the decoding omission determination unit 206A1 to omit decoding.

[0107] (Bypassing Decoding Determination Unit 206A2)

[0108] The bypass decoding determination unit 206A2 is configured to determine whether to bypass arithmetic decoding of a part of the coefficients.

[0109] The syntax of the coefficient unit determined by the bypass decoding determination unit 206A2 as a target for bypass arithmetic decoding is processed by the bypass arithmetic decoding unit 206A3.

[0110] For example, when the total number of decoded values ​​in each sub-block reaches a predetermined threshold, the bypass decoding determination unit 206A2 may bypass arithmetic decoding of all remaining sig_coeff_flags.

[0111] For example, when the total number of decoded values ​​of 1 in each sub-block reaches a predetermined threshold, the bypass decoding determination unit 206A2 may bypass arithmetic decoding of all remaining sig_coeff_flags.

[0112] For example, when the total number of decoded values ​​in each sub-block reaches a predetermined threshold, the bypass decoding determination unit 206A2 may bypass arithmetic decoding of all remaining coeff_abs_level_greater1_flags.

[0113] For example, when the total number of decoded values ​​of 1 in each sub-block reaches a predetermined threshold, the bypass decoding determination unit 206A2 may bypass arithmetic decoding of all remaining coeff_abs_level_greater1_flags.

[0114] exist Figure 5 2 shows an example of coefficients that become targets for arithmetic decoding bypassed by the bypass decoding determination unit 206A2.

[0115] (Operation of the Displacement Decoding Unit 206)

[0116] Below, refer to Figure 6-7 An example of the operation of the displacement amount decoding unit 206 will be described.

[0117] First, refer to Figure 6 An example of the operation of the displacement amount decoding unit 206 will be described.

[0118] like Figure 6 As shown, in step S101 , the arithmetic decoding unit 206B and the multiplexing unit 206F decode last_sig_coeff_prefix and last_sig_coeff_suffix.

[0119] In step S102, the coefficient level value decoding unit 206F2 determines that all coefficients after the positions indicated by last_sig_coeff_prefix and last_sig_coeff_suffix are set to 0.

[0120] In step S103 , the arithmetic decoding unit 206B decodes coded_block_flag.

[0121] In step S104, the coefficient level value decoding unit 206F2 determines whether coded_block_flag is 0 or 1.

[0122] When coded_block_flag=0, the operation proceeds to step S105, and when coded_block_flag=1, the operation proceeds to step S109.

[0123] In step S105, the coefficient level value decoding unit 206F2 determines all coefficients in the currently processed block to be 0.

[0124] In step S106, the coefficient level value decoding unit 206F2 determines whether the block currently being processed is the final block. If so, the operation ends, and if not, the operation proceeds to step S107.

[0125] In step S107, the coefficient level value decoding unit 206F2 enters the processing for the next block.

[0126] In step S108 , the decoding omission determination unit 206A1 determines whether to omit decoding of coded_block_flag and regard it as 1. If yes, the operation proceeds to step S109 , and if no, the operation returns to step S103 .

[0127] In step S109 , the arithmetic decoding section 206B decodes coded_subblock_flag.

[0128] In step S110, the coefficient level value decoding unit 206F2 determines whether coded_subblock_flag is 0 or 1. When coded_subblock_flag=0, the operation proceeds to step S111, and when coded_subblock_flag=1, the operation proceeds to step S115.

[0129] In step S111, the coefficient level value decoding unit 206F2 determines all coefficients in the sub-block currently being processed to be 0.

[0130] In step S112, the coefficient level value decoding unit 206F2 determines whether the sub-block currently being processed is the final sub-block. If yes, the operation proceeds to step S106, and if not, the operation proceeds to step S113.

[0131] In step S113, the coefficient level value decoding unit 206F2 enters the processing for the next sub-block.

[0132] In step S114 , the decoding omission determination unit 206A1 determines whether to omit decoding of coded_subblock_flag and regard it as 1. If yes, the operation proceeds to step S115 , and if no, the operation proceeds to step S109 .

[0133] In step S115, the arithmetic decoding unit 206B and the multi-numbering unit 206F determine the syntax implemented by the coefficient unit. Figure 7 I will explain it later.

[0134] In step S116, the coefficient level value decoding unit 206F2 determines whether the coefficient currently being processed is the last one in the sub-block. If so, the operation proceeds to step S112, and if not, the operation proceeds to step S117.

[0135] Figure 7 This is a diagram showing an example of the operation determined by the syntax of the above-mentioned coefficient unit.

[0136] In step S115-01, the bypass decoding determination unit 206A3 determines whether to bypass arithmetic decoding of sig_coeff_flag. If yes, the operation proceeds to step S115-02, and if no, the operation proceeds to step S115-03.

[0137] In step S115 - 02 , the arithmetic decoding unit 206B decodes sig_coeff_flag.

[0138] In step S115 - 03 , the context selection section 206E selects a context for arithmetic decoding of sig_coeff_flag.

[0139] In step S115 - 04 , the arithmetic decoding unit 206B decodes sig_coeff_flag.

[0140] In step S115 - 05 , the context value updating section 206C updates the context value used for arithmetic decoding of sig_coeff_flag.

[0141] In step S115-06, the coefficient level value decoding unit 206F2 determines whether sig_coeff_flag is 0 or 1. When sig_coeff_flag=0, the operation proceeds to step S115-07, and when sig_coeff_flag=1, the operation proceeds to step S115-08.

[0142] In step S115-07, the coefficient level value decoding unit 206F2 determines the coefficient level value to be 0, and the action ends.

[0143] In step S115-08, the bypass decoding determination unit 206A2 determines whether to bypass arithmetic decoding of coeff_abs_level_greater1_flag. If yes, the operation proceeds to step S115-09, and if no, the operation proceeds to step S115-10.

[0144] In step S115 - 09 , the arithmetic decoding section 206B decodes coeff_abs_level_greater1_flag.

[0145] In step S115-10, the context selection unit 206E selects a context for decoding coeff_abs_level_greater1_flag.

[0146] In step S115 - 11 , the arithmetic decoding section 206B decodes coeff_abs_level_greater1_flag.

[0147] In step S115 - 12 , the context value updating section 206C updates the context value used for decoding of coeff_abs_level_greater1_flag.

[0148] In step S115-13, the coefficient level value decoding unit 206F2 determines whether coeff_abs_level_greater1_flag is 0 or 1. If coeff_abs_level_greater1_flag=0, the operation proceeds to step S115-14, and if coeff_abs_level_greater1_flag=1, the operation proceeds to step S115-15.

[0149] In step S115-14, the coefficient level value decoding unit 206F2 determines the coefficient level value to be 1 and enters step S115-16.

[0150] In step S115 - 15 , the arithmetic decoding unit 206B and the multiplexing unit 206F decode coeff_abs_level_remaining.

[0151] In step S115 - 16 , the arithmetic decoding section 206B decodes coeff_sign_flag.

[0152] In step S115-17, the coefficient level value decoding unit 206F2 determines whether coeff_sign_flag is 0 or 1. When coeff_sign_flag=0, the operation proceeds to step S115-18, and when coeff_sign_flag=1, the operation proceeds to step S115-19.

[0153] In step S115-18, the coefficient level value decoding unit 206F2 determines the coefficient level value as coeff_abs_level_remaining, and the action ends.

[0154] In step S115 - 19 , the coefficient level value decoding unit determines the coefficient level value as a value obtained by making coeff_abs_level_remaining negative, and the operation ends.

[0155] According to the trellis decoding device 200 involved in this embodiment, the amount of calculation can be reduced by omitting part of the decoding of the syntax and treating it as a predetermined value or bypassing the arithmetic decoding of part of the coefficients.

[0156] The above-mentioned trellis encoding device 100 and trellis decoding device 200 can be implemented as a program that causes a computer to execute each function (each process).

[0157] Industrial Applicability

[0158] In addition, according to this embodiment, for example, since comprehensive service quality can be improved in moving image communications, it can contribute to Goal 9 of the Sustainable Development Goals (SDGs) led by the United Nations, "Improve the infrastructure of the information environment, promote sustainable industrialization and achieve expansion of innovation."

Claims

1. A grid decoding device, characterized in that: The grid decoding device has: A displacement decoding unit is configured to decode the displacement bit stream to generate and output the displacement, The displacement decoding unit comprises: an arithmetic decoding unit configured to generate a binary syntax by performing arithmetic decoding on the displacement bit stream; a bypass arithmetic decoding unit configured to perform arithmetic decoding on the fixed context value of the displacement bit stream by performing bypass arithmetic decoding to generate a binary syntax; a multi-base unit configured to generate the syntax by multi-base-ing the binary syntax; a coefficient level value decoding unit configured to generate coefficient level values ​​according to the syntax; an inverse quantization unit configured to generate a transform coefficient by inverse quantizing the coefficient level value; as well as The inverse wavelet transform unit is configured to generate a displacement amount by performing an inverse wavelet transform on the transform coefficient.

2. The grid decoding device according to claim 1, characterized in that: The arithmetic decoding unit is configured to decode the binary syntax in units of sub-blocks. The bypass arithmetic decoding unit is configured to decode the binary syntax in units of sub-blocks. The multi-numbering unit is configured to generate the syntax in units of sub-blocks, The coefficient level value decoding unit is configured to generate the coefficient level value in units of sub-blocks.

3. The grid decoding device according to claim 2, characterized in that: The displacement amount decoding unit includes a decoding omission determination unit configured to determine whether to omit decoding of a part of the syntax and regard it as a predetermined value. The bypass decoding determination unit is configured to perform the bypass arithmetic decoding on all remaining flags indicating whether or not the coefficients are non-zero coefficients when the total number of decoded values ​​in each sub-block reaches a predetermined threshold or when the total number of decoded values ​​that are 1 in each sub-block reaches the predetermined threshold.

4. The grid decoding device according to claim 2, characterized in that: The bypass decoding determination unit is configured to perform the bypass arithmetic decoding on all remaining marks indicating whether the absolute value of the coefficient is greater than 2 when the total number of decoded values ​​in each sub-block reaches a specified threshold or when the total number of decoded values ​​1 in each sub-block reaches the specified threshold.

5. A grid decoding method, characterized in that: The trellis decoding method comprises a step of decoding a displacement bit stream to generate and output a displacement. The process comprises: The step of generating a binary syntax by performing arithmetic decoding on the displacement bit stream; The step of performing arithmetic decoding on the fixed context value of the displacement bit stream by bypassing calculation decoding to generate a binary syntax; The step of generating the syntax by multi-binning the binary syntax; A step of generating coefficient level values ​​according to the syntax; The step of generating transform coefficients by dequantizing the coefficient level values; as well as A step of performing inverse wavelet transform on the transform coefficients to generate displacement amounts.

6. A program product comprising a program for causing a computer to function as a trellis decoding device, wherein: The trellis decoding device comprises: a displacement decoding unit configured to decode a displacement bit stream to generate and output a displacement; The displacement decoding unit comprises: an arithmetic decoding unit configured to generate a binary syntax by performing arithmetic decoding on the displacement bit stream; a bypass arithmetic decoding unit configured to perform arithmetic decoding on the fixed context value of the displacement bit stream by performing bypass arithmetic decoding to generate a binary syntax; a multi-base unit configured to generate the syntax by multi-base-ing the binary syntax; a coefficient level value decoding unit configured to generate coefficient level values ​​according to the syntax; an inverse quantization unit configured to generate a transform coefficient by inverse quantizing the coefficient level value; as well as The inverse wavelet transform unit is configured to generate a displacement amount by performing an inverse wavelet transform on the transform coefficient.

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