Compatible power supply circuit of chip

Abstract

The invention relates to the technical field of power supplies, and discloses a compatible power supply circuit of a chip, which comprises a plurality of voltage conversion circuits and a plurality of output circuits, and is characterized in that the input end of each voltage conversion circuit inputs a power supply voltage, and the output end of each voltage conversion circuit is connected with the input end of one output circuit; the voltage conversion circuit is used for converting a power supply voltage into a digital reference voltage; the output end of each output circuit is connected with the same pin of each type of chip, and the output circuits are used for outputting digital voltage or analog voltage with corresponding amplitude to the pins of the chips based on the types of the chips and the types of the pins of the connected chips, so that the number of VR chips is reduced, the PCB space is saved, the cost can be reduced, and the production efficiency is improved. The output voltage switching is flexible, the circuit is suitable for various chips, and the diversified requirements of the chips are met.

Description

Technical Field

[0001] The invention relates to the technical field of power supply, and in particular to a compatible power supply circuit for a chip. Background Art

[0002] In the prior art, retimer chips are usually used to reduce signal attenuation. Retimer chips convert the input analog bit stream into a pure digital signal and store it inside the chip, and then re-send the signal to reduce signal attenuation, which can greatly improve signal quality. Many AI servers are equipped with multiple Retimer chips.

[0003] Memory interface chips are a technology-intensive industry and need to be strictly verified by CPU, memory, and OEM manufacturers before they can be used on a large scale. As the technical difficulty continues to increase, the number of memory interface chip manufacturers has gradually decreased. In the DDR5 generation, only three suppliers in the world can provide mass-produced products of the first sub-generation of DDR5. The power supply voltage and current of each chip are different, and the design must be compatible with the power supply of several chips at the same time. Summary of the invention

[0004] In view of this, the present invention provides a chip compatibility power supply circuit to solve the problem of how to achieve chip compatibility power supply.

[0005] The present invention provides a chip compatibility power supply circuit, comprising: multiple voltage conversion circuits and multiple output circuits, wherein the input end of each voltage conversion circuit inputs the power supply voltage, the output end of each voltage conversion circuit is connected to the input end of an output circuit, and the voltage conversion circuit is used to convert the power supply voltage into a reference voltage in digital form; the output end of each output circuit is connected to the same pin of each type of chip, and the output circuit is used to output a digital voltage or an analog voltage of corresponding amplitude to the pin of the chip based on the type of chip and the pin type of the connected chip.

[0006] The present invention outputs a digital voltage or an analog voltage of corresponding amplitude to the pin of the chip based on the type of chip and the pin type of the connected chip, thereby reducing the number of VR chips, saving PCB space and reducing costs, and realizing flexible output voltage switching for various chips to meet the diversified needs of chips.

[0007] In an optional embodiment, each output circuit includes: a voltage divider circuit, wherein the input end of the voltage divider circuit is connected to the output end of a voltage conversion circuit, and the output end of the voltage divider circuit is connected to the same pin of each type of chip; the voltage divider circuit is used to output a digital voltage or analog voltage of corresponding amplitude to the pin of the chip by changing the internal path resistance based on the type of chip and the pin type of the connected chip.

[0008] In an optional embodiment, each type of chip includes a first pin, a second pin, a third pin, a fourth pin and a fifth pin; the types of chips include: a first type, a second type, a third type and a fourth type; the first pins of the first type, the second type and the third type of chips require the same analog power supply voltage, which is recorded as the first voltage; the analog power supply voltage required by the first pin of the fourth type of chip is recorded as the second voltage; the second pins of the first type, the second type, the third type and the fourth type of chips require the same digital power supply voltage, which is recorded as the third voltage; the third pins of the first type and the second type of chips require the same analog power supply voltage, which is recorded as the fourth voltage; the analog power supply voltage required by the third pin of the third type of chip is recorded as the fifth voltage; the third pin of the fourth type of chip The analog power supply voltage required by the fourth pin of the first type of chip is recorded as the sixth voltage; the analog power supply voltage required by the fourth pin of the first type of chip is recorded as the seventh voltage; the digital power supply voltage required by the fourth pin of the second type of chip is recorded as the eighth voltage; the digital power supply voltage required by the fourth pin of the third type of chip is recorded as the ninth voltage; the analog power supply voltage required by the fourth pin of the fourth type of chip is recorded as the tenth voltage; the fifth pins of the first and second type of chips require the same analog power supply voltage, which is recorded as the eleventh voltage; the fifth pins of the third and fourth type of chips require the same analog power supply voltage, which is recorded as the twelfth voltage; the seventh voltage has the same amplitude as the fourth voltage, the eighth voltage has the same amplitude as the eleventh voltage, the ninth voltage has the same amplitude as the twelfth voltage, and the tenth voltage has the same amplitude as the sixth voltage.

[0009] In an optional embodiment, a voltage divider circuit connected to the first pin of a chip of the first type, the second type, the third type, and the fourth type includes: a first voltage divider resistor, a second voltage divider resistor, a first pull-down resistor, and a first magnetic bead, wherein the first end of the first voltage divider resistor is connected to the first end of the second voltage divider resistor and the first end of the first magnetic bead, and the second end of the first voltage divider resistor is connected to the second end of the second voltage divider resistor, the output end of a voltage conversion circuit, and the first end of the first pull-down resistor; the second end of the first pull-down resistor is grounded; the second end of the first magnetic bead is connected to the first pin of the chip of the first type, the second type, the third type, and the fourth type; when power is supplied to the first pin of the chip of the first type, the second type, or the third type, a Colay method is used, the second voltage divider resistor and the first pull-down resistor are connected, and the second end of the first magnetic bead outputs a first voltage; when power is supplied to the first pin of the chip of the fourth type, a Colay method is used, the first voltage divider resistor and the first pull-down resistor are connected, and the second end of the first magnetic bead outputs a second voltage.

[0010] In an optional implementation, the voltage divider circuit connected to the second pins of the first type, second type, third type, and fourth type chips includes: a straight-through line, wherein the output end of the voltage conversion circuit directly outputs the third voltage.

[0011] In an optional embodiment, a voltage divider circuit connected to the third pin of the first type, second type, third type, and fourth type of chip includes: a second pull-down resistor, a third pull-down resistor, a third voltage divider resistor, a fourth voltage divider resistor, and a second magnetic bead, wherein the first end of the third voltage divider resistor is connected to the first end of the fourth voltage divider resistor and the first end of the second magnetic bead, the second end of the third voltage divider resistor is connected to the second end of the fourth voltage divider resistor, the first end of the second pull-down resistor, the first end of the third pull-down resistor, and the output end of a voltage conversion circuit; the second end of the second pull-down resistor is connected to the second end of the third pull-down resistor and then grounded; the second end of the second magnetic bead is connected to the second end of the third pull-down resistor The end is connected to the third pin of the first type, second type, third type, and fourth type of chips; when the third pin of the first type or second type of chip is powered, the Colay method is adopted, the third voltage-dividing resistor and the second pull-down resistor are installed, and the second end of the second magnetic bead outputs a fourth voltage; when the third pin of the third type of chip is powered, the Colay method is adopted, the third voltage-dividing resistor and the third pull-down resistor are installed, and the second end of the second magnetic bead outputs a fifth voltage; when the third pin of the fourth type of chip is powered, the Colay method is adopted, the fourth voltage-dividing resistor and the second pull-down resistor are installed, and the second end of the second magnetic bead outputs a sixth voltage.

[0012] In an optional embodiment, a voltage divider circuit connected to the fifth pin of a chip of the first type, the second type, the third type, and the fourth type includes: a second pull-down resistor, a third pull-down resistor, a third voltage divider resistor, and a fourth voltage divider resistor, wherein the first end of the third voltage divider resistor is connected to the first end of the fourth voltage divider resistor, and the first end of the third voltage divider resistor is also connected to the third pin of the chip of the first type, the second type, the third type, and the fourth type, and the second end of the third voltage divider resistor is connected to the second end of the fourth voltage divider resistor, the first end of the second pull-down resistor, the first end of the third pull-down resistor, and the output end of a voltage conversion circuit; the second end of the second pull-down resistor is connected to the second end of the third pull-down resistor and then grounded; when power is supplied to the fifth pin of the chip of the first type or the second type, a Colay method is adopted, the third voltage divider resistor and the second pull-down resistor are connected, and the first end of the third voltage divider resistor outputs an eleventh voltage; when power is supplied to the fifth pin of the chip of the third type or the fourth type, a Colay method is adopted, the third voltage divider resistor and the third pull-down resistor are connected, and the first end of the fourth voltage divider resistor outputs a fifth voltage.

[0013] In an optional embodiment, a voltage divider circuit connected to the fourth pin of a chip of the first type, the second type, the third type, and the fourth type includes: a first resistor and a second resistor, wherein the first end of the first resistor is connected to the second end of the second magnetic bead, and the second end of the first resistor is connected to the fourth pin of the chip of the first type, the second type, the third type, and the fourth type; the first end of the second resistor is connected to the first end of the third voltage divider resistor, and the second end of the second resistor is connected to the fourth pin of the chip of the first type, the second type, the third type, and the fourth type; when power is supplied to the fourth pin of the chip of the first type, the Colay method is adopted, and the third voltage divider resistor, The second pull-down resistor and the first resistor are connected, and the second end of the first resistor outputs a seventh voltage; when power is supplied to the fourth pin of the second type of chip, the Colay method is adopted, the third voltage-dividing resistor, the second pull-down resistor, and the second resistor are connected, and the second end of the second resistor outputs an eighth voltage; when power is supplied to the fourth pin of the third type of chip, the Colay method is adopted, the third voltage-dividing resistor, the third pull-down resistor, and the second resistor are connected, and the second end of the second resistor outputs a ninth voltage; when power is supplied to the fourth pin of the third type of chip, the Colay method is adopted, the fourth voltage-dividing resistor, the second pull-down resistor, and the first resistor are connected, and the second end of the first resistor outputs a tenth voltage.

[0014] In an optional embodiment, the chip compatibility power supply circuit also includes: multiple enabling circuits, an enabling circuit, a voltage driving circuit and an output circuit forming a power supply branch for a pin that is the same as each type of chip, wherein the output end of each enabling circuit is connected to the input end of a voltage conversion circuit; the enabling circuit is self-driven or externally driven to achieve the power-on timing of the power supply voltage for each pin of each type of chip.

[0015] In an optional embodiment, the enabling circuit includes: a third resistor, a fourth resistor and a fifth resistor, wherein the first end of the third resistor inputs the supply voltage, the second end of the third resistor is connected to the enabling end of the voltage conversion circuit, the first end of the fourth resistor, and the second end of the fifth resistor; the second end of the fourth resistor is grounded; and the first end of the fifth resistor inputs the external drive signal.

[0016] In an optional embodiment, for the first type and the second type of chips, the power supply voltage of the first pin and the power supply voltage of the second pin are powered on earlier than the power supply voltage of the third pin, the power supply voltage of the fourth pin and the power supply voltage of the fifth pin, and a Colay method is adopted. After the third resistor and the fourth resistor of the enable circuit of the first pin and the second pin are turned on, the output circuit of the first pin outputs an external drive signal to the enable circuit of the third pin, the fourth pin and the fifth pin, and the fifth resistor of the enable circuit of the third pin, the fourth pin and the fifth pin is turned on; for the third type and the fourth type of chips, the power supply voltage of the third pin, the fourth pin and the fifth pin is powered on earlier than the power supply voltage of the first pin, and the power supply voltage of the first pin is powered on earlier than the power supply voltage of the second pin, and a Colay method is adopted. After the third resistor and the fourth resistor of the enable circuit of the third pin, the fourth pin and the fifth pin are turned on, the output circuit of the third pin outputs an external drive signal to the enable circuit of the first pin, and the fifth resistor of the enable circuit of the first pin is turned on, and then the output circuit of the first pin outputs an external drive signal to the enable circuit of the second pin, and the fifth resistor of the enable circuit of the second pin is turned on.

[0017] In an optional implementation, the compatibility power supply circuit of the chip further includes: an electronic fuse, wherein the power supply voltage is transmitted to the input end of each voltage conversion circuit through the electronic fuse. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0019] Figure 1 is a composition diagram of a compatible power supply circuit of a chip according to an embodiment of the present invention;

[0020] Figure 2 is a composition diagram of a compatibility power supply circuit of another chip according to an embodiment of the present invention;

[0021] Figure 3 is a specific circuit structure diagram of a compatible power supply circuit of a chip according to an embodiment of the present invention;

[0022] Figure 4 is a composition diagram of a compatibility power supply circuit of another chip according to an embodiment of the present invention;

[0023] Figure 5 is a composition diagram of a compatibility power supply circuit of another chip according to an embodiment of the present invention;

[0024] Figure 6 The present invention is a flowchart of determining a power supply scheme of a compatible power supply circuit of a chip according to an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0026] As the demand for massive data storage and transmission on servers increases, a large number of high-speed interconnect solutions are needed to achieve massive data transmission in the fields of big data, cloud computing, artificial intelligence, etc. PCIe Switch, as a high-speed interconnect solution, has huge demand in the domestic and foreign markets.

[0027] The PCle Retimer chip is an ultra-high-speed timing integration chip suitable for the PCle high-speed data transmission protocol. It has perception capabilities and can fully restore the data signal and resend it. As the data transmission speed of each generation of PCle doubles, it will bring problems of signal attenuation and reference clock timing reorganization. In order to compensate for the loss of high-speed signals and improve the quality of signals, PCle Retimer chips are usually added to the link. The PCle Switch chip is used to expand the limited PCle interface provided by the CPU and motherboard chipset, so as to connect more PCle devices, and is used to connect CPUs, GPUs, NVMe SSDs, network cards, etc. In AI servers, at least one Retimer chip is required to ensure the quality of the interconnection signal between the GPU and the CPU. Many AI servers are equipped with multiple Retimer chips.

[0028] At present, the power supply scheme of the Retimer chip is basically composed of Buck lines, which mainly utilize the buck conversion function of the Buck line and the protection function of the EFUSE chip. In principle, the P12V and P3V3_STBY power comes directly from the PCIE device interface, and then is converted into power supply voltages of various levels by the buck conversion chip for use by each power pin of the Retimer chip. The current power supply circuit provides the Retimer chip with a power supply that has no special requirements for the power-on timing. Therefore, the current power supply scheme has the defects of a single line, inconvenient voltage control, cumbersome circuits, high cost, poor line intelligence and flexibility, and a narrow compatibility range, and is only applicable to a few Retimer chips.

[0029] Based on this, a compatible power supply circuit of a chip is provided in this embodiment. The following takes the Retimer chip as an example. Figure 1 As shown, it includes: multiple voltage conversion circuits and multiple output circuits, Figure 1 Three Retimer chips are taken as an example, wherein each Retimer chip has three pins.

[0030] like Figure 1 As shown, the input end of each voltage conversion circuit inputs the supply voltage, the output end of each voltage conversion circuit is connected to the input end of an output circuit, and the voltage conversion circuit is used to convert the supply voltage into a reference voltage in digital form.

[0031] Specifically, the voltage conversion circuit draws power from the PCIE device and converts the power supply voltage into a reference voltage in digital form with the same amplitude.

[0032] like Figure 1 As shown, the output end of each output circuit is connected to the same pin of each type of Retimer chip, and the output circuit is used to output a digital voltage or an analog voltage of a corresponding amplitude to the pin of the Retimer chip based on the type of the Retimer chip and the type of the pin of the connected Retimer chip.

[0033] Specifically, the power supply of the current Retimer chips can be roughly divided into four categories, listed here as A, B, C, and D. As shown in Table 1, there are four power supply PINs for each of the four categories of chips, listed here as PWR_1A, PWR_1D, PWR_2A, and PWR_2D. Each power supply PIN has requirements for digital power and analog power, among which PWR_1A is analog power, PWR_1D is digital power, PWR_2D is digital power, and pin1 of PWR_2A is analog power, while pin2 of PWR_2A has both analog power and digital power, that is, the A / D category requires analog power, and the B / C category requires digital power.

[0034] Table 1

[0035]

[0036] Based on this, in order to achieve the power supply compatibility of various types of Retimer chips, it is first necessary to sort out the power supply voltage values ​​of the PowerPIN of each chip to determine the power supply solution. For example, taking Table 1 as an example, the compatible power supply solutions for various types of Retimer chips in Table 1 are:

[0037] (1) Since both 1.8V and 1.5V are used to power PWR_1A, 1.8V and 1.5V are integrated into a POL chip for output. That is, a voltage conversion circuit is combined with an output circuit to form a POL chip. The output voltage is named P1V8_P1V5.

[0038] (2) 0.9V, 0.8V, and 1.0V voltages are all used to power PWR_2A and PWR_2D, so 0.9V, 0.8V, and 1.0V are integrated into a POL chip and output. The output voltage is named P0V9_0V8_P1V0. Among them, PWR_2A_PIN1 requires analog power, which is implemented using magnetic beads in the POL chip.

[0039] (3) Since the supply voltage of Class D chips is 1.8V, 1.5V and 0.8V, a POL chip is also needed to convert P12V to P1V8. The output voltage of the POL chip is easy to adjust with resistors, while LDO is mostly adjusted by pins and has a large voltage adjustment range, so LDO is not selected here.

[0040] In summary, reference Figure 2 , P12V is converted into P1V8_P1V5, P0V9_P1V0_P0V8 and P1V8 through three POL chips, and supplies power to PWR_1A, PWR_1D, PWR_2A and PWR_2D of the Retimer chip respectively. According to different feedback voltage divider resistors, the basic power supply requirements of each chip are achieved through line colay.

[0041] Figure 2 In the embodiment, the compatibility power supply circuit of the chip further includes: an electronic fuse (EFUSE), wherein the power supply voltage is transmitted to the input end of each voltage conversion circuit through the electronic fuse, wherein the EFUSE circuit is used to protect and isolate the previous stage circuit.

[0042] In some optional embodiments, each output circuit includes: a voltage divider circuit, wherein an input end of the voltage divider circuit is connected to an output end of a voltage conversion circuit, and an output end of the voltage divider circuit is connected to a same pin of each type of Retimer chip; the voltage divider circuit is used to output a digital voltage or an analog voltage of a corresponding amplitude to the pin of the Retimer chip by changing an internal path resistance based on the type of the Retimer chip and the type of the pin of the connected Retimer chip.

[0043] In some optional implementations, each type of Retimer chip includes a first pin, a second pin, a third pin, a fourth pin, and a fifth pin; namely, PWR_1A (Analog), PWR_1D (I / O), PWR_2A_PIN1 (Analog), PWR_2A_PIN2, PWR_2D (I / O) in Table 1. The types of Retimer chips include: a first type, a second type, a third type, and a fourth type; namely, Class A, Class B, Class C, and Class D in Table 1.

[0044] The first pins of the first, second and third type Retimer chips require the same analog power supply voltage, which is recorded as the first voltage, i.e., 1.8V in Table 1; the first pin of the fourth type Retimer chip requires the analog power supply voltage, which is recorded as the second voltage, i.e., 1.5V in Table 1.

[0045] The second pins of the first type, second type, third type, and fourth type Retimer chips require the same digital power supply voltage, which is recorded as the third voltage, namely, 1.8V in Table 1.

[0046] The third pins of the first type and the second type of Retimer chips require the same analog power supply voltage, which is recorded as the fourth voltage, i.e., 0.9V in Table 1; the analog power supply voltage required by the third pin of the third type of Retimer chip is recorded as the fifth voltage, i.e., 1.0V in Table 1; the analog power supply voltage required by the third pin of the fourth type of Retimer chip is recorded as the sixth voltage, i.e., 0.8V in Table 1.

[0047] The analog power supply voltage required by the fourth pin of the first type of Retimer chip is recorded as the seventh voltage, that is, the 0.9V analog voltage in Table 1; the digital power supply voltage required by the fourth pin of the second type of Retimer chip is recorded as the eighth voltage, that is, the 0.9V digital voltage in Table 1; the digital power supply voltage required by the fourth pin of the third type of Retimer chip is recorded as the ninth voltage, that is, the 1.0V digital voltage in Table 1; the analog power supply voltage required by the fourth pin of the fourth type of Retimer chip is recorded as the tenth voltage, that is, the 1.0V analog voltage in Table 1.

[0048] The fifth pins of the first type and the second type of Retimer chips require the same analog power supply voltage, which is recorded as the eleventh voltage, that is, 0.9V in Table 1; the fifth pins of the third type and the fourth type of Retimer chips require the same analog power supply voltage, which is recorded as the twelfth voltage, that is, 1.0V in Table 1.

[0049] The seventh voltage has the same amplitude as the fourth voltage, the eighth voltage has the same amplitude as the eleventh voltage, the ninth voltage has the same amplitude as the twelfth voltage, and the tenth voltage has the same amplitude as the sixth voltage.

[0050] In some optional embodiments, such as Figure 3 As shown, the voltage divider circuit connected to the first pin of the first type, second type, third type, and fourth type Retimer chip includes: a first voltage divider resistor RH1, a second voltage divider resistor RH2, a first pull-down resistor RL1, and a first magnetic bead Bead1.

[0051] like Figure 3 As shown, the first end of the first voltage-dividing resistor RH1 is connected to the first end of the second voltage-dividing resistor RH2 and the first end of the first magnetic bead Bead1, the second end of the first voltage-dividing resistor RH1 is connected to the second end of the second voltage-dividing resistor RH2, the output end of a voltage conversion circuit, and the first end of the first pull-down resistor RL1; the second end of the first pull-down resistor RL1 is grounded; the second end of the first magnetic bead Bead1 is connected to the first pin (i.e., PWR_1A in Table 1) of the first type, second type, third type, and fourth type Retimer chips.

[0052] Based on Table 1 and its related analysis, Figure 3 The output voltage at point ① is named P1V8_P1V5, the output voltage at point ② is named P18V, and the output voltage at point ③ is named P0V9_0V8_P1V0. The output voltage of the voltage conversion circuit is 0.6V, the first pull-down resistor RL1 is 2K ohms, the first voltage divider resistor RH1 is 3K ohms, and the second voltage divider resistor is 4K ohms.

[0053] Based on Table 1, the specific conditions for powering different types of Retimer chips are as follows:

[0054] (1) When power is supplied to the first pin of the first type, second type or third type Retimer chip, a Colay method is adopted, the second voltage divider resistor RH2 and the first pull-down resistor RL1 are connected, and the second end of the first magnetic bead Bead1 outputs the first voltage.

[0055] (2) When power is supplied to the first pin of the fourth type of Retimer chip, a Colay method is adopted, the first voltage divider resistor RH1 and the first pull-down resistor RL1 are connected, and the second end of the first magnetic bead Bead1 outputs a second voltage.

[0056] Specifically, Figure 3 The middle point ① outputs a 1.8V or 1.5V digital voltage, which is converted into an analog voltage by the first magnetic bead Bead1.

[0057] Specifically, Figure 3In the example, the resistance value of the first pull-down resistor RL1 is fixed, and the output of 1.8V or 1.5V is realized by the Colay switching of the first voltage-dividing resistor RH1 and the second voltage-dividing resistor RH2. For the A, B, and C class Retimer chips, the second voltage-dividing resistor RH2 is selected to be on and the first voltage-dividing resistor RH1 is not on, and a 1.8V digital voltage is output, and the 1.8V digital voltage is converted to a 1.8V analog voltage through the first magnetic bead Bead1; for the D class Retimer chip, the first voltage-dividing resistor RH1 is selected to be on and the second voltage-dividing resistor RH2 is not on, and a 1.5V digital voltage is output, and the 1.5V digital voltage is converted to a 1.5V analog voltage through the first magnetic bead Bead1. Among them, the first pull-down resistor RL1 is in the on state.

[0058] In some optional embodiments, the voltage divider circuit connected to the second pin of the first type, second type, third type, and fourth type of Retimer chip (i.e., PWR_1D in Table 1) includes: a straight-through line, wherein the output end of the voltage conversion circuit directly outputs the third voltage.

[0059] Specifically, Figure 3 As shown, point ② outputs the third voltage. Referring to Table 1, the third voltage is a 1.8V digital voltage.

[0060] In an optional embodiment, if Figure 3 As shown, the voltage divider circuit connected to the third pin of the first type, second type, third type, and fourth type Retimer chip includes: a second pull-down resistor RL2, a third pull-down resistor RL3, a third voltage divider resistor RH3, a fourth voltage divider resistor RH4, and a second magnetic bead Bead2.

[0061] Based on Table 1, the voltage conversion circuit outputs a voltage of 0.6V, the resistance of the second pull-down resistor RL2 is 20K ohms, the resistance of the third pull-down resistor RL3 is 15K ohms, the resistance of the third voltage-dividing resistor RH3 is 10K ohms, and the resistance of the fourth voltage-dividing resistor RH4 is 6.8K ohms.

[0062] like Figure 3 As shown, the first end of the third voltage-dividing resistor RH3 is connected to the first end of the fourth voltage-dividing resistor RH4 and the first end of the second magnetic bead Bead2, the second end of the third voltage-dividing resistor RH3 is connected to the second end of the fourth voltage-dividing resistor RH4, the first end of the second pull-down resistor RL2, the first end of the third pull-down resistor RL3, and the output end of a voltage conversion circuit; the second end of the second pull-down resistor RL2 is connected to the second end of the third pull-down resistor RL3 and then grounded; the second end of the second magnetic bead Bead2 is connected to the third pin (i.e., PWR_2A_PIN1 in Table 1) of the first type, second type, third type, and fourth type Retimer chips.

[0063] Based on Table 1, the specific conditions for powering different types of Retimer chips are as follows:

[0064] (1) When power is supplied to the third pin of the first type or second type retimer chip, the Colay method is adopted, the third voltage divider resistor RH3 and the second pull-down resistor RL2 are connected, and the second end of the second magnetic bead Bead2 outputs the fourth voltage.

[0065] (2) When power is supplied to the third pin of the third type of Retimer chip, the Colay method is adopted, the third voltage divider resistor RH3 and the third pull-down resistor RL3 are connected, and the second end of the second magnetic bead Bead2 outputs the fifth voltage.

[0066] (3) When power is supplied to the third pin of the fourth type of Retimer chip, the Colay method is adopted, the fourth voltage-dividing resistor RH4 and the second pull-down resistor RL2 are connected, and the second end of the second magnetic bead Bead2 outputs the sixth voltage.

[0067] Specifically, Figure 3 The middle point ③ outputs a digital voltage of 0.8V, 0.9V or 1.0V, which is converted into an analog voltage by the second magnetic bead Bead2.

[0068] Specifically, based on Table 1, for Class A and B Retimer chips, the second pull-down resistor RL2 and the third voltage-dividing resistor RH3 are selected to output a 0.9V digital voltage, which is converted into a 0.9V analog voltage through the second magnetic bead Bead2; for Class C Retimer chips, the third pull-down resistor RL3 and the third voltage-dividing resistor RH3 are selected to output a 1.0V digital voltage, which is converted into a 1.0V analog voltage through the second magnetic bead Bead2; for Class D Retimer chips, the second pull-down resistor RL2 and the fourth voltage-dividing resistor RH4 are selected to output a 0.8V digital voltage, which is converted into a 0.8V analog voltage through the second magnetic bead Bead2.

[0069] In some optional embodiments, such as Figure 3 As shown, the voltage divider circuit connected to the fifth pins of the first type, second type, third type, and fourth type Retimer chips includes: a second pull-down resistor RL2, a third pull-down resistor RL3, a third voltage divider resistor RH3, and a fourth voltage divider resistor RH4.

[0070] like Figure 3As shown, the first end of the third voltage-dividing resistor RH3 is connected to the first end of the fourth voltage-dividing resistor RH4, and the first end of the third voltage-dividing resistor RH3 is also connected to the fifth pin (i.e., PWR_2D) of the first type, second type, third type, and fourth type of Retimer chips. The second end of the third voltage-dividing resistor RH3 is connected to the second end of the fourth voltage-dividing resistor RH4, the first end of the second pull-down resistor RL2, the first end of the third pull-down resistor RL3, and the output end of a voltage conversion circuit; the second end of the second pull-down resistor RL2 is connected to the second end of the third pull-down resistor RL3 and then grounded.

[0071] Based on Table 1, the specific conditions for powering different types of Retimer chips are as follows:

[0072] (1) When power is supplied to the fifth pin of the first type or second type retimer chip, a Colay method is adopted, the third voltage-dividing resistor RH3 and the second pull-down resistor RL2 are connected, and the first end of the third voltage-dividing resistor RH3 outputs the eleventh voltage.

[0073] (2) When power is supplied to the fifth pin of the third type or fourth type retimer chip, a Colay method is adopted, the third voltage-dividing resistor RH3 and the third pull-down resistor RL3 are connected, and the first end of the fourth voltage-dividing resistor RH4 outputs the fifth voltage.

[0074] Specifically, based on Table 1, for class A and B Retimer chips, the second pull-down resistor RL2 and the third voltage divider resistor RH3 are selected to output a 0.9V digital voltage; for class C and D Retimer chips, the third pull-down resistor RL3 and the third voltage divider resistor RH3 are selected to output a 1.0V digital voltage.

[0075] In an optional embodiment, if Figure 3 As shown, the voltage divider circuit connected to the fourth pins of the first type, the second type, the third type, and the fourth type of Retimer chips includes: a first resistor R1 and a second resistor R2.

[0076] like Figure 3 As shown, the first end of the first resistor R1 is connected to the second end of the second magnetic bead Bead2, and the second end of the first resistor R1 is connected to the fourth pin of the first type, second type, third type, and fourth type Retimer chip; the first end of the second resistor R2 is connected to the first end of the third voltage-dividing resistor RH3, and the second end of the second resistor R2 is connected to the fourth pin (i.e., PWR_2A_PIN2 in Table 1) of the first type, second type, third type, and fourth type Retimer chip.

[0077] Refer to Table 1. Since PWR_2A_PIN2 has two types of power: analog power and digital power, A / D type Retimer chips require analog power, and B / C type Retimer chips require digital power. The specific conditions for powering different types of Retimer chips are as follows:

[0078] (1) When power is supplied to the fourth pin of the first type of Retimer chip, a Colay method is adopted, the third voltage-dividing resistor RH3, the second pull-down resistor RL2, and the first resistor R1 are connected, and the second end of the first resistor R1 outputs the seventh voltage.

[0079] (2) When power is supplied to the fourth pin of the second type of Retimer chip, a Colay method is adopted, the third voltage divider resistor RH3, the second pull-down resistor RL2, and the second resistor R2 are connected, and the second end of the second resistor R2 outputs the eighth voltage.

[0080] (3) When power is supplied to the fourth pin of the third type of Retimer chip, a Colay method is adopted, the third voltage divider resistor RH3, the third pull-down resistor RL3, and the second resistor R2 are connected, and the second end of the second resistor R2 outputs the ninth voltage.

[0081] (4) When power is supplied to the fourth pin of the third type of Retimer chip, a Colay method is adopted, the fourth voltage-dividing resistor RH4, the second pull-down resistor RL2, and the first resistor R1 are connected, and the second end of the first resistor R1 outputs the tenth voltage.

[0082] Specifically, based on Table 1, for the PWR_2A_PIN2 pin, because different types of chips have different requirements, it is implemented through a resistor colay. For A and D type chips, select R1 to be on and R2 to be off, so that the analog voltage is provided to the PWR_2A_PIN2 pin; and for B and C type chips, select R2 to be on and R1 to be off, so that the digital voltage is provided to the PWR_2A_PIN2 pin.

[0083] In some optional embodiments, such as Figure 4 As shown, the compatibility power supply circuit of the chip also includes: multiple enabling circuits, an enabling circuit, a voltage driving circuit and an output circuit constitute a power supply branch (i.e., a POL chip) of the same pin of each type of Retimer chip, wherein the output end of each enabling circuit is connected to the input end of a voltage conversion circuit; the enabling circuit is self-driven or externally driven to realize the power-on timing of the power supply voltage of each pin of each type of Retimer chip.

[0084] Specifically, referring to Table 1, the voltages of various chips are different, and the power-on timing is also different. In terms of power-on timing, Class A and B chips require 1.8V to be powered earlier than 0.9V; Class C chips require 1.0V to be powered earlier than 1.8V; Class D chips require 0.8V to be powered earlier than 1.5V, and finally 1.8V. Therefore, it is necessary to set an enable circuit for each voltage conversion circuit. According to the power-on timing, except for the enable circuit of the first timing to realize self-driving, the other enable circuits are driven by the external drive signal output by the PLO chip of the previous timing.

[0085] In some optional embodiments, such as Figure 5 As shown, the enabling circuit includes: a third resistor R3, a fourth resistor R4 and a fifth resistor R5, wherein the first end of the third resistor R3 inputs the supply voltage, the second end of the third resistor R3 is connected to the enabling end of the voltage conversion circuit, the first end of the fourth resistor R4, and the second end of the fifth resistor R5; the second end of the fourth resistor R4 is grounded; and the first end of the fifth resistor R5 inputs the external driving signal.

[0086] In some optional implementations, based on Table 1, for the power-on timing of various types of Retimers, the power supply conditions are as follows:

[0087] (1) For the first type and the second type of Retimer chips, the power supply voltage of the first pin and the power supply voltage of the second pin are powered on earlier than the power supply voltage of the third pin, the power supply voltage of the fourth pin and the power supply voltage of the fifth pin, and the Colay method is adopted. After the third resistor R3 and the fourth resistor R4 of the enable circuit of the first pin and the second pin are turned on, the output circuit of the first pin outputs an external drive signal to the enable circuit of the third pin, the fourth pin and the fifth pin, and the fifth resistor R5 of the enable circuit of the third pin, the fourth pin and the fifth pin is turned on.

[0088] (2) For the third type and fourth type of retimer chips, the power supply voltages of the third pin, the fourth pin and the fifth pin are powered on earlier than the power supply voltage of the first pin, and the power supply voltage of the first pin is powered on earlier than the power supply voltage of the second pin. In this case, a Colay method is adopted. After the third resistor R3 and the fourth resistor R4 of the enable circuits of the third pin, the fourth pin and the fifth pin are turned on, the output circuit of the third pin outputs an external drive signal to the enable circuit of the first pin, and the fifth resistor R5 of the enable circuit of the first pin is turned on. Then, the output circuit of the first pin outputs an external drive signal to the enable circuit of the second pin, and the fifth resistor R5 of the enable circuit of the second pin is turned on.

[0089] Specifically, based on Table 1, reference Figure 5For Class A and B Retimer chips, P1V8_P1V5 and P1V8 are designed to provide EN voltage through P12V voltage divider resistor to achieve self-start of two output voltages. Therefore, the circuits of P1V8_P1V5 and P1V8 select R3 and R4 to start, and R5 is not started; and for P0V9, it needs to start after 1.8V voltage, so in the P0V9 circuit, the PG signal of P1V8_P1V5 is used as the EN signal, and the resistor R5 is selected to start, while R3 and R4 are not started.

[0090] Specifically, based on Table 1, reference Figure 5 For Class C and D Retimer chips, it is necessary to design P0V9_P1V0_P0V8 to be powered on earlier than P1V8_P1V5, and finally P1V8. For the P0V9_P1V0_P0V8 circuit, select R3 and R4 resistors to start up to achieve self-starting of the output voltage; for the P1V8_P1V5 circuit, use the PG signal of P0V9 as the EN signal, select resistor R5 to start up, and do not connect R3 and R4; for the P1V8 circuit, use the PG signal of P1V8_P1V5 as the EN signal, select resistor R5 to start up, and do not connect R3 and R4.

[0091] Optionally, for different power supply voltages and power-on sequences, the above is based on the Colay method. In addition, a bypass path can be set for each resistor. The resistance value of the resistor inside the bypass path is very large so that the current flowing through it can be ignored. When the bypass path is closed, the resistor is not turned on, and when the bypass path is opened, the resistor is turned on.

[0092] The overall circuit design of this embodiment maximizes the number of VR chips and layout space, saving costs. It greatly improves the availability and application scope of the circuit. The design and specific implementation steps of the power supply solution are as follows, which are mainly divided into four parts: Figure 6 shown.

[0093] (1) The first step is that the circuit involves several types of Retimer chips. All chips are PIN to PIN designs, so it is necessary to sort out the power supply voltage values ​​of the Power PINs of each chip. As mentioned earlier, the chip has four power supply pins, and the power supply voltages are 1.8V, 1.5V, 0.9V, 0.8V, and 1.0V respectively. After sorting out the voltages, the chips can be divided into four categories. And confirm the power supply scheme, confirm that the front end of the circuit is designed with EFUSE protection, output P12V_RETIMER, and then pass through three POLs, and output voltages P1V8_P1V5, P1V8, and P0V9_P1V0_P0V8.

[0094] (2) In the second step, after confirming the line VR selection and VR quantity, the line resistor Colay design needs to be considered because two voltages need to be switched to different values. For P1V8_P1V5, there are two output voltage values ​​to switch, which requires two RH resistors Colay; for P0V9_P1V0_P0V8, there are three output voltage values ​​to switch, which requires two RH resistors and two RL resistors to cooperate with Colay. Here, there are two RH and two RL resistors, which is more flexible in PCB layout design.

[0095] (3) The third step is to use different voltage types required by the power supply pins of various chips. Some require digital voltage to drive the internal digital circuit, while others require analog voltage to drive the internal analog circuit. Therefore, it is necessary to use magnetic beads to isolate the previous VR output voltage into analog voltage. For the PWR_1A, PWR_1D, PWR_2A_PIN1 and PWR_2D pins, the requirements of each chip are the same, so it is sufficient to directly supply power or add magnetic beads for isolation according to the digital or analog requirements; for the PWR_2A_PIN2 pin, a colay design of the line is required, using the resistors at the digital voltage and analog voltage output of P0V9_P1V0_P0V8 to achieve flexible switching.

[0096] (4) The fourth step is to sort out the timing requirements of each chip. Chips with the same timing requirements are classified, and two types of timing are sorted out here. One type requires that 1.8V power-up is earlier than 0.9V, and the other type is the opposite. Therefore, for the first type, P1V8_P1V5 and P1V8 are powered on using the P12V voltage divider to enable the chip to start automatically; then the PG signal of P1V8_P1V5 is used as the enable signal of P0V9, thereby meeting the timing requirements. For the second type, P0V9 is powered on using the P12V voltage divider to enable the chip to start automatically; then the PG signal of P0V9 is used as the enable signal of P1V8_P1V5, so that P1V8_P1V5 is powered on; finally, the PG signal of P1V8_P1V5 is used as the enable signal of P1V8, so that P1V8 is powered on and meets the timing requirements. Here, the resistor of the enable circuit is designed with the P12V voltage divider resistor Colay.

[0097] According to the above ideas, the circuit design for chips with different power supply requirements is simple in logic, and the flexible processing of the power supply circuit is maximized, thereby expanding the application scope of the circuit.

[0098] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A chip compatibility power supply circuit, characterized in that: include: A plurality of voltage conversion circuits and a plurality of output circuits, wherein: The input end of each voltage conversion circuit inputs the supply voltage, the output end of each voltage conversion circuit is connected to the input end of an output circuit, and the voltage conversion circuit is used to convert the supply voltage into a reference voltage in digital form; The output end of each output circuit is connected to the same pin of each type of chip, and the output circuit is used to output a digital voltage or analog voltage of corresponding amplitude to the pin of the chip based on the type of the chip and the pin type of the connected chip.

2. The chip compatibility power supply circuit according to claim 1, characterized in that: Each of the output circuits comprises: a voltage divider circuit, wherein: The input end of the voltage divider circuit is connected to the output end of one of the voltage conversion circuits, and the output end of the voltage divider circuit is connected to the same pin of each type of chip; The voltage divider circuit is used to output a digital voltage or an analog voltage of a corresponding amplitude to the pin of the chip by changing the internal path resistance based on the type of the chip and the type of the pin of the connected chip.

3. The chip compatibility power supply circuit according to claim 2, characterized in that: Each type of chip includes a first pin, a second pin, a third pin, a fourth pin and a fifth pin; The types of chips include: first type, second type, third type and fourth type; The first pins of the first type, second type, and third type chips require the same analog power supply voltage, which is recorded as the first voltage; the analog power supply voltage required by the first pin of the fourth type chip is recorded as the second voltage; The second pins of the chips of the first type, the second type, the third type, and the fourth type require the same digital power supply voltage, which is recorded as the third voltage; The third pins of the first type and the second type of chips require the same analog power supply voltage, which is recorded as the fourth voltage; the analog power supply voltage required by the third pin of the third type of chip is recorded as the fifth voltage; the analog power supply voltage required by the third pin of the fourth type of chip is recorded as the sixth voltage; The analog power supply voltage required by the fourth pin of the first type of chip is recorded as the seventh voltage; the digital power supply voltage required by the fourth pin of the second type of chip is recorded as the eighth voltage; the digital power supply voltage required by the fourth pin of the third type of chip is recorded as the ninth voltage; the analog power supply voltage required by the fourth pin of the fourth type of chip is recorded as the tenth voltage; The fifth pins of the first type and the second type of chips require the same analog power supply voltage, which is recorded as the eleventh voltage; the fifth pins of the third type and the fourth type of chips require the same analog power supply voltage, which is recorded as the twelfth voltage; The seventh voltage has the same amplitude as the fourth voltage, the eighth voltage has the same amplitude as the eleventh voltage, the ninth voltage has the same amplitude as the twelfth voltage, and the tenth voltage has the same amplitude as the sixth voltage.

4. The chip compatibility power supply circuit according to claim 3, characterized in that: The voltage divider circuit connected to the first pin of the first type, second type, third type, and fourth type chip includes: a first voltage divider resistor, a second voltage divider resistor, a first pull-down resistor, and a first magnetic bead, wherein: The first end of the first voltage-dividing resistor is connected to the first end of the second voltage-dividing resistor and the first end of the first magnetic bead, and the second end of the first voltage-dividing resistor is connected to the second end of the second voltage-dividing resistor, an output end of the voltage conversion circuit, and the first end of the first pull-down resistor; The second end of the first pull-down resistor is grounded; The second end of the first magnetic bead is connected to the first pin of the first type, the second type, the third type, and the fourth type of chip; When power is supplied to the first pin of the first type, the second type or the third type chip, a Colay method is adopted, the second voltage divider resistor and the first pull-down resistor are connected, and the second end of the first magnetic bead outputs a first voltage; When power is supplied to the first pin of the fourth type of chip, a Colay method is adopted, the first voltage divider resistor and the first pull-down resistor are connected, and the second end of the first magnetic bead outputs a second voltage.

5. The chip compatibility power supply circuit according to claim 3, characterized in that: The voltage divider circuit connected to the second pins of the first type, the second type, the third type, and the fourth type of chips includes: a through line, wherein: The output end of the voltage conversion circuit directly outputs the third voltage.

6. The chip compatibility power supply circuit according to claim 3, characterized in that: The voltage divider circuit connected to the third pin of the first type, second type, third type, and fourth type chip includes: a second pull-down resistor, a third pull-down resistor, a third voltage divider resistor, a fourth voltage divider resistor, and a second magnetic bead, wherein: The first end of the third voltage-dividing resistor is connected to the first end of the fourth voltage-dividing resistor and the first end of the second magnetic bead, and the second end of the third voltage-dividing resistor is connected to the second end of the fourth voltage-dividing resistor, the first end of the second pull-down resistor, the first end of the third pull-down resistor, and an output end of the voltage conversion circuit; The second end of the second pull-down resistor is connected to the second end of the third pull-down resistor and then grounded; The second end of the second magnetic bead is connected to the third pins of the first type, second type, third type, and fourth type chips; When power is supplied to the third pin of the first type or the second type chip, a Colay method is adopted, the third voltage divider resistor and the second pull-down resistor are connected, and the second end of the second magnetic bead outputs a fourth voltage; When power is supplied to the third pin of the third type of chip, a Colay method is adopted, a third voltage-dividing resistor and a third pull-down resistor are connected, and the second end of the second magnetic bead outputs a fifth voltage; When power is supplied to the third pin of the fourth type of chip, a Colay method is adopted, the fourth voltage-dividing resistor and the second pull-down resistor are connected, and the second end of the second magnetic bead outputs a sixth voltage.

7. The chip compatibility power supply circuit according to claim 6, characterized in that: The voltage divider circuit connected to the fifth pin of the first type, second type, third type, and fourth type chip includes: a second pull-down resistor, a third pull-down resistor, a third voltage divider resistor, and a fourth voltage divider resistor, wherein: The first end of the third voltage-dividing resistor is connected to the first end of the fourth voltage-dividing resistor, and the first end of the third voltage-dividing resistor is also connected to the third pins of the first type, the second type, the third type, and the fourth type of chips, and the second end of the third voltage-dividing resistor is connected to the second end of the fourth voltage-dividing resistor, the first end of the second pull-down resistor, the first end of the third pull-down resistor, and an output end of the voltage conversion circuit; The second end of the second pull-down resistor is connected to the second end of the third pull-down resistor and then grounded; When power is supplied to the fifth pin of the first type or the second type chip, a Colay method is adopted, a third voltage-dividing resistor and a second pull-down resistor are connected, and a first end of the third voltage-dividing resistor outputs an eleventh voltage; When power is supplied to the fifth pin of the third type or fourth type chip, a Colay method is adopted, a third voltage-dividing resistor and a third pull-down resistor are connected, and the first end of the fourth voltage-dividing resistor outputs a fifth voltage.

8. The chip compatibility power supply circuit according to claim 7, characterized in that: The voltage divider circuit connected to the fourth pin of the first type, the second type, the third type, and the fourth type chip includes: a first resistor and a second resistor, wherein: The first end of the first resistor is connected to the second end of the second magnetic bead, and the second end of the first resistor is connected to the fourth pins of the first type, the second type, the third type, and the fourth type of chips; The first end of the second resistor is connected to the first end of the third voltage-dividing resistor, and the second end of the second resistor is connected to the fourth pins of the chips of the first type, the second type, the third type, and the fourth type; When power is supplied to the fourth pin of the first type of chip, a Colay method is adopted, the third voltage-dividing resistor, the second pull-down resistor, and the first resistor are connected, and the second end of the first resistor outputs a seventh voltage; When power is supplied to the fourth pin of the second type of chip, a Colay method is adopted, a third voltage-dividing resistor, a second pull-down resistor, and a second resistor are connected, and the second end of the second resistor outputs an eighth voltage; When power is supplied to the fourth pin of the third type of chip, a Colay method is adopted, a third voltage-dividing resistor, a third pull-down resistor, and a second resistor are connected, and the second end of the second resistor outputs a ninth voltage; When power is supplied to the fourth pin of the third type chip, a Colay method is adopted, a fourth voltage-dividing resistor, a second pull-down resistor, and a first resistor are connected, and the second end of the first resistor outputs a tenth voltage.

9. The chip compatibility power supply circuit according to claim 3, characterized in that: Also includes: Multiple enabling circuits, an enabling circuit, a voltage driving circuit and an output circuit constitute a power supply branch of the same pin of each type of chip, wherein, The output terminal of each of the enabling circuits is connected to the input terminal of one of the voltage conversion circuits; The enabling circuit is self-driven or externally driven to achieve the power-on timing of the power supply voltage of each pin of each type of chip.

10. The chip compatibility power supply circuit according to claim 9, characterized in that: The enabling circuit includes: a third resistor, a fourth resistor and a fifth resistor, wherein: The first end of the third resistor is input with a supply voltage, and the second end of the third resistor is connected with the enable end of the voltage conversion circuit, the first end of the fourth resistor, and the second end of the fifth resistor; The second end of the fourth resistor is grounded; The first end of the fifth resistor inputs an external driving signal.

11. The chip compatibility power supply circuit according to claim 10, characterized in that: For the first type and the second type of chips, the power supply voltage of the first pin and the power supply voltage of the second pin are powered on earlier than the power supply voltage of the third pin, the power supply voltage of the fourth pin and the power supply voltage of the fifth pin, and the Colay method is adopted. After the third resistor and the fourth resistor of the enable circuit of the first pin and the second pin are turned on, the output circuit of the first pin outputs an external drive signal to the enable circuit of the third pin, the fourth pin and the fifth pin, and the fifth resistor of the enable circuit of the third pin, the fourth pin and the fifth pin is turned on; For the third type and fourth type of chips, the power supply voltages of the third pin, the fourth pin and the fifth pin are powered on earlier than the power supply voltage of the first pin, and the power supply voltage of the first pin is powered on earlier than the power supply voltage of the second pin. In this case, the Colay method is adopted. After the third resistor and the fourth resistor of the enable circuit of the third pin, the fourth pin and the fifth pin are turned on, the output circuit of the third pin outputs an external drive signal to the enable circuit of the first pin, and the fifth resistor of the enable circuit of the first pin is turned on. After that, the output circuit of the first pin outputs an external drive signal to the enable circuit of the second pin, and the fifth resistor of the enable circuit of the second pin is turned on.

12. The chip compatibility power supply circuit according to claim 1, characterized in that: Also includes: Electronic fuses, where The supply voltage is delivered to the input terminal of each of the voltage conversion circuits through the electronic fuse.

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