High-reliability power supply front-end circuit for suppressing undervoltage surge
By designing a highly reliable power front-end circuit including a control unit and a boost unit, the stability problem of the DC low-voltage power supply system when the transient input voltage drops is solved, and effective suppression of the input voltage and stable operation of the system are achieved.
Patent Information
- Application Number
- CN202510046518.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-13
- Publication Date
- 2025-04-18
AI Technical Summary
When the DC low-voltage power supply system drops in the transient input voltage, it may cause the backend DC/DC module to fail to work properly, causing the entire electronic system to be interrupted.
A highly reliable power supply front-end circuit including a first control unit, an energy storage unit, a second control unit and a boost unit is designed. The first control unit controls the output of the power supply signal according to the set voltage threshold value, and the energy storage unit charges when the power supply signal is output and discharges when the signal is disconnected; the second control unit detects the voltage of the energy storage unit to control the operation of the boost unit to ensure that the voltage is within a suitable range.
It effectively suppresses the drop in transient input voltage, ensures the stable operation of the back-end power supply system, and improves the system's disturbance resistance and reliability.
Smart Images

Figure CN119852955A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of electronic power technology, and in particular to a high-reliability power supply front-end circuit for suppressing undervoltage surge. Background Art
[0002] In the power supply system, the DC low-voltage power supply system plays a vital role, and its stability and reliability are directly related to the normal operation of the entire electronic system. Usually, the rated input voltage of the DC low-voltage power supply system is 28V, and the voltage range is 18 to 32V. Therefore, the design of the back-end DC / DC power supply module, as an important part of the system, usually follows this voltage standard, that is, the operating voltage is generally rated at 28V, the minimum input voltage is 16V, and the maximum input voltage is 40V. When the input voltage is lower than 16V, the back-end DC / DC power supply module cannot work properly.
[0003] However, in actual operation, the DC low-voltage power supply system may encounter some special situations, which pose a challenge to the stable operation of the back-end DC / DC power module. For example, when the generator or battery suddenly switches from a light-load state to a full-load state, or when the back-end is connected to a capacitive load for operation, a large surge current will be generated due to the instantaneous change in current, which will in turn generate a transient voltage drop at the input end of the back-end DC / DC module power supply. Although this input voltage drop is intermittent and transient, it is also lower than the minimum operating voltage range of the back-end DC / DC module power supply, which will cause the entire electronic system to interrupt and stop working, leading to unpredictable consequences. Summary of the invention
[0004] In view of the above-mentioned deficiencies of the prior art, the technical problem to be solved by the present invention is to provide a high-reliability power front-end circuit that can suppress undervoltage surges and can suppress transient input voltage drops to ensure continuous and stable operation of a back-end power supply system.
[0005] In order to solve the above technical problems, a technical solution adopted by the present invention is to provide a high-reliability power front-end circuit for suppressing undervoltage surge, comprising:
[0006] A first control unit, configured to output a power supply signal to supply power to a back-end circuit when a power supply voltage provided by the power supply source is greater than or equal to a set first voltage threshold, and to disconnect the output of the power supply signal to stop supplying power to the back-end circuit when the power supply voltage is less than the set first voltage threshold;
[0007] An energy storage unit, used for charging when the first control unit outputs a power supply signal, and discharging to supply power to a back-end circuit when the first control unit cuts off the output of the power supply signal;
[0008] a second control unit, configured to detect the voltage of the input energy storage unit to control the operation of the boost unit when the first control unit disconnects the output of the power supply signal; and
[0009] The boost unit is used to boost the voltage of the input energy storage unit to a voltage range required for the back-end circuit to operate under the control of the second control unit, so as to ensure that the energy storage unit can continue to provide the back-end circuit with a voltage for normal operation.
[0010] Further, the first control unit includes an ideal diode controller IC6 and a first MOSFET S1; the source of the first MOSFET S1 is electrically connected to the positive electrode of the power supply as the voltage signal input end of the first control unit, the gate of the first MOSFET S1 is electrically connected to the output end of the ideal diode controller IC6, and the drain of the first MOSFET S1 is electrically connected to the negative electrode of the power supply through the back-end circuit as the power supply signal output end of the first control unit; the input end of the ideal diode controller IC6 is electrically connected to the positive electrode of the power supply to access the power supply voltage, when the power supply voltage is greater than or equal to a first voltage threshold, the output end of the ideal diode controller IC6 outputs a high level, and the first MOSFET S1 is turned on, when the power supply voltage is less than the first voltage threshold, the output end of the ideal diode controller IC6 outputs a low level, and the first MOSFET S1 is turned off.
[0011] Furthermore, the energy storage unit includes a first capacitor C1; the positive electrode of the first capacitor C1 is electrically connected to the drain of the first MOS tube S1 as the signal input end of the energy storage unit, and the negative electrode of the first capacitor C1 is electrically connected to the negative electrode of the power supply as the signal output end of the energy storage unit.
[0012] Further, the boost unit includes a first inductor L1, a first diode D1, a second MOSFET S2 and a PWM controller IC4; the first end of the first inductor L1 is electrically connected to the positive electrode of the power supply as a low-voltage signal input end of the boost unit, the second end of the first inductor L1 is electrically connected to the positive electrode of the first diode D1, and the negative electrode of the first diode D1 is electrically connected to the positive electrode of the first capacitor C1 as a high-voltage signal output end of the boost unit; the drain of the second MOSFET S2 is electrically connected to the second end of the first inductor L1, the gate of the second MOSFET S2 is electrically connected to the output port Out of the PWM controller IC4, and the source of the second MOSFET S2 is electrically connected to the negative electrode of the power supply; the feedback port FB of the PWM controller IC4 is electrically connected to the feedback signal output end of the second control unit as a feedback signal input end of the boost unit.
[0013] Furthermore, the second control unit is also used to control the shutdown of the boost unit at power-on startup and / or to limit the working time of the boost unit.
[0014] Furthermore, the second control unit also includes:
[0015] The second control unit comprises:
[0016] An output voltage detection subunit, used to detect the voltage of the input energy storage unit to control the operation of the boost unit when the first control unit disconnects the output of the power supply signal;
[0017] A power-on detection subunit, used to detect the voltage of the energy storage unit to control the shutdown of the boost unit when powered on;
[0018] a delay subunit, used to limit the working time of the boost unit; and
[0019] The input voltage detection subunit is used to trigger the delay subunit to operate.
[0020] Further, the output voltage detection subunit is defined as a first comparator IC1, and the first comparator IC1 is a hysteresis comparator; the input end of the first comparator IC1 is electrically connected to the cathode of the first diode D1, and the output end of the first comparator IC1 is electrically connected to the feedback port FB of the PWM controller IC4 as the feedback signal output end of the second control unit; the first comparator IC1 is used to output a low level when the voltage at the input end is higher than a set second voltage threshold in the voltage rising stage, and output a high level when the voltage at the input end is lower than the first voltage threshold in the voltage falling stage, and the second voltage threshold is greater than the first voltage threshold.
[0021] Further, the power-on detection subunit is defined as a second comparator IC2, which is a hysteresis comparator; the input end of the second comparator IC2 is electrically connected to the positive electrode of the first capacitor C1, and the output end of the second comparator IC2 is electrically connected to the enable port EN of the PWM controller IC4; the second comparator IC2 outputs a high level when the voltage at the input end is higher than the second voltage threshold in the voltage rising stage, and outputs a low level when the voltage at the input end is lower than the third voltage threshold in the voltage falling stage, and the third voltage threshold is less than the second voltage threshold; and / or
[0022] The input voltage detection subunit is defined as a third comparator IC3, the delay subunit is defined as an RC delay circuit IC5, the input end of the third comparator IC3 is electrically connected to the positive electrode of the power supply, the output end of the third comparator IC3 is electrically connected to the trigger signal end of the RC delay circuit IC5, and the output end of the RC delay circuit IC5 is electrically connected to the enable port EN of the PWM controller IC4; the third comparator IC3 is used to detect the value of the power supply voltage, and generate a pulse signal as a trigger signal of the RC delay circuit IC5 when the power supply voltage is lower than a preset second voltage threshold; the RC delay circuit IC5 is used to start working when a trigger signal is detected, and output a judgment signal to the control port of the PWM controller IC4 when the delay time reaches a preset value.
[0023] Further, the second control unit is defined as a digital processor IC7, a first analog input terminal of the digital processor IC7 is electrically connected to the cathode of the first diode D1, a second analog input terminal of the digital processor IC7 is electrically connected to the anode of the power supply, and a digital output terminal of the digital processor IC7 is electrically connected to the control port Shutdown of the PWM controller IC4; the digital processor IC7 implements hysteresis control through AD sampling and implements a delay function using its internal clock.
[0024] Furthermore, it also includes a current detection unit for detecting the current of the boost unit, and the current detection unit is defined as a sampling resistor R1, a first end of the sampling resistor R1 is electrically connected to the source of the second MOS tube S2, a sampling end of the sampling resistor R1 is electrically connected to the current sampling port I sense of the PWM controller IC4, and a second end of the sampling resistor R1 is electrically connected to the negative electrode of the power supply.
[0025] A high-reliability power supply front-end circuit for suppressing undervoltage surge of the present invention has at least the following beneficial effects: the present invention adopts an ideal diode controller IC6 and a first MOS tube S1 to replace a traditional diode, thereby achieving low loss of main power transmission, effectively reducing energy waste in the transmission process, simplifying circuit design, and improving circuit reliability, providing a strong guarantee for efficient and stable operation of the system; a Boost boost circuit (i.e., a boost unit) is used to replace a large capacitor energy storage method, which significantly reduces the capacitance and number of the energy storage capacitor, thereby reducing the overall volume and manufacturing cost of the circuit, reuses the input filter capacitor of the back-end circuit, avoids the addition of additional capacitors, and eliminates the need for high-end switching electronic switches, further reducing the difficulty and complexity of circuit design; the boost unit in the present invention adopts a hysteresis control method, which significantly improves the response speed to transient low-voltage input compared to traditional closed-loop control, ensuring that the input voltage is always maintained within the working range of the back-end circuit, and this control The method effectively improves the anti-disturbance ability of the circuit and enhances the stability and reliability of the system; the peak current control method is adopted to effectively prevent the generation of input surge current by limiting the maximum duty cycle of the circuit and the maximum peak current of the boost unit, ensuring that the current of key components does not exceed their safe operating range, thereby extending the service life of the circuit; the designed power-on detection subunit can ensure that the boost unit is in the off state when the input capacitor voltage of the back-end circuit is not established, effectively avoiding the damage of the circuit to the large surge current at the moment of power-on; the synergistic effect of the input voltage detection subunit and the delay subunit limits the working time of the boost unit when the input power supply is continuously low-voltage abnormal, preventing circuit damage caused by long-term overload operation, and can distinguish between low-voltage abnormalities and transient low voltages of the input power supply, ensuring that the circuit can maintain reliable operation under various abnormal conditions. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0027] Figure 1 The present invention is a circuit diagram of an embodiment of a high-reliability power supply front-end circuit for suppressing undervoltage surge.
[0028] Figure 2 The circuit diagram is another embodiment of a high-reliability power front-end circuit for suppressing undervoltage surge of the present invention. DETAILED DESCRIPTION
[0029] The present invention will be further described below in conjunction with the accompanying drawings.
[0030] See also Figure 1The high-reliability power front-end circuit for suppressing undervoltage surge of the present invention comprises a first control unit 1, an energy storage unit 2, a second control unit 3 and a boost unit 4. The first control unit 1 is used to output a power supply signal to power the back-end circuit when the power supply voltage provided by the power supply is greater than or equal to the set first voltage threshold, and to disconnect the output of the power supply signal to stop powering the back-end circuit when the power supply voltage is less than the set first voltage threshold. In a 28V power supply system, the normal working range is 22V-29V. In order to provide the system with a certain voltage fluctuation tolerance and avoid the power module from not working properly due to slight voltage fluctuations, in this embodiment, the first voltage threshold is set to 18V. The energy storage unit 2 is charged when the first control unit 1 outputs a power supply signal, and is discharged to power the back-end circuit when the first control unit 1 disconnects the output of the power supply signal. The second control unit 3 is used to detect the voltage of the input energy storage unit 2 to control the operation of the boost unit 4 when the first control unit 1 disconnects the output of the power supply signal. The boost unit 4 is used to boost the voltage of the input energy storage unit 2 to the voltage range required for the back-end circuit to work under the control of the second control unit 3, so as to ensure that the energy storage unit 2 can continue to provide the back-end circuit with a normal working voltage.
[0031] The first control unit 1 includes an ideal diode controller IC6 and a first MOSFET S1. The source of the first MOSFET S1 is electrically connected to the positive electrode of the power supply as the voltage signal input terminal of the first control unit 1, the gate of the first MOSFET S1 is electrically connected to the output terminal of the ideal diode controller IC6, and the drain of the first MOSFET S1 is electrically connected to the negative electrode of the power supply through the back-end circuit as the power supply signal output terminal of the first control unit 1. The input terminal of the ideal diode controller IC6 is electrically connected to the positive electrode of the power supply to access the power supply voltage. When the power supply voltage is greater than or equal to the first voltage threshold, the output terminal of the ideal diode controller IC6 outputs a high level, the first MOSFET S1 is turned on, and the power supply voltage directly supplies power to the back-end circuit; when the power supply voltage is less than the first voltage threshold, the output terminal of the ideal diode controller IC6 outputs a low level, the first MOSFET S1 is turned off, and the power supply voltage stops supplying power to the back-end circuit. In this embodiment, the first MOS tube S1 is a power MOS tube, and the ideal diode controller IC6 is implemented by a chip of model CSV25352. It should be understood that the ideal diode controller IC6 can be implemented by chips of various models. For example, in some embodiments, it can also be implemented by a chip of model LT4357.
[0032] The energy storage unit 2 includes a first capacitor C1. The positive electrode of the first capacitor C1 is electrically connected to the drain of the first MOS tube S1 as the signal input end of the energy storage unit 2, and the negative electrode of the first capacitor C1 is electrically connected to the negative electrode of the power supply as the signal output end of the energy storage unit 2. When the first MOS tube S1 is turned on, the first capacitor C1 is charged, and when the first MOS tube S1 is turned off, the first capacitor C1 is discharged to provide a working voltage for the back-end circuit. In addition, the first capacitor C1 also plays a filtering role, providing a stable DC voltage for the back-end circuit.
[0033] The second control unit 3 includes an output voltage detection subunit 31, which is defined as a first comparator IC1, which is a hysteresis comparator. The input end of the first comparator IC1 is electrically connected to the cathode of the first diode D1, and the output end of the first comparator IC1 is electrically connected to the feedback signal input end of the boost unit 4. The first comparator IC1 is used to output a low level when the voltage at the input end is higher than the set second voltage threshold in the voltage rising stage, and output a high level when the voltage at the input end is lower than the first voltage threshold in the voltage falling stage, and the second voltage threshold is greater than the first voltage threshold. The first voltage threshold and the second voltage threshold can be set according to requirements. In this embodiment, the first voltage threshold is set to 18V and the second voltage threshold is set to 22V.
[0034] The boost unit 4 includes a first inductor L1, a first diode D1, a second MOSFET S2 and a PWM controller IC4; the first end of the first inductor L1 is electrically connected to the positive electrode of the power supply as the low voltage signal input end of the boost unit 4, the second end of the first inductor L1 is electrically connected to the positive electrode of the first diode D1, and the negative electrode of the first diode D1 is electrically connected to the positive electrode of the first capacitor C1 as the high voltage signal output end of the boost unit 4; the drain of the second MOSFET S2 is electrically connected to the second end of the first inductor L1, the gate of the second MOSFET S2 is electrically connected to the output port Out of the PWM controller IC4, and the source of the second MOSFET S2 is electrically connected to the negative electrode of the power supply; the feedback port FB of the PWM controller IC4 is electrically connected to the output end of the first comparator IC1 as the feedback signal input end of the boost unit 4. The boost unit 4 is used to boost the input voltage to a voltage at which the back-end circuit can work stably when the input is undervoltage surge. In this embodiment, the second MOS tube S2 is a power MOS tube, and the PWM controller IC4 is implemented by a chip of model UCC1843. It should be understood that the PWM controller IC4 can also use a power management chip similar to UCC1843.
[0035] The PWM controller IC4 dynamically adjusts the duty cycle of the PWM signal according to the feedback signal output by the first comparator IC1 to control the on and off time of the second MOS tube S2, thereby realizing accurate control of the output voltage. When the voltage at the input end of the first comparator IC1 is greater than or equal to the set second voltage threshold in the voltage rising stage, the PWM controller IC4 reduces the duty cycle and reduces the output voltage; when the voltage at the input end of the first comparator IC1 is lower than the first voltage threshold in the voltage falling stage, the PWM controller IC4 increases the duty cycle and increases the output voltage.
[0036] In order to avoid damage to the circuit due to excessive surge current during the startup phase, as a preferred embodiment, the second control unit 3 is also provided with a power-on detection subunit 32 for detecting the voltage of the energy storage unit 2 to control the shutdown of the boost unit 4 when powered on. The power-on detection unit is defined as a second comparator IC2, and the second comparator IC2 is a hysteresis comparator. The input end of the second comparator IC2 is electrically connected to the positive electrode of the first capacitor C1, and the output end of the second comparator IC2 is electrically connected to the enable port EN of the PWM controller IC4. When the second comparator IC2 detects that the voltage at the input end is higher than the first voltage threshold during the voltage rise phase, it outputs a high level, and the high level signal is transmitted to the enable port EN of the PWM controller IC4, so that the PWM controller IC4 starts to work, and the boost unit 4 can start to boost normally. When the second comparator IC2 detects that the voltage at the input terminal is lower than the third voltage threshold in the voltage drop phase, it outputs a low level signal, and the low level signal is transmitted to the enable port EN of the PWM controller IC4, so that the PWM controller IC4 does not work and the boost unit 4 is turned off. The third voltage threshold is less than the second voltage threshold. In order to prevent the output voltage from being too low and unstable, in this embodiment, the third voltage threshold is set to 2V.
[0037] In order to ensure the reliability of the circuit, as a preferred embodiment, the second control unit 3 is further provided with a delay subunit 33 for limiting the working time of the boost unit 4 and an input voltage detection subunit 34 for triggering the operation of the delay subunit 33. The input voltage detection subunit 34 is defined as a third comparator IC3, and the delay subunit 33 is defined as an RC delay circuit IC5. The input end of the third comparator IC3 is electrically connected to the positive pole of the power supply, the output end of the third comparator IC3 is electrically connected to the trigger signal end of the RC delay circuit IC5, and the output end of the RC delay circuit IC5 is electrically connected to the enable port EN of the PWM controller IC4. The third comparator IC3 is used to detect the value of the power supply voltage, and generate a pulse signal as a trigger signal of the RC delay circuit IC5 when the power supply voltage is lower than a preset first voltage threshold. The RC delay circuit IC5 is used to start working when a trigger signal is detected, and output a judgment signal to the control port of the PWM controller IC4 when the delay time reaches a preset value. In this embodiment, the preset value of the delay time is 50ms. When the delay time reaches the preset value, the judgment signal output by the RC delay circuit IC5 is low level, and the low level signal is transmitted to the enable port EN of the PWM controller IC4, so that the PWM controller IC4 does not work and the boost unit 4 is turned off.
[0038] In this embodiment, the first comparator IC1, the second comparator IC2 and the third comparator IC3 can be implemented by a chip of model LM193. The RC delay circuit IC5 can be implemented by a timer chip of model CD4060.
[0039] In order to ensure the reliability of the circuit, as a preferred embodiment, a current detection unit 5 for detecting the current of the boost unit 4 is also provided, and the current detection unit 5 is defined as a sampling resistor R1. The first end of the sampling resistor R1 is electrically connected to the source of the second MOS tube S2, the sampling end of the sampling resistor R1 is electrically connected to the current sampling port I sense of the PWM controller IC4, and the second end of the sampling resistor R1 is electrically connected to the negative pole of the power supply. The sampling resistor R1 is connected to the current sampling input port I sense of the PWM controller IC4, and the peak current mode is adopted to limit the maximum duty cycle with the maximum allowable current to ensure that the maximum current does not exceed the allowable range of the boost unit 4.
[0040] The working principle of the high-reliability power front-end circuit for suppressing undervoltage surge in this embodiment is as follows:
[0041] When supplying power to the back-end circuit, if the power supply voltage is stable (i.e., the power supply voltage is greater than or equal to the first voltage threshold), the ideal diode controller IC6 outputs a high level, the first MOS tube S1 is turned on, the back-end circuit is powered, and the first capacitor C1 is charged and filtered; if a transient low voltage occurs (i.e., the power supply voltage is less than the first voltage threshold), the ideal diode controller IC6 outputs a low level, and the first MOS tube S1 is turned off. At this time, the first capacitor C1 discharges to supply power to the back-end circuit, and the boost unit 4 works at the same time. The PWM controller IC4 dynamically adjusts the duty cycle of the PWM signal according to the feedback signal output by the first comparator IC1 to control the on and off time of the second MOS tube S2, thereby achieving precise control of the output voltage and ensuring that the voltage of the first capacitor C1 is not lower than the voltage required for the operation of the back-end circuit (i.e., not lower than the first voltage threshold). When the boost unit 4 works, it is connected to the current sampling input port I sense of the PWM controller IC4 through the sampling resistor R1, and the peak current mode is adopted to limit the maximum duty cycle with the maximum allowable current to ensure that the maximum current does not exceed the allowable range of the boost unit 4. At the same time, the third comparator IC3 detects the value of the power supply voltage, and generates a pulse signal as a trigger signal of the RC delay circuit IC5 when the power supply voltage is lower than a preset first voltage threshold. The RC delay circuit IC5 starts working when the trigger signal is detected, and outputs a low level to the enable port EN of the PWM controller IC4 when the delay time reaches a preset value, so that the PWM controller IC4 does not work and the boost unit 4 is turned off.
[0042] See also Figure 2 In another embodiment of the present invention, the second control unit 3 is defined as a digital processor IC7. The first analog input terminal of the digital processor IC7 is electrically connected to the cathode of the first diode D1, the second analog input terminal of the digital processor IC7 is electrically connected to the anode of the power supply, and the digital output terminal of the digital processor IC7 is electrically connected to the control port Shutdown of the PWM controller IC4. The functions of the output voltage detection subunit 31, the power-on detection subunit 32, the delay subunit 33 and the input voltage detection subunit 34 are integrated into the digital processor IC7. The digital processor IC7 realizes hysteresis control through AD sampling and realizes the delay function by using its internal clock. The digital processor IC7 can be implemented by chips such as 51 single-chip microcomputer series, ARM series, DSP series, FPGA series, etc. In this embodiment, the digital processor IC7 is implemented by a chip of model TMS28035.
[0043] The present invention adopts an ideal diode controller IC6 and a first MOS tube S1 to replace a traditional diode, thereby achieving low loss in main power transmission, effectively reducing energy waste during transmission, simplifying circuit design, and improving circuit reliability, providing a strong guarantee for efficient and stable operation of the system; a Boost boost circuit (i.e., a boost unit 4) is used to replace a large capacitor energy storage method, which significantly reduces the capacitance and quantity of the energy storage capacitor, thereby reducing the overall volume and manufacturing cost of the circuit, reuses the input filter capacitor of the back-end circuit, avoids the addition of additional capacitors, and eliminates the need for high-end switching electronic switches, further reducing the difficulty and complexity of circuit design; the boost unit 4 in the present invention adopts a hysteresis control method, which significantly improves the response speed to transient low-voltage input compared to traditional closed-loop control, ensuring that the input voltage is always maintained within the working range of the back-end circuit, and this control method is effective The anti-disturbance capability of the circuit is improved, and the stability and reliability of the system are enhanced; the peak current control method is adopted to effectively prevent the generation of input surge current by limiting the maximum duty cycle of the circuit and the maximum peak current of the boost unit 4, ensuring that the current of key components does not exceed their safe operating range, thereby extending the service life of the circuit; the designed power-on detection subunit 32 can ensure that the boost unit 4 is in the off state when the input capacitor voltage of the back-end circuit is not established, effectively avoiding the damage to the circuit caused by the surge current at the moment of power-on; the synergistic effect of the input voltage detection subunit 34 and the delay subunit 33 limits the working time of the boost unit 4 when the input power supply is continuously low-voltage abnormal, preventing circuit damage caused by long-term overload operation, and can distinguish between low-voltage abnormalities and transient low voltages of the input power supply, ensuring that the circuit can maintain reliable operation under various abnormal conditions.
Claims
1. A high-reliability power front-end circuit for suppressing undervoltage surge, comprising: A first control unit, configured to output a power supply signal to supply power to a back-end circuit when a power supply voltage provided by the power supply source is greater than or equal to a set first voltage threshold, and to disconnect the output of the power supply signal to stop supplying power to the back-end circuit when the power supply voltage is less than the set first voltage threshold; An energy storage unit, used for charging when the first control unit outputs a power supply signal, and discharging to supply power to a back-end circuit when the first control unit cuts off the output of the power supply signal; A second control unit, used for detecting the voltage of the input energy storage unit to control the operation of the boost unit when the first control unit disconnects the output of the power supply signal; as well as The boost unit is used to boost the voltage of the input energy storage unit to a voltage range required for the back-end circuit to operate under the control of the second control unit, so as to ensure that the energy storage unit can continue to provide the back-end circuit with a voltage for normal operation.
2. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 1, characterized in that: The first control unit includes an ideal diode controller IC6 and a first MOSFET S1; the source of the first MOSFET S1 is electrically connected to the positive electrode of the power supply as the voltage signal input end of the first control unit, the gate of the first MOSFET S1 is electrically connected to the output end of the ideal diode controller IC6, and the drain of the first MOSFET S1 is electrically connected to the negative electrode of the power supply through the back-end circuit as the power supply signal output end of the first control unit; the input end of the ideal diode controller IC6 is electrically connected to the positive electrode of the power supply to access the power supply voltage, when the power supply voltage is greater than or equal to the first voltage threshold, the output end of the ideal diode controller IC6 outputs a high level, and the first MOSFET S1 is turned on, when the power supply voltage is less than the first voltage threshold, the output end of the ideal diode controller IC6 outputs a low level, and the first MOSFET S1 is turned off.
3. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 2, characterized in that: The energy storage unit includes a first capacitor C1; the positive electrode of the first capacitor C1 is electrically connected to the drain of the first MOS tube S1 as the signal input end of the energy storage unit, and the negative electrode of the first capacitor C1 is electrically connected to the negative electrode of the power supply as the signal output end of the energy storage unit.
4. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 3, characterized in that The boost unit includes a first inductor L1, a first diode D1, a second MOSFET S2 and a PWM controller IC4; the first end of the first inductor L1 is electrically connected to the positive electrode of the power supply as a low-voltage signal input end of the boost unit, the second end of the first inductor L1 is electrically connected to the positive electrode of the first diode D1, and the cathode of the first diode D1 is electrically connected to the positive electrode of the first capacitor C1 as a high-voltage signal output end of the boost unit; the drain of the second MOSFET S2 is electrically connected to the second end of the first inductor L1, the gate of the second MOSFET S2 is electrically connected to the output port Out of the PWM controller IC4, and the source of the second MOSFET S2 is electrically connected to the negative electrode of the power supply; the feedback port FB of the PWM controller IC4 is electrically connected to the feedback signal output end of the second control unit as a feedback signal input end of the boost unit.
5. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 4, characterized in that: The second control unit is further used for controlling the shutdown of the boost unit at power-on startup and / or for limiting the working time of the boost unit.
6. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 5, characterized in that: The second control unit comprises: An output voltage detection subunit, used to detect the voltage of the input energy storage unit to control the operation of the boost unit when the first control unit disconnects the output of the power supply signal; A power-on detection subunit, used to detect the voltage of the energy storage unit to control the shutdown of the boost unit when powered on; a delay subunit, used to limit the working time of the boost unit; and The input voltage detection subunit is used to trigger the delay subunit to operate.
7. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 6, characterized in that: The output voltage detection subunit is defined as a first comparator IC1, which is a hysteresis comparator; the input end of the first comparator IC1 is electrically connected to the cathode of the first diode D1, and the output end of the first comparator IC1 is electrically connected to the feedback port FB of the PWM controller IC4 as the feedback signal output end of the second control unit; the first comparator IC1 is used to output a low level when the voltage at the input end is higher than a set second voltage threshold in the voltage rising stage, and to output a high level when the voltage at the input end is lower than the first voltage threshold in the voltage falling stage, and the second voltage threshold is greater than the first voltage threshold.
8. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 7, characterized in that: The power-on detection subunit is defined as a second comparator IC2, which is a hysteresis comparator; the input end of the second comparator IC2 is electrically connected to the positive electrode of the first capacitor C1, and the output end of the second comparator IC2 is electrically connected to the enable port EN of the PWM controller IC4; the second comparator IC2 outputs a high level when the voltage at the input end is higher than the second voltage threshold in the voltage rising stage, and outputs a low level when the voltage at the input end is lower than the third voltage threshold in the voltage falling stage, and the third voltage threshold is less than the second voltage threshold; and / or The input voltage detection subunit is defined as a third comparator IC3, the delay subunit is defined as an RC delay circuit IC5, the input end of the third comparator IC3 is electrically connected to the positive pole of the power supply, the output end of the third comparator IC3 is electrically connected to the trigger signal end of the RC delay circuit IC5, and the output end of the RC delay circuit IC5 is electrically connected to the enable port EN of the PWM controller IC4; the third comparator IC3 is used to detect the value of the power supply voltage, and generate a pulse signal as a trigger signal of the RC delay circuit IC5 when the power supply voltage is lower than a preset second voltage threshold; the RC delay circuit IC5 is used to start working when a trigger signal is detected, and output a judgment signal to the control port of the PWM controller IC4 when the delay time reaches a preset value.
9. The high-reliability power front-end circuit for suppressing undervoltage surge as claimed in claim 6, characterized in that: The second control unit is defined as a digital processor IC7, a first analog input terminal of the digital processor IC7 is electrically connected to the cathode of the first diode D1, a second analog input terminal of the digital processor IC7 is electrically connected to the anode of the power supply, and a digital output terminal of the digital processor IC7 is electrically connected to the control port Shutdown of the PWM controller IC4; the digital processor IC7 implements hysteresis control through AD sampling and implements a delay function using its internal clock.
10. The high-reliability power front-end circuit for suppressing undervoltage surge according to any one of claims 4 to 9, characterized in that: It also includes a current detection unit for detecting the current of the boost unit, and the current detection unit is defined as a sampling resistor R1, a first end of the sampling resistor R1 is electrically connected to the source of the second MOS tube S2, a sampling end of the sampling resistor R1 is electrically connected to the current sampling port Isense of the PWM controller IC4, and a second end of the sampling resistor R1 is electrically connected to the negative electrode of the power supply.