Device and method for preventing power supply from flowing backwards and integrated circuit

By introducing a power backflow device to the integrated circuit, and using programmable logic modules to monitor and control electrical signals, the power backflow problem when multiple printed circuit boards are combined is solved, and the effect of reducing the footprint and complexity is achieved.

CN119853417APending Publication Date: 2025-04-18ZTE CORP
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Patent Information

Application Number
CN202311349008.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-10-17
Publication Date
2025-04-18

AI Technical Summary

Technical Problem

When multiple printed circuit boards are combined, due to the inconsistent power-on sequence, power backflow is prone to occur, which affects the normal operation of the chip or causes damage. In addition, traditional methods require additional control devices or isolation devices, which covers a large area and is of high complexity.

Method used

By introducing a power supply backflow device in the integrated circuit, the device includes a first power supply module, a second power supply module, a load module and a programmable logic module, the voltage value of the second power supply module is monitored by using the programmable logic module to control the output of the electrical signal to prevent the power supply backflow.

Benefits of technology

This solution does not require additional control devices or isolation devices to directly utilize programmable logic modules, reducing the footprint and complexity, improving integration and long-term reliability, and effectively preventing power backflow.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The invention provides a power supply backflow prevention device and method and an integrated circuit. The device comprises a first power supply module, a second power supply module, a load module and a programmable logic module, the power supply output end of the first power supply module is connected with the power supply input end of the programmable logic module, the power supply output end of the second power supply module is connected with the power supply input end of the load module, and the electric signal output end of the programmable logic module is connected with the electric signal input end of the load module. A target input / output port of the programmable logic module is electrically connected with a power supply output end of the second power supply module; and the programmable logic module is used for monitoring the voltage value of the power supply output end of the second power supply module and controlling a signal of the electric signal output end according to the monitored voltage value so as to prevent the electric signal output end from forming power supply backward flow to the load module. The device is used for reducing the board occupation area and ensuring the reliability while preventing the power supply from flowing backwards.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a device and method for preventing power backflow, and an integrated circuit. Background Art

[0002] As the integration of printed circuit boards (PCBs) becomes higher and higher, more and more chips are used on PCBs, and the functions that need to be implemented are becoming more and more powerful. Complex hardware systems even combine multiple PCBs to achieve certain specific functions.

[0003] In order to meet the power-on sequence requirements of the chip, the power-on sequence of the chip is controlled by designing a power supply solution. However, due to the problem of inconsistent power-on sequences of different PCB boards when multiple PCB boards are combined, and there are many chips on a single board, power backflow may still occur, which is bound to affect the normal operation of the chip or even damage the chip.

[0004] For example, during the power-on process of the PCB board, some pins of the chip are pulled high by the power supply (such as 3.3V) that is powered on first, but the chip's own power supply (such as 1.5V, 1.0V) has not yet started, and the chip is still in a state where it cannot start normally. This causes the pins pulled high by 3.3V to have power backflow into the chip, causing the chip to become abnormal or even damaged. Therefore, it is necessary to take necessary anti-backflow measures to protect the normal operation of the circuit and prevent chip damage.

[0005] Programmable logic devices have become common devices in complex hardware systems due to their high flexibility and powerful functions. Since programmable logic devices have many input and output (IO) pins and many interconnected chips, it is easy to cause power backflow to other circuits. In traditional technologies, in order to avoid the power backflow problem caused by programmable logic devices to other circuits, additional control devices or isolation devices need to be added, which leads to problems such as large board area and high complexity, which in turn affects the integration and long-term reliability of PCB boards. Summary of the invention

[0006] Embodiments of the present disclosure provide a device, method and integrated circuit for preventing power backflow.

[0007] A first aspect of an embodiment of the present disclosure provides a device for preventing power backflow, comprising: a first power module, a second power module, a load module and a programmable logic module;

[0008] The power supply output end of the first power supply module is connected to the power supply input end of the programmable logic module, the power supply output end of the second power supply module is connected to the power supply input end of the load module, the electrical signal output end of the programmable logic module is connected to the electrical signal input end of the load module, and the target input / output port of the programmable logic module is electrically connected to the power supply output end of the second power supply module;

[0009] The first power supply module is used to supply power to the programmable logic module;

[0010] The second power supply module is used to supply power to the load module;

[0011] The programmable logic module is used to monitor the voltage value of the power supply output terminal of the second power supply module, and control the signal of the electrical signal output terminal according to the monitored voltage value to prevent the electrical signal output terminal from causing power backflow to the load module.

[0012] A second aspect of the embodiments of the present disclosure provides a method for preventing power backflow, which is applied to a programmable logic module, and the programmable logic module belongs to the device for preventing power backflow described in the first aspect;

[0013] Monitoring the voltage value of the power supply output terminal of the second power supply module;

[0014] The signal of the electrical signal output terminal is controlled according to the monitored voltage value to prevent the electrical signal output terminal from causing power backflow to the load module.

[0015] A third aspect of the embodiments of the present disclosure provides an integrated circuit, comprising the device for preventing power backflow as described in the first aspect.

[0016] The embodiments of the present disclosure have the following advantages:

[0017] The power backflow prevention device uses a second power module to supply power to the load module, and electrically connects the power supply output end of the second power module to the target input and output port of the programmable logic module, so that the programmable logic module can monitor the voltage value output by the second power module, and control the electrical signal output to the load module according to the monitored voltage value, and achieve the purpose of preventing the electrical signal output end of the programmable logic module from causing power backflow to the load module through the control of the electrical signal. The power backflow prevention device does not need to add additional control devices or isolation devices, and can directly use the programmable logic module in the hardware system, which reduces the board area and reduces the implementation complexity, and ensures the circuit integration and long-term reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of the structure of a power backflow prevention device provided in an embodiment of the present disclosure;

[0019] Figure 2 It is another structural schematic diagram of a power backflow prevention device provided in an embodiment of the present disclosure;

[0020] Figure 3 A schematic diagram of the working process of a power backflow prevention device provided in an embodiment of the present disclosure;

[0021] Figure 4 A schematic diagram of a flow chart of a method for preventing power backflow provided in an embodiment of the present disclosure;

[0022] Figure 5 This is a schematic diagram of an example structure of a power backflow prevention device provided in an embodiment of the present disclosure;

[0023] Figure 6 A schematic diagram of a workflow for preventing power backflow in combination with an example structure provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0025] As used in this disclosure, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0026] The terms used in the present disclosure are only used to describe specific embodiments and are not intended to limit the present disclosure.As used in the present disclosure, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0027] When the terms “comprising” and / or “made of…” are used in the present disclosure, it specifies the existence of the stated features, integers, steps, operations, elements and / or components, but does not exclude the existence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0028] Unless otherwise defined, all terms (including technical and scientific terms) used in this disclosure have the same meaning as those commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined in this disclosure.

[0029] The embodiment of the present disclosure provides a device for preventing power backflow, which prevents power backflow through a programmable logic device in an integrated circuit.

[0030] Figure 1The figure shows a schematic diagram of the structure of the power backflow prevention device provided in an embodiment of the present disclosure. The device mainly comprises: a first power module 10, a second power module 11, a load module 12 and a programmable logic module 13.

[0031] The power supply output end of the first power supply module 10 is connected to the power supply input end of the programmable logic module 13, the power supply output end of the second power supply module 11 is connected to the power supply input end of the load module 12, the electrical signal output end of the programmable logic module 13 is connected to the electrical signal input end of the load module 12, and the target input and output port of the programmable logic module 13 is electrically connected to the power supply output end of the second power supply module 11.

[0032] The first power supply module 10 is used to supply power to the programmable logic module 13;

[0033] The second power supply module 11 is used to supply power to the load module 12;

[0034] The programmable logic module 13 is used to monitor the voltage value of the power supply output terminal of the second power supply module 11, and control the signal of the electrical signal output terminal according to the monitored voltage value to prevent the electrical signal output terminal from causing power backflow to the load module.

[0035] In this embodiment, a second power supply module is used to supply power to the load module, and the power supply output terminal of the second power supply module is electrically connected to the target input and output port of the programmable logic module, so that the programmable logic module can monitor the voltage value output by the second power supply module, and control the electrical signal output to the load module according to the monitored voltage value, so as to prevent the electrical signal output terminal of the programmable logic module from causing power backflow to the load module through the control of the electrical signal. The device for preventing power backflow does not need to add additional control devices or isolation devices, and can directly use the programmable logic module existing in the hardware system, thereby reducing the board area and the implementation complexity, and ensuring the circuit integration and long-term reliability.

[0036] Among them, the first power supply module 10 may include one or more power supplies, which is specifically determined according to the model of the programmable logic module 13. When multiple power supplies are required, the first power supply module 10 includes multiple power supplies. When only one power supply is required, the first power supply module 10 includes one power supply.

[0037] The programmable logic module 13 can be a complex programmable logic device (CPLD), a field programmable gate array (FPGA), or a general purpose input / output (GPIO) programmable interface of a central processing unit (CPU) / microcontroller unit (MCU).

[0038] The load module 12 is generally a conventional chip, and needs to receive an electrical signal from the programmable logic module 13 .

[0039] In some embodiments, the programmable logic module 13 is used to control the electrical signal output terminal to output a valid electrical signal after waiting for a delay time when it is detected that the voltage value at the power output terminal of the second power supply module 11 rises to a preset threshold voltage value.

[0040] The preset threshold voltage value is determined according to the electrical characteristics of the target input / output port of the programmable logic module 13. When the voltage value input to the target input / output port reaches the preset threshold voltage value, the signal detected by the target input / output port changes from 0 to 1.

[0041] It should be noted that a programmable logic module 13 includes multiple input and output ports, the electrical characteristics of each input and output port are not exactly the same, and the corresponding preset threshold voltage values ​​are also not exactly the same. Here, based on the reference voltage value output by the power supply output end of the second power supply module, an adapted input and output port is selected from the multiple input and output ports of the programmable logic module 13 as the target input and output port.

[0042] In some embodiments, the delay duration is not less than a reference duration, and the reference duration is the duration required from a first moment to a second moment, the first moment being the moment when the voltage value at the power supply output end of the second power supply module 11 reaches the preset threshold voltage value, and the second moment is the moment when the load module 12 is fully powered on.

[0043] Among them, when there are multiple power supplies for the load module 12, the second moment is the moment when the last power supply for the load module 12 is fully powered on; when there is only one power supply for the load module 12, the second moment is the moment when the power supply is fully powered on.

[0044] In some embodiments, Figure 2Another structural schematic diagram of the power backflow prevention device provided by an embodiment of the present disclosure is shown, and the device also includes a voltage regulating module 20, which is connected in series between the power supply output end of the second power supply module 11 and the target input and output port of the programmable logic module 13; the voltage regulating module 20 is used to monitor the voltage of the power supply output end of the second power supply module 11, and level-control the monitored voltage and then input it to the target input and output port of the programmable logic module 13.

[0045] Among them, the voltage regulating module 20 is used to adjust the voltage value output by the power supply output end of the second power supply module 11 when the voltage output by the second power supply module 11 is not compatible with the voltage of the programmable logic module 13, so that the adjusted voltage can adapt to the target input and output port of the programmable logic module 13.

[0046] If the voltage output by the second power module 11 matches the voltage of the programmable logic module 13, there is no need to set up a voltage regulating module 20 in the anti-power backflow device, and the power supply output end of the second power module 11 and the target input and output port of the programmable logic module 13 can be directly connected.

[0047] In some embodiments, the voltage regulating module 20 is used to monitor the voltage at the power supply output end of the second power supply module 11, and after level control of the monitored voltage according to the level standard of the target input and output port of the programmable logic module 13, the voltage is input to the target input and output port of the programmable logic module 13.

[0048] In some embodiments, the voltage regulating module 20 includes a voltage divider circuit: the voltage input end of the voltage divider circuit is connected to the supply voltage output end of the second power supply module; the voltage divider output end of the voltage divider circuit is connected to the target input and output port of the programmable logic module.

[0049] In some embodiments, the voltage regulating module 20 includes a boost circuit: a voltage input terminal of the boost circuit is connected to a supply voltage output terminal of the second power module; and a boost output terminal of the boost circuit is connected to a target input / output port of the programmable logic module.

[0050] In an exemplary embodiment, the level standard of the target input / output port of the programmable logic module 13 includes a preset threshold voltage value and a maximum voltage value allowed for input.

[0051] When the voltage value output by the second power module 11 after it is fully powered on is not higher than the threshold voltage value, the voltage value output by the second power module 11 is increased by the voltage regulating module 20 so that the target input / output port can detect the signal change. Furthermore, the voltage value input to the target input / output port of the programmable logic module 13 after the voltage increase is not higher than the maximum voltage value allowed to be input.

[0052] In the case that the voltage value output by the second power supply module 11 after it is fully powered on is higher than the maximum allowable input voltage value, the voltage value output by the second power supply module is reduced by the voltage regulating module 20 so that the voltage value input to the target input / output port is not higher than the maximum allowable input voltage value, thereby preventing circuit damage and satisfying that the target input / output port can still detect signal changes after the voltage reduction, that is, the voltage value after the voltage is reduced after being fully powered on is higher than the preset threshold voltage value.

[0053] In some embodiments, when there are multiple power supplies for the load module 12, the second power supply module 11 is the last power supply to be powered on. By monitoring the voltage of the last power supply for the load module, the accuracy of the delay control is ensured, and the effectiveness of preventing power backflow is further improved.

[0054] In an exemplary embodiment, Figure 3 The figure shows the working process of the power backflow prevention device, which mainly includes:

[0055] The first power supply module 10 is powered on, and the programmable logic module 13 works normally;

[0056] The second power supply module 11 is not powered on, and the target input / output port of the programmable logic module 13 detects that the signal output by the voltage regulating module 20 is 0. The programmable logic module 13 makes the following judgment through the pre-installed hardware description language, that is, when the input of the target input / output port is 0, the electrical signal output terminal is controlled to output the signal 0, that is, the electrical signal output terminal is in an invalid state;

[0057] When the second power supply module 11 is powered on and the voltage value output by the voltage regulating module 20 rises to the threshold voltage value of the target input / output port of the programmable logic module, the target input / output port of the programmable logic module 13 detects that the signal becomes 1; the programmable logic module 13 outputs the real electrical signal to the load module 12 after waiting for the delay time through the pre-installed hardware description language.

[0058] The embodiment of the present disclosure also provides a method for preventing power backflow, which is applied to a programmable logic module. The programmable logic module belongs to the power backflow prevention device described above. Figure 4 The figure shows a flow chart of the method for preventing power backflow, which mainly includes the following steps:

[0059] Step 401, monitoring the voltage value of the power supply output terminal of the second power supply module;

[0060] Step 402: Control the signal of the electrical signal output terminal according to the monitored voltage value to prevent the electrical signal output terminal from causing power backflow to the load module.

[0061] In some embodiments, controlling the signal at the electrical signal output terminal according to the monitored voltage value includes:

[0062] When it is monitored that the voltage value of the power supply output terminal of the second power supply module rises to a preset threshold voltage value, the electrical signal output terminal is controlled to output a valid electrical signal after waiting for a delay time.

[0063] In some embodiments, the delay duration is not less than a reference duration, and the reference duration is the duration required from a first moment to a second moment, the first moment is the moment when the voltage value at the power supply output end of the second power supply module reaches the preset threshold voltage value, and the second moment is the moment when the load module is fully powered on.

[0064] In an exemplary embodiment, Figure 5 The figure shows an example structure diagram of a power backflow prevention device, which mainly includes:

[0065] The programmable logic module is CPLD, and its power supply is 1.8V module A and 3.3V module A;

[0066] The load module is a functional chip, which has only one power supply, 3.3V module B;

[0067] CPLD has a 25M clock signal transmitted to the functional chip;

[0068] The voltage regulator module includes two 1K ohm voltage divider resistors, which divide the 3.3V into half, that is, 1.65V, and connect it to the LVCMOS1.8V IO of the CPLD. The threshold voltage value (VIH) of the IO is 1.17V.

[0069] Figure 6 The figure shows the working process of preventing power backflow combined with the example structure, which mainly includes:

[0070] The 1.8V module A and 3.3V module A of the CPLD are powered on, and after the power-on is completed, the CPLD starts to work;

[0071] 3.3V module B has not been powered on, the output voltage value of the voltage regulator module is 0, the CPLD IO detection level connected to the voltage regulator module is 0, and the CPLD controls the 25M clock to output 0 through internal logic;

[0072] When 3.3V module B starts to power on, when the output of the voltage regulator module reaches 1.17V, the CPLD IO detection level connected to the voltage regulator module is 1. At this time, the voltage value corresponding to 3.3V module B is 1.17V*2=2.34V. It is measured that it takes 1ms for 3.3VB to rise from 2.34V to 3.3V. Therefore, after the CPLD IO detects that the level is 1, it delays for 2ms and then enables the normal output of the 25M clock.

[0073] The internal control of CPLD is implemented through the hardware description language Verilog HDL. Just use the basic CASE statement. When the voltage value output by the voltage regulator module does not reach the VIH of the IO, the CPLD outputs the signal 0 corresponding to the 25M clock IO. When the voltage value output by the voltage regulator module reaches the VIH of the IO, the CPLD waits for 2ms and the IO corresponding to the 25M clock outputs 25M clock.

[0074] The step division of the above various methods is only for clear description. When implemented, they can be combined into one step or some steps can be split and decomposed into multiple steps. As long as they include the same logical relationship, they are all within the protection scope of this disclosure. Adding insignificant modifications to the algorithm or process or introducing insignificant designs without changing the core design of the algorithm and process are all within the protection scope of this disclosure.

[0075] In summary, the power backflow prevention device provided by the embodiment of the present disclosure is simple to implement, low in cost, small in board area, high in reliability, and high in flexibility. It makes reasonable use of the existing resources of the programmable logic device, and basically does not need to rely on additional circuits. It can achieve backflow prevention by using the IO resources and hardware description language of the programmable logic device itself. The hardware circuit part only introduces the power signal into the IO port of the programmable logic device, which minimizes the number of electronic components used in the peripheral circuit and the occupied area, thereby reducing the cost.

[0076] In addition, the method for preventing power backflow is simple and is implemented through hardware description language. It is highly flexible and can modify relevant parameters through software upgrades, which is easy to operate.

[0077] The embodiment of the present disclosure further provides an integrated circuit, comprising the above-described power backflow prevention device.

[0078] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0079] Those skilled in the art will understand that although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features from different embodiments is meant to be within the scope of the present embodiment and to form different embodiments.

[0080] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A device for preventing power backflow, characterized in that: include: A first power module, a second power module, a load module and a programmable logic module; The power supply output end of the first power supply module is connected to the power supply input end of the programmable logic module, the power supply output end of the second power supply module is connected to the power supply input end of the load module, the electrical signal output end of the programmable logic module is connected to the electrical signal input end of the load module, and the target input / output port of the programmable logic module is electrically connected to the power supply output end of the second power supply module; The first power supply module is used to supply power to the programmable logic module; The second power supply module is used to supply power to the load module; The programmable logic module is used to monitor the voltage value of the power supply output terminal of the second power supply module, and control the signal of the electrical signal output terminal according to the monitored voltage value to prevent the electrical signal output terminal from causing power backflow to the load module.

2. The power backflow prevention device according to claim 1, characterized in that: The programmable logic module is used to control the electrical signal output terminal to output a valid electrical signal after waiting for a delay time when it is detected that the voltage value of the power supply output terminal of the second power supply module rises to a preset threshold voltage value.

3. The power backflow prevention device according to claim 2, characterized in that: The delay duration is not less than a reference duration, and the reference duration is the duration required from the first moment to the second moment. The first moment is the moment when the voltage value at the power supply output end of the second power supply module reaches the preset threshold voltage value, and the second moment is the moment when the load module is fully powered on.

4. The device for preventing power backflow according to claim 1, characterized in that: The device further comprises a voltage regulating module connected in series between the power supply output terminal of the second power supply module and the target input and output port of the programmable logic module; The voltage regulating module is used to perform level control on the voltage at the power supply output end of the second power supply module, and input the level-controlled voltage to the target input / output port of the programmable logic module.

5. The device for preventing power backflow according to claim 4, characterized in that: The voltage regulating module is used to control the voltage level of the power supply output end of the second power supply module according to the level standard of the target input and output port of the programmable logic module, and input the level-controlled voltage to the target input and output port of the programmable logic module.

6. The device for preventing power backflow according to claim 1, characterized in that: In the case that there are multiple power supplies for supplying power to the load module, the second power supply module is the last power supply to be powered on.

7. A method for preventing power backflow, characterized in that: Applied to a programmable logic module, the programmable logic module belongs to the power backflow prevention device according to any one of claims 1 to 6; Monitoring the voltage value of the power supply output terminal of the second power supply module; The signal of the electrical signal output terminal is controlled according to the monitored voltage value to prevent the electrical signal output terminal from causing power backflow to the load module.

8. The method according to claim 7, characterized in that The step of controlling the signal at the electrical signal output terminal according to the monitored voltage value comprises: When it is monitored that the voltage value of the power supply output terminal of the second power supply module rises to a preset threshold voltage value, the electrical signal output terminal is controlled to output a valid electrical signal after waiting for a delay time.

9. The method according to claim 8, characterized in that The delay duration is not less than a reference duration, and the reference duration is the duration required from the first moment to the second moment. The first moment is the moment when the voltage value at the power supply output end of the second power supply module reaches the preset threshold voltage value, and the second moment is the moment when the load module is fully powered on.

10. An integrated circuit, characterized in that: It comprises the power backflow prevention device as described in any one of claims 1-6.