Control method and device and switching power supply

Abstract

The invention discloses a control method and device and a switching power supply, and the method comprises the steps: obtaining a first voltage signal V1 representing the output voltage of the switching power supply, comparing the first voltage signal V1 with a second threshold VREF2, and generating a first enabling signal VEN; a second voltage signal V2 representing the magnitude of the output voltage of the switching power supply is obtained, the second voltage signal V2 is compared with a third threshold value VREF3 and a fourth threshold value VREF4 to generate a second enable signal VNDC and a third enable signal VSV3, and VREF3 is larger than VREF4; judging the validity of each enable signal and adjusting a control strategy of the switching power supply according to the validity; when V1 is smaller than or equal to VREF2, VEN is invalid, otherwise, VEN is valid; when the VEN is valid and V2 is less than or equal to VREF3, the VNDC is valid, otherwise, the VNDC is invalid; when V2 is greater than VREF3 for the first time and V2 is less than or equal to VREF4, VSV3 is valid, otherwise, VSV3 is invalid; the VEN, the VNDC and the VSV3 all do not use the first control strategy; if the VEN and the VNDC are valid and the VSV3 is invalid, using a second control strategy; if the VEN is valid and the VNDC and the VSV3 are invalid, using a third control strategy; and the VEN, the VNDC and the VSV3 all effectively use a fourth control strategy. According to the invention, the phase shift angle is more accurate.

Description

Technical Field

[0001] The present invention belongs to the field of power supply control, and in particular relates to a control method, a control device and a switching power supply. Background Art

[0002] The full-bridge rectifier topology has the maximum voltage stress on any switch at the input VIN and the transformer core and winding are fully utilized. Therefore, these characteristics make the full-bridge converter an ideal choice for high input voltage, high power range switching power supply (power <1000 watt) applications. However, as the output power increases further, the power switch loss makes it difficult for the full-bridge converter to meet the design requirements. Based on the simple full-bridge structure, the full-bridge converter using phase shift technology can effectively solve this problem.

[0003] In the full-bridge phase-shift topology, the parasitic output capacitance of the MOS rectifier and the leakage inductance of the switching transformer form a resonant circuit, which can achieve zero voltage across the MOS rectifier during conduction. Compared with the simple full-bridge topology, in the full-bridge phase-shift topology, there is a phase shift between the gate drive signals of the two diagonal switches, and the two half-bridges are driven by complementary gate pulses. The duty cycle is not a fixed 50%, which is also the biggest difference from the simple full-bridge structure.

[0004] In the phase-shifted full-bridge rectifier topology, the converter output power P n It is related to the phase shift angle. Different powers correspond to different phase shift angles. The relationship between output power and phase angle under unit gain is:

[0005] Among them, θ is the phase angle, and the output power is maximum when θ=90°.

[0006] At present, there are two main control methods used in the full-bridge phase-shift topology: (1) Control the on and off time of the four power tubes in the two bridge arms of the primary side to achieve phase shift of voltage and current, and diode rectification is used on the secondary side; (2) By controlling the on and off time of the secondary power tube, the phase shift of the driving signal of the bridge arm power tube corresponding to the primary side is achieved.

[0007] Both of the above methods have certain disadvantages. Method (1) is not well applied in low-power applications due to the large conduction loss of the diode. Method (2) requires detecting the falling edge of the drain voltage when turning on the secondary rectifier. Because there is a delay in the corresponding drive signals of the primary and secondary sides, it is difficult to ensure that the turn-on and turn-off of the secondary rectifier accurately correspond to the turn-on and turn-off moments of the primary power tube. At the same time, the phase shift required for the primary and secondary drives to be loaded needs to be met. The system generates a cyclic phase shift, which ultimately leads to the inability to carry load.

[0008] It should be noted that the information disclosed in the background technology section above is only intended to deepen the understanding of the overall background technology of the present application, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. In particular, the discovery of the above-mentioned prior art problems should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0009] In view of this, the technical problem to be solved by the present invention is to provide a control method, a device and a switching power supply, which can at least solve one of the technical problems existing in the prior art to a certain extent.

[0010] As a first aspect of the present invention, the technical solution of the control method provided is as follows: A control method is applied to a switching power supply, wherein the switching power supply adopts a full-bridge converter topology, includes a primary full-bridge circuit and a secondary full-bridge synchronous rectification circuit, wherein the switch tube on the first bridge arm and the switch tube on the second bridge arm in the primary full-bridge circuit are first diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are second diagonal switch tubes with consistent drive signals, and the switch tube on the first bridge arm and the switch tube on the second bridge arm in the secondary full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, and the switch tube on the first bridge arm and the switch tube on the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, and the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; wherein the control method includes: The first voltage signal V1 representing the output voltage of the switching power supply is obtained, and the second threshold V REF2 Compare and generate the first enable signal V EN ; The second voltage signal V2 representing the output voltage of the switching power supply is obtained, and the third threshold V REF3 Compare and generate the second enable signal V NDC , and also with the fourth threshold V REF4 Compare and generate a third enable signal V SV3 , V REF3 >V REF4 ; Determine the validity of each enable signal and adjust the control strategy of the switching power supply according to the validity of each enable signal: When V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤VREF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, and V2≤V REF4 When the third enable signal V SV3 Valid, otherwise invalid; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the primary side control device generates the primary side drive; the secondary side control device does not generate the secondary side drive, and the secondary side of the switching power supply relies on diode rectification; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3 Invalid, the second control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectifier, and the primary side control device is controlled by the secondary side control device to generate the primary side drive, and there is no phase shift between the primary side drive and the secondary side drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and at the same time, the primary side control device is controlled by the secondary side control device not to generate the primary side drive; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and at the same time, the primary side control device is controlled by the secondary side control device to generate the primary side drive, and the primary side drive and the secondary side drive are phase-shifted.

[0011] Furthermore, the first voltage signal is a second threshold value V REF2 The input voltage of the switching power supply is recorded as the first set value, and the second voltage signal is the third threshold value V REF3 The input voltage of the switching power supply is recorded as the second set value, and the second voltage signal is the fourth threshold value V REF4 The input voltage of the switching power supply is recorded as the third set value, the first set value is the nominal value of the output voltage of the switching power supply multiplied by 75%, the second set value is the nominal value of the output voltage of the switching power supply, and the third set value is the nominal value of the output voltage of the switching power supply multiplied by 90%.

[0012] Furthermore, in the fourth control strategy, the phase shift angles of the primary side drive and the secondary side drive are fixed through time compensation.

[0013] Furthermore, when V1>V REF1 Afterwards, the first voltage signal is switched to a voltage which is equal to the first threshold value V REF1 Compare and generate the first enable signal V EN , V REF1 <V REF2 .

[0014] As a second aspect of the present invention, the technical solution of the embodiment of the secondary side control device provided is as follows: A secondary side control device is applied to a switching power supply, the switching power supply adopts a full-bridge converter topology, including a primary side full-bridge circuit and a secondary side full-bridge synchronous rectification circuit, wherein the switch tube on the first bridge arm and the switch tube on the second bridge arm in the primary side full-bridge circuit are first diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are second diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm in the secondary side full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, and the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; wherein the secondary side control device includes: The first output voltage detection module is used to obtain a first voltage signal V1 representing the output voltage of the switching power supply and a second threshold V REF2 Compare and generate the first enable signal V EN ; The second output voltage detection module is used to obtain a second voltage signal V2 representing the output voltage of the switching power supply and compare it with the third threshold value V REF3 Compare and generate the second enable signal V NDC , and also with the fourth threshold V REF4 Compare and generate a third enable signal V SV3 , V REF3 >V REF4 ; The first execution module is used to determine the validity of each enable signal and adjust the control strategy of the switching power supply together with the primary control device according to the validity of each enable signal: When V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>VREF3 After that, and V2≤V REF4 When the third enable signal V SV3 Valid, otherwise invalid; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the secondary side control device does not generate secondary side drive, and the secondary side of the switching power supply relies on diode rectification; at this time, the primary side drive can be generated by the primary side control device; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3 Invalid, the second control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectifier, and the primary side control device is controlled by the secondary side control device to generate the primary side drive, and there is no phase shift between the primary side drive and the secondary side drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and at the same time, the primary side control device is controlled by the secondary side control device not to generate the primary side drive; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and at the same time, the primary side control device is controlled by the secondary side control device to generate the primary side drive, and the primary side drive and the secondary side drive are phase-shifted.

[0015] Preferably, the first output voltage detection module includes a resistor R3, a resistor R4, a switch ∅1, a switch ∅2, an inverter INV0, an inverter INV1, an inverter INV2, and a first threshold voltage V REF1 The first reference voltage source generates a second threshold value V REF2The second reference voltage source and the comparator AMP1; the positive electrode of the resistor R3 is used to connect the output end of the switching power supply, and the negative electrode of the resistor R3 is simultaneously connected to the positive electrode of the resistor R4 and the positive input end of the comparator AMP1; the positive end of the first reference voltage source is connected to the negative end of the switch ∅1, the positive end of the second reference voltage source is connected to the negative end of the switch ∅2, the positive end of the switch ∅1 and the positive end of the switch ∅2 are simultaneously connected to the negative end of the comparator AMP1; the output end of the comparator AMP1 is simultaneously connected to the control end of the switch ∅1, the input end of the inverter INV0 and the input end of the inverter INV1; the output end of the inverter INV1 is connected to the control end of the switch ∅2; the output end of the inverter INV0 is connected to the input end of the inverter INV2; the output end of the inverter INV2 outputs the first enable signal V EN ; The negative electrode of the resistor R4, the negative electrode of the first reference voltage source and the negative electrode of the second reference voltage source are used to connect to GND.

[0016] Preferably, the second output voltage detection module includes a resistor R5, a resistor R6, a resistor R7, a data selector MUX1, a comparator AMP2, a comparator AMP3 and a logic control unit, wherein the logic control unit includes an inverter INV3, an inverter INV4, an inverter INV5 and an inverter INV6; the positive electrode of the resistor R5 is used to connect to the output end of the switching power supply, the negative electrode of the resistor R5 is simultaneously connected to the positive electrode of the resistor R6 and the 0 input end of the data selector MUX1, and the negative electrode of the resistor R6 is simultaneously connected to the positive electrode of the resistor R7 and the data selector MUX The negative electrode of the resistor R7 is used to connect to GND; the output end of the data selector MUX1 is connected to the positive input end of the comparator AMP2 and the positive input end of the comparator AMP3 at the same time, the negative input end of the comparator AMP2 is used to input the third threshold VREF3, and the negative input end of the comparator AMP3 is used to input the fourth threshold VREF4; the output end of the comparator AMP2 is connected to the input end of the inverter INV3, and the output end of the inverter INV3 is connected to the input end of the inverter INV4; the output end of the inverter INV4 outputs the second enable signal V NDC The output of the comparator AMP3 is connected to the input of the inverter INV5, and the output of the inverter INV5 is connected to the input of the inverter INV6; the output of the inverter INV6 outputs the third enable signal V SV3 .

[0017] Preferably, the first execution module includes: High frequency oscillator OSC1 is used to generate a high frequency drive signal V CLK1 , which includes two high-frequency driving signals with the same frequency and complementary to each other; The first digital logic module LOGIC1 is used to determine the validity of each enable signal and execute a corresponding control strategy according to the validity of each enable signal to generate an initial signal for a secondary side drive and an initial signal for a primary side drive; The secondary side driving module is used for amplifying the initial signal of the secondary side driving and then outputting it.

[0018] Preferably, the first digital logic module includes a D flip-flop DFF1, a D flip-flop DFF2, an AND gate AND1, an AND gate AND2, an AND gate AND3, an inverter INV7, an inverter INV8, an inverter INV9, an inverter INV10, an inverter INV11, an inverter INV12, an inverter INV13, an inverter INV14, an inverter INV15 and a phase shift digital logic module; the D terminal of the D flip-flop DFF1 is used to input a power supply voltage, and the CLK terminal is used to input a first enable signal V EN The D terminal of the D flip-flop DFF2 is used to input the power supply voltage, and the Q terminal is connected to the second input terminal of the phase-shift digital logic module; the input terminal of the inverter INV7 and the CLK terminal of the D flip-flop DFF2 simultaneously input the second enable signal V NDC The output of the inverter INV7 is connected to the second input of the AND gate AND1; the output of the AND gate AND1 is simultaneously connected to the second input of the AND gate AND2 and the first input of the AND gate AND3, and the first input of the AND gate AND2 is used to input the high-frequency drive signal V CLK1 The first signal in the AND gate AND3 is used to input the high-frequency drive signal V CLK1 The second signal in the phase shift digital logic module; the output end of the AND gate AND2 is connected to the input end of the inverter INV8, the output end of the inverter INV8 is connected to the input end of the inverter INV9, the output end of the inverter INV9 is connected to the input end of the inverter INV12, the output end of the inverter INV12 is connected to the input end of the inverter 13, and the output end of the inverter 13 is connected to the first input end of the phase shift digital logic module; the output end of the AND gate AND3 is connected to the input end of the inverter INV10, the output end of the inverter INV10 is connected to the input end of the inverter INV11, the output end of the inverter INV11 is connected to the input end of the inverter INV14, the output end of the inverter INV14 is connected to the input end of the inverter 15, the output end of the inverter 15 is connected to the third input end of the phase shift digital logic module, the first output end of the phase shift digital logic module outputs the first signal of the initial signal driven by the secondary side, and the second output end of the phase shift digital logic module outputs the second signal of the initial signal driven by the secondary side.

[0019] Furthermore, the first digital logic module further includes AND gates AND3, AND gates AND4, AND gates AND5 and AND gates AND6; the first input end of the AND gate AND3 and the input end of the AND gate AND5 are used to input the first enable signal V EN The second input end of the AND gate AND3 is connected to the output end of the AND gate AND2, the second input end of the AND gate AND5 is connected to the output end of the AND gate AND3, the output end of the AND gate AND3 is connected to the first input end of the AND gate AND4, the output end of the AND gate AND5 is connected to the first input end of the AND gate AND6, the second input end of the AND gate AND4 and the second input end of the AND gate AND6 are simultaneously connected to the output end of the AND gate AND1, the output end of the AND gate AND4 outputs the first path initial signal of the primary side drive, and the output end of the AND gate AND6 outputs the second path initial signal of the primary side drive.

[0020] As a third aspect of the present invention, the technical solution of the embodiment of the primary side control device provided is as follows: A primary side control device is applied to a switching power supply, the switching power supply adopts a full-bridge converter topology, including a primary side full-bridge circuit and a secondary side full-bridge synchronous rectification circuit, wherein the upper switch tube of the first bridge arm and the lower switch tube of the second bridge arm in the primary side full-bridge circuit are first diagonal switch tubes with consistent drive signals, the lower switch tube of the first bridge arm and the upper switch tube of the second bridge arm are second diagonal switch tubes with consistent drive signals, the upper switch tube of the first bridge arm and the lower switch tube of the second bridge arm in the secondary side full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, the lower switch tube of the first bridge arm and the upper switch tube of the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, and the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; wherein the primary side control device includes: The second execution module is used to adjust the control strategy of the switching power supply together with the secondary side control device: When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the primary side control device generates the primary side drive; at this time, the secondary side control device does not generate the secondary side drive, and the secondary side of the switching power supply relies on diode rectification; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3Invalid, the second control strategy is adopted: the secondary control device controls the primary control device to generate the primary drive; at this time, the secondary control device also generates the secondary drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and there is no phase shift between the primary drive and the secondary drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device controls the primary side control device to not generate primary side drive; at this time, the secondary side control device generates secondary side drive, and the secondary side of the switching power supply is full-bridge synchronous rectification; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device controls the primary side control device to generate the primary side drive; at this time, the secondary side control device also generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and the primary side drive and the secondary side drive are phase-shifted; in: The first enable signal V EN The secondary side control device obtains a first voltage signal V1 representing the output voltage of the switching power supply and compares it with the second threshold value V REF2 Obtained by comparison; The second enable signal V NDC The secondary side control device obtains a second voltage signal V2 representing the output voltage of the switching power supply and compares it with the third threshold value V REF3 Obtained by comparison; The third enable signal V SV3 The secondary side control device obtains a second voltage signal representing the output voltage of the switching power supply and compares it with the fourth threshold value V REF4 Obtained by comparison; The first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 The effectiveness is determined by the secondary control device: when V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, the second voltage signal ≤ V REF4 When the third enable signal V SV3 Valid, otherwise invalid.

[0021] Preferably, the second execution module includes: High frequency oscillator OSC2 is used to generate a high frequency drive signal V CLK2 ; The second digital logic module LOGIC2 is used to receive the high-frequency driving signal V CLK2 and a first initial signal of the primary side drive, and generate a second initial signal of the primary side drive after logical processing, wherein the first initial signal of the primary side drive is generated by the secondary side control device according to the corresponding control strategy and obtained after isolation processing; The primary side driving module DRV2 is used for amplifying the second initial signal of the primary side driving and then outputting it.

[0022] Preferably, the second digital logic module LOGIC2 includes a data selector MUX2, a data selector MUX3, a D flip-flop DFF3 and a D flip-flop DFF4; the input 1 end of the data selector MUX2 and the CLK end of the D flip-flop DFF3 both input the first signal in the first initial signal of the primary side drive, the input 1 end of the data selector MUX3 and the CLK end of the D flip-flop DFF4 both input the second signal in the first initial signal of the primary side drive, the D end of the D flip-flop DFF3 and the D end of the D flip-flop DFF4 are used to input a power supply voltage, the Q end of the D flip-flop DFF3 is connected to the input 0 end of the data selector MUX3, the Q end of the D flip-flop DFF4 is connected to the input 0 end of the data selector MUX2, the output end of the data selector MUX2 is the first output end of the digital logic module LOGIC2, and the output end of the data selector MUX3 is the second output end of the digital logic module LOGIC2.

[0023] As a fourth aspect of the present invention, the technical solution of the embodiment of the switching power supply provided is as follows: A switching power supply adopts a full-bridge converter topology, including a primary full-bridge circuit and a secondary full-bridge synchronous rectification circuit, wherein the upper switch tube of the first bridge arm and the lower switch tube of the second bridge arm in the primary full-bridge circuit are first diagonal switch tubes with consistent drive signals, the lower switch tube of the first bridge arm and the upper switch tube of the second bridge arm are second diagonal switch tubes with consistent drive signals, the upper switch tube of the first bridge arm and the lower switch tube of the second bridge arm in the secondary full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, the lower switch tube of the first bridge arm and the upper switch tube of the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, and the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; wherein the switching power supply includes the secondary control device and the digital isolator described in any one of the second aspects and the primary control device described in any one of the third aspects.

[0024] Furthermore, the switch tube on the first bridge arm in the primary full-bridge circuit, the switch tube on the second bridge arm in the primary full-bridge circuit, the switch on the first bridge arm in the secondary full-bridge synchronous rectification circuit, and the switch on the second bridge arm in the secondary full-bridge synchronous rectification circuit are all self-driven PMOS; the switch tube on the first bridge arm in the primary full-bridge circuit, the switch tube on the second bridge arm in the primary full-bridge circuit, the switch on the first bridge arm in the secondary full-bridge synchronous rectification circuit, and the switch on the second bridge arm in the secondary full-bridge synchronous rectification circuit are all externally driven NMOS.

[0025] Compared with the prior art, the present invention can achieve the maximum accuracy of full-bridge phase shift under the condition of the same frequency of the primary and secondary sides to the greatest extent, and the input voltage of the switching power supply when the first voltage signal is the second threshold is recorded as the first set value, the input voltage of the switching power supply when the second voltage signal is the third threshold is recorded as the second set value, and the input voltage of the switching power supply when the second voltage signal is the fourth threshold is recorded as the third set value. The first set value of the present invention is less than the third set value and less than the second set value. In combination with different working conditions of the switching power supply, the specific beneficial effects are analyzed in detail as follows: (1) In the embodiment of the present invention, when the first enable signal, the second enable signal and the third enable signal are all invalid, it indicates that the switching power supply is in the initial stage of starting up and powering on. At this time, the output voltage of the switching power supply is less than or equal to the first set value. Under this working condition, the first control strategy is adopted, and the primary side control device generates the primary side drive; the secondary side control device does not generate the secondary side drive, and the secondary side of the switching power supply relies on diode rectification. The diode rectification has a low dependence on temperature, which can reduce the forward conduction voltage drop and make it easier to transition to the synchronous rectification stage; (2) In the embodiment of the present invention, when the first enable signal and the second enable signal are valid and the third enable signal is invalid, it indicates that the switching power supply is in one of two operating conditions: the first operating condition is that the switching power supply has not yet completed startup, and the output voltage of the switching power supply rises to a value greater than the first set value and less than or equal to the second set value; the second operating condition is that the switching power supply has completed startup, and after entering the steady-state closed-loop control state, the output voltage drops to a value greater than the third set value and less than or equal to the second set value; in both operating conditions, the first control strategy is adopted, the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectifier, and at the same time, the primary side control device is controlled by the secondary side control device to generate the primary side drive, and there is no phase shift between the primary side drive and the secondary side drive. Synchronous rectification can reduce temperature rise and improve efficiency. The amplitude of the output voltage rise is controlled by feedback, which is conducive to enhancing system stability; (3) In the embodiment of the present invention, when the first enable signal is valid and the second enable signal and the third enable signal are both invalid, it indicates that the output voltage of the switching power supply enters a steady-state closed-loop control state and then the output voltage rises to a value greater than the second set value. The reason is that too much energy is transmitted from the primary side to the secondary side. At this time, the third control strategy is adopted: the secondary side control device generates a secondary side drive, and the secondary side of the switching power supply is a full-bridge synchronous rectifier. At the same time, the secondary side control device controls the primary side control device not to generate a primary side drive. Synchronous rectification can reduce temperature rise and improve efficiency. The amplitude of the output voltage drop is controlled by feedback, which is conducive to enhancing system stability. (4) In the embodiment of the present invention, when the first enable signal, the second enable signal and the third enable signal are all valid, it indicates that the output voltage of the switching power supply enters a steady-state closed-loop control state and then the output voltage drops to less than the third set value. The reason is that the load of the switching power supply increases and the output power cannot meet the power required by the load. At this time, the fourth control strategy is adopted, and the secondary side control device generates a secondary side drive. The secondary side of the switching power supply is a full-bridge synchronous rectification circuit. At the same time, the primary side control device is controlled by the secondary side control device to generate a primary side drive, and the primary side drive and the secondary side drive are phase-shifted. The phase-shift between the primary side drive and the secondary side drive can improve the load carrying capacity of the switching power supply. The secondary side control device controls the primary side control device to generate a primary side drive, so that the secondary side phase shift can find a fixed reference point relative to the primary side drive signal, so that the secondary side phase shift angle is more accurate.

[0026] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A specific implementation principle block diagram of the switching power supply of the present invention; Figure 2 for Figure 1 A specific circuit diagram of the first output voltage detection module; Figure 3 for Figure 1 A specific circuit diagram of the second output voltage detection module; Figure 4 for Figure 1 A specific circuit diagram of the first part of the function of the digital logic module LOGIC1; Figure 5 for Figure 1 Digital logic schematic diagram of signal transmission on the secondary side of the circuit; Figure 6 A phase relationship diagram of the driving signal and the clock of the present invention; Figure 7for Figure 1 A specific control timing diagram of the circuit. DETAILED DESCRIPTION

[0028] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application may be combined with each other.

[0029] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0030] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application are described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, the process, method, system, product or equipment comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0031] It should be understood that, in the specification, claims and drawings, when a step is described as being connected to another step, the step may be directly connected to the other step, or be connected to the other step through a third step; when an element / unit is described as being "connected" to another element / unit, the element / unit may be "directly connected" to the other element / unit, or be "connected" to the other element / unit through a third element / unit.

[0032] In addition, the drawings of the present disclosure are only schematic diagrams of the present disclosure and are not necessarily drawn to scale. The same symbols in the drawings represent the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented using software, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor devices and / or microcontrollers.

[0033] The switching power supply applicable to the present invention adopts a full-bridge converter topology, including a primary full-bridge circuit and a secondary full-bridge synchronous rectification circuit. In the primary full-bridge circuit, the switch tube on the first bridge arm and the switch tube on the second bridge arm are first diagonal switch tubes with consistent drive signals, and the switch tube on the first bridge arm and the switch tube on the second bridge arm are second diagonal switch tubes with consistent drive signals. In the secondary full-bridge synchronous rectification circuit, the switch tube on the first bridge arm and the switch tube on the second bridge arm are third diagonal switch tubes with consistent drive signals, and the switch tube on the first bridge arm and the switch tube on the second bridge arm are fourth diagonal switch tubes with consistent drive signals. The drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between. The drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between.

[0034] Among them: the primary full-bridge circuit is located at the input end of the switching power supply, and its main function is to convert the DC input voltage into a high-frequency AC signal and transmit it to the transformer for energy transfer; the secondary full-bridge synchronous rectification circuit receives the high-frequency AC signal from the secondary of the transformer and converts it into a DC output.

[0035] The present invention aims to solve the problems of phase shift accuracy deviation and poor load capacity caused by the inherent delay of the above-mentioned switching power supply, wherein the switch tubes of each bridge arm in the primary full-bridge circuit and the secondary full-bridge synchronous rectification circuit can all be externally driven switch tubes, or the upper switch tubes of the four bridge arms can be all self-driven PMOS, and the lower switch tubes of the four bridge arms can be all externally driven NMOS according to needs. The self-driven switch tube of the primary side selects a path by itself through the primary winding of the transformer to achieve self-drive, and the self-driven switch tube of the secondary side selects a path by itself through the secondary winding of the transformer to achieve self-drive, thereby simplifying the control, using only two primary and secondary signal transmission channels, reducing the design difficulty and saving costs.

[0036] First embodiment The first embodiment provided by the present invention is a control method, which is applied to the switching power supply described above, wherein the control method of this embodiment includes: The first voltage signal V1 representing the output voltage of the switching power supply is obtained, and the second threshold V REF2 Compare and generate the first enable signal V EN ; The second voltage signal V2 representing the output voltage of the switching power supply is obtained, and the third threshold V REF3 Compare and generate the second enable signal V NDC , and also with the fourth threshold V REF4 Compare and generate a third enable signal V SV3 , V REF3 >V REF4 ; Determine the validity of each enable signal and adjust the control strategy of the switching power supply according to the validity of each enable signal: When V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, the second voltage signal ≤ V REF4 When the third enable signal V SV3 Valid, otherwise invalid; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the primary side control device generates the primary side drive; the secondary side control device does not generate the secondary side drive, and the secondary side of the switching power supply relies on diode rectification; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3 Invalid, the second control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectifier, and the primary side control device is controlled by the secondary side control device to generate the primary side drive, and there is no phase shift between the primary side drive and the secondary side drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and at the same time, the primary side control device is controlled by the secondary side control device not to generate the primary side drive; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and at the same time, the primary side control device is controlled by the secondary side control device to generate the primary side drive, and the primary side drive and the secondary side drive are phase-shifted.

[0037] It should be noted that in the first control strategy, the secondary side of the switching power supply relies on diode rectification, wherein the diode can be the body diode of each bridge arm switch tube in the secondary side full-bridge synchronous rectification circuit, or can be a diode connected in parallel with each bridge arm switch tube.

[0038] In the first control strategy of this embodiment, diode rectification is used, which has a low dependence on temperature, can reduce the forward conduction voltage drop, and can more easily transition to the synchronous rectification stage; the use of synchronous rectification in the second control strategy can reduce temperature rise and improve efficiency, and control the amplitude of the output voltage increase by feedback, which is beneficial to enhancing system stability; the use of synchronous rectification in the third control strategy can reduce temperature rise and improve efficiency, and control the amplitude of the output voltage decrease by feedback, which is beneficial to enhancing system stability; in the fourth control strategy, a phase-shifted full-bridge synchronous rectification with the secondary side controlling the primary side drive is used, which can make the secondary side phase shift find a fixed reference point relative to the primary side drive signal, making the secondary side phase shift angle more precise and improving the system load.

[0039] Furthermore, the first voltage signal is a second threshold value V REF2 The input voltage of the switching power supply is recorded as the first set value, and the second voltage signal is the third threshold value V REF3 The input voltage of the switching power supply is recorded as the second set value, and the second voltage signal is the fourth threshold value V REF4 The input voltage of the switching power supply is recorded as the third set value, the first set value is the nominal value of the output voltage of the switching power supply multiplied by 75%. According to actual simulation, 75% can effectively reduce the startup stress, the second set value is the nominal value of the output voltage of the switching power supply, and the third set value is the nominal value of the output voltage of the switching power supply multiplied by 90%.

[0040] Furthermore, in the fourth control strategy, the phase shift angles of the primary and secondary drives are fixed through time compensation, thereby avoiding the inherent delays caused by parasitic capacitance of the power tube and parasitic inductance of the transformer, making the phase shift angles of the primary and secondary drives not fixed, resulting in cyclic phase shift, and affecting the efficiency of the switching power supply.

[0041] Furthermore, when V1>V REF1 Afterwards, the first voltage signal is switched to a voltage which is equal to the first threshold value V REF1 Compare and generate the first enable signal V EN , V REF1 <V REF2 , thereby preventing the output voltage V O Fluctuations, causing the first enable signal V EN Flipped by mistake.

[0042] Second embodiment This embodiment provides a secondary side control device, which is applied to the switching power supply described above. Figure 1 This is a specific implementation principle block diagram of the switching power supply of the present invention, please refer to Figure 1In the phase-shifted full-bridge topology, two other-driven NMOS active rectifiers and two self-driven PMOS active rectifiers are integrated in the primary and secondary sides, as well as the corresponding control circuits. The two self-driven PMOS active rectifiers select the path by themselves through the transformer winding, and the self-driven PMOS active rectifiers do not need a driving circuit.

[0043] Please continue to see Figure 1 , wherein the secondary side control device of this embodiment includes: The first output voltage detection module is set Figure 1 The Vo output voltage detection module 1&2 with the code 210 is used to obtain a first voltage signal V1 representing the output voltage of the switching power supply and a second threshold value V REF2 Compare and generate the first enable signal V EN ; The second output voltage detection module is also set in Figure 1 The code is 210 in the Vo output voltage detection module 1&2, which is used to obtain the second voltage signal V2 representing the output voltage of the switching power supply, and the third threshold V REF3 Compare and generate the second enable signal V NDC , and also with the fourth threshold V REF4 Compare and generate a third enable signal V SV3 , V REF3 >V REF4 ; The first execution module is used to determine the validity of each enable signal and adjust the control strategy of the switching power supply together with the primary control device according to the validity of each enable signal: When V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, the second voltage signal ≤ V REF4 When the third enable signal V SV3 Valid, otherwise invalid; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the secondary side control device does not generate secondary side drive, and the secondary side of the switching power supply relies on diode rectification; at this time, the primary side drive can be generated by the primary side control device; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3Invalid, the second control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectifier, and the primary side control device is controlled by the secondary side control device to generate the primary side drive, and there is no phase shift between the primary side drive and the secondary side drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and at the same time, the primary side control device is controlled by the secondary side control device not to generate the primary side drive; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and at the same time, the primary side control device is controlled by the secondary side control device to generate the primary side drive, and the primary side drive and the secondary side drive are phase-shifted.

[0044] The technical means adopted by the control device of this embodiment correspond to and are consistent with the control method of the first embodiment, and have the same beneficial effects, so they will not be described in detail. In addition, various preferred technical means or further improved means in the control method of the first embodiment can be extended to this embodiment, and this embodiment will not describe them one by one.

[0045] Figure 2 for Figure 1 For a specific circuit diagram of the first output voltage detection module, see Figure 2 , wherein the first output voltage detection module includes a resistor R3, a resistor R4, a switch ∅1, a switch ∅2, an inverter INV0, an inverter INV1, an inverter INV2, and a first threshold voltage V REF1 The first reference voltage source generates a second threshold value V REF2 The second reference voltage source and the comparator AMP1; the positive electrode of the resistor R3 is used to connect the output end of the switching power supply, and the negative electrode of the resistor R3 is simultaneously connected to the positive electrode of the resistor R4 and the positive input end of the comparator AMP1; the positive end of the first reference voltage source is connected to the negative end of the switch ∅1, the positive end of the second reference voltage source is connected to the negative end of the switch ∅2, the positive end of the switch ∅1 and the positive end of the switch ∅2 are simultaneously connected to the negative end of the comparator AMP1; the output end of the comparator AMP1 is simultaneously connected to the control end of the switch ∅1, the input end of the inverter INV0 and the input end of the inverter INV1; the output end of the inverter INV1 is connected to the control end of the switch ∅2; the output end of the inverter INV0 is connected to the input end of the inverter INV2; the output end of the inverter INV2 outputs the first enable signal V EN; The negative electrode of the resistor R4, the negative electrode of the first reference voltage source and the negative electrode of the second reference voltage source are used to connect to GND.

[0046] Figure 2 The working principle is: at the initial power-on moment, due to the output voltage V O The comparator AMP1 outputs a low level, the switch Φ2 is turned on, the switch Φ1 is turned off, and the first enable signal V EN is low level; as the output voltage V O The first voltage signal V1 sampled by gradually increasing the voltage division of the resistor R3 and the resistor R4 is greater than the second threshold value V at the inverting input terminal of the comparator. REF2 When the comparator AMP1 outputs a low level, the first enable signal V EN Flips to high level, and switch Φ2 is turned on, switch Φ1 is turned off, and the first voltage signal is switched to the first threshold V REF1 For comparison, set V REF1 Less than V REF2 , which can prevent the output voltage V O The first enable signal VEN is flipped due to fluctuations. Under the condition that the comparator performance meets the requirements, this module reasonably sets the reference voltage V REF1 、V REF2 The output voltage ripple can be effectively processed. The purpose of adding an even number of inverters INV1 and INV3 is to EN The output waveform is shaped.

[0047] Figure 3 The second enable signal Figure 1 For a specific circuit diagram of the second output voltage detection module, see Figure 3, wherein the second output voltage detection module includes a resistor R5, a resistor R6, a resistor R7, a data selector MUX1, a comparator AMP2, a comparator AMP3 and a logic control unit, and the logic control unit includes an inverter INV3, an inverter INV4, an inverter INV5 and an inverter INV6; the positive electrode of the resistor R5 is used to connect to the output end of the switching power supply, the negative electrode of the resistor R5 is simultaneously connected to the positive electrode of the resistor R6 and the 0 input end of the data selector MUX1, and the negative electrode of the resistor R6 is simultaneously connected to the positive electrode of the resistor R7 and the data selector MUX1 The negative electrode of the resistor R7 is used to connect to GND; the output end of the data selector MUX1 is connected to the positive input end of the comparator AMP2 and the positive input end of the comparator AMP3 at the same time, the negative input end of the comparator AMP2 is used to input the third threshold VREF3, and the negative input end of the comparator AMP3 is used to input the fourth threshold VREF4; the output end of the comparator AMP2 is connected to the input end of the inverter INV3, and the output end of the inverter INV3 is connected to the input end of the inverter INV4; the output end of the inverter INV4 outputs the second enable signal V NDC The output of the comparator AMP3 is connected to the input of the inverter INV5, and the output of the inverter INV5 is connected to the input of the inverter INV6; the output of the inverter INV6 outputs a third enable signal V SV3 .

[0048] Figure 3 The working principle is: the second voltage signal sampled after the voltage division by resistors R5, R6 and R7 is respectively REF3 Compare and generate the second enable signal V NDC , and the fourth threshold V REF4 Compare and generate a third enable signal V SV3 , V REF3 >V REF4 The purpose of adding an even number of inverters INV3 and INV4 is to NDC The purpose of shaping the output waveform of the second enable signal V SV3 The output waveform is shaped.

[0049] It should be noted that, due to the second enable signal V NDC The high and low levels will be used as control signals for whether the primary side drive and the secondary side drive are driven in the second control strategy and the third control strategy, so the speed and accuracy of the comparator AMP2 are preferably higher than those of the comparator AMP1 and the comparator AMP3. Technicians in this field can also adjust the selection criteria of the comparator AMP1, the comparator AMP2 and the comparator AMP3 according to different application scenarios.

[0050] Please go back Figure 1 , wherein the first execution module includes: High frequency oscillator OSC1, Figure 1 The code in is 220, which is used to generate a high-frequency drive signal V CLK1 , which includes two high-frequency driving signals with the same frequency and complementary to each other; The first digital logic module LOGIC1, Figure 1 The code in is 230, which is used to determine the validity of each enable signal and execute the corresponding control strategy according to the validity of each enable signal to generate the initial signal of the secondary side drive and the initial signal of the primary side drive; Secondary side driver module DRV1, Figure 1 The code in is 240, which is used to amplify the initial signal of the secondary side drive and then output it.

[0051] Figure 4 for Figure 1 For a specific circuit diagram of the first part of the function of the first digital logic module LOGIC1, please refer to Figure 4 , which includes a D flip-flop DFF1, a D flip-flop DFF2, an AND gate AND1, an AND gate AND2, an AND gate AND3, an inverter INV7, an inverter INV8, an inverter INV9, an inverter INV10, an inverter INV11, an inverter INV12, an inverter INV13, an inverter INV14, an inverter INV15 and a phase-shift digital logic module; the D terminal of the D flip-flop DFF1 is used to input a power supply voltage, and the CLK terminal is used to input a first enable signal V EN The D terminal of the D flip-flop DFF2 is used to input the power supply voltage, and the Q terminal is connected to the second input terminal of the phase-shift digital logic module; the input terminal of the inverter INV7 and the CLK terminal of the D flip-flop DFF2 simultaneously input the second enable signal V NDC The output of the inverter INV7 is connected to the second input of the AND gate AND1; the output of the AND gate AND1 is simultaneously connected to the second input of the AND gate AND2 and the first input of the AND gate AND3, and the first input of the AND gate AND2 is used to input the high-frequency drive signal V CLK1 The first signal S8 in the AND gate AND3 is used to input the high-frequency driving signal V CLK1The second signal S7 in the AND gate AND2; the output end of the AND gate AND2 is connected to the input end of the inverter INV8, the output end of the inverter INV8 is connected to the input end of the inverter INV9, the output end of the inverter INV9 is connected to the input end of the inverter INV12, the output end of the inverter INV12 is connected to the input end of the inverter 13, and the output end of the inverter 13 is connected to the first input end of the phase-shift digital logic module; the output end of the AND gate AND3 is connected to the input end of the inverter INV10, the output end of the inverter INV10 is connected to the input end of the inverter INV11, the output end of the inverter INV11 is connected to the input end of the inverter INV14, the output end of the inverter INV14 is connected to the input end of the inverter 15, the output end of the inverter 15 is connected to the third input end of the phase-shift digital logic module, and the first output end of the phase-shift digital logic module outputs the first signal V of the initial signal of the secondary side drive S11 The second output terminal of the phase-shift digital logic module outputs the second signal V of the initial signal driven by the secondary side S12 .

[0052] Figure 5 The second enable signal Figure 1 For the digital logic schematic diagram of the signal transmission on the secondary side of the circuit, please refer to Figure 5 , where the circuit in the dashed box on the left is Figure 1 A specific circuit for the second part of the digital logic module LOGIC1, comprising: AND gates AND3, AND gates AND4, AND gates AND5 and AND gates AND6; the first input end of the AND gate AND3 and the input end of the AND gate AND5 are used to input the first enable signal V EN ; Connect the second input terminal of AND gate AND3 Figure 4 The output terminal of AND gate AND2 is connected to the second input terminal of AND gate AND5 Figure 4 The output end of AND gate AND3 is connected to the first input end of AND gate AND4, the output end of AND gate AND5 is connected to the first input end of AND gate AND6, and the second input end of AND gate AND4 and the second input end of AND gate AND6 are simultaneously connected to Figure 4 The output end of AND gate AND1 and the output end of AND gate AND4 output the first initial signal S driven by the primary side. DRV_S1 The output end of AND gate AND6 outputs the second initial signal S driven by the primary side DRV_S2 .

[0053] Figure 4 and Figure 5 The logic implemented by the circuit in the dotted box on the left is as follows:

[0054] Third embodiment This embodiment provides a primary side control device, which is applied to the switching power supply described above. The primary side control device of this embodiment includes: The second execution module is used to adjust the control strategy of the switching power supply together with the secondary side control device: When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the primary side control device generates the primary side drive; at this time, the secondary side control device does not generate the secondary side drive, and the secondary side of the switching power supply relies on diode rectification; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3 Invalid, the second control strategy is adopted: the secondary control device controls the primary control device to generate the primary drive; at this time, the secondary control device also generates the secondary drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and there is no phase shift between the primary drive and the secondary drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device controls the primary side control device to not generate primary side drive; at this time, the secondary side control device generates secondary side drive, and the secondary side of the switching power supply is full-bridge synchronous rectification; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device controls the primary side control device to generate the primary side drive; at this time, the secondary side control device also generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and the primary side drive and the secondary side drive are phase-shifted; in: The first enable signal V EN The secondary side control device obtains a first voltage signal V1 representing the output voltage of the switching power supply and compares it with the second threshold value V REF2 Obtained by comparison; The second enable signal V NDC The secondary side control device obtains a second voltage signal V2 representing the output voltage of the switching power supply and compares it with the third threshold value V REF3 Obtained by comparison; The third enable signal V SV3 The secondary side control device obtains a second voltage signal V2 representing the output voltage of the switching power supply and compares it with the fourth threshold value V REF4 Obtained by comparison; The first enable signal VEN , the second enable signal V NDC and the third enable signal V SV3 The effectiveness is determined by the secondary control device: when V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, and V2≤V REF4 When the third enable signal V SV3 Valid, otherwise invalid.

[0055] The technical means adopted by the control device of this embodiment correspond to and are consistent with the control method of the first embodiment, and have the same beneficial effects, so they will not be described in detail. In addition, various preferred technical means or further improved means in the control method of the first embodiment can be extended to this embodiment, and this embodiment will not describe them one by one.

[0056] Please go back Figure 1 , wherein the second execution module includes: High frequency oscillator OSC2, Figure 1 The code in is 410, which is used to generate a high-frequency drive signal V CLK2 ; The second digital logic module LOGIC2, Figure 1 The code in is 420, which is used to receive the high-frequency drive signal V CLK2 and a first initial signal of the primary side drive, and generate a second initial signal of the primary side drive after logical processing, wherein the first initial signal of the primary side drive is generated by the secondary side control device according to the corresponding control strategy and obtained after isolation processing; Primary side driver module DRV2, Figure 1 The code in is 430, which is used to amplify the second initial signal driven by the primary side and then output it.

[0057] Please go back Figure 5 , where the circuit in the dashed box on the right is Figure 1 A specific circuit of the second digital logic module LOGIC2 in the embodiment of the present invention comprises: a data selector MUX2, a data selector MUX3, a D flip-flop DFF3 and a D flip-flop DFF4; an input 1 end of the data selector MUX2 and a CLK end of the D flip-flop DFF3 are both input with a first signal S in the first initial signal driven by the primary side. DRV_P1 The input 1 terminal of the data selector MUX3 and the CLK terminal of the D flip-flop DFF4 are both input with the second signal S in the first initial signal driven by the primary side. DRV_P2The D end of the D flip-flop DFF3 and the D end of the D flip-flop DFF4 are used to input the power supply voltage, the Q end of the D flip-flop DFF3 is connected to the input 0 end of the data selector MUX3, the Q end of the D flip-flop DFF4 is connected to the input 0 end of the data selector MUX2, and the output end of the data selector MUX2 is the first output end of the digital logic module LOGIC2, which outputs the first signal V in the second initial signal driven by the primary side P11 The output end of the data selector MUX3 is the second output end of the digital logic module LOGIC2, which outputs the second signal V in the second initial signal driven by the primary side. P22 .

[0058] Figure 5 The working principle of the circuit in the dotted box on the right is as follows: the data selector MUX2 and the data selector MUX3 receive the first initial signal S of the primary side drive output by the digital isolator. DRV_P1 and S DRV_P2 At the same time, D flip-flop DFF3 and D flip-flop DFF4 respectively sample the secondary side drive control signal S DRV_P1 and S DRV_P2 The edge signal is used as the control signal of the corresponding data selector. After signal processing, the data selectors MUX2 and MUX3 output the second initial signal V driven by the primary side. P11 and VP22.

[0059] Fourth embodiment The present embodiment provides a switching power supply, which adopts a full-bridge converter topology and includes a primary full-bridge circuit and a secondary full-bridge synchronous rectification circuit. In the primary full-bridge circuit, the upper switch tube of the first bridge arm and the lower switch tube of the second bridge arm are first diagonal switch tubes with consistent drive signals, the lower switch tube of the first bridge arm and the upper switch tube of the second bridge arm are second diagonal switch tubes with consistent drive signals, in the secondary full-bridge synchronous rectification circuit, the upper switch tube of the first bridge arm and the lower switch tube of the second bridge arm are third diagonal switch tubes with consistent drive signals, the lower switch tube of the first bridge arm and the upper switch tube of the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal and there is a dead time in between, and the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal and there is a dead time in between; wherein, the switching power supply includes any one of the secondary control devices and the digital isolator in the second embodiment and any one of the primary control devices in the third embodiment.

[0060] Since the switching power supply of this embodiment includes any one of the secondary side control devices and the digital isolator in the second embodiment and any one of the primary side control devices in the third embodiment, compared with the prior art, it can achieve the maximum accuracy of the full-bridge phase shift while ensuring the same frequency of the primary and secondary sides to the greatest extent.

[0061] Furthermore, the switch tube on the first bridge arm in the primary full-bridge circuit, the switch tube on the second bridge arm in the primary full-bridge circuit, the switch on the first bridge arm in the secondary full-bridge synchronous rectification circuit, and the switch on the second bridge arm in the secondary full-bridge synchronous rectification circuit are all self-driven PMOS; the switch tube on the first bridge arm in the primary full-bridge circuit, the switch tube on the second bridge arm in the primary full-bridge circuit, the switch on the first bridge arm in the secondary full-bridge synchronous rectification circuit, and the switch on the second bridge arm in the secondary full-bridge synchronous rectification circuit are all externally driven NMOS, so that the secondary side control strategy can be realized under the condition of only two digital isolators, making the control signal transmission more concise and efficient.

[0062] Figure 1 This is a specific implementation circuit of this embodiment, wherein the functions of each module have been described in detail in the above second embodiment and third embodiment. Figure 6 The phase relationship diagram of the drive signal and the clock is briefly summarized as follows: The first terminal of the output voltage detection module 210 detects V O Pin voltage, judge the output voltage state, and generate the first enable signal V EN , the second enable signal V NDC and the second enable signal V SV3 ; The initial signal V of the secondary side drive signal is generated by the secondary side digital logic module LOGIC1 S11 、V S22 , and the first initial signal V of the primary side drive signal DRV_S1 、V DRV_S2 , the initial signal of the secondary side driving signal and the first initial signal of the primary side driving signal have the same frequency; The secondary side final synchronous rectifier tube M is generated through the secondary side driver module DRV1 N3 、M N4 Drive signal V S1 、V S2 , both have fixed dead time; The digital isolator module is used to connect the secondary synchronous rectifier M N3 、M N4 The first initial signal V of the primary side drive with the same frequency DRV_S1 、V DRV_S2 Passed to the primary digital logic module LOGIC2; Set the primary synchronous rectifier tube M through the primary digital logic module LOGIC2 N1 、M N2 Switching work before and after the secondary side synchronous rectification control signal is turned on; The primary side final synchronous rectifier tube M is generated through the primary side drive module DRV2 N1 、M N2 Drive signal V P1 、VP2 , both have fixed dead time.

[0063] Figure 7 for Figure 1 A specific control timing diagram of the circuit, combined with Figures 1 to 6 The analysis is as follows: When the switching power supply is powered on, the first control strategy is adopted, and the primary high-frequency oscillator OSC2 generates a high-frequency drive signal V CLK2 , select V through the primary digital logic module LOGIC2 P11 、V P22 , sent to the primary drive module DRV2 for processing, generating the final primary drive signal V with a certain dead time P1 、V P2 The primary full-bridge circuit starts working, and the excitation inductance L MP Energy storage is carried out and coupled to the secondary side through transformer T. The secondary side synchronous rectifier tube M N3 、M N4 At this time, it is not turned on, but the parasitic body diode is used to carry out the rectification, and the secondary output voltage V O rise; Detection output voltage V O Whether it reaches the first set value, at this time the output voltage should meet the working level of the secondary control circuit. If the output voltage V O When the first set value is reached, the second control strategy is adopted, and the first enabling signal V EN is high level, the control signals of the original secondary side bridge arm switch tubes are switched, and the second enable signal V NDC The first rising edge arrives as the secondary synchronous rectification start condition. The secondary control device generates four drive signals, two of which drive the secondary synchronous rectifier tubes, and the other two drive signals are transmitted to the primary side through two digital isolators. The second enable signal V NDC Control the operation of the primary full-bridge circuit, the second enable signal V NDC When it is 0, the secondary side controls the primary side to drive, and the output voltage of the switching power supply continues to rise; Detection output voltage V O Whether the second set value is reached, the output voltage should meet the working level of the secondary control circuit. If not, the first enable signal V EN Continue to be high level, the second enable signal V NDC Continue to be 0, the secondary side controls the primary side to drive, and the output voltage V O Continue to rise until the output voltage is greater than the second set value, the second enable signal V NDC is 1, the secondary side controls the primary side and does not drive, the output voltage V O The second enable signal V is generated by detecting whether the output voltage is greater than the second set value. NDCControlling whether the primary side is driven can stabilize the output voltage of the switching power supply between the third set value and the second set value; if the output voltage V O is less than the third set value, the third enable signal V SV3 The switch is high level, and the on and off time of the secondary power tube is controlled to achieve the phase shift of the driving signal of the bridge arm power tube corresponding to the primary side, so as to increase the load and make the output voltage V O When the output voltage rises to be greater than the second set value, the third control strategy is adopted.

[0064] The above are only preferred embodiments of the present invention. It should be noted that the above preferred embodiments should not be regarded as limitations of the present invention, and the protection scope of the present invention should be based on the scope defined by the claims. For ordinary technicians in this technical field, several improvements and modifications can be made without departing from the spirit and scope of the present invention, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A control method, applied to a switching power supply, wherein the switching power supply adopts a full-bridge converter topology, including a primary full-bridge circuit and a secondary full-bridge synchronous rectification circuit, wherein the switch tube on the first bridge arm and the switch tube on the second bridge arm in the primary full-bridge circuit are first diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are second diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm in the secondary full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, and the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; characterized in that The control method comprises: The first voltage signal V1 representing the output voltage of the switching power supply is obtained, and the second threshold V REF2 Compare and generate the first enable signal V EN ; The second voltage signal V2 representing the output voltage of the switching power supply is obtained, and the third threshold V REF3 Compare and generate the second enable signal V NDC , and also with the fourth threshold V REF4 Compare and generate a third enable signal V SV3 , V REF3 >V REF4 ; Determine the validity of each enable signal and adjust the control strategy of the switching power supply according to the validity of each enable signal: When V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, and V2≤V REF4 When the third enable signal V SV3 Valid, otherwise invalid; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the primary side control device generates the primary side drive; the secondary side control device does not generate the secondary side drive, and the secondary side of the switching power supply relies on diode rectification; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3 Invalid, the second control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectifier, and the primary side control device is controlled by the secondary side control device to generate the primary side drive, and there is no phase shift between the primary side drive and the secondary side drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and at the same time, the primary side control device is controlled by the secondary side control device not to generate the primary side drive; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and at the same time, the primary side control device is controlled by the secondary side control device to generate the primary side drive, and the primary side drive and the secondary side drive are phase-shifted.

2. The control method according to claim 1, characterized in that: The first voltage signal is the second threshold V REF2 The input voltage of the switching power supply is recorded as the first set value, and the second voltage signal is the third threshold value V REF3 The input voltage of the switching power supply is recorded as the second set value, and the second voltage signal is the fourth threshold value V REF4 The input voltage of the switching power supply is recorded as the third set value, the first set value is the nominal value of the output voltage of the switching power supply multiplied by 75%, the second set value is the nominal value of the output voltage of the switching power supply, and the third set value is the nominal value of the output voltage of the switching power supply multiplied by 90%.

3. The control method according to claim 1, characterized in that: In the fourth control strategy, the phase shift angles of the primary drive and the secondary drive are fixed through time compensation.

4. The control method according to claim 1, characterized in that: First time in V1>V REF1 Afterwards, the first voltage signal is switched to a voltage which is equal to the first threshold value V REF1 Compare and generate the first enable signal V EN , V REF1 <V REF2 .

5. A secondary side control device, applied to a switching power supply, the switching power supply adopts a full-bridge converter topology, including a primary side full-bridge circuit and a secondary side full-bridge synchronous rectification circuit, wherein the switch tube on the first bridge arm and the switch tube on the second bridge arm in the primary side full-bridge circuit are first diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are second diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm in the secondary side full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; characterized in that The secondary side control device comprises: The first output voltage detection module is used to obtain a first voltage signal V1 representing the output voltage of the switching power supply and a second threshold V REF2 Compare and generate the first enable signal V EN ; The second output voltage detection module is used to obtain a second voltage signal V2 representing the output voltage of the switching power supply and compare it with the third threshold value V REF3 Compare and generate the second enable signal V NDC , and also with the fourth threshold V REF4 Compare and generate a third enable signal V SV3 , V REF3 >V REF4 ; The first execution module is used to determine the validity of each enable signal and adjust the control strategy of the switching power supply together with the primary control device according to the validity of each enable signal: When V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, and V2≤V REF4 When the third enable signal V SV3 Valid, otherwise invalid; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the secondary side control device does not generate secondary side drive, and the secondary side of the switching power supply relies on diode rectification; at this time, the primary side drive can be generated by the primary side control device; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3 Invalid, the second control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectifier, and the primary side control device is controlled by the secondary side control device to generate the primary side drive, and there is no phase shift between the primary side drive and the secondary side drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and at the same time, the primary side control device is controlled by the secondary side control device not to generate the primary side drive; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and at the same time, the primary side control device is controlled by the secondary side control device to generate the primary side drive, and the primary side drive and the secondary side drive are phase-shifted.

6. The secondary side control device according to claim 5, characterized in that: The first output voltage detection module includes a resistor R3, a resistor R4, a switch ∅1, a switch ∅2, an inverter INV0, an inverter INV1, an inverter INV2, and a first threshold voltage V REF1 The first reference voltage source generates a second threshold value V REF2 The second reference voltage source and the comparator AMP1; the positive electrode of the resistor R3 is used to connect the output end of the switching power supply, and the negative electrode of the resistor R3 is simultaneously connected to the positive electrode of the resistor R4 and the positive input end of the comparator AMP1; the positive end of the first reference voltage source is connected to the negative end of the switch ∅1, the positive end of the second reference voltage source is connected to the negative end of the switch ∅2, the positive end of the switch ∅1 and the positive end of the switch ∅2 are simultaneously connected to the negative end of the comparator AMP1; the output end of the comparator AMP1 is simultaneously connected to the control end of the switch ∅1, the input end of the inverter INV0 and the input end of the inverter INV1; the output end of the inverter INV1 is connected to the control end of the switch ∅2; the output end of the inverter INV0 is connected to the input end of the inverter INV2; the output end of the inverter INV2 outputs the first enable signal V EN ; The negative electrode of the resistor R4, the negative electrode of the first reference voltage source and the negative electrode of the second reference voltage source are used to connect to GND.

7. The secondary side control device according to claim 5, characterized in that: The second output voltage detection module includes a resistor R5, a resistor R6, a resistor R7, a data selector MUX1, a comparator AMP2, a comparator AMP3 and a logic control unit, wherein the logic control unit includes an inverter INV3, an inverter INV4, an inverter INV5 and an inverter INV6; the positive electrode of the resistor R5 is used to connect to the output end of the switching power supply, the negative electrode of the resistor R5 is simultaneously connected to the positive electrode of the resistor R6 and the 0 input end of the data selector MUX1, the negative electrode of the resistor R6 is simultaneously connected to the positive electrode of the resistor R7 and the 1 input end of the data selector MUX1, and the negative electrode of the resistor R7 is used to connect to GND; the output end of the data selector MUX1 is simultaneously connected to the positive input end of the comparator AMP2 and the positive input end of the comparator AMP3, the negative input end of the comparator AMP2 is used to input the third threshold VREF3, and the negative input end of the comparator AMP3 is used to input the fourth threshold VREF4; The output end of the comparator AMP2 is connected to the input end of the inverter INV3, and the output end of the inverter INV3 is connected to the input end of the inverter INV4; the output end of the inverter INV4 outputs the second enable signal V NDC The output of the comparator AMP3 is connected to the input of the inverter INV5, and the output of the inverter INV5 is connected to the input of the inverter INV6; the output of the inverter INV6 outputs the third enable signal V SV3 .

8. The secondary side control device according to claim 5, characterized in that: The first execution module includes: High frequency oscillator OSC1 is used to generate a high frequency drive signal V CLK1 , which includes two high-frequency driving signals with the same frequency and complementary to each other; The first digital logic module LOGIC1 is used to determine the validity of each enable signal and execute a corresponding control strategy according to the validity of each enable signal to generate an initial signal for a secondary side drive and an initial signal for a primary side drive; The secondary side driving module is used for amplifying the initial signal of the secondary side driving and then outputting it.

9. The secondary side control device according to claim 8, characterized in that: The first digital logic module includes a D flip-flop DFF1, a D flip-flop DFF2, an AND gate AND1, an AND gate AND2, an AND gate AND3, an inverter INV7, an inverter INV8, an inverter INV9, an inverter INV10, an inverter INV11, an inverter INV12, an inverter INV13, an inverter INV14, an inverter INV15 and a phase shift digital logic module; the D end of the D flip-flop DFF1 is used to input a power supply voltage, and the CLK end is used to input a first enable signal V EN The D terminal of the D flip-flop DFF2 is used to input the power supply voltage, and the Q terminal is connected to the second input terminal of the phase-shift digital logic module; the input terminal of the inverter INV7 and the CLK terminal of the D flip-flop DFF2 simultaneously input the second enable signal V NDC The output of the inverter INV7 is connected to the second input of the AND gate AND1; the output of the AND gate AND1 is simultaneously connected to the second input of the AND gate AND2 and the first input of the AND gate AND3, and the first input of the AND gate AND2 is used to input the high-frequency drive signal V CLK1 The first signal in the AND gate AND3 is used to input the high-frequency drive signal V CLK1 The second signal in the phase shift digital logic module; the output end of the AND gate AND2 is connected to the input end of the inverter INV8, the output end of the inverter INV8 is connected to the input end of the inverter INV9, the output end of the inverter INV9 is connected to the input end of the inverter INV12, the output end of the inverter INV12 is connected to the input end of the inverter 13, and the output end of the inverter 13 is connected to the first input end of the phase shift digital logic module; the output end of the AND gate AND3 is connected to the input end of the inverter INV10, the output end of the inverter INV10 is connected to the input end of the inverter INV11, the output end of the inverter INV11 is connected to the input end of the inverter INV14, the output end of the inverter INV14 is connected to the input end of the inverter 15, the output end of the inverter 15 is connected to the third input end of the phase shift digital logic module, the first output end of the phase shift digital logic module outputs the first signal of the initial signal driven by the secondary side, and the second output end of the phase shift digital logic module outputs the second signal of the initial signal driven by the secondary side.

10. The secondary side control device according to claim 9, characterized in that: The first digital logic module further includes AND gates AND3, AND gates AND4, AND gates AND5 and AND gates AND6; the first input end of the AND gate AND3 and the input end of the AND gate AND5 are used to input the first enable signal V EN The second input end of the AND gate AND3 is connected to the output end of the AND gate AND2, the second input end of the AND gate AND5 is connected to the output end of the AND gate AND3, the output end of the AND gate AND3 is connected to the first input end of the AND gate AND4, the output end of the AND gate AND5 is connected to the first input end of the AND gate AND6, the second input end of the AND gate AND4 and the second input end of the AND gate AND6 are simultaneously connected to the output end of the AND gate AND1, the output end of the AND gate AND4 outputs the first path initial signal of the primary side drive, and the output end of the AND gate AND6 outputs the second path initial signal of the primary side drive.

11. A primary side control device, applied to a switching power supply, the switching power supply adopts a full-bridge converter topology, including a primary side full-bridge circuit and a secondary side full-bridge synchronous rectification circuit, wherein the switch tube on the first bridge arm and the switch tube on the second bridge arm in the primary side full-bridge circuit are first diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are second diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm in the secondary side full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; characterized in that The primary side control device comprises: The second execution module is used to adjust the control strategy of the switching power supply together with the secondary side control device: When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the first control strategy is adopted: the primary side control device generates the primary side drive; at this time, the secondary side control device does not generate the secondary side drive, and the secondary side of the switching power supply relies on diode rectification; When the first enable signal V EN and the second enable signal V NDC Valid, the third enable signal V SV3 Invalid, the second control strategy is adopted: the secondary control device controls the primary control device to generate the primary drive; at this time, the secondary control device also generates the secondary drive, the secondary side of the switching power supply is a full-bridge synchronous rectification, and there is no phase shift between the primary drive and the secondary drive; When the first enable signal V EN Valid, the second enable signal V NDC and the third enable signal V SV3 All are invalid, and the third control strategy is adopted: the secondary side control device controls the primary side control device to not generate primary side drive; at this time, the secondary side control device generates secondary side drive, and the secondary side of the switching power supply is full-bridge synchronous rectification; When the first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 All are effective, and the fourth control strategy is adopted: the secondary side control device controls the primary side control device to generate the primary side drive; at this time, the secondary side control device also generates the secondary side drive, the secondary side of the switching power supply is a full-bridge synchronous rectification circuit, and the primary side drive and the secondary side drive are phase-shifted; in: The first enable signal V EN The secondary side control device obtains a first voltage signal V1 representing the output voltage of the switching power supply and compares it with the second threshold value V REF2 Obtained by comparison; The second enable signal V NDC The secondary side control device obtains a second voltage signal V2 representing the output voltage of the switching power supply and compares it with the third threshold value V REF3 Obtained by comparison; The third enable signal V SV3 The secondary side control device obtains a second voltage signal representing the output voltage of the switching power supply and compares it with the fourth threshold value V REF4 Obtained by comparison; The first enable signal V EN , the second enable signal V NDC and the third enable signal V SV3 The effectiveness is determined by the secondary control device: when V1≤V REF2 When the first enable signal V EN Invalid, otherwise valid; when the first enable signal V EN Valid and V2≤V REF3 The second enable signal V NDC Valid, otherwise invalid; when V2>V REF3 After that, the second voltage signal ≤ V REF4 When the third enable signal V SV3 Valid, otherwise invalid.

12. The primary side control device according to claim 11, characterized in that: The second execution module includes: High frequency oscillator OSC2 is used to generate a high frequency drive signal V CLK2 ; The second digital logic module LOGIC2 is used to receive the high-frequency driving signal V CLK2 and a first initial signal of the primary side drive, and generate a second initial signal of the primary side drive after logical processing, wherein the first initial signal of the primary side drive is generated by the secondary side control device according to the corresponding control strategy and obtained after isolation processing; The primary side driving module DRV2 is used for amplifying the second initial signal of the primary side driving and then outputting it.

13. The primary side control device according to claim 12, characterized in that: The second digital logic module LOGIC2 includes a data selector MUX2, a data selector MUX3, a D flip-flop DFF3 and a D flip-flop DFF4; the input 1 end of the data selector MUX2 and the CLK end of the D flip-flop DFF3 both input the first signal in the first initial signal of the primary side drive, the input 1 end of the data selector MUX3 and the CLK end of the D flip-flop DFF4 both input the second signal in the first initial signal of the primary side drive, the D end of the D flip-flop DFF3 and the D end of the D flip-flop DFF4 are used to input a power supply voltage, the Q end of the D flip-flop DFF3 is connected to the input 0 end of the data selector MUX3, the Q end of the D flip-flop DFF4 is connected to the input 0 end of the data selector MUX2, the output end of the data selector MUX2 is the first output end of the digital logic module LOGIC2, and the output end of the data selector MUX3 is the second output end of the digital logic module LOGIC2.

14. A switching power supply, which adopts a full-bridge converter topology, including a primary full-bridge circuit and a secondary full-bridge synchronous rectification circuit, wherein the switch tube on the first bridge arm and the switch tube on the second bridge arm in the primary full-bridge circuit are first diagonal switch tubes with consistent drive signals, the switch tube on the first bridge arm and the switch tube on the second bridge arm are second diagonal switch tubes with consistent drive signals, and the switch tube on the first bridge arm and the switch tube on the second bridge arm in the secondary full-bridge synchronous rectification circuit are third diagonal switch tubes with consistent drive signals, and the switch tube on the first bridge arm and the switch tube on the second bridge arm are fourth diagonal switch tubes with consistent drive signals, the drive signal of the first diagonal switch tube is complementary to the drive signal of the second diagonal switch tube and there is a dead time in between, and the drive signal of the third diagonal switch tube is complementary to the drive signal of the fourth diagonal switch tube and there is a dead time in between; characterized in that The switching power supply comprises the secondary side control device according to any one of claims 5 to 10, a digital isolator and the primary side control device according to any one of claims 11 to 13.

15. The switching power supply according to claim 14, characterized in that: The switch tube on the first bridge arm in the primary full-bridge circuit, the switch tube on the second bridge arm in the primary full-bridge circuit, the switch on the first bridge arm in the secondary full-bridge synchronous rectification circuit, and the switch on the second bridge arm in the secondary full-bridge synchronous rectification circuit are all self-driven PMOS; the switch tube on the first bridge arm in the primary full-bridge circuit, the switch tube on the second bridge arm in the primary full-bridge circuit, the switch on the first bridge arm in the secondary full-bridge synchronous rectification circuit, and the switch on the second bridge arm in the secondary full-bridge synchronous rectification circuit are all externally driven NMOS.

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