A Dual-Transformer-Structure DAB Converter and a Single-Transistor Fault-Tolerant Method

Abstract

The present application provides a dual-transformer structure DAB converter, comprising: an input-side bridge arm group, a transformer group and an output-side bridge arm group. By adding an auxiliary switch in the input-side bridge arm group, fault-tolerant operation of all switches is achieved when a fault occurs, significantly improving the reliability of the system. The single-switch fault-tolerant method implemented by the dual-transformer structure DAB converter has a smaller inductive current stress in the fault-tolerant mode, avoiding additional conduction losses caused by excessive current stress and reducing further damage to semiconductor switches at the same time.

Description

Technical Field

[0001] The present application relates to the technical field of power systems, and particularly to a dual-transformer structure DAB converter and a single-switch fault tolerance method. Background Art

[0002] With the rapid development of renewable energy and electric vehicle systems, the importance of DC distribution systems in power transmission has been increasing continuously. The dual active bridge (DAB) converter has become one of the most promising solutions due to its high power density, excellent transmission efficiency, and wide soft-switching range. In a DAB converter, the dual-transformer structure can not only achieve a wider zero-voltage switching (ZVS) range but also effectively reduce the filter size. The reliability of the DAB converter is crucial for DC power transmission systems, especially during faults. Common fault types include short-circuit faults and open-circuit faults. Among them, open-circuit faults will lead to an increase in current stress and DC bias current, thereby reducing system efficiency and damaging other components. Therefore, the open-circuit fault tolerance control of the converter power switch is the key to ensuring the reliable operation of the system.

[0003] Currently, traditional fault tolerance methods, such as module redundancy, although can effectively cope with faults, will significantly increase the hardware cost and are not applicable to DAB converters. In recent years, fault tolerance methods for DAB converters have been continuously developed. Among them, the "primary side reduces power and secondary side bypass method" has become the mainstream solution. This method restores the symmetric operation of the circuit by removing the faulty switch arm, but can only ensure that the converter transmits part of the power. Another method is to add a neutral line. By improving the control strategy and circuit design, the power transmission capacity in the fault tolerance mode can be enhanced, and multiple fault conditions can be handled. However, this method is only applicable to DAB converters with a symmetric structure. For a dual-transformer structure, adding a neutral line will introduce an additional neutral line current. Summary of the Invention

[0004] In order to overcome the above technical defects, the present application provides a dual-transformer structure DAB converter and a single-switch fault tolerance method. To achieve the above object, the present application is implemented according to the following technical solutions:

[0005] In a first aspect, the present application provides a dual-transformer structure DAB converter, including: an input-side bridge arm group, a transformer group, and an output-side bridge arm group;

[0006] The input-side bridge arm group includes an input capacitor bridge arm, a main power bridge arm, and a secondary power bridge arm. The positive and negative poles of the input voltage V1 are respectively connected to both ends of the input capacitor bridge arm and the secondary power bridge arm in sequence. Among them, the input capacitor bridge arm includes series-connected input split filter capacitors C 1 and input split filter capacitor C 2, the C negative pole ofC The node formed by connecting the positive electrode of 2 is C, and the main power bridge arm includes series-connected MOSFETs S 7 and S 6， and MOSFETs connected in parallel across S both ends of 7 S 5， S the source electrode of 5, S the source electrode of 6 and S the source electrode of 7 are connected, and S 5, S 6 and S 7 all contain anti-parallel diodes, S the drain electrode of 6 is connected to C the negative electrode of 1 and C the positive electrode connection of 2. The auxiliary power bridge arm includes series-connected MOSFETs S 1 and S 2, series-connected MOSFETs S 3 and S 4, and S 1, S 2, S 3 and S 4 all contain anti-parallel diodes, S the source electrode of 1, S the drain electrode of 2 and S the drain electrode of 7 are connected to form the node A, S the source electrode of 3, S the drain electrode of 4 and S the drain electrode of 5 are connected to form the node B;

[0007] The transformer bank includes a main power transformer , an auxiliary power transformer , an AC inductor and a DC-blocking capacitor , The negative electrode of the primary side is connected to one end of the DC-blocking capacitor , and the other end of the DC-blocking capacitor is connected to the node B, the positive electrode of the primary side and the positive electrode of the primary side are respectively connected to the node A, the negative electrode of the primary side is connected to the node C, the positive electrode of the secondary side is connected to one end of the AC inductor , the negative electrode of the secondary side and the positive electrode of the secondary side are connected;

[0008] The output-side bridge arm group includes two series-connected MOSFETs Q 1 and Q 2, two series-connected split filter capacitorsC 3 and C 4, and Q 1 and Q 2 both contain anti - parallel diodes, Q The source electrode of 1 and Q The drain electrode of 2 are connected to form a node F, and the node F is connected to the other end of the AC inductor L k ; C The negative electrode of 3 and C The positive electrode of 4 are connected to form a node G, and the node G is connected to T r2 The negative electrode of the secondary side. The positive electrode of V2 is respectively connected to Q The drain electrode of 1 and C The positive electrode of 3. V2 is respectively connected to Q The source electrode of 2 and C The negative electrode of 4.

[0009] Optionally, in the input - side bridge arm, the positive electrode of the input voltage V1 is respectively connected to the C positive electrode of 1, S the drain electrode of 1 and S the drain electrode of 3. The negative electrode of the input voltage V1 is respectively connected to the C negative electrode of 2, S the source electrode of 2 and S the source electrode of 4.

[0010] In a second aspect, the present application provides a single - tube fault - tolerant method for a dual - transformer - structure DAB converter. Using the dual - transformer - structure DAB converter as described in the first aspect, it is characterized in that, in the case of a fault, the fault modes of the dual - transformer structure include a first fault - tolerant mode:

[0011] In the first fault - tolerant mode: When the switch S 6 or S 5 has an open - circuit fault, disable the gate signals of the auxiliary - bridge - arm switching tubes S 5 and S 7 or the gate signals of the switching tubes S 6 and S 7, and control the switching tubes S 1~ S 4 and Q 1, Q 2 to achieve the power transmission of the converter;

[0012] In the first fault - tolerant mode, the inductor - current expression of the converter is:

[0013] ,

[0014] In the formula ， is the leakage inductance current in the first fault-tolerant mode, is the input voltage, is the output voltage, is the transformer turns ratio, is the transformer turns ratio, is the AC inductor;

[0015] Based on the inductor current expression of the converter, the transmission power of the converter is determined as:

[0016] ,

[0017] wherein, is the output power of the converter in the first fault-tolerant mode, are the secondary side series voltages of two transformers and , and are the duty cycles corresponding to the conduction time respectively, , , .

[0018] Optionally, the fault mode of the dual-transformer structure further includes a second fault-tolerant mode:

[0019] In the second fault-tolerant mode: When switch S 1 or S 2 has an open-circuit fault, disable the gate signals of switch transistors S 2 and S 5 or S 1 and S 5, operate switch transistors S 6, S 7 to realize the utilization of the anti-parallel diodes of switch S 1, S 2, and realize the power transmission control of the converter by controlling switch transistors S 3, S 4 and Q 1, Q 2, and realize the power transmission of the converter by controlling switch transistors S 1~ S 4 and Q 1, Q 2;

[0020] In the second fault-tolerant mode, the current inductor expression of the converter is:

[0021] ,

[0022] wherein, is the leakage inductance current in the second fault-tolerant mode;

[0023] Based on the inductor current expression of the converter, determine the transmission power of the converter as:

[0024] ,

[0025] wherein, is the transmission power of the converter in the second fault-tolerant mode.

[0026] Optionally, the fault mode of the dual-transformer structure further includes a third fault-tolerant mode:

[0027] In the third fault-tolerant mode, when switch S 3 or S 4 has an open-circuit fault, disable the gate signals of switch transistors S 4 and S 5 or the gate signals of switch transistors S 3 and S 5; the conduction path of the inductor current is switched to S 1, S 2, S 6 and S 7, and only use transformer T r2 to transmit power;

[0028] In the third fault-tolerant mode, the inductor current expression of the converter is:

[0029] ,

[0030] wherein, is the leakage inductance current in the third fault-tolerant mode;

[0031] Based on the inductor current expression of the converter, determine the transmission power of the converter as:

[0032] ,

[0033] wherein, is the transmission power of the converter in the third fault-tolerant mode.

[0034] Optionally, the fault mode of the dual-transformer structure further includes a fourth fault-tolerant mode:

[0035] In the fourth fault-tolerant mode: if switch Q 1 or Q 2 has an open-circuit fault, disable the gate signals of the secondary side switch transistors Q 2 or Q 1, and through controlling the switch transistors S 1~ S6 Realize the unidirectional power transmission of the converter;

[0036] In the fourth fault-tolerant mode, the inductor current expression of the converter is:

[0037] ,

[0038] In the formula, is the leakage inductance current in the fourth fault-tolerant mode;

[0039] Based on the inductor current expression of the converter, determine the transmission power of the converter as:

[0040] ,

[0041] In the formula, is the transmission power of the converter in the fourth fault-tolerant mode.

[0042] The present application has the following beneficial effects:

[0043] The proposed fault-tolerant dual-transformer structure DAB topology in the present application realizes the fault-tolerant operation of all switches when a fault occurs by adding an auxiliary switch, significantly improving the reliability of the system. In different fault-tolerant modes, the inductor current stress is small, avoiding the additional conduction loss caused by excessive current stress, and at the same time reducing the further damage to the semiconductor switch. During the mode conversion process, there is no large impact on the inductor current, ensuring a smooth switching process. Avoiding the influence of transient impact on the system performance, thus showing good dynamic performance.

[0044] In addition to the purposes, features and advantages described above, the present application has other purposes, features and advantages. The following will refer to the accompanying drawings to make a further detailed description of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The accompanying drawings constituting a part of the present application are used to provide a further understanding of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation to the present application. In the drawings:

[0046] Figure 1 is a schematic diagram of the structure of a dual-transformer structure DAB converter provided by an embodiment of the present application;

[0047] Figure 2 is a waveform schematic diagram of a dual-transformer structure DAB converter provided by an embodiment of the present application in the normal operating mode;

[0048] Figure 3 is a dual-transformer structure DAB converter provided by an embodiment of the present application, Figure 3When the dual-transformer structure DAB converter is in the first fault-tolerant mode, the switch S 6 has an open-circuit fault, and the equivalent circuit diagram is as follows. Figure 3 Figure (b) is a waveform diagram of the dual-transformer structure DAB converter when it is in the first fault-tolerant mode.

[0049] Figure 4 This is a dual-transformer structure DAB converter provided by an embodiment of the present application. Figure 4 Figure (a) shows the equivalent circuit diagram of the dual-transformer structure DAB converter when the switch S 1 has an open-circuit fault in the second fault-tolerant mode. Figure 4 Figure (b) is a waveform diagram of the dual-transformer structure DAB converter when it is in the second fault-tolerant mode.

[0050] Figure 5 This is a dual-transformer structure DAB converter provided by an embodiment of the present application. Figure 5 Figure (a) shows the equivalent circuit diagram of the dual-transformer structure DAB converter when the switch S 3 has an open-circuit fault in the third fault-tolerant mode. Figure 5 Figure (b) is a waveform diagram of the dual-transformer structure DAB converter when it is in the third fault-tolerant mode.

[0051] Figure 6 This is a dual-transformer structure DAB converter provided by an embodiment of the present application. Figure 6 Figure (a) shows the equivalent circuit diagram of the dual-transformer structure DAB converter when the switch Q 1 has an open-circuit fault in the fourth fault-tolerant mode. Figure 6 Figure (b) is a waveform diagram of the dual-transformer structure DAB converter when it is in the fourth fault-tolerant mode.

[0052] Figure 7 This is the experimental simulation diagram provided by an embodiment of the present application. Figure 7 Figure (a) shows the experimental waveform of the output voltage S 2 when the switch V 6 has an open-circuit fault and then switches to the first fault-tolerant mode during experimental simulation. Figure 7 Figure (b) shows the experimental waveforms of the series voltage of the secondary sides of the two transformers S and the full-bridge voltage of the secondary side when the switch 6 has an open-circuit fault and then switches to the first fault-tolerant mode during experimental simulation. Figure 7 Figure (c) shows the experimental waveform of the inductor current S when the switch 6 has an open-circuit fault and then switches to the first fault-tolerant mode during experimental simulation. Detailed implementation manners

[0053] The embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, the present application can be implemented in many different ways defined and covered by the claims.

[0054] To solve the problems raised in the background art, as Figure 1 shown, the present application proposes a dual-transformer structure DAB converter, including: an input-side bridge arm group, a transformer group, and an output-side bridge arm group; the input-side bridge arm group includes an input capacitor bridge arm, a main power bridge arm, and a secondary power bridge arm. The positive and negative poles of the input voltage V1 are sequentially connected to both ends of the input capacitor bridge arm and the secondary power bridge arm. Among them, the input capacitor bridge arm includes series-connected input split filter capacitors C 1 and input split filter capacitor C 2. The node formed by connecting the negative pole of C 1 and the positive pole of C 2 is C. The main power bridge arm includes series-connected MOSFETs S 7 and S 6， and MOSFET S 7 is connected in parallel at both ends. The source electrodes of S 5， S 5, S 6, and S 7 are connected. And S 5, S 6, and S 7 include anti-parallel diodes. The drain electrode of S 6 is connected to the connection point of the negative pole of C 1 and the positive pole of C 2. The secondary power bridge arm includes series-connected MOSFETs S 1 and S 2, series-connected MOSFETs S 3 and S 4. And S 1, S 2, S 3, and S 4 all include anti-parallel diodes. The node formed by connecting the source electrode of S 1, the drain electrode of S 2, and the drain electrode of S 7 is A. The node formed by connecting the source electrode of S 3, the drain electrode of S 4, and the drain electrode of S 5 is B;

[0055] The transformer group includes a main power transformer , a secondary power transformer , an AC inductor and the DC-blocking capacitor , The negative terminal of the primary side is connected to one end of the DC-blocking capacitor , and the other end of the DC-blocking capacitor is connected to node B. The positive terminal of the primary side and the positive terminal of the primary side are respectively connected to node A. The negative terminal of the primary side is connected to node C. The positive terminal of the secondary side is connected to one end of the AC inductor . The negative terminal of the secondary side and the positive terminal of the secondary side are connected.

[0056] The output side bridge arm group includes two series-connected MOSFETs Q 1 and Q 2, and two series-connected split filter capacitors C 3 and C 4. Q The source electrode of 1 and Q the drain electrode of 2 are connected to form node F, and node F is connected to the other end of the AC inductor . C The negative electrode of 3 and C the positive electrode of 4 are connected to form node G, and node G is connected to the negative terminal of the secondary side. The positive electrode of V2 is respectively connected to Q the drain electrode of 1 and C the positive electrode of 3. V2 is respectively connected to Q the source electrode of 2 and C the negative electrode of 4.

[0057] Among them, in the input side bridge arm, the positive electrode of the input voltage V1 is respectively connected to the C positive electrode of 1, S the drain electrode of 1, and S the drain electrode of 3. The negative electrode of the input voltage V1 is respectively connected to the C negative electrode of 2, S the source electrode of 2, and S the source electrode of 4.

[0058] Briefly summarize the topological structure of Figure 1 : C 1, C 2 are the input split filter capacitors, C 3, C 4 are the output filter capacitors. V 1 and V 2 represent the voltage switching tubes on both sides of the converter S 1~ S 6 and Q 1~Q 2 constitutes the active switch branches on both sides, and the AC inductor represents the sum of the transformer leakage inductance reflected to the secondary side and the external AC inductor. is the DC-blocking capacitor. The two sides are connected by a dual-transformer structure with the primary side in parallel and the secondary side in series. and are connected, and their turns ratios are respectively , , where are respectively and the number of turns on the primary side and the secondary side. The positive direction of current flow is marked in Figure 1 .

[0059] Based on Figure 1 a dual-transformer structure DAB converter shown, this application also proposes a single-switch fault-tolerant method for a dual-transformer structure DAB converter.

[0060] In addition, before specific analysis, the following assumptions are made:

[0061] 1) All switches, inductors, capacitors, and transformers are ideal.

[0062] 2) The filter capacitor is large enough so that the input voltage and the output voltage are considered constant.

[0063] 3) The influence of dead time can be ignored.

[0064] As Figure 2 shown, at this time, the key waveforms of the DAB converter in the normal operating mode are shown in this figure. In this figure, T s represents the switching period, T 1 represents the common conduction time of switches S 1, S 4, and S 5, T 2 represents the common conduction time of switches S 1, S 5, and S 6, represents the phase-shift time between switches S 1 and Q 1, D 1, D 2, and are the duty cycles corresponding to the conduction times respectively. is the series voltage of the secondary sides of the two transformers, is the voltage generated by the secondary full-bridge. is the leakage inductance current.

[0065] Under normal conditions, the converter switch S 7 is turned off, and the power transmission of the converter is achieved by controlling switches S 1~ S 6 and Q 1~ Q 2. It can be analyzed Figure 2 that the inductor current expression of the converter is:

[0066] (1)

[0067] Subsequently, based on the inductor current expression of the converter, as well as the waveform symmetry and the characteristic that the steady-state average value is zero, the transmission power of the converter under normal operating conditions is obtained as:

[0068] (2)

[0069] Among them, , , .

[0070] Under fault conditions, four fault-tolerant modes are proposed:

[0071] The first fault-tolerant mode A. For example, when switch S 6 or S 5 has an open-circuit fault, the gate signals of the auxiliary leg switches S 5 and S 7 or the gate signals of switches S 6 and S 7 are disabled, and switches S 1~ S 4 and Q 1, Q 2 are controlled to achieve the power transmission of the converter; as shown in Figure 3 (a), when S6 fails, the gate signals of the auxiliary leg switches S 5 and S 7 are disabled. In this mode, as shown in Figure 3 (b), the power transmission of the converter is achieved by controlling switches S 1~ S 4 and Q 1, Q 2.

[0072] Based on Figure 3 (a) and Figure 3 (b), the inductor current expression of the converter in the first fault-tolerant mode is:

[0073] (3)

[0074] In the formula ， is the leakage inductance current in the first fault-tolerant mode, is the input voltage, is the output voltage, is the transformer turns ratio, is the transformer turns ratio, is the AC inductor;

[0075] Based on the expression of the converter inductor current and its waveform symmetry and the characteristic that the steady-state average value is zero, the transmission power of the converter is determined as:

[0076] (4)

[0077] In the formula, is the output power of the converter in the first fault-tolerant mode, are two transformers and secondary side series voltage.

[0078] It should be noted that when switch S 5 has an open-circuit fault, the corresponding converter inductor current expression and converter transmission power expression are the same as those when switch S 5 has an open-circuit fault.

[0079] The second fault-tolerant mode B, for example, when switch S 1 or S 2 has an open-circuit fault, disable the gate signals of switch transistors S 2 and S 5 or S 1 and S 5, operate switch transistors S 6, S 7 to realize the utilization of the anti-parallel diodes of switch S 1, S 2, and realize the power transmission of the converter by controlling switch transistors S 3, S 4 and Q 1, Q 2; and switch transistors S 1~ S 4 and Q 1, Q 2 realize the power transmission of the converter; as shown in Figure 4 (a), after the open-circuit fault of S 1 occurs, disable the gate signals of switch transistors S 2 and S 5, as shown in Figure 4As shown in (b), by operating the switching tubes S 6, S 7 to achieve the utilization of the antiparallel diodes of the switches S 1, S 2, and through controlling the switching tubes S 3, S 4 and Q 1, Q 2 to achieve the power transmission of the converter.

[0080] Based on Figure 4 (a) and Figure 4 (b), in the second fault-tolerant mode, the inductor current expression of the converter is obtained as:

[0081] (5)

[0082] In the formula, is the leakage inductance current in the second fault-tolerant mode;

[0083] Furthermore, based on the inductor current expression of the converter and the characteristics of its waveform symmetry and zero steady-state average value, the transmission power of the converter in the second fault-tolerant mode B is obtained as:

[0084] (6)

[0085] In the formula, is the transmission power of the converter in the second fault-tolerant mode.

[0086] It should be noted that when the switch S 2 has an open-circuit fault, the corresponding inductor current expression of the converter and the transmission power expression of the converter are the same as those when the switch S 1 has an open-circuit fault.

[0087] The third fault-tolerant mode C: After an open-circuit fault occurs, when the switch S 3 or S 4 has an open-circuit fault, disable the gate signals of the switching tubes S 4 and S 5 or the gate signals of the switches S 3 and S 5. In this mode, the conduction path of the inductor current is switched to S 1, S 2, S 6 and S 7, and only use the transformer to transmit power. As Figure 5 (a) shows, taking the switch STaking the open - circuit fault of switch 3 as an example for analysis, after the open - circuit fault occurs, the gate signal of switch 4 is disabled. S In this mode, as Figure 5 shown in (b), the conduction path of the inductor current is switched to S 1, S 2, S 6 and S 7, and only the transformer is used to transmit power, that is, by controlling switches S 1, S 2, S 6 and S 7 and Q 1~ Q 2 to work.

[0088] Based on Figure 5 (a) and Figure 5 (b), it is obtained that in the third fault - tolerant mode, the expression of the inductor current of the converter is:

[0089] (7)

[0090] In the formula, is the leakage - inductance current in the third fault - tolerant mode;

[0091] Based on the expression of the inductor current of the converter, as well as its waveform symmetry and the characteristic that the steady - state average value is zero, the transmission power of the converter is determined as:

[0092] (8)

[0093] In the formula, is the transmission power of the converter in the second fault - tolerant mode.

[0094] It should be noted that when switch S 4 has an open - circuit fault, the expression of the inductor current of the corresponding converter and the expression of the transmission power of the converter are the same as those when switch S 3 has an open - circuit fault, that is, their corresponding expressions of the inductor current of the converter and the transmission power of the converter are the same.

[0095] Fourth fault - tolerant mode D; if switch Q 1 or Q 2 has an open - circuit fault, the gate signal of the secondary - side switch Q or Q 1 is disabled, and the unidirectional power transmission of the converter is realized by controlling switches S 1~ S 6. When switch Q 1 has an open - circuit fault, its equivalent circuit diagram is as shown in Figure 6 (a). In this mode, asFigure 6 As shown in (b), by controlling the switching transistor S 1~ S 6, the unidirectional power transmission of the converter is realized.

[0096] Based on Figure 6 (a) and Figure 6 (b), in the fourth fault-tolerant mode, the inductor current expression of the converter is:

[0097] (9)

[0098] In the formula, is the transmission power of the converter in the fourth fault-tolerant mode.

[0099] Based on the inductor current expression of the converter, as well as the characteristics of its waveform symmetry and steady-state average value being zero, the transmission power of the converter is determined as:

[0100] (10)

[0101] In the formula, is the transmission power of the converter in the fourth fault-tolerant mode.

[0102] It should be noted that when switch Q 1 has an open-circuit fault, the corresponding inductor current expression of the converter and the transmission power expression of the converter are the same as those when switch Q 2 has an open-circuit fault.

[0103] Experimental simulation stage

[0104] Build the proposed fault-tolerant DAB converter topology in MATLAB / Simulink, and stop injecting the power device switching signal at a certain moment to simulate the open-circuit fault of the power device, so as to conduct the fault-tolerant simulation of the relevant fully controlled device open-circuit fault. The specific circuit simulation parameters are shown in Table 1.

[0105] Table 1 Main circuit simulation parameters

[0106] ,

[0107] Figure 7 (a)- Figure 7 (c) show the experimental waveforms after the open-circuit fault of switch S 6 and switching to fault-tolerant mode A. In Figure 7 (b), and respectively represent the series voltage of the secondary sides of the two transformers and the full-bridge voltage of the secondary side, and is the leakage inductance The current, is the secondary output voltage. In the normal operating mode, the converter power switch operates in the zero-voltage turn-on state. At approximately 0.01 seconds, the switch S 6 experiences an open-circuit fault, causing the circuit to operate asymmetrically, and further causing the output voltage to drop. At the same time, the inductor current appears with a DC bias. After the fault occurs, the converter switches to the fault-tolerant mode A, and the output voltage will gradually recover to the normal value, and the inductor current also gradually returns to the symmetric state. The recovery time is about 0.005 seconds. As can be seen from the figure, the converter still maintains the zero-voltage turn-on state in the fault-tolerant mode A. Although the inductor current stress is slightly increased compared to the normal mode, the output voltage and current remain stable. This shows that the proposed fault-tolerant DC converter topology and its fault-tolerant mode have good operating performance.

[0108] As described above, a proposed fault-tolerant dual-transformer structure DAB topology in this application realizes the fault-tolerant operation of all switches when a fault occurs by adding an auxiliary switch, significantly improving the reliability of the system. In different fault-tolerant modes, the inductor current stress is small, avoiding the additional conduction loss caused by excessive current stress, and at the same time reducing the further damage to the semiconductor switch. During the mode conversion process, the inductor current does not generate a large impact, ensuring a smooth switching process. Avoiding the influence of transient impact on the system performance, thus showing good dynamic performance.

[0109] The above are only the preferred embodiments of this application and are not used to limit this application. For those skilled in the art, this application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included within the protection scope of this application.

Claims

1. A dual-transformer DAB converter, characterized in that: include: Input side bridge arm group, transformer group and output side bridge arm group; The input side bridge arm group includes an input capacitor bridge arm, a main power bridge arm and an auxiliary power bridge arm, and the positive and negative electrodes of the input voltage V1 are connected to the two ends of the input capacitor bridge arm and the auxiliary power bridge arm in sequence, wherein the input capacitor bridge arm includes an input split filter capacitor connected in series C 1 and input split filter capacitor C 2. C 1 negative electrode and C 2 is connected to form a node C, and the main power bridge arm includes a MOSFET connected in series S 7 and S 6， And in parallel S 7 MOSFET across both ends S 5， S 5 source, S 6 source and S 7 sources are connected, and S 5. S 6 and S 7 contains an anti-parallel diode, S The drain of 6 is connected to C 1 negative electrode and C 2, the secondary power bridge arm includes a MOSFET in series S 1 and S 2. MOSFETs in series S 3 and S 4, and S 1. S 2. S 3 and S 4 all contain anti-parallel diodes. S 1 source, S 2 drain and S The node formed by connecting the drain of 7 is A. S 3 source, S 4 drain and S The node formed by connecting the drains of 5 is B; The transformer group includes the main power transformer , Auxiliary power transformer , AC inductance and DC blocking capacitors , Primary negative electrode and DC blocking capacitor One end of the capacitor is connected to the The other end of is connected to node B. Primary positive and The positive pole of the primary side is connected to node A respectively. The primary negative electrode is connected to node C. Secondary positive pole and AC inductor One end is connected to The secondary negative electrode and The secondary side positive pole is connected; The output side bridge arm group includes two MOSFETs connected in series Q 1 and Q 2. Two split filter capacitors in series C 3 and C 4, and Q 1 and Q 2 both contain anti-parallel diodes. Q 1 source and Q The node formed by connecting the drain of 2 is F, and the node F and the AC inductor L k The other end is connected to C 3 negative electrode and C 4 The positive poles are connected to form a node called G. T r2 The negative pole of the secondary side is connected to the positive pole of V2. Q 1 drain and C 3 positive pole connected, V2 and Q 2 source and C 4 Negative poles are connected.

2. The DAB converter according to claim 1, characterized in that: In the input side bridge arm, the positive electrode of the input voltage V1 is connected to the split filter capacitor C 1 positive electrode, S 1 drain and S 3, the negative electrode of the input voltage V1, and the split filter capacitor C 2 negative electrode, S 2 source and S 4 are connected to the source.

3. A single-transistor fault-tolerant method for a dual-transformer DAB converter, using the dual-transformer DAB converter as claimed in claim 1, characterized in that: In the event of a fault, the fault mode of the dual transformer structure includes a first fault-tolerant mode; In the first fault-tolerant mode: switch S 6 or S 5. When an open circuit fault occurs, the auxiliary bridge arm switch is disabled. S 5 and S 7 gate signal or switch tube S 6 and S 7 gate signal, controls the switch tube S 1~ S 4 and Q 1. Q 2. Realize power transmission of converter; In the first fault-tolerant mode, the inductor current expression of the converter is: ， In the formula ， is the leakage inductance current in the first fault-tolerant mode, is the input voltage, is the output voltage, For transformer Turns ratio, For transformer Turns ratio, is the AC inductance; Based on the inductor current expression of the converter, the transmission power of the converter is determined as: ， In the formula, represents the switching cycle, is the output power of the converter in the first fault-tolerant mode, For two transformers and Secondary series voltage, as well as are the duty cycle corresponding to the on-time, , , .

4. The method according to claim 3, characterized in that The failure mode of the dual transformer structure also includes a second fault-tolerant mode: In the second fault-tolerant mode: switch S 1 or S 2 When an open circuit fault occurs, the switch is disabled. S 2 and S The gate signal of 5 or the gate signal of , operates the switch tube S 6. S 7 to realize the switch S 1. S 2. The use of anti-parallel diodes and the control of the switch tube S 3. S 4 and Q 1. Q 2. Realize the power transmission control switch tube and S 1~ S 4 and Q 1. Q 2. Realize power transmission of converter; In the second fault-tolerant mode, the inductor current expression of the converter is: ， In the formula, is the leakage inductance current in the second fault-tolerant mode; Based on the inductor current expression of the converter, the transmission power of the converter is determined as: ， In the formula, is the transmission power of the converter in the second fault-tolerant mode.

5. The method according to claim 3, characterized in that: The failure mode of the dual transformer structure also includes a third fault-tolerant mode: In the third fault-tolerant mode, the switch S 3 or S 4 When an open circuit fault occurs, the switch is disabled. S 4 and S 5 gate signal or switch tube S 3 and S 5 gate signal; the conduction path of the inductor current is switched to S 1. S 2. S 6 and S 7. Use only transformer Transmission power; In the third fault-tolerant mode, the inductor current expression of the converter is: ， In the formula, is the leakage inductance current in the third fault-tolerant mode; Based on the inductor current expression of the converter, the transmission power of the converter is determined as: ， In the formula, is the transmission power of the converter in the third fault-tolerant mode.

6. The method according to claim 3, characterized in that: The failure mode of the dual transformer structure also includes a fourth fault-tolerant mode: In the fourth fault-tolerant mode: if the switch Q 1 or Q 2 When an open circuit fault occurs, the secondary switch is disabled. Q or Q 1 gate signal, through the control switch S 1~ S 6. Realize unidirectional power transmission of the converter; In the fourth fault-tolerant mode, the inductor current expression of the converter is: ， In the formula, is the leakage inductance current in the fourth fault-tolerant mode; Based on the inductor current expression of the converter, the transmission power of the converter is determined as: ， In the formula, is the transmission power of the converter in the fourth fault-tolerant mode.

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