High-voltage frequency converter optical fiber and main control redundant fault-tolerant control method and system thereof

By adopting redundant ring network structure and fault-tolerant control methods in the fiber communication system of high-voltage inverter, the problems of system complexity and fault sensitivity are solved, efficient failure removal and system recovery are achieved, control performance and reliability are improved, and operation and maintenance costs are reduced.

CN119853526BActive Publication Date: 2025-06-24HOPE SENLAN SCI & TECH HLDG CORP LTD +1
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Patent Information

Application Number
CN202510345886.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-03-24
Publication Date
2025-06-24
Estimated Expiration
2045-03-24

AI Technical Summary

Technical Problem

The fiber optic communication system of existing high-voltage inverters is complex and has many fault points, which makes the system easy to shut down when the fault occurs, affecting normal use. The main control system is easily disturbed in a complex electromagnetic environment, causing the system to fail to work normally.

Method used

The redundant ring network structure is used to achieve fiber redundancy. At the same time, combined with fault-tolerant control methods, the status of the optical fiber and main control system is monitored in real time, and faulty fibers or bypass fault loops are automatically cut off to ensure the stable operation of the system, and redundant control is introduced in the main control system to ensure that the failure of the main control chip does not affect the system status.

Benefits of technology

By reducing the number of optical fibers and improving system redundancy, the control performance and system reliability of high-voltage inverters are significantly improved, user operation and maintenance costs are reduced, and the system can be quickly recovered and smoothly transitioned when a failure occurs.

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Abstract

The present invention discloses a fiber optic and main control redundant fault-tolerant control method and system for high-voltage inverters, belonging to the field of power electronics control technology. The fiber optic and main control redundant fault-tolerant control method for the high-voltage inverter system proposed by the present invention realizes the accurate removal of faulty devices and the online rapid input of redundant devices, and has the characteristics of continuous and stable operation of the system at the moment of fault removal. The high-voltage inverter system utilizes fiber optic redundancy between the main control system and the power units, between the power units, and main control chip redundancy within the main control system to ensure that the high-voltage inverter system can operate continuously and stably in a complex environment, greatly improving the control performance of the high-voltage inverter and the reliability of the system.
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Description

Technical Field

[0001] The present invention relates to the technical field of power electronics control, and particularly to a fiber optic and master control redundant fault-tolerant control method and system for high-voltage inverters. Background Art

[0002] At present, the mainstream solution of domestic high-voltage inverters is the power unit series multi-level solution. The principle of this inverter topology solution requires that the power supply of each power unit is independent of each other, and each independent power unit communicates with the master control system through a group of optical fibers. Therefore, the number of optical fibers is large, the system connection is complex, and there are many fault points. When a power unit fails, a certain layer of units where it is located needs to be completely removed. In severe cases, it will cause the system to stop, affecting the normal use of the high-voltage inverter. Moreover, the master control system of the high-voltage inverter is the core part of the entire system. Once the master control chip in the master control system is interfered in a complex electromagnetic environment, the system cannot work properly. Summary of the Invention

[0003] To solve the above problems, the present invention proposes a fiber optic and master control redundant fault-tolerant control method and system for high-voltage inverters. By means of a redundant ring network, while ensuring fiber redundancy, the number of optical fibers used is reduced as much as possible. At the same time, combined with the fault-tolerant control method, the control performance of the high-voltage inverter and the reliability of the system are greatly improved, and the user's operation and maintenance costs are effectively reduced.

[0004] To achieve the above object, the technical solution adopted by the present invention: A fiber optic and master control redundant fault-tolerant control method for high-voltage inverters, comprising the following steps:

[0005] S1, Real-time monitor the status of the optical fiber and the master control system. If a fault is detected in the optical fiber, execute S2; if a fault is detected in the master control system, execute S3.

[0006] S2, When a fault occurs in one optical fiber, the system will automatically cut off the path corresponding to the faulty optical fiber, and at the same time, the data will be completely transmitted by another optical fiber to ensure the stable operation of the system. If faults occur in both optical fibers, the loop where the fault point is located will be directly bypassed, and the remaining loop will be used to continue to ensure the stable and reliable operation of the system.

[0007] S3, When a fault is detected in the master control system, the master control system detects whether the external motor belongs to open-loop VF control or closed-loop vector control. If it belongs to open-loop VF control, execute S4; if it belongs to closed-loop vector control, execute S5-S10.

[0008] S4. When the external motor is under open-loop V / F control, if it is detected that both Master Control Chip 1 and Master Control Chip 2 are normal, or Master Control Chip 1 is normal and Master Control Chip 2 is faulty, then select the unit drive pulse sequence of Master Control Chip 1 as the actual drive signal for the unit module; if it is detected that Master Control Chip 1 is faulty and Master Control Chip 2 is normal, then select the unit drive pulse sequence of Master Control Chip 2 as the actual drive signal for the unit module.

[0009] S5. When the external motor is under closed-loop vector control, initially in the system, Master Control Chip 1 serves as the main control chip and Master Control Chip 2 serves as the auxiliary control chip. Both Master Control Chip 1 and Master Control Chip 2 simultaneously collect the three-phase motor currents i a 、i b 、i c and the motor speed ω r . Meanwhile, Master Control Chip 1 sends the voltages v α 、v β that need to be controlled for output, the calculated rotor flux linkages ψ rα 、ψ rβ , the rotor flux linkage angle θ, and the unit drive pulse sequence to Master Control Chip 2.

[0010] S6. When Master Control Chip 1 fails at moment m, it sends the current rotor flux linkages ψ rα (m), ψ rβ (m), the output voltages v α (m), v β (m) to Master Control Chip 2.

[0011] S7. Based on the rotor flux linkages ψ rα (m), ψ rβ (m), the output voltages v α (m), v β (m) sent by Master Control Chip 1 at moment m, the three-phase motor currents i a (m), i b (m), i c (m), and the motor speed ω r (m) collected by Master Control Chip 2 at moment m, Master Control Chip 2 predicts the two-phase stationary coordinate system currents i α (m + 1), i β (m + 1) and the rotor flux linkages ψ rα (m + 1), ψ rβ (m + 1) at moment m + 1. The calculation method is:

[0012] ,

[0013] where i α (m + 1), i β(m + 1) is the current of the motor in the two-phase stationary coordinate system at the (m + 1)-th moment, ψ rα (m + 1), ψ rβ (m + 1) is the rotor flux linkage of the motor in the two-phase stationary coordinate system at the (m + 1)-th moment, i α (m), i β (m) is the current of the motor in the two-phase stationary coordinate system at the m-th moment, ψ rα (m), ψ rβ (m) is the rotor flux linkage sent by the first main control chip at the m-th moment, L m is the mutual inductance of the motor, L r is the rotor inductance of the motor, R s is the stator resistance of the motor, R r is the rotor resistance of the motor, L σ is the leakage inductance of the motor, T c is the control period, ω r (m) is the motor speed collected by the second main control chip at the m-th moment.

[0014] The current i of the motor in the two-phase stationary coordinate system at the m-th moment α (m), i β (m) calculation method is:

[0015] ,

[0016] where, i a (m), i b (m), i c (m) is the three-phase current of the motor collected by the second main control chip at the m-th moment.

[0017] S8, since the system control period is short, the motor speeds of two adjacent vectors can be considered approximately unchanged. Therefore, set ω r (m) = ω r (m + 1), according to the rotor flux linkage angle θ, the current i of the motor in the two-phase stationary coordinate system at the m-th moment α (m), i β (m) and the rotor flux linkage ψ rα (m), ψ rβ (m), and the current i of the motor in the two-phase stationary coordinate system at the (m + 1)-th moment α (m + 1), i β (m + 1) and the rotor flux linkage ψ rα (m + 1), ψ rβ (m + 1) predicted values, to obtain the current i of the motor in the two-phase rotating coordinate system at the m-th moment d (m), i q (m), the rotor flux linkage ψ rd (m), ψ rq (m), and the current i of the motor in the two-phase rotating coordinate system at the (m + 1)-th momentd (m + 1), i q (m + 1), the rotor flux linkage ψ rd (m + 1), ψ rq (m + 1) and the stator frequency ω s The predicted value of (m + 1), the calculation method is:

[0018] ,

[0019] ,

[0020] ,

[0021] ,

[0022] ,

[0023] where i d (m + 1), i q (m + 1) is the current of the two-phase rotating coordinate system of the motor at time (m + 1), θ is the rotor flux linkage angle, ψ rd (m + 1), ψ rq (m + 1) is the rotor flux linkage of the two-phase rotating coordinate system of the motor at time (m + 1), i d (m), i q (m) is the current of the two-phase rotating coordinate system of the motor at time m, ψ rd (m), ψ rq (m) is the rotor flux linkage of the two-phase rotating coordinate system of the motor at time m, ω s (m + 1) is the predicted value of the stator frequency of the two-phase rotating coordinate system of the motor at time (m + 1), T r is the rotor time constant of the motor, cos is the cosine trigonometric function, and sin is the sine trigonometric function.

[0024] S9, in order to ensure that the system state does not change suddenly from time m to time (m + 1), according to the current i of the two-phase rotating coordinate system of the motor at time (m + 1) d (m + 1), i q (m + 1), the rotor flux linkage ψ rd (m + 1), ψ rq (m + 1) and the stator frequency ω s (m + 1) of the predicted value, calculate the voltage v that needs to be controlled and output at time (m + 1) α (m + 1), v β (m + 1), the calculation method is:

[0025] ,

[0026] ,

[0027] wherein, v d (m + 1), v q (m + 1) is the value of the voltage to be controlled and output at the (m + 1)-th moment in the two-phase rotating coordinate system, 、 is the stator current of the motor in the two-phase rotating coordinate system at the (m + 1)-th moment, v α (m + 1), v β (m + 1) is the control output voltage at the (m + 1)-th moment.

[0028] S10. According to the voltage v α (m + 1), v β (m + 1) to be controlled and output at the (m + 1)-th moment calculated in S9, recalculate the unit drive pulse sequence through the modulation algorithm to ensure that each power unit can work normally.

[0029] The present invention further provides a high-voltage frequency converter optical fiber and main control redundancy system for the above-mentioned high-voltage frequency converter optical fiber and main control redundancy fault-tolerant control method, including: a high-voltage power grid, a multi-secondary phase-shifting transformer, a load M, an optical fiber, a main control system, and N power units for each of the three phases A, B, and C, where N is a positive integer representing the total number of unit layers of the high-voltage frequency converter. Each layer of power unit includes one power unit for each of the three phases A y 、B y 、C y , y = 1, 2,..., N; the high-voltage power grid is connected to the input end of the multi-secondary phase-shifting transformer; the 3N output ends of the multi-secondary phase-shifting transformer are connected to a total of 3N power units of the three phases A, B, and C; N power units for each of the three phases A, B, and C are connected in a cascaded manner, and the three-phase cascaded power units are connected in a Y-connection manner, and its output is connected to the load M.

[0030] Further, the main control system can form a loop with n layers of power units, where n ≤ N. Between the main control system and the power units, and between the power units in each loop, data is transmitted through 2 optical fibers. The internal connection method of the loop is any connection method that satisfies starting from the main control system, traversing each power unit in the loop without repetition, and then returning to the main control system.

[0031] Further, the main control system includes two main control chips: main control chip one and main control chip two; main control chip one and main control chip two are any one of DSP, ARM, and FPGA; communication between main control chip one and main control chip two is realized in a serial or parallel manner.

[0032] Compared with the prior art, the beneficial effects of the present invention are:

[0033] 1. Achieve fiber optic communication redundancy with fewer fiber optic cables;

[0034] 2. Both the main control chip and communication fiber optic cables in the main control system can achieve redundant control;

[0035] 3. Fault-tolerant control ensures that the redundant system can quickly be put into operation when a fault occurs, with the characteristics that the system state is smooth, continuous, and stable at the moment of fault removal, reducing the user's operation and maintenance costs. Description of the Drawings

[0036] Figure 1 Shown is the flowchart of the steps of the fiber optic and main control redundant fault-tolerant control method for high-voltage inverters proposed by the present invention;

[0037] Figure 2 Shown is the topology diagram of the redundant 1-ring system of the high-voltage inverter proposed by the present invention;

[0038] Figure 3 Shown is the topology diagram of the redundant 2-ring system of the high-voltage inverter proposed by the present invention;

[0039] Figure 4 Shown is another example of the G module of the topology diagram of the redundant 2-ring system of the high-voltage inverter proposed by the present invention;

[0040] Figure 5 Shown is yet another example of the G module of the topology diagram of the redundant 2-ring system of the high-voltage inverter proposed by the present invention;

[0041] Figure 6 Shown is the topology diagram of the redundant 3-ring system of the high-voltage inverter proposed by the present invention;

[0042] Figure 7 Shown is the topology diagram of the dual main control chips and redundant 1-ring system of the high-voltage inverter proposed by the present invention. Detailed Embodiments

[0043] The following is only the preferred embodiment of the present invention. The present invention will be further described in detail below in conjunction with the drawings and specific embodiments, so as to facilitate those skilled in the art of the present technology to understand the present invention. It should be pointed out that for those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention defined and determined by the appended claims without departing from the principle of the present invention, all inventions and creations using the concept of the present invention are within the scope of protection.

[0044] Figure 1 Shown is the flowchart of the steps of the fiber optic and main control redundant fault-tolerant control method for high-voltage inverters proposed by the present invention. As Figure 1 shown, the fiber optic and main control redundant fault-tolerant control method for high-voltage inverters includes the following steps:

[0045] S1. Monitor the status of the optical fiber and the main control system in real time. If a fault is detected in the optical fiber, execute S2; if a fault is detected in the main control system, execute S3.

[0046] S2. When a fault occurs in one optical fiber, the system will automatically cut off the path corresponding to the faulty optical fiber. At the same time, the data will be completely transmitted by another optical fiber to ensure the stable operation of the system. If faults occur in both optical fibers, the loop where the fault point is located will be directly bypassed, and the remaining loop will be used to continue to ensure the stable and reliable operation of the system.

[0047] S3. When a fault is detected in the main control system, it is detected by the main control system whether the external motor belongs to open-loop VF control or closed-loop vector control. If it belongs to open-loop VF control, execute S4; if it belongs to closed-loop vector control, execute S5 - S10.

[0048] S4. When the external motor belongs to open-loop VF control, if it is detected that both main control chip one and main control chip two are normal or main control chip one is normal and main control chip two is faulty, select the unit drive pulse sequence of main control chip one as the actual drive signal of the unit module; if it is detected that main control chip one is faulty and main control chip two is normal, select the unit drive pulse sequence of main control chip two as the actual drive signal of the unit module.

[0049] S5. When the external motor belongs to closed-loop vector control, initially, main control chip one is used as the main control chip and main control chip two is used as the auxiliary control chip. Both main control chip one and main control chip two simultaneously collect the three-phase current i a 、i b 、i c of the motor and the motor speed ω r . At the same time, main control chip one sends the voltage v α 、v β to be controlled and output, the calculated rotor flux ψ rα 、ψ rβ , the rotor flux angle θ, and the unit drive pulse sequence to main control chip two.

[0050] S6. When main control chip one fails at time m, send the current rotor flux ψ rα (m), ψ rβ (m), the output voltage v α (m), v β (m) to main control chip two.

[0051] S7. Based on the rotor flux ψ rα (m), ψ rβ (m), the output voltage v α (m), v β(m) and the three-phase motor current i collected by the second main control chip at moment m a (m), i b (m), i c (m) and the motor speed ω r (m), predict the two-phase stationary coordinate system current i of the motor at moment m + 1 α (m + 1), i β (m + 1) and the rotor flux linkage ψ rα (m + 1), ψ rβ (m + 1), and the calculation method is:

[0052] ,

[0053] where, i α (m + 1), i β (m + 1) are the two-phase stationary coordinate system currents of the motor at moment m + 1, ψ rα (m + 1), ψ rβ (m + 1) are the two-phase stationary coordinate system rotor flux linkages of the motor at moment m + 1, i α (m), i β (m) are the two-phase stationary coordinate system currents of the motor at moment m, ψ rα (m), ψ rβ (m) is the rotor flux linkage sent by the first main control chip at moment m, L m is the mutual inductance of the motor, L r is the rotor inductance of the motor, R s is the stator resistance of the motor, R r is the rotor resistance of the motor, L σ is the leakage inductance of the motor, T c is the control period, ω r (m) is the motor speed collected by the second main control chip at moment m.

[0054] The two-phase stationary coordinate system current i of the motor at moment m α (m), i β (m) The calculation method is:

[0055] ,

[0056] where, i a (m), i b (m), i c (m) are the three-phase motor currents collected by the second main control chip at moment m.

[0057] S8. Since the system control period is short, the motor speeds of two adjacent vectors can be considered approximately unchanged. Therefore, there is ω r (m) = ω r(m + 1), according to the rotor flux angle θ, the currents i α (m) and i β (m) of the motor in the two-phase stationary coordinate system at time m, and the rotor flux ψ rα (m), ψ rβ (m), as well as the currents i α (m + 1) and i β (m + 1) of the motor in the two-phase stationary coordinate system at time m + 1, and the rotor flux ψ rα (m + 1), ψ rβ (m + 1), the predicted values of which are used to obtain the currents i d (m) and i q (m) of the motor in the two-phase rotating coordinate system at time m, the rotor flux ψ rd (m), ψ rq (m), as well as the currents i d (m + 1) and i q (m + 1) of the motor in the two-phase rotating coordinate system at time m + 1, the rotor flux ψ rd (m + 1), ψ rq (m + 1) and the stator frequency ω s (m + 1), and the calculation method is:

[0058] ,

[0059] ,

[0060] ,

[0061] ,

[0062] ,

[0063] where i d (m + 1) and i q (m + 1) are the currents of the motor in the two-phase rotating coordinate system at time m + 1, θ is the rotor flux angle, ψ rd (m + 1) and ψ rq (m + 1) are the rotor fluxes of the motor in the two-phase rotating coordinate system at time m + 1, i d (m) and i q (m) are the currents of the motor in the two-phase rotating coordinate system at time m, ψ rd (m) and ψ rq (m) are the rotor fluxes of the motor in the two-phase rotating coordinate system at time m, ω s (m + 1) is the predicted value of the stator frequency of the motor in the two-phase rotating coordinate system at time m + 1, T r is the rotor time constant of the motor, cos is the cosine trigonometric function, and sin is the sine trigonometric function.

[0064] S9. To ensure that the system state does not mutate from moment m to moment m + 1, based on the two-phase rotating coordinate system currents i d (m + 1), i q (m + 1), the rotor flux linkage ψ rd (m + 1), ψ rq (m + 1) and the stator frequency ω s (m + 1) predicted values, the voltage v α (m + 1), v β (m + 1) that needs to be controlled and output at moment m + 1 is calculated as follows:

[0065] ,

[0066] ,

[0067] where v d (m + 1), v q (m + 1) is the value of the voltage that needs to be controlled and output at moment m + 1 in the two-phase rotating coordinate system, , is the stator current in the two-phase rotating coordinate system of the motor at moment m + 1, v α (m + 1), v β (m + 1) is the voltage controlled and output at moment m + 1.

[0068] S10. According to the voltage v α (m + 1), v β (m + 1) that needs to be controlled and output at moment m + 1 calculated in S9, the unit drive pulse sequence is recalculated through the modulation algorithm to ensure that each power unit can work normally.

[0069] The present invention further proposes a high-voltage frequency converter optical fiber and main control redundancy system for the above-mentioned high-voltage frequency converter optical fiber and main control redundancy fault-tolerant control method. Figure 2 The topology diagram of the high-voltage frequency converter redundancy 1-ring system proposed by the present invention is shown as Figure 2 shown. The redundancy 1-ring high-voltage frequency converter communication system includes: a high-voltage power grid, multiple secondary phase-shifting transformers, a motor M, optical fibers, a main control system, and N power units for each of the three phases A, B, and C, where N is a positive integer representing the total number of unit layers of the high-voltage frequency converter. Each layer of power units includes one power unit A for each of the three phases A, B, and C y , B y , C y, where \(y = 1, 2, \cdots, N\); the high-voltage power grid is connected to the input end of the multi-secondary phase-shifting transformer; the 3N output ends of the multi-secondary phase-shifting transformer are connected to a total of 3N power units of three phases A, B, and C; N power units of each of the three phases A, B, and C are connected in a cascaded manner, and the three-phase cascaded power units are connected in a Y-connection manner, and their output is connected to the motor M; the main control system and the 1-layer power unit together form a loop.

[0070] Among them, the connection mode of the first optical fiber communication loop is: starting from the main control system, passing through the power units of phase A1, phase B1, and phase C1 in sequence and then returning to the main control system; the connection mode of the second optical fiber communication loop is: starting from the main control system, passing through the power units of phase A2, phase B2, and phase C2 in sequence and then returning to the main control system; the connection mode of the third optical fiber communication loop is: starting from the main control system, passing through the power units of phase A3, phase B3, and phase C3 in sequence and then returning to the main control system; the remaining loops are all connected in the above manner until all loops are completely connected.

[0071] Figure 3 The figure shows the topology diagram of the redundant 2-loop system of the high-voltage frequency converter proposed by the present invention, as Figure 3 shown, the redundant 2-loop high-voltage frequency converter communication system includes: a high-voltage power grid, a multi-secondary phase-shifting transformer, a motor M, optical fibers, a main control system, and N power units of each of the three phases A, B, and C, where N is a positive integer representing the total number of layers of the high-voltage frequency converter power units, and each layer of power units includes one power unit of each of the three phases A y 、B y 、C y , where \(y = 1, 2, \cdots, N\); the high-voltage power grid is connected to the input end of the multi-secondary phase-shifting transformer; the 3N output ends of the multi-secondary phase-shifting transformer are connected to a total of 3N power units of three phases A, B, and C; N power units of each of the three phases A, B, and C are connected in a cascaded manner, and the three-phase cascaded power units are connected in a Y-connection manner, and their output is connected to the motor M, and the main control system and the 2-layer power unit together form a loop. Figure 3 The module G shown in the figure is a display module for optical fiber connection.

[0072] Among them, the connection method of the first loop of fiber optic communication is as follows: starting from the main control system, it passes through the power units of phase A1, phase B1, phase C1, phase A2, phase B2, and phase C2 in sequence, and then returns to the main control system; the connection method of the second loop of fiber optic communication is as follows: starting from the main control system, it passes through the power units of phase A3, phase B3, phase C3, phase A4, phase B4, and phase C4 in sequence, and then returns to the main control system; the connection method of the third loop of fiber optic communication is as follows: starting from the main control system, it passes through the power units of phase A5, phase B5, phase C5, phase A6, phase B6, and phase C6 in sequence, and then returns to the main control system; the remaining loops are all connected in the above manner until all loops are completely connected.

[0073] Figure 4 Another example of module G in the topology diagram of the high-voltage inverter redundant 2-loop system proposed by the present invention is shown. As Figure 4 shown, the fiber optic connection method shown in module G can be as follows:

[0074] The connection method of the first loop of fiber optic communication is as follows: starting from the main control system, it passes through the power units of phase A1, phase B1, phase A2, phase C1, phase B2, and phase C2 in sequence, and then returns to the main control system; the remaining loops are all connected in the above manner until all loops are completely connected.

[0075] Figure 5 Another example of module G in the topology diagram of the high-voltage inverter redundant 2-loop system proposed by the present invention is shown. As Figure 5 shown, the fiber optic connection method shown in module G can also be as follows:

[0076] The connection method of the first loop of fiber optic communication is as follows: starting from the main control system, it passes through the power units of phase A1, phase A2, phase B1, phase C1, phase B2, and phase C2 in sequence, and then returns to the main control system; the remaining loops are all connected in the above manner until all loops are completely connected.

[0077] Figure 6 The topology diagram of the high-voltage inverter redundant 3-loop system proposed by the present invention is shown. As Figure 6 shown, the redundant 3-loop high-voltage inverter communication system includes: a high-voltage power grid, multiple secondary phase-shifting transformers, a motor M, optical fibers, a main control system, and N power units for each of the three phases A, B, and C, where N is a positive integer representing the total number of unit layers of the high-voltage inverter. Each layer of power unit includes one power unit for each of the three phases A y 、B y 、C y, where y = 1, 2, ……, N; the high-voltage power grid is connected to the input ends of the multi-secondary-phase-shifting transformers; the 3N output ends of the multi-secondary-phase-shifting transformers are connected to a total of 3N power units of three phases A, B, and C; N power units of each of the three phases A, B, and C are connected in a cascaded manner, and the three-phase cascaded power units are connected in a Y-connection manner, and their output is connected to the motor M; the main control system and the three layers of power units together form a loop.

[0078] Among them, the connection mode of the first optical fiber communication loop is: starting from the main control system, passing through the power units of phase A1, phase B1, phase C1, power units of phase A2, phase B2, phase C2, power units of phase A3, phase B3, phase C3 in sequence, and then returning to the main control system; the connection mode of the second optical fiber communication loop is: starting from the main control system, passing through the power units of phase A4, phase B4, phase C4, power units of phase A5, phase B5, phase C5, power units of phase A6, phase B6, phase C6 in sequence, and then returning to the main control system; the connection mode of the third optical fiber communication loop is: starting from the main control system, passing through the power units of phase A7, phase B7, phase C7, power units of phase A8, phase B8, phase C8, power units of phase A9, phase B9, phase C9 in sequence, and then returning to the main control system; the remaining loops are all connected in the above manner until all the loops are completely connected.

[0079] Figure 7 The figure shows the topology diagram of the dual main control chips and redundant 1-loop system of the high-voltage frequency converter proposed by the present invention, as Figure 7 shown, the communication system of the dual main control chips and redundant 1-loop high-voltage frequency converter includes: a high-voltage power grid, multi-secondary-phase-shifting transformers, a motor M, optical fibers, a main control system, and N power units of each of the three phases A, B, and C, where N is a positive integer representing the total number of layers of the high-voltage frequency converter, and each layer of power units includes one power unit of each of the three phases A y 、B y 、C y , where y = 1, 2, ……, N; the high-voltage power grid is connected to the input ends of the multi-secondary-phase-shifting transformers; the 3N output ends of the multi-secondary-phase-shifting transformers are connected to a total of 3N power units of three phases A, B, and C; N power units of each of the three phases A, B, and C are connected in a cascaded manner, and the three-phase cascaded power units are connected in a Y-connection manner, and their output is connected to the motor M; the main control system and the one layer of power units together form a loop.

[0080] Among them, the connection mode of the first optical fiber in the first loop of optical fiber communication is as follows: starting from the first main control chip, it passes through the A1-phase power unit, B1-phase power unit, and C1-phase power unit in sequence and then returns to the first main control chip; the connection mode of the second optical fiber in the first loop of optical fiber communication is as follows: starting from the second main control chip, it passes through the A1-phase power unit, B1-phase power unit, and C1-phase power unit in sequence and then returns to the second main control chip; the remaining loops are all connected in the above manner until all loops are completely connected.

[0081] Among them, the main control system includes the first main control chip and the second main control chip. The first main control chip and the second main control chip are any one of DSP, ARM, and FPGA; communication between the first main control chip and the second main control chip is achieved through serial or parallel means, and their data is transmitted in real-time and interactively.

[0082] The present invention guarantees optical fiber redundancy in the form of a redundant ring network while minimizing the number of optical fibers used as much as possible. At the same time, combined with a fault-tolerant control method, it greatly improves the control performance and system reliability of the high-voltage frequency converter, and effectively reduces the user's operation and maintenance costs.

[0083] Although the specific implementation mode of the invention has been described in detail in conjunction with the accompanying drawings, it should not be construed as a limitation on the protection scope of the present invention. Within the scope described in the claims, various modifications and deformations that can be made by those skilled in the art without creative efforts still fall within the protection scope of the present invention.

Claims

1. A high-voltage frequency converter optical fiber and master control redundant fault-tolerant control method, characterized in that: The following steps are involved: S1, real-time monitoring of the status of the optical fiber and the main control system. If a fault in the optical fiber is detected, S2 is executed; if a fault in the main control system is detected, S3 is executed; S2, the main control system and n layers of power units together form a loop, where n≤N, and data is transmitted between the main control system and the power unit, and between the power units in each loop through two optical fibers, where N It is a positive integer, representing the total number of unit layers of the high-voltage inverter. When a fiber fails, the system will automatically cut off the path corresponding to the failed fiber, and the data will be completely transmitted by another fiber to ensure stable operation of the system. If both fibers fail, the loop where the fault point is located will be directly bypassed, and the remaining loops will be used to continue to ensure stable and reliable operation of the system. S3, when a fault is detected in the main control system, the main control system detects whether the external motor is under open-loop VF control or closed-loop vector control. If it is under open-loop VF control, S4 is executed; if it is under closed-loop vector control, S5-S10 is executed; S4, when the external motor belongs to open-loop VF control, if it is detected that both the main control chip 1 and the main control chip 2 are normal or the main control chip 1 is normal and the main control chip 2 is faulty, the unit drive pulse sequence of the main control chip 1 is selected as the actual drive signal of the unit module; if it is detected that the main control chip 1 is faulty and the main control chip 2 is normal, the unit drive pulse sequence of the main control chip 2 is selected as the actual drive signal of the unit module; S5, when the external motor belongs to closed-loop vector control, the system initially uses the main control chip 1 as the main control chip, and the main control chip 2 as the auxiliary control chip. The main control chip 1 and the main control chip 2 simultaneously control the motor three-phase current i a 、i b 、i c and motor speed ω r At the same time, the main control chip will need to control the output voltage v α 、v β and the calculated rotor flux ψ rα , rβ , the rotor flux angle θ and the unit drive pulse sequence are sent to the main control chip 2; S6, when the main control chip 1 fails at time m, the current rotor flux ψ is sent to the main control chip 2 rα (m), ψ rβ (m), output voltage v α (m), v β (m); S7, the main control chip 2 receives the rotor flux ψ sent by the main control chip 1 at time m. rα (m), ψ rβ (m), output voltage v α (m), v β The three-phase current i of the motor collected by the main control chip 2 at time (m) and m a (m), i b (m), i c (m) and motor speed ω r (m), the two-phase stationary coordinate system current i of the motor at time m+1 α (m+1), i β (m+1) and rotor flux ψ rα (m+1),ψ rβ (m+1) is used for prediction, and the calculation method is: , Among them, i α (m+1), i β (m+1) is the two-phase stationary coordinate system current of the motor at time m+1, ψ rα (m+1),ψ rβ (m+1) is the rotor flux of the two-phase stationary coordinate system of the motor at time m+1, i α (m), i β (m) is the two-phase stationary coordinate system current of the motor at time m, ψ rα (m), ψ rβ (m) is the rotor flux sent by the main control chip at time m, L m is the motor mutual inductance, L r is the motor rotor inductance, R s is the motor stator resistance, R r is the motor rotor resistance, L σ is the motor leakage inductance, T c is the control period, ω r (m) is the motor speed acquired by the main control chip 2 at time m; The two-phase stationary coordinate system current i of the motor at time m α (m), i β (m) The calculation method is: , Among them, i a (m), i b (m), i c (m) is the three-phase current of the motor collected by the main control chip 2 at time m; S8, due to the short system control cycle, the motor speeds corresponding to two adjacent vectors are considered to be approximately constant, so ω is set r (m) = ω r (m+1), according to the rotor flux angle θ, the two-phase stationary coordinate system current i of the motor at time m α (m), i β (m) and rotor flux ψ rα (m), ψ rβ (m), and the two-phase stationary coordinate system current i of the motor at the time m+1 α (m+1), i β (m+1) and rotor flux ψ rα (m+1),ψ rβ The predicted value of (m+1) is used to obtain the motor two-phase rotating coordinate system current i at time m. d (m), i q (m), rotor flux ψ rd (m), ψ rq (m), and the motor two-phase rotating coordinate system current i at time m+1 d (m+1), i q (m+1), rotor flux ψ rd (m+1),ψ rq (m+1) and stator frequency ω s The predicted value of (m+1) is calculated as: , , , , , Among them, i d (m+1), i q (m+1) is the current of the two-phase rotating coordinate system of the motor at time m+1, θ is the rotor flux angle, ψ rd (m+1),ψ rq (m+1) is the rotor flux of the motor two-phase rotating coordinate system at time m+1, i d (m), i q (m) is the current of the two-phase rotating coordinate system of the motor at time m, ψ rd (m), ψ rq (m) is the rotor flux of the motor two-phase rotating coordinate system at time m, ω s (m+1) is the predicted value of the stator frequency of the motor two-phase rotating coordinate system at time m+1, T r is the motor rotor time constant, cos is the cosine trigonometric function, and sin is the sine trigonometric function; S9, in order to ensure that the system state does not change suddenly from time m to time m+1, according to the motor two-phase rotating coordinate system current i at time m+1 d (m+1), i q (m+1), rotor flux ψ rd (m+1),ψ rq (m+1) and stator frequency ω s The predicted value of (m+1) is used to calculate the voltage v that needs to be controlled at the output at time m+1. α (m+1), v β (m+1), the calculation method is: , , Among them, v d (m+1), v q (m+1) is the value of the output voltage that needs to be controlled at time m+1 in the two-phase rotating coordinate system. , is the stator current of the motor in the two-phase rotating coordinate system at time m+1, v α (m+1), v β (m+1) is the output voltage controlled at time m+1; S10, the output voltage v that needs to be controlled at time m+1 calculated by S9 α (m+1), v β (m+1), the unit drive pulse sequence is recalculated through the modulation algorithm to ensure that each power unit can work normally.

2. A high-voltage frequency converter optical fiber and main control redundancy system, used to implement the high-voltage frequency converter optical fiber and main control redundancy fault-tolerant control method according to claim 1, characterized in that: The high-voltage inverter optical fiber and main control redundant system includes: a high-voltage power grid, a multi-side phase-shifting transformer, a load M, an optical fiber, a main control system, and N power units for each phase of A, B, and C, where N is a positive integer representing the total number of unit layers of the high-voltage inverter, and each layer of power units includes one power unit A for each phase of A, B, and C. y , B y , C y , y=1, 2, ..., N; the high-voltage power grid is connected to the input end of the multi-secondary phase-shifting transformer; the 3N output ends of the multi-secondary phase-shifting transformer are connected to the 3N power units of the three phases A, B, and C in total; the N power units of each phase of the three phases A, B, and C are connected in a cascade manner, the three-phase cascade power units are connected in a Y-connection manner, and their outputs are connected to a load M.

3. A high-voltage frequency converter optical fiber and master control redundancy system as claimed in claim 2, characterized in that: The main control system and n layers of power units together form a loop, where n≤N. Data is transmitted between the main control system and the power units, and between the power units in each loop through two optical fibers. The internal connection method of the loop is any connection method that satisfies the requirement of starting from the main control system and returning to the main control system without repeatedly traversing the power units in each loop.

4. A high-voltage frequency converter optical fiber and master control redundancy system as claimed in claim 2, characterized in that: The main control system includes two main control chips: main control chip 1 and main control chip 2; the main control chip 1 and main control chip 2 are any one of DSP, ARM, and FPGA; the main control chip 1 and main control chip 2 communicate with each other in a serial or parallel manner.

Citation Information

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