Printed circuit board

Abstract

The present disclosure provides a printed circuit board including an insulating layer, and a wiring pattern disposed on or within the insulating layer, the wiring pattern includes a first metal layer, a second metal layer disposed on an upper surface of the first metal layer, and an inorganic oxide film disposed on a side surface of the second metal layer.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2023-0138232 filed on October 17, 2023 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] The present disclosure relates to a printed circuit board. Background Art

[0003] As high-performance printed circuit boards have been required to be produced, the realization of microcircuits has become increasingly important. In order to realize microcircuits, it is necessary to ensure uniform and fine line widths L and spacings S. For example, in the case of high-end products such as 2.nD (an interconnect package structure between 2D and 3D, such as 2.1D, 2.3D, and 2.5D), the line width L and spacing S may each need to realize a size of several microns. However, in the case of the prior art microcircuit formation process, when etching the seed layer, undercutting may occur under the microcircuit pattern, which may lead to poor circuit reliability. Summary of the invention

[0004] An aspect of the present disclosure is to provide a printed circuit board capable of preventing undercutting from occurring during, for example, an etching process when forming a microcircuit.

[0005] According to one aspect of the present disclosure, a printed circuit board includes an insulating layer and a wiring pattern arranged on or within the insulating layer, wherein the wiring pattern includes a first metal layer, a second metal layer arranged on an upper surface of the first metal layer, and an inorganic oxide film arranged on a side surface of the second metal layer.

[0006] According to another aspect of the present disclosure, a printed circuit board includes: a substrate; a first metal layer disposed on the substrate; a second metal layer disposed on the first metal layer; and a barrier layer disposed to surround the second metal layer and having a protrusion, the protrusion protruding from a lower end of the barrier layer along a planar direction perpendicular to a stacking direction. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The above and other aspects, features and advantages of the present disclosure will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which: Figure 1 is a block diagram schematically illustrating an example of an electronic device system; Figure 2 is a perspective view schematically showing an embodiment of an electronic device; Figure 3 is a cross-sectional view schematically illustrating one embodiment of a printed circuit board; Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G and Figure 4H It is schematically shown Figure 3 A cross-sectional view of an example of a manufacturing process of a printed circuit board; Figure 5 is a cross-sectional view schematically showing another example of a printed circuit board; Fig. 6A , Figure 6B , Figure 6C , Fig.6D , Fig. 6E , Fig. 6F , Figure 6G , Figure 6H and Fig.6I It is schematically shown Figure 5 A cross-sectional view of an example of a manufacturing process of a printed circuit board; and Fig. 7A and Figure 7B It is a cross-sectional view showing the effect of etching depending on the presence or absence of an inorganic oxide film. DETAILED DESCRIPTION

[0008] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0009] Electronic Devices Figure 1 is a schematic block diagram illustrating one embodiment of an electronic device system.

[0010] Reference Figure 1 , the electronic device 1000 may accommodate a mainboard 1010. Chip-related components 1020, network-related components 1030, other components 1040, etc. may be physically and / or electrically connected to the mainboard 1010. These components may be coupled to other electronic components described below via various signal lines 1090.

[0011] The chip-related components 1020 may include the following chips: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM), flash memory), etc.; application processor chips, such as central processing units (e.g., central processing units (CPUs)), graphics processors (e.g., graphics processing units (GPUs)), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters, application-specific integrated circuits (ASICs), etc. However, the chip-related components 1020 are not limited thereto and may include other types of chip-related components. In addition, the chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the aforementioned chips and / or electronic components.

[0012] The network-related components 1030 may include components that are compatible with or operate according to protocols such as: Wireless Fidelity (Wi-Fi) (Institute of Electrical and Electronics Engineers (IEEE) 802.11 series, etc.), Worldwide Interoperability for Microwave Access (WiMAX) (IEEE 802.16 series, etc.), IEEE 802.20, Long Term Evolution (LTE), Evolution-Data Optimized (Ev-DO), High Speed ​​Packet Access + (HSPA+), High Speed ​​Downlink Packet Access + (HSDPA+), High Speed ​​Uplink Packet Access + (HSUPA+), Global System for Mobile Communications (GSM), Enhanced Data Rates for GSM Evolution (EDGE), Global Positioning System (GPS), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Wireless LAN, Bluetooth®, third generation mobile communication technology (3G) protocols, fourth generation mobile communication technology (4G) protocols, and fifth generation mobile communication technology (5G) protocols, as well as any other wireless protocols and wired protocols specified after the above protocols. However, the network-related component 1030 is not limited thereto, but may also include components compatible with or operating according to various other wireless standards or protocols or wired standards or protocols. In addition, the network-related component 1030 may be combined with the chip-related component 1020 described above.

[0013] The other components 1040 may include high frequency inductors, ferrite inductors, power inductors, ferrite beads, low temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCC), etc. However, the other components 1040 are not limited thereto, but may also include passive components for various other purposes, etc. In addition, the other components 1040 may be combined with each other together with the above-mentioned chip-related components 1020 and / or network-related components 1030.

[0014] Depending on the type of the electronic device 1000, the electronic device 1000 may include other electronic components that are physically and / or electrically connected to the mainboard 1010 or that are not physically and / or electrically connected to the mainboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080. However, without being limited thereto, the electronic device 1000 may include an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage unit (e.g., a hard disk drive), a compact disk (CD) drive, a digital versatile disk (DVD) drive, etc. In addition, depending on the type of the electronic device 1000, etc., the electronic device 1000 may also include other electronic components for various purposes.

[0015] The electronic device 1000 may be a smart phone, a personal digital assistant (PDA), a digital video camera, a digital camera, a network system, a computer, a monitor, a tablet PC, a laptop PC, a netbook PC, a television, a video game console, a smart watch, an automobile component, etc. However, the electronic device 1000 is not limited thereto and may be any other electronic device capable of processing data.

[0016] Figure 2 is a perspective view schematically showing one embodiment of an electronic device.

[0017] Reference Figure 2 , the electronic device may be, for example, a smart phone 1100. A mainboard (printed circuit board) 1110 may be housed in the smart phone 1100, and various electronic components 1120 may be physically and / or electrically connected to the mainboard 1110. In addition, other components (such as a camera module 1130 and / or a speaker 1140) that are physically and / or electrically connected to the printed circuit board (PCB) 1110 or that are not physically and / or electrically connected to the printed circuit board (PCB) 1110 may be housed in the smart phone 1100. Some of the electronic components 1120 may be the chip-related components 1020 described above, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a PCB on which electronic components (including active components and / or passive components) are surface mounted. Alternatively, the component package 1121 may be in the form of a PCB with built-in electronic components (including active components and / or passive components). In addition, the electronic device is not limited to the smart phone 1100, and may also be other electronic devices as described above.

[0018] PCB Figure 3 is a cross-sectional view schematically illustrating one embodiment of a PCB.

[0019] Reference Figure 3, a PCB 100A according to one embodiment may include a first insulating layer 111, a first wiring pattern 121 disposed on an upper surface of the first insulating layer 111, and a second insulating layer 112 disposed on an upper surface of the first insulating layer 111 and covering at least a portion of the first wiring pattern 121. The first wiring pattern 121 may be disposed on the first insulating layer 111, and may be disposed within the second insulating layer 112. The first wiring pattern 121 may include a first metal layer M1, a second metal layer M2 disposed on an upper surface of the first metal layer M1, and an inorganic oxide film A disposed on a side surface of the second metal layer M2 and / or the first metal layer M1. The first wiring pattern 121 may be provided in plurality, and the plurality of first wiring patterns 121 may be microcircuits in which a line width L / spacing S is less than 10m / 10m (e.g., within 5m / 5m, or within 2m / 2m). The inorganic oxide film A may be a thin film having a thickness of less than 100nm. In this way, when forming the first wiring pattern 121 as a microcircuit, the occurrence of undercut can be prevented by providing a thin inorganic oxide film A (described below). Therefore, circuit adhesion and circuit stability can be easily ensured. In addition, a fine pattern can be more easily realized.

[0020] In addition, the first metal layer M1 and the second metal layer M2 may be distinct layers formed separately from each other, and, for example, the average grain size of the materials in the first metal layer M1 and the second metal layer M2 may be different. Here, the thickness t2 of the second metal layer M2 may be greater than the thickness t1 of the first metal layer M1. In addition, the thickness t1 of the first metal layer M1 may be greater than the thickness t3 of the inorganic oxide film A. For example, the first metal layer M1 may be a seed layer formed by electroless plating, etc., and may be, for example, a chemical copper plating layer. In addition, the second metal layer M2 may be a plating layer formed by electrolytic plating, etc., and may be, for example, an electrolytic copper plating layer. Therefore, the thickness t2 of the second metal layer M2 may be greater than the thickness t1 of the first metal layer M1. In addition, the inorganic oxide film A may be formed very thin using a thin film deposition method. Therefore, the thickness t3 of the inorganic oxide film A may be less than the thickness t1 of the first metal layer M1. The inorganic oxide film A may include a material suitable for atomic layer deposition (ALD) or molecular vapor deposition (MVD), for example, at least one of Al2O3, TiO2, ZnO, ZnO2, ZrO2, SnO, SnO2, HfO2, and SiO2, but is not limited thereto. In addition, when the inorganic oxide film A is formed using a thin film deposition method such as ALD or MVD, uniformity, step coverage, etc. can be improved compared to the case where a protective film is formed using a different material by plasma deposition or the like.

[0021] In addition, at least a portion of the side surface of the first metal layer M1 may be exposed from the inorganic oxide film A. For example, the inorganic oxide film A may be spaced apart from a portion of the side surface of the first metal layer M1 (i.e., the inorganic oxide film A may expose a portion of the side surface of the first metal layer M1 while covering another portion). In one embodiment, the inorganic oxide film A may not cover the side surface of the first metal layer M1 (i.e., the inorganic oxide film A may expose the entire side surface of the first metal layer M1). In addition, the inorganic oxide film A may also be spaced apart from a portion of the upper surface of the second metal layer M2. In one embodiment, the inorganic oxide film A may not cover the upper surface of the second metal layer M2. For example, the inorganic oxide film A may be disposed only on the side surface of the second metal layer M2 or may be disposed to surround the second metal layer M2. The inorganic oxide film A may be conformally formed on the side surface of the second metal layer M2 with a substantially constant thickness. With such an arrangement, the occurrence of undercutting during etching can be effectively prevented.

[0022] Hereinafter, components of a PCB 100A according to one embodiment are described in more detail with reference to the accompanying drawings.

[0023] The first insulating layer 111 and the second insulating layer 112 may each include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a material including an inorganic filler, an organic filler and / or glass fiber (glass fabric such as glass cloth) and a resin. For example, the insulating material may be a non-photosensitive insulating material such as a copper clad laminate (CCL), an Ajinomoto deposited film (ABF), or a prepreg (PPG), but is not limited thereto, and other polymer materials may be used. In addition, the insulating material may be a photosensitive insulating material such as a photoimageable dielectric (PID). When the first insulating layer 111 and the second insulating layer 112 include the same material, they may be integrated with each other to form one insulating layer, but are not limited thereto, and the first insulating layer 111 and the second insulating layer 112 may be distinct layers. The first insulating layer 111 may be a substrate in a broader sense, and in addition to the above-mentioned organic substrate, the substrate may also be, for example, a glass substrate, a silicon substrate, and a ceramic substrate.

[0024] The first wiring pattern 121 may include a metal material. For example, the first metal layer M1 and the second metal layer M2 may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the first metal layer M1 and the second metal layer M2 may each include copper (Cu), but are not limited thereto. The first wiring pattern 121 may be a signal pattern, and if necessary, a power pattern or a ground pattern may be further provided on the same layer as the first wiring pattern 121. The first wiring pattern 121 may be a line pattern, and if necessary, a plane pattern or a pad pattern may be further provided on the same layer as the first wiring pattern 121. The first wiring pattern 121 may include a plurality of metal layers, for example, a first metal layer M1 (which is an electroless plating layer (e.g., a chemical copper plating layer)) and a second metal layer M2 (which is an electrolytic plating layer (e.g., an electrolytic copper plating layer)).

[0025] As described above, the inorganic oxide film A may be a thin film having a thickness of less than 100 nm (e.g., a thickness of about 1 nm to 10 nm). In addition, the inorganic oxide film A may include a material suitable for atomic layer deposition (ALD) or molecular vapor deposition (MVD), for example, at least one of Al2O3, TiO2, ZnO, ZnO2, ZrO2, SnO, SnO2, HfO2, and SiO2, preferably Al2O3, but not limited thereto. The inorganic oxide film A may be used as a barrier layer to prevent undercutting due to etching, and may also be used as an adhesive layer to improve adhesion to the second insulating layer 112.

[0026] 4A to 4H It is schematically shown Figure 3 A cross-sectional view of an example of a PCB manufacturing process.

[0027] Reference Figure 4A , a first metal layer M1 is formed on the first insulating layer 111 by electroless plating or the like. The first insulating layer 111 may be various types of substrates such as an organic substrate, a glass substrate, a silicon substrate, or a ceramic substrate. The first metal layer M1 may be a chemical copper plating layer. The first metal layer M1 may be a seed layer.

[0028] Reference Figure 4B A resist layer 210 is formed on the first metal layer M1, and the resist layer 210 is exposed and developed by a photolithography process to form a patterned opening H exposing a portion of the upper surface of the first metal layer M1.

[0029] Reference Figure 4C At least a portion of the patterned opening H is filled by electrolytic plating or the like to form a second metal layer M2 on the first metal layer M1. The second metal layer M2 may be a plated layer that substantially becomes a part of the microcircuit.

[0030] Reference Figure 4D , removing the resist layer 210. The resist layer 210 may be chemically stripped using a stripper or may be physically stripped.

[0031] Reference Figure 4E , an inorganic oxide film A is formed on the first metal layer M1 and the second metal layer M2 to cover them. The inorganic oxide film A may be formed to be thin using a thin film deposition method such as ALD or MVD.

[0032] Reference Figure 4F , the inorganic oxide film A disposed on the upper surface of each of the first metal layer M1 and the second metal layer M2 is removed using etching. For example, the inorganic oxide film A may remain only on the side surface of the second metal layer M2. Dry etching (eg, plasma etching) may be used as an etching method, but is not limited thereto.

[0033] Reference Figure 4G , remove the portion of the first metal layer M1 in the area other than the area covered by the second metal layer M2. For example, the first metal layer M1 may remain only below the second metal layer M2. Wet etching (e.g., flash etching) may be used as an etching method, but is not limited thereto. During the etching process, the inorganic oxide film A may prevent undercutting from occurring at the lower end of the side surface of the second metal layer M2. Through a series of processes, a first wiring pattern 121 as a microcircuit may be formed.

[0034] Reference Figure 4H , a second insulating layer 112 is formed on the first insulating layer 111. The second insulating layer 112 may be formed by a lamination process. The first wiring pattern 121 may be embedded in the second insulating layer 112. The PCB 100A according to the above example may be manufactured by a series of processes, and other redundant descriptions are omitted.

[0035] Figure 5 is a cross-sectional view schematically showing another example of a PCB.

[0036] Reference Figure 5In a PCB 100B according to another example, a second wiring pattern 122 (instead of the first wiring pattern 121) may be provided in the PCB 100A according to the above example. In the cross section of the second wiring pattern 122, the width w1 of the first metal layer M1 may be greater than the width w2 of the second metal layer M2. For example, in the second wiring pattern 122, the side surface of the first metal layer M1 may protrude compared to the side surface of the second metal layer M2. Here, the inorganic oxide film A may have a protrusion AP, which is a portion of the inorganic oxide film A protruding from the lower end of the inorganic oxide film A in a plane direction perpendicular to the stacking direction. The protrusion AP may be formed to cover at least a portion of the upper surface of the first metal layer M1, but may be spaced apart from the side surface of the first metal layer M1, that is, the inorganic oxide film A does not cover the side surface of the first metal layer M1. For example, the inorganic oxide film A of the second wiring pattern 122 may extend to be provided on the protruding area of ​​the first metal layer M1. In addition, in this case, the above-mentioned technical effects can be achieved, for example, when forming the second wiring pattern 122 as a microcircuit, the occurrence of undercut can be prevented by providing a thin inorganic oxide film A. Therefore, circuit adhesion and circuit stability can be easily ensured. In addition, a fine pattern can be more easily realized. The other contents are substantially the same as those described in the PCB according to the above example, and therefore, redundant descriptions are omitted.

[0037] FIG. 6A to FIG. 6I It is schematically shown Figure 5 A cross-sectional view of an example of a PCB manufacturing process.

[0038] Reference Fig. 6A , a first metal layer M1 is formed on the first insulating layer 111 by electroless plating or the like. The first insulating layer 111 may be various types of substrates such as an organic substrate, a glass substrate, a silicon substrate, or a ceramic substrate. The first metal layer M1 may be a chemical copper plating layer. The first metal layer M1 may be a seed layer.

[0039] Reference Figure 6B A resist layer 210 is formed on the first metal layer M1, and the resist layer 210 is exposed and developed by a photolithography process to form a patterned opening H exposing a portion of the upper surface of the first metal layer M1.

[0040] Reference Figure 6C At least a portion of the patterned opening H is filled by electrolytic plating or the like to form a second metal layer M2 on the first metal layer M1. The second metal layer M2 may be a plated layer that substantially becomes a part of the microcircuit.

[0041] Reference Fig.6D, a portion of the resist layer 210 is removed by soft stripping. The soft stripping may be performed using a stripping solution. A space G may be formed between the second metal layer M2 and the resist layer 210 by soft stripping.

[0042] Reference Fig. 6E , an inorganic oxide film A is formed on the first metal layer M1 and the second metal layer M2 and the resist layer 210 to cover them. The inorganic oxide film A may also be formed on the wall of the space G between the second metal layer M2 and the resist layer 210, for example, the inorganic oxide film A may also be formed on the side surface and the upper surface of the remaining resist layer 210. The inorganic oxide film A may be formed to be thin using a thin film deposition method such as ALD or MVD.

[0043] Reference Fig. 6F , the inorganic oxide film A disposed on the upper surface of each of the second metal layer M2 and the resist layer 210 is removed using etching. For example, the inorganic oxide film A may remain only on the side surface of the second metal layer M2, on the wall of the space G between the second metal layer M2 and the resist layer 210 (i.e., the side surface of the resist layer 210), and on the upper surface of the first metal layer M1. Dry etching (e.g., plasma etching) may be used as an etching method, but is not limited thereto.

[0044] Reference Figure 6G , the resist layer 210 is removed. The resist layer 210 may be chemically stripped using a stripper or may be physically stripped. After the resist layer 210 is stripped, the protrusion AP covering a portion of the upper surface of the first metal layer M1 may remain under the inorganic oxide film A.

[0045] Reference Figure 6H , etching is used to remove a portion of the first metal layer M1 in an area other than the area covered by the second metal layer M2 and the inorganic oxide film A. For example, the first metal layer M1 may remain only below the second metal layer M2 and the inorganic oxide film A. Wet etching (e.g., flash etching) may be used as an etching method, but is not limited thereto. During the etching process, the inorganic oxide film A may prevent undercutting from occurring at the lower end of the side surface of the second metal layer M2. Through a series of processes, a second wiring pattern 122 as a microcircuit may be formed.

[0046] Reference Fig.6I , a second insulating layer 112 is formed on the first insulating layer 111. The second insulating layer 112 may be formed by a lamination process. The second wiring pattern 122 may be embedded in the second insulating layer 112. The PCB 100B according to the above another example may be manufactured by a series of processes, and other redundant descriptions are omitted.

[0047] Fig. 7A and Figure 7BIt is a cross-sectional view showing the effect of etching depending on the presence or absence of an inorganic oxide film.

[0048] Reference Fig. 7A and Figure 7B If Fig. 7A If the inorganic oxide film A does not exist as shown, undercutting may occur at the lower end of the second metal layer M2 during the etching process of removing a portion of the first metal layer M1. Figure 7B In the case where the inorganic oxide film A is formed in the first metal layer M1, the inorganic oxide film A can prevent undercutting from occurring at the lower end of the second metal layer M2 during the etching process of removing a portion of the first metal layer M1. Therefore, circuit adhesion and circuit stability can be easily ensured. In addition, fine patterns can be more easily realized.

[0049] As one of various effects of the present disclosure, a PCB is provided in which undercutting is prevented from occurring during, for example, an etching process when forming a microcircuit.

[0050] In the present disclosure, the expression "covering" may include not only complete covering but also partial covering, and may also include indirect covering and direct covering. In addition, the expression "filling" may include not only complete filling but also partial filling, and may also include approximately filling. For example, the expression "filling" may include a situation where there are some air gaps or voids. In addition, the expression "surrounding" may include not only complete surrounding but also partial surrounding and approximately surrounding. In addition, the expression "adjacent to..." refers to being arranged next to each other on approximately the same layer, and is not limited to the situation of being in contact with each other. In addition, exposing may include not only complete exposure but also partial exposure, and exposing may refer to exposing from burying the corresponding component.

[0051] In the present disclosure, dimensions such as width and thickness may be determined to include process errors occurring in the manufacturing process, positional deviations, errors during measurement, etc. For example, substantially coplanar may include not only being completely on the same plane but also being approximately on the same plane.

[0052] In the present disclosure, the same insulating material may refer not only to completely the same insulating material but also to the same type of insulating material. Therefore, the composition of the insulating material may be substantially the same, but its specific composition ratio may vary slightly.

[0053] In the present disclosure, "cross section" may refer to a cross-sectional shape when an object is cut vertically or a shape when an object is viewed from a side view. In addition, "plane" may refer to a shape when an object is cut horizontally or a plane shape when an object is viewed from a top view or a bottom view.

[0054] In the present disclosure, for the sake of convenience, the lower side, lower part, lower surface, etc. are used to indicate the downward direction based on the cross section of the drawings, and the upper side, upper part, upper surface, etc. are used to indicate the opposite direction. However, the definition of the direction is for the convenience of description, and the scope of the claims is not particularly limited by the description of the direction, and the concept of top / bottom can be changed at any time.

[0055] In the present disclosure, the term "connection" may refer not only to "direct connection" but also to "indirect connection" by means of an adhesive layer or the like. In addition, the term "electrical connection" may include both the case where an element is "physically connected" and the case where an element is "not physically connected". In addition, it is understood that when an element is referred to as "first" and "second", the element is not limited thereto. They may be used only for the purpose of distinguishing an element from other elements and may not limit the order or importance of the elements. In some cases, without departing from the scope of the claims set forth herein, a first element may be referred to as a second element. Similarly, a second element may also be referred to as a first element.

[0056] The expressions "exemplary embodiment or one example" used in the present disclosure do not refer to the same example and are provided to emphasize the different unique features between each example. However, the examples provided in the above description do not exclude being associated with features of other examples and being implemented after other examples. For example, even if a matter described in a particular example is not described in an example different from it, the matter may be understood to be associated with another example unless otherwise mentioned in its description.

[0057] The terms used herein are for the purpose of describing particular exemplary embodiments only and are not intended to be limiting of the exemplary embodiments.As used herein, unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well.

[0058] While example embodiments have been shown and described above, it will be readily apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the present disclosure as defined by the appended claims.

Claims

1. A printed circuit board, comprising: Insulation layer; as well as a wiring pattern, arranged on or in the insulating layer, The wiring pattern includes a first metal layer, a second metal layer disposed on an upper surface of the first metal layer, and an inorganic oxide film disposed on a side surface of the second metal layer.

2. The printed circuit board according to claim 1, wherein: The second metal layer is thicker than the first metal layer, and The first metal layer is thicker than the inorganic oxide film.

3. The printed circuit board according to claim 1, wherein: The thickness of the inorganic oxide film is less than 100 nm.

4. The printed circuit board according to claim 1, wherein: The inorganic oxide film includes at least one of Al2O3, TiO2, ZnO, ZnO2, ZrO2, SnO, SnO2, HfO2 and SiO2.

5. The printed circuit board according to claim 1, wherein: At least a portion of a side surface of the first metal layer is exposed from the inorganic oxide film.

6. The printed circuit board according to claim 5, wherein: The inorganic oxide film is spaced apart from a portion of a side surface of the first metal layer, and The inorganic oxide film is spaced apart from a portion of an upper surface of the second metal layer.

7. The printed circuit board according to claim 6, wherein: The inorganic oxide film does not cover the side surface of the first metal layer, and The inorganic oxide film does not cover the upper surface of the second metal layer.

8. The printed circuit board according to claim 1, wherein: The side surface of the first metal layer protrudes compared to the side surface of the second metal layer, and The inorganic oxide film is disposed to extend from a side surface of the second metal layer to a protruding region of the first metal layer.

9. The printed circuit board according to claim 8, wherein: The inorganic oxide film disposed on the side surface of the second metal layer is bent to be disposed on a portion of an upper surface of the first metal layer at the protruding region.

10. The printed circuit board according to claim 1, wherein: The materials in the first metal layer and the second metal layer have different average grain sizes.

11. The printed circuit board according to claim 10, wherein: The first metal layer is a chemically plated copper layer, and The second metal layer is an electrolytic copper plated layer.

12. The printed circuit board according to claim 1, wherein: The wiring pattern is provided in plural, and The plurality of wiring patterns have a line width L of less than 10 m and / or have an interval S of less than 10 m.

13. The printed circuit board according to claim 1, wherein: The insulating layer includes a first insulating layer and a second insulating layer, The wiring pattern is disposed on the upper surface of the first insulating layer, The second insulating layer is disposed on an upper surface of the first insulating layer, and The second insulating layer covers at least a portion of the wiring pattern.

14. A printed circuit board, comprising: substrate; A first metal layer is disposed on the substrate; A second metal layer, disposed on the first metal layer; as well as The barrier layer is disposed to surround the second metal layer and has a protrusion that protrudes from a lower end of the barrier layer in a plane direction perpendicular to a stacking direction.

15. The printed circuit board according to claim 14, wherein: The first metal layer is wider than the second metal layer in cross-section in the plane direction and the stacking direction, and The protrusion covers a portion of an upper surface of the first metal layer and is spaced apart from a portion of a side surface of the first metal layer.

16. The printed circuit board according to claim 14, wherein: The second metal layer is thicker than the first metal layer, and The first metal layer is thicker than the barrier layer.

17. The printed circuit board according to claim 14, wherein: The barrier layer includes an inorganic oxide film with a thickness less than 100 nm.

18. The printed circuit board according to claim 17, wherein: The inorganic oxide film includes at least one of Al2O3, TiO2, ZnO, ZnO2, ZrO2, SnO, SnO2, HfO2 and SiO2.

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