Pin Arrangement Method of Optical Switch Array, Optical Switch Array Chip and Control Method

Abstract

The present invention relates to the field of optical communication technologies, and particularly to a method for arranging pins of an optical switch array, an optical switch array chip, and a control method. The method includes: dividing the optical switch array into multiple regions according to the connection relationship of the optical switches; arranging the same ground pin for all the optical switches in each region, and arranging different electrical control pins; and arranging the same electrical control pin for all the optical switches at the same position in each region. In the present invention, by dividing the optical switches into regions, some of the optical switches use the same electrical control pin and are connected to different ground pins. For the optical switches using the same electrical control pin, since they are connected to different ground pins, only the optical switch whose connected ground pin is in an electrically conductive state can complete the signal instruction. In this way, the purpose of being able to individually control each optical switch and greatly reducing the number of pins of the optical switch array is achieved.

Description

Technical Field

[0001] The present invention relates to the field of optical communication technologies, and particularly to a method for arranging pins of an optical switch array, an optical switch array chip, and a control method thereof. Background Art

[0002] With the rapid development of the information age, the network data traffic has exploded, bringing huge challenges to traditional communication and data exchange. Traditional data interaction is restricted by the bottleneck of electrical development and has disadvantages such as high power consumption and high latency. On the other hand, optical interconnection using all-optical switching has advantages such as high speed, large bandwidth, low power consumption, and low latency, meeting the requirements of current data transmission for a new generation of switching technologies.

[0003] Silicon-based optoelectronic technology, as one of the current mainstream solutions, has advantages such as compatibility with complementary metal oxide (CMOS) process production lines, low cost, and high integration. Silicon-based optical switches on a silicon-on-insulator (SOI) platform, as the core devices for building all-optical networks, can output optical signals input from any port to any port, and silicon-based integrated optoelectronic devices have advantages such as small volume, low power consumption, and low drive voltage. In recent years, they have been widely studied and are of great significance for building an all-optical high-speed optical communication network in the future.

[0004] In the process of manufacturing large-scale silicon optical chips, multi-port optical switch arrays often arrange pins on the edge of the optical chip on a large scale to facilitate subsequent packaging because they require multiple electrical pins to control each optical switch. When the number of optical switch ports is too large, problems such as excessive pin density or insufficient space for arranging pins will occur. Therefore, finding a method to reduce the pins of an optical switch array chip is an important problem that needs to be solved urgently at present. Summary of the Invention

[0005] In view of this, the present invention provides a method for arranging pins of an optical switch array, an optical switch array chip, and a control method thereof to solve the problem of excessive pin density in an optical switch array chip in the prior art.

[0006] In a first aspect, the present invention provides a method for arranging pins of an optical switch array, the method including: dividing the optical switch array into multiple regions according to the connection relationship of the optical switches, where the optical switch array includes at least three columns of optical switches; arranging the same ground pin for all the optical switches in each region and arranging different electrical control pins; and arranging the same electrical control pin for all the optical switches in the same position in each region.

[0007] In the present invention, by dividing the optical switches in the optical switch array into regions, some of the optical switches can use the same electrical control pin but are connected to different ground pins. For the optical switches using the same electrical control pin, although the same electrical signal is applied simultaneously, since they are connected to different ground pins, only the optical switches whose connected ground pins are in an electrically conductive state can complete the signal instructions. In this way, the purpose of being able to individually control each optical switch and greatly reducing the number of pins in the optical switch array is achieved.

[0008] In an alternative embodiment, the optical switch array is divided into regions according to the connection relationship of the optical switches, obtaining multiple regions, including: obtaining the number of columns of the optical switches in the optical switch array that have not been divided into regions, and taking the number of columns as the remaining number of columns; when the remaining number of columns is greater than or equal to three columns and is an even number, starting from the last column of the remaining number of columns, obtaining half of the remaining number of columns of optical switches for region division to obtain multiple regions; when the remaining number of columns is greater than or equal to three columns and is an odd number, starting from the last column of the remaining number of columns, obtaining half of the number of columns after adding one to the remaining number of columns of optical switches for region division to obtain multiple regions.

[0009] In the present invention, by dividing the regions at about half or exactly half of the number of columns, the balance between the arranged ground pins and electrical control pins can be achieved, thereby being able to more greatly reduce the number of arranged ground pins and electrical control pins.

[0010] In an alternative embodiment, when the remaining number of columns is an even number, starting from the last column of the remaining number of columns, obtaining half of the remaining number of columns of optical switches for region division to obtain multiple regions, including: when the remaining number of columns is A columns and A is an even number, dividing the optical switches from the th column to the A - th column horizontally into regions, and each region includes one optical switch in the th column and multiple optical switches connected thereto.

[0011] In an alternative embodiment, when the remaining number of columns is an odd number, starting from the last column of the remaining number of columns, obtaining half of the number of columns after adding one to the remaining number of columns of optical switches for region division to obtain multiple regions, including: when the remaining number of columns is B columns and B is an odd number, dividing the optical switches from the th column to the B - th column horizontally into regions, and each region includes one optical switch in the th column and multiple optical switches connected thereto.

[0012] In the present invention, by using the above - mentioned method for region division, the number of divided regions is clarified, thereby further determining the number of arranged ground pins and electrical control pins.

[0013] In an alternative embodiment, when the remaining number of columns is one or two, all the optical switches with the remaining number of columns are divided into the same region.

[0014] In the present invention, when the remaining number of columns is small, it is directly divided into the same region, thereby avoiding unnecessary division of more regions and avoiding adding more ground pins.

[0015] In an alternative embodiment, the same electrical control pin is arranged for all the optical switches at the same position in each region, including: arranging the same electrical control pin for all the optical switches at the same position in the same column in each region.

[0016] In a second aspect, the present invention provides an optical switch array chip, which includes an optical switch array and ground pins and electrical control pins arranged by the method for arranging pins of the optical switch array according to the first aspect and any embodiment of the first aspect of the present invention.

[0017] In the present invention, the number of pins of the optical switch array chip can be reduced, which is convenient for chip design and pin layout, and as the number of optical switch ports increases, the effect of reducing the number of pins is more significant.

[0018] In a third aspect, the present invention provides a control method for an optical switch array chip, and the method includes: determining the optical switches that need to be in the working state according to the input ports and output ports when an optical signal is transmitted in the optical switch array; controlling the ground pins and electrical control pins corresponding to the optical switches that need to be in the working state to be in an electrically conductive state, and the ground pins and the electrical control pins are arranged by the method for arranging pins of the optical switch array according to the first aspect and any embodiment of the first aspect of the present invention.

[0019] In the present invention, due to arranging the pins by the above-mentioned method for arranging pins, when the optical switch array chip is controlled by this control method, independent control of each optical switch can be achieved.

[0020] In a fourth aspect, the present invention provides a preparation method for an optical switch array chip, and the method includes: forming an optical switch array on a substrate; arranging ground pins and electrical control pins on the substrate by the method for arranging pins of the optical switch array according to the first aspect and any embodiment of the first aspect of the present invention to obtain an optical switch array chip; packaging the optical switch array chip.

[0021] In the present invention, when preparing the optical switch array chip, the above-mentioned method for arranging pins is used to arrange the ground pins and electrical control pins, thereby reducing the preparation difficulty and packaging difficulty. Description of the Drawings

[0022] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0023] Figure 1 is a schematic flowchart of a method for arranging pins of an optical switch array according to an embodiment of the present invention;

[0024] Figure 2 is a schematic structural diagram of an optical switch array according to an embodiment of the present invention;

[0025] Figure 3 is a schematic structural diagram of another optical switch array according to an embodiment of the present invention;

[0026] Figure 4 is a schematic structural diagram of another optical switch array according to an embodiment of the present invention

[0027] Figure 5 is a schematic structural diagram of yet another optical switch array according to an embodiment of the present invention;

[0028] Figure 6 is a flowchart of a control method for an optical switch array chip according to an embodiment of the present invention;

[0029] Figure 7 is a schematic flowchart of a preparation method for an optical switch array chip according to an embodiment of the present invention. Specific Embodiments

[0030] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0031] In the description of the present invention, it should be noted that the orientation or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and should not be construed as indicating or implying relative importance.

[0032] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "installation", "connection", and "coupling" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can also be the communication inside two components. It can be a wireless connection or a wired connection. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0033] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0034] Currently, in the related art when designing a multi-port optical switch array, each optical switch unit is equipped with 1 electrical pin for command control. All the optical switches share the same ground and use 1 ground pin. And for the convenience of packaging, all the electrical pins are distributed at the upper and lower ends of the optical switch array chip. When the number of ports of the optical switch array is very large, a large number of pins are required, resulting in the inability to design and distribute the space at the upper and lower ends of the chip in an orderly manner, which brings great difficulties to the electrical packaging.

[0035] According to an embodiment of the present invention, there is provided an embodiment of a method for arranging pins of an optical switch array. Although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.

[0036] In this embodiment, there is provided a method for arranging pins of an optical switch array. Figure 1 is a flowchart of a method for arranging pins of an optical switch array according to an embodiment of the present invention, as Figure 1 shown, the process includes the following steps:

[0037] Step S101, divide the optical switch array into regions according to the connection relationship of the optical switches, and obtain a plurality of regions. The optical switch array includes optical switches with three or more columns. Specifically, according to the number of input ports and output ports of the optical switches, the optical switches can be divided into various types such as 1×N, 2×N, M×N, etc. Among them, the optical switches in the optical switch array in this embodiment are 1×N optical switches, and N can be taken according to actual needs. For example, and N is greater than or equal to 8. The optical switch array includes a plurality of input ports, a plurality of output ports, and a plurality of optical switches provided between the plurality of input ports and the plurality of output ports. The plurality of optical switches are connected by the connection methods in the related art.

[0038] In this embodiment, the number of columns included in the optical switch array is determined based on the number of optical switches and their connection relationship. For example, as Figure 2As shown, the optical switch array includes seven optical switches. The two output terminals of the first optical switch are respectively connected to the input terminals of the second optical switch and the third optical switch. The two output terminals of the second optical switch are respectively connected to the input terminals of the fourth optical switch and the fifth optical switch. The two output terminals of the third optical switch are respectively connected to the input terminals of the sixth optical switch and the seventh optical switch. Then, the number of columns of this optical switch array is 3. Among them, the first optical switch is in the first column, the second optical switch and the third optical switch are in the second column, and the fourth optical switch to the seventh optical switch are in the third column. The arrangement method of the pins in this embodiment is mainly for optical switch arrays including three columns and more than three columns. When the optical switch array has only two columns or one column or when the number of optical switches in the optical switch array is small, the pin arrangement method in the related technology can be directly adopted.

[0039] In this embodiment, when performing region division, it is divided based on the connection method of the optical switches in the optical switch array. That is, the optical switches with a connection relationship are divided into one region. For example, still for the above-mentioned optical switch array with seven optical switches, as Figure 2 shown, the fourth optical switch and the fifth optical switch are respectively connected to the second optical switch. The second optical switch, the fourth optical switch, and the fifth optical switch are divided into the same region (such as the first region). Similarly, the third optical switch, the sixth optical switch, and the seventh optical switch are divided into the same region (such as the second region). The remaining first optical switch can be divided into a separate region, or it can be divided into the region where the second optical switch is located, or it can be divided into the region where the third optical switch is located.

[0040] Step S102, arrange the same ground pin for all the optical switches in each region, and arrange different electrical control pins. Specifically, after the region division is completed, the same ground pin is arranged for all the optical switches in the same region, that is, all the optical switches in the same region share the same ground pin. As Figure 2 shown, the first region arranges the same ground pin GND1, and the second region arranges the second ground pin GND2. At the same time, different electrical control pins are arranged for all the optical switches in the same region.

[0041] Step S103, arrange the same electrical control pin for all the optical switches in the same position in each region. Specifically, after the region division is completed, all the regions can be compared to determine the optical switches in the same position. This same position can be determined based on the connection method of the optical switches. Among them, the optical switches in the same position can be the optical switches in the same position in the same column. For example, still for the above-mentioned optical switch array with seven optical switches, as Figure 2As shown, the second optical switch and the third optical switch in the first region and the second region are in the same column, so the same electrical control pin Sig1 is arranged for the second optical switch and the third optical switch; the fourth optical switch and the sixth optical switch are both located in the third column and are both connected to the upper output end of the previous optical switch. Therefore, it is considered that the fourth optical switch and the sixth optical switch are in the same position, so the same electrical control pin Sig2 is arranged for the fourth optical switch and the sixth optical switch. Similarly, the same electrical control pin Sig3 is arranged for the fifth optical switch and the seventh optical switch. For the first optical switch, it is not in the same column as other optical switches, that is, there is no optical switch in the same position as the first optical switch. Therefore, a separate electrical control pin Sig4 is arranged for the first optical switch.

[0042] Based on this, different ground pins are used in each region, and different electrical control pins are used for the optical switches in the same region, which makes it possible to control each optical switch separately. For example, for the optical switch array shown in the figure, based on step S102, the same ground pin GND1 is arranged for all the optical switches in the first region, and the same ground pin GND2 is arranged for all the optical switches in the second region. At the same time, different electrical control pins are arranged for all the optical switches in the first region, such as electrical pins Sig1, Sig2, and Sig3 are arranged respectively. The same is true for the second region. At this time, if it is necessary to control the fourth optical switch separately, only the Sig2 and GND1 pins need to be connected simultaneously. At this time, only this optical switch works and there is no response from others. Because the optical switches controlled by Sig2 in other regions are not connected to the GND1 pin, and the other optical switches in the region where the GND1 pin is connected are not connected to the electrical control pin Sig2.

[0043] For the Figure 2 shown optical switch array, when the pin arrangement method in the related technology is adopted, that is, each optical switch unit is equipped with 1 electrical control pin for instruction control, and all the optical switches share the same ground, that is, share 1 ground pin, then seven electrical control pins need to be arranged for the seven optical switches in this optical switch array, plus one ground pin, so eight pins need to be arranged. However, when the pin arrangement method in the above-mentioned manner is adopted, by dividing into two regions, two ground pins need to be arranged, and at the same time, four electrical control pins are arranged, so a total of six pins need to be arranged. And even if the first optical switch is divided into a separate region, that is, one more ground pin is added, the total is also seven pins. It can be seen that compared with the pin arrangement method in the related technology, the pin arrangement method provided in this embodiment reduces the number of pins in the optical switch array.

[0044] In addition, it should be noted that the above embodiments are only examples for an optical switch array with seven optical switches. When the optical switch array includes a larger number of optical switches, the pin arrangement method of this embodiment can reduce more pin numbers. If the number of optical switches in the optical switch array is small or the number of columns is small, the pin arrangement method in the related art can be directly adopted. Since the number of optical switches is small at this time, the number of pins to be arranged is also small, and it will not cause great difficulties to the packaging.

[0045] The pin arrangement method of the optical switch array provided by the embodiment of the present invention divides the optical switches in the optical switch array into regions, so that some of the optical switches can use the same electrical control pin but are connected to different ground pins. For the optical switches using the same electrical control pin, although the same electrical signal is applied simultaneously, since they are connected to different ground pins, only the optical switch whose connected ground pin is in an electrically conductive state can complete the signal instruction. In this way, the purpose of being able to individually control each optical switch and greatly reducing the number of pins of the optical switch array is achieved.

[0046] In this embodiment, a pin arrangement method of an optical switch array is provided, and the method includes the following steps:

[0047] Step S201: Divide the optical switch array into regions according to the connection relationship of the optical switches to obtain a plurality of regions, and the optical switch array includes optical switches with three or more columns. Specifically, since the regions are divided according to the connection relationship of the optical switches, and the input end of the latter optical switch in the optical switch array is connected to the output end of the previous optical switch, when dividing the regions according to the connection relationship, the specific division position can be judged forward from the optical switch in the last column of the optical switch array based on its connection relationship. Among them, the optical switch in the last column can be finally connected to the optical switch in the first column based on its connection relationship. However, if the optical switch in the first column is used as the division position, the entire optical switch array will be divided into one region, which is the same as the pin arrangement method in the related art; if the optical switch in the second column from the positive number is used as the division position for pin arrangement, that is, each optical switch in the second column from the positive number and the optical switches connected thereto are divided into one region, although the number of electrical control pins is reduced compared with the related art, because each region needs to arrange a ground pin, that is, through the region division, the number of ground pins is increased compared with the related art. Therefore, in order to minimize the number of electrical control pins and the increase in the number of ground pins is not too much, that is, to achieve the balance between the electrical control pins and the ground pins, the regions can be divided from the position of half the number of columns of the optical switch array.

[0048] Specifically, the above step S201 includes:

[0049] Step S2011, obtain the number of columns of the optical switches in the optical switch array that have not been regionally divided, and use this number of columns as the remaining number of columns.

[0050] Step S2012, when the remaining number of columns is greater than or equal to three columns and is an even number, perform regional division on the optical switches by obtaining half of the remaining number of columns from the last column of the remaining number of columns forward, to obtain multiple regions.

[0051] Step S2013, when the remaining number of columns is greater than or equal to three columns and is an odd number, perform regional division on the optical switches by obtaining half of the number of columns after adding one to the remaining number of columns from the last column of the remaining number of columns forward, to obtain multiple regions.

[0052] Step S2014, when the remaining number of columns is one column or two columns, divide all the optical switches of the remaining number of columns into the same region.

[0053] Specifically, according to the above analysis, when performing regional division at the position of half of the number of columns, the number of pins arranged can be reduced to a greater extent. However, when the optical switch array is odd, it is impossible to perform division of half of the number of columns. Therefore, corresponding division methods need to be determined respectively for when the number of columns is odd and even. As in the above method, when the number of columns is even, half of the number of columns is selected each time for regional division, and when the number of columns is odd, half of the number of columns after adding 1 to the remaining number of columns is selected each time for regional division. In addition, after performing regional division on half of the number of columns or half of the number of columns after adding 1 to the remaining number of columns, if there are still more than three columns of optical switches that have not been regionally divided, the corresponding number of columns can be continuously selected according to whether it is odd or even for regional division. That is, multiple regional divisions need to be performed using this regional division method.

[0054] Specifically, when the number of columns of the optical switches in the optical switch array that have not been regionally divided is even, determine the position of half of the number of columns from the last column forward for regional division, that is, each optical switch in the column where half of the number of columns is located and the optical switches connected thereto are divided into one region. In this way, the regional division of half of the number of columns is completed. For the remaining half of the number of columns that have not been regionally divided, it may be odd or even. When the remaining number of columns is odd, determine the position of half of the number of columns after adding one to the remaining number of columns from the last column of the remaining number of columns forward for regional division, and divide each optical switch in the column where the position of half of the number of columns after adding one is located and the optical switches connected thereto into one region. Then, continuously repeat the above process for multiple regional divisions.

[0055] For example, when the number of columns of the optical switch array is ten, during the first regional division, the remaining number of columns is ten, and half of the remaining number of columns is five. The sixth column is used as the division position. If the sixth column includes 32 optical switches, each optical switch and all the optical switches connected thereto are divided into one region, resulting in 32 regions. After the first regional division is completed, the remaining number of columns is five. The third column is used as the division position. If the third column includes 4 optical switches, each optical switch and all the optical switches connected to the fifth column (the last column of the remaining number of columns) are divided into one region, resulting in 4 regions. After the second regional division is completed, the remaining number of columns only includes two columns. At this time, all the remaining optical switches that have not been regionally divided can be divided into the same region.

[0056] In an alternative embodiment, as Figure 3 shown, when the optical switches in the optical switch array are 1×2 optical switches and are connected to form a tree structure as shown, if the remaining number of columns is column A and A is an even number, the optical switches from the ( )th column to the A-th column are evenly divided into regions, and each region includes one optical switch in the ( )th column and multiple optical switches connected thereto. If the remaining number of columns is column B and B is an odd number, the optical switches from the ( )th column to the B-th column are evenly divided into regions, and each region includes one optical switch in the ( )th column and multiple optical switches connected thereto. In the divided regions GND1 - GND (or GND ), the first-column optical switches in each GND region are controlled by the electrical control pin Sig1, the first-row optical switches in the second column of each GND region are controlled by the electrical control pin Sig2, and the optical switches in the last column are controlled by the electrical control pins Siga, Sigb, Sigc, and Sigd respectively.

[0057] Step S202: Arrange the same ground pin for all the optical switches in each region. For details, please refer to step S102 of the embodiment shown in Figure 1 and will not be elaborated here.

[0058] Step S203: Arrange the same electrical control pin for all the optical switches in the same position in each region; for details, please refer to step S103 of the embodiment shown in Figure 1 and will not be elaborated here.

[0059] Specifically, as Figure 4 shown, when the optical switch array is a 1×16 optical switch array (a total of 4 columns, A = 4), the method for setting the pins of the optical switch array in the related art is that inFigure 4 In the shown 1×16 optical switch array, there are a total of fifteen optical switches. Each optical switch is controlled by applying a signal through an electrical pin, and they share a GND pin. A total of sixteen pins are required.

[0060] When the method of this embodiment is adopted, the optical switches in the last two columns (from the ( th column to the 4th column) are divided into four regions ( ). Each region uses the same GND pin, namely GND1, GND2, GND3, and GND4. The third column of optical switches is controlled by the same pin Sig1 for signals. For each divided region in the fourth column of optical switches, the optical switches are respectively set as pins Sig2 and Sig3. The optical switches in the first column and the second column are divided into one region and are respectively controlled by pins Sig01, Sig02, and Sig03 for signals, and the optical switches in the first column and the second column use the same GND pin, GND0. In this way, a total of 11 pins are used by the method of this embodiment, reducing the number of pins of the optical switches on the chip compared with the original 16 pins.

[0061] As Figure 5 shown, when the optical switch array is a 1×32 optical switch array (a total of 5 columns, B = 5), the method for setting the pins of the optical switches in the related art is that in the Figure 5 shown 1×32 optical switch array, there are a total of 31 optical switches. Each optical switch is controlled by applying a signal through an electrical pin, and they share a GND pin. A total of 32 pins are required.

[0062] When the method of this embodiment is adopted, the optical switches in the last two columns (from the ( th column to the (B = 5)th column) are divided into four regions ( ). Each region uses the same GND, namely GND1, GND2, GND3, and GND4. The third column of optical switches is controlled by the same pin Sig1 for signals. For each divided region in the fourth column of optical switches, the optical switches are respectively set as pins Sig2 and Sig3. For each region of the optical switches in the fifth column, they are respectively set as Sig4, Sig5, Sig6, and Sig7. The optical switches in the first column and the second column are respectively controlled by pins Sig01, Sig02, and Sig03 for signals, and the optical switches in the first column and the second column use a GND pin, GND0. In this way, a total of 15 pins are used by the method of this embodiment. The number of pins of the optical switches on the chip is greatly reduced compared with the original 32 pins.

[0063] In this embodiment, an optical switch array chip is provided. The chip includes an optical switch array, a ground pin, and an electrical control pin arranged by the method for arranging the pins of the optical switch array described in the above embodiment.

[0064] The optical switch array chip provided by the embodiment of the present invention can reduce the number of pins of the optical switch chip, facilitate chip design and pin layout, and as the number of optical switch ports increases, the effect of reducing the number of pins becomes more significant.

[0065] In this embodiment, a control method for an optical switch array chip is provided. As Figure 6 shown, the method includes the following steps:

[0066] Step 301, determine the optical switches that need to be in the working state according to the input ports and output ports when the optical signal is transmitted in the optical switch array;

[0067] Step 302, control the ground pins and electrical control pins of the corresponding optical switches to be in an electrically conductive state according to the optical switches that need to be in the working state. The ground pins and the electrical control pins are arranged by using the pin arrangement method of the optical switch array described in the above embodiment.

[0068] Specifically, the optical switch array includes a plurality of input ports, a plurality of output ports, and a plurality of optical switches disposed between the plurality of input ports and the plurality of output ports. When the optical switch array works, the optical signal can be input from any one of the input ports and output from any one of the output ports. Therefore, before the optical switch array works, it is necessary to determine the input port and output port of the optical signal. In addition, after the input port and output port are determined, the optical switches that need to be in the working state are determined based on the optical switches connected between the determined input port and output port. Then, when the optical switch array works, signals are applied to the ground pins and electrical control pins of the optical switches that need to be in the working state, that is, the corresponding ground pins and electrical control pins are in an electrically conductive state, so that the corresponding optical switches are in the working state, and the optical signal is input from the corresponding input port and output from the corresponding output port.

[0069] For example, when the structure of the optical switch array is as Figure 4When shown as such, the control method can be implemented according to the following process: If light enters from input port 1 and exits from output port 1, the optical switches that need to be in the working state are the first optical switch, the second optical switch, the third optical switch, and the fourth optical switch. Thus, it is determined that the ground pins and electrical control pins that need to be in the conducting state include Sig01, Sig02, and GND0, as well as Sig1, Sig2, and GND1. This enables light, after entering from input port 1, to enter the second optical switch through the first optical switch 1 from the upper waveguide, and reach the third optical switch from the upper waveguide of the second optical switch. When the light passes through the third optical switch, it exits from the upper waveguide of the third optical switch and enters the fourth optical switch, and finally exits from output port 1. Since no electrical signals are applied to GND2, GND3, and GND4, although control signals are also applied to Sig1 and Sig2 in other regions, the optical switches in those regions are all in the non-working state.

[0070] When the structure of the optical switch array is as Figure 5 shown, the control method can be implemented according to the following process: If light enters from input port 1 and exits from output port 1, the optical switches that need to be in the working state are the first optical switch, the second optical switch, the third optical switch, the fourth optical switch, and the fifth optical switch. Thus, it is determined that the ground pins and electrical control pins that need to be in the conducting state include Sig01, Sig02, and GND0, as well as Sig1, Sig2, Sig4, and GND1. This enables light, after entering from input port 1, to enter the second optical switch through the first optical switch 1 from the upper waveguide, and reach the third optical switch from the upper waveguide of the second optical switch. When the light passes through the third optical switch, it exits from the upper waveguide of the third optical switch and enters the fourth optical switch. The optical signal exiting from the upper waveguide of the fourth optical switch enters the fifth optical switch, and finally exits from output port 1. Since no electrical signals are applied to GND2, GND3, and GND4, although control signals are also applied to Sig1, Sig2, and Sig4 in other regions, the optical switches in those regions are all in the non-working state.

[0071] In this embodiment, a method for fabricating an optical switch array chip is provided, as Figure 7 shown, the method includes the following steps:

[0072] Step S401, forming an optical switch array on a substrate; specifically, before fabricating the optical switch array chip, the layout of the chip can be determined first and a photolithography mask plate can be formed. Among them, the substrate can be made of materials such as silicon, silicon-on-insulator, or quartz. During fabrication, the substrate is first cleaned and processed, and then the waveguide pattern is transferred from the photolithography mask plate to the substrate by using photolithography technology, and then an optical switch is formed on the substrate based on the working principle of the optical switch, thus completing the fabrication of the optical switch array.

[0073] Step S402: On the substrate, ground pins and electrical control pins are arranged according to the pin arrangement method of the optical switch array described in the above embodiments to obtain an optical switch array chip. Specifically, after determining the ground pins and electrical control pins that need to be arranged based on the pin arrangement method of the optical switch array in the above embodiments, pins are fabricated at the edge of the substrate or a preset position through photolithography and etching processes to obtain an optical switch array chip.

[0074] Step S403: Package the optical switch array chip. Specifically, during packaging, the optical switch array chip can be fixed on a packaging substrate and connected to the substrate, and then packaged with a packaging shell.

[0075] Although the exemplary embodiments and their advantages have been described in detail, those skilled in the art can make various changes, substitutions, and modifications to these embodiments without departing from the spirit of the present invention and the scope of protection defined by the appended claims. Such modifications and variations all fall within the scope defined by the appended claims. For other examples, those of ordinary skill in the art should easily understand that the order of process steps can be changed while maintaining the scope of protection of the present invention.

[0076] In addition, the application scope of the present invention is not limited to the processes, mechanisms, manufacturing, compositions of matter, means, methods, and steps of the specific embodiments described in the specification. From the disclosure of the present invention, those of ordinary skill in the art will easily understand that for the processes, mechanisms, manufacturing, compositions of matter, means, methods, or steps that currently exist or will be developed in the future, which perform substantially the same functions or achieve substantially the same results as the corresponding embodiments described in the present invention, they can be applied in accordance with the present invention. Therefore, the appended claims of the present invention are intended to include these processes, mechanisms, manufacturing, compositions of matter, means, methods, or steps within their scope of protection.

Claims

1. A pin arrangement method for an optical switch array, characterized in that: The method comprises: Dividing the optical switch array into regions according to the connection relationship of the optical switches to obtain a plurality of regions, wherein the optical switch array includes more than or equal to three columns of optical switches; Arrange the same ground pin for all optical switches in each area, and arrange different electrical control pins; Arranging the same electrical control pin for all optical switches at the same position in each area; The optical switch array is divided into regions according to the connection relationship of the optical switches to obtain multiple regions, including: Acquire the number of columns of optical switches that are not divided into regions in the optical switch array, and use the number of columns as the number of remaining columns; When the number of remaining columns is greater than or equal to three and is an even number, the region is divided according to optical switches of half the number of remaining columns obtained from the last column of the remaining columns to obtain a plurality of regions; When the remaining number of columns is greater than or equal to three and is an odd number, the area division is performed according to the optical switches of half the number of columns obtained by adding one to the remaining number of columns from the last column of the remaining number of columns, so as to obtain a plurality of areas.

2. The method according to claim 1, characterized in that When the number of remaining columns is an even number, the area division is performed according to the optical switches of half the number of remaining columns obtained from the last column of the remaining columns, and multiple areas are obtained, including: When the number of remaining columns is A and A is an even number, The optical switch levels from column A to column B are divided into areas, each of which includes An optical switch in a column and multiple optical switches connected thereto.

3. The method according to claim 1, characterized in that When the number of remaining columns is an odd number, the area division is performed according to the optical switches of half the number of remaining columns plus one obtained from the last column of the remaining columns, and multiple areas are obtained, including: When the number of remaining columns is B and B is an odd number, The optical switch levels from row to row B are divided into areas, each of which includes An optical switch in a column and multiple optical switches connected thereto.

4. The method according to claim 1, characterized in that: When the number of remaining columns is one or two, all optical switches of the remaining columns are divided into the same area.

5. The method according to claim 1, characterized in that Arrange the same electrical control pin for all optical switches at the same position in each area, including: The same electrical control pin is arranged for all optical switches in the same column and the same position in each area.

6. An optical switch array chip, characterized in that: The chip comprises an optical switch array and ground pins and electrical control pins arranged by the pin arrangement method for an optical switch array according to any one of claims 1 to 5.

7. A control method for an optical switch array chip, characterized in that: The method comprises: Determine the optical switch that needs to be in working state according to the input port and the output port when the optical signal is transmitted in the optical switch array; According to the optical switch that needs to be in working state, the ground pin and the electrical control pin of the corresponding optical switch are controlled to be in an electrically conductive state, and the ground pin and the electrical control pin are arranged using the pin arrangement method of the optical switch array according to any one of claims 1-5.

8. A method for preparing an optical switch array chip, characterized in that: The method comprises: forming an optical switch array on a substrate; Arranging ground pins and electrical control pins on the substrate according to the pin arrangement method of an optical switch array according to any one of claims 1 to 5, to obtain an optical switch array chip; The optical switch array chip is packaged.

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