Ultrathin gasket, manufacturing method thereof and chip interconnection method
By using multiple etching of ultra-thin gaskets to form step structures in heterogeneous integration technology of high-density pin chips, the problems of chip vertical spacing control and lobe risk are solved, achieving higher sensitivity and lower blind rate.
Patent Information
- Application Number
- CN202411938743.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-22
AI Technical Summary
In heterogeneous integration technology of high-density pin chips, it is difficult to accurately control the vertical spacing of the chips, and detector chip lobes are easily caused during chip interconnection.
Using the ultra-thin gasket manufacturing method, step structures with different heights are formed by multiple etching, for support and spacing control, ensuring accurate vertical spacing when chip interconnection and avoiding lobe risks.
Accurate control of vertical spacing during chip interconnection, reduces lobe risk, and improves device sensitivity and blind rate.
Smart Images
Figure CN119864282A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the technical field of heterogeneous integration of high-density pin chips, and specifically relates to an ultra-thin gasket and a manufacturing method thereof, and a chip interconnection method. Background Art
[0002] Heterogeneous integration technology for high-density pin chips is to integrate chips with different functions such as microelectronics and optoelectronics through fine pitch micro-bump interconnection. Compared with traditional three-dimensional micro-assembly technology, the volume is reduced to 1 / 100, while the performance is improved by 100 times. Therefore, chip-level heterogeneous integration technology has a revolutionary impact on the sensing, communication, processing and execution of information systems. The typical application of high-density pin chips is focal plane imaging sensors, involving bands including infrared, microwave, millimeter wave and terahertz wave. In order to improve the sensitivity and response speed of the sensor, the measures usually adopted include removing the detector chip substrate and increasing the micro-lens integration of the incident light surface. After the detector chip substrate is removed, the device structure layer is only a few microns. Excessive pressure or uneven force when integrating the micro-lens chip will cause the detector chip to crack. At the same time, with the increase in resolution requirements, the pitch of micro-bumps continues to shrink. Poor control of the vertical spacing between the detector chip and the readout circuit chip during flip-chip bonding will cause short circuits between adjacent micro-bumps and form bad pixels. Therefore, multi-layer chip mounting and precise control of the vertical spacing between the detector chip and the readout circuit chip have a significant impact on the performance of the device, such as sensitivity and blind pixel rate. Summary of the invention
[0003] The technical problem solved by the present application is: how to achieve precise control of the vertical spacing of interconnected chips during chip interconnection and avoid the risk of chip splitting during the mounting process.
[0004] The present application provides a method for manufacturing an ultra-thin gasket, the manufacturing method comprising:
[0005] Performing a first etching on the separation groove area of the original gasket;
[0006] Performing a second etching on the first step region and the separation groove region of the original gasket simultaneously;
[0007] The second step area, the first step area, and the separation groove area of the original gasket are simultaneously etched for a third time to form a first step in the first step area and a second step in the second step area. The separation groove area is completely etched to divide the original gasket into at least two ultra-thin gaskets, each of which has a first step and a second step with different heights.
[0008] Optionally, the method of performing a first etching on the separation groove region of the original gasket includes:
[0009] Forming a first mask on the original pad, wherein the first mask exposes the separation groove area;
[0010] The separation groove region is etched to form a separation groove.
[0011] Optionally, the method of simultaneously performing a second etching on the first step region and the separation groove region of the original gasket includes:
[0012] Etching the first mask to form a second mask, wherein the second mask exposes the first step region and the separation groove;
[0013] The first step region and the separation groove are etched simultaneously to form a first step structure in the first step region, and the depth of the separation groove is deepened.
[0014] Optionally, the method of simultaneously performing a third etching on the second step region, the first step region, and the separation groove region of the original gasket includes:
[0015] Forming a third mask on the original gasket, wherein the third mask exposes the second step region, the first step structure, and the separation groove;
[0016] The second step region, the first step structure, and the separation groove are etched simultaneously, wherein the separation groove is completely etched, the height of the first step structure is reduced to form a first step, and the remaining structure of the second step region forms a second step.
[0017] Optionally, the first mask and the second mask are photoresist masks, and the third mask is a hard mask.
[0018] Optionally, the method of forming a third mask on the original gasket includes:
[0019] removing the second mask after the second etching;
[0020] Depositing a hard mask material layer on the original gasket, the hard mask material layer covers the non-step region, the second step region, the first step structure, and the separation groove of the original gasket;
[0021] The hard mask material layer is etched to retain a portion of the hard mask material layer above the non-step region to form a third mask.
[0022] Optionally, the separation groove region, the first step region, the second step region, and the non-step region are adjacent to each other in sequence.
[0023] The present application also provides an ultra-thin gasket, which is manufactured by the above-mentioned manufacturing method.
[0024] The present application also provides a chip interconnection method, the chip interconnection method comprising:
[0025] Disposing a plurality of ultra-thin gaskets at intervals in the non-interconnected area of the first chip, wherein the ultra-thin gaskets are manufactured according to the above-mentioned manufacturing method;
[0026] Flipping and bonding a second chip above the interconnection region of the first chip, with the edge of the second chip receiving the first step of the ultra-thin gasket, and then thinning the second chip to retain the device structure layer;
[0027] A third chip is placed above the second chip with an interval, and an edge of the third chip is supported and fixed on the second step of the ultra-thin gasket.
[0028] Optionally, the chip interconnection method further includes:
[0029] A portion of the non-step area of the ultra-thin gasket is cut away.
[0030] The present application provides an ultra-thin gasket and a manufacturing method thereof, and a chip interconnection method, which have the following technical effects:
[0031] When interconnecting chips, each step of the ultra-thin gasket carries each stacked chip. On the one hand, the chip spacing can be controlled by setting different heights of the steps. On the other hand, each step can play a supporting and auxiliary role, bearing the chip mounting pressure and avoiding the risk of chip splitting. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Figure 1 is a flow chart of main steps of a method for manufacturing an ultra-thin gasket according to one or more embodiments;
[0033] Figure 2a , Figure 2b , Figure 2c , Figure 2d , Figure 2e , Figure 2f , Figure 2g , Figure 2h is a schematic diagram of a process of manufacturing an ultra-thin gasket according to one or more embodiments;
[0034] Figure 3 The figure is a flowchart of a chip interconnection method according to one or more embodiments. DETAILED DESCRIPTION
[0035] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0036] Before describing each embodiment of the present application in detail, the technical concept of the present application is briefly described first: the heterogeneous integration technology for high-density pin chips currently has problems such as difficulty in accurately controlling the vertical spacing of chips and easy chip cracking during the chip stacking and interconnection process. For this reason, the ultra-thin gasket and its manufacturing method, and the chip interconnection method provided by the present application first manufacture an ultra-thin gasket with at least two steps. When interconnecting chips, each step of the ultra-thin gasket carries each stacked chip. On the one hand, the chip spacing can be controlled by setting different heights of the steps. On the other hand, each step can play a supporting and auxiliary role, withstand the chip mounting pressure, and avoid the risk of cracking. The specific principles of the ultra-thin gasket and its manufacturing method of the present application are described below in combination with more embodiments.
[0037] Specifically, Figure 1 As shown, the manufacturing method of the ultra-thin gasket in this embodiment includes the following steps:
[0038] Step S10, performing a first etching on the separation groove area of the original gasket;
[0039] Step S20, performing a second etching on the first step region and the separation groove region of the original gasket simultaneously;
[0040] Step S30, simultaneously perform a third etching on the second step area, the first step area, and the separation groove area of the original gasket to form a first step in the first step area and a second step in the second step area. The separation groove area is completely etched to divide the original gasket into at least two ultra-thin gaskets, each of which has a first step and a second step with different heights.
[0041] In one or more embodiments, Figure 2a and Figure 2b As shown, the method of performing the first etching on the separation groove region 10a of the original gasket 10 in step S10 includes: forming a first mask 20 on the original gasket 10, the first mask 20 exposing the separation groove region 10a, etching the separation groove region 10a to form the separation groove 11. Exemplarily, the first mask 20 can be a photoresist or a SiO 2 、SiN x The selection of the material of the first mask 20 is related to the thickness of the first step. Generally, the insulating material is more resistant to etching than the photoresist. For example, when the thickness of the first step is less than 30 microns, the photoresist can be selected as the first mask 20. Then, a deep reactive ion etcher is used to etch out the core particle separation groove, and the thickness of the first step is determined.
[0042] In one or more embodiments, Figure 2c and Figure 2dAs shown, the method of simultaneously performing a second etching on the first step region 10b and the separation groove region 10a of the original gasket 10 in step S20 includes: etching the first mask 20 to form a second mask 30, the second mask 30 exposing the first step region 10b and the separation groove 11; etching the first step region 10b and the separation groove 11 simultaneously, forming a first step structure in the first step region 10b, and deepening the depth of the separation groove 11. Exemplarily, the first mask 20 uses a photoresist, and the first mask 20 is photolithographically formed to form the second mask 30.
[0043] In one or more embodiments, Figure 2e , Figure 2f , Figure 2g , Figure 2h As shown, the method for simultaneously performing a third etching on the second step region 10c, the first step region 10b, and the separation groove region 10a of the original gasket 10 includes: forming a third mask 40 on the original gasket 10, the third mask 40 exposing the second step region 10c, the first step structure, and the separation groove; simultaneously etching the second step region 10c, the first step structure, and the separation groove 11, wherein the separation groove 11 is completely etched, the height of the first step structure is reduced to form a first step 12, and the remaining structure of the second step region 10c forms a second step 13.
[0044] For example, in order to ensure that the original gasket 10 has sufficient mechanical strength, the non-step region of the original gasket 10 should not be too thin and is designed to be more than 300 microns. Therefore, the separation groove region 10a is expected to be etched to a depth of more than 200 microns. At the same time, the gasket is thin after etching, and the efficiency of removing the photoresist is not high and it is easy to crack. Therefore, an insulating material such as SiO 2 As the third mask 40, that is, the third mask 40 is a hard mask, the strength can be enhanced to avoid cracking during the process of manufacturing the ultra-thin gasket. Specifically, the method of manufacturing the third mask on the original gasket includes:
[0045] First, the second mask 30 after the second etching is removed.
[0046] Next, a hard mask material layer 41 is deposited on the original gasket 10 to cover the non-step region 10d, the second step region 10c, the first step structure, and the separation groove 11 of the original gasket 10. For example, the hard mask material layer 41 is a SiO2 layer that is deposited and grown to a thickness of several microns. 2 .
[0047] Finally, the hard mask material layer 41 is etched, and a portion of the hard mask material layer above the non-step region 10d is retained to form a third mask 40. As shown in the figure, a photoresist is deposited on the hard mask material layer 41, and a photoresist pattern 42 of a hard mask structure is formed by photolithography, which is used to etch the hard mask material layer 41. Next, the third mask 40 is etched out by reactive ion etching or wet etching, and the remaining photoresist is removed by an organic chemical solvent such as acetone.
[0048] Exemplarily, the separation groove region 10a, the first step region 10b, the second step region 10c, and the non-step region 10d are adjacent in sequence. It should be noted that more step regions can be set, and more steps can be obtained by referring to the above-mentioned etching steps. For example, the first step 12, the second step 13, and the third step region can be etched for the fourth time to obtain the third step, and the heights of the first step 12 and the second step 13 are further reduced to form three steps of different heights. By analogy, an ultra-thin gasket with more steps can be obtained. In other embodiments, the etching depth can be controlled during each etching so that the separation groove 11 is just completely etched and a preset number of steps are formed during the last etching.
[0049] In one or more embodiments, Figure 3 As shown, the chip interconnection method includes the following steps:
[0050] First, a plurality of ultra-thin gaskets 100 are arranged at intervals in the non-interconnected area of the first chip 200, and the ultra-thin gaskets 100 are manufactured according to the above-mentioned manufacturing method. For example, there are four ultra-thin gaskets 100, which are temporarily fixed around the interconnected area to ensure that the first step 200 does not occupy the interconnected area and can contact the second chip 300. The temporary fixing method can use the surface tension of volatile liquids such as alcohol to make the ultra-thin gasket 100 fit the first chip 200, or the side wall of the ultra-thin gasket 100 can be coated with adhesive materials such as easily removable glue and wax to complete the fitting;
[0051] Next, the second chip 300 is flipped and bonded above the interconnection area of the first chip 200, and the edge of the second chip 300 is connected to the first step 11 of the ultra-thin gasket 100, and the second chip 300 is thinned to retain the device structure layer. Exemplarily, the flip-chip bonding makes the second chip 300 contact the first step 11 of the ultra-thin gasket 100, and the bottom seal filling enhances the bonding strength between the second chip 300 and the first chip 200. The overflow of the bottom seal filling glue needs to be precisely controlled, and the height is preferably lower than the second step 13. Then the second chip is thinned, usually by mechanical thinning to a thickness of tens of microns, and then the substrate is completely removed by wet method, leaving the device structure layer.
[0052] Then, the third chip 400 is placed above the second chip 300, and the edge of the third chip 400 is connected to and fixed on the second step 13 of the ultra-thin gasket 100. For example, the third chip 400 is placed on the second step 13 of the gasket and fixed by glue at the edge. By precisely controlling the thickness of each step of the ultra-thin gasket 100, the vertical spacing between the second chip 300 and the first chip 200 and the vertical spacing between the third chip 400 and the second chip 300 can be controlled.
[0053] Finally, the non-step region portion of the ultra-thin spacer 100 is cut away.
[0054] The ultra-thin gasket and its manufacturing method, and the chip interconnection method of this embodiment have the following beneficial effects:
[0055] (1) Without changing the process of each chip, the vertical spacing between the upper and lower chips can be precisely controlled to improve the sensitivity of the device, while reducing the risk of short circuits between adjacent electrodes caused by too low micro-bump interconnection spacing;
[0056] (2) The ultra-thin gasket serves as an auxiliary support for the microlens chip. While accurately controlling the vertical distance between the microlens chip and the ultra-thin detector chip, it also bears the mounting pressure of the microlens chip, thereby avoiding the risk of chipping caused by bonding pressure.
[0057] The specific implementation methods of the present application are described in detail above. Although some embodiments have been shown and described, those skilled in the art should understand that these embodiments can be modified and improved without departing from the principles and spirit of the present application whose scope is defined by the claims and their equivalents. These modifications and improvements should also be within the scope of protection of the present application.
Claims
1. A method for manufacturing an ultra-thin gasket, characterized in that: The manufacturing method comprises: Performing a first etching on the separation groove area of the original gasket; Performing a second etching on the first step region and the separation groove region of the original gasket simultaneously; The second step area, the first step area, and the separation groove area of the original gasket are simultaneously etched for a third time to form a first step in the first step area and a second step in the second step area. The separation groove area is completely etched to divide the original gasket into at least two ultra-thin gaskets, each of which has a first step and a second step with different heights.
2. The method for manufacturing an ultra-thin gasket according to claim 1, characterized in that: The method for first etching the separation groove region of the original gasket comprises: Forming a first mask on the original pad, wherein the first mask exposes the separation groove area; The separation groove region is etched to form a separation groove.
3. The method for manufacturing an ultra-thin gasket according to claim 2, characterized in that: The method of simultaneously performing a second etching on the first step region and the separation groove region of the original gasket comprises: Etching the first mask to form a second mask, wherein the second mask exposes the first step region and the separation groove; The first step region and the separation groove are etched simultaneously to form a first step structure in the first step region, and the depth of the separation groove is deepened.
4. The method for manufacturing an ultra-thin gasket according to claim 3, characterized in that: The method of simultaneously performing a third etching on the second step region, the first step region, and the separation groove region of the original gasket comprises: Forming a third mask on the original gasket, wherein the third mask exposes the second step region, the first step structure, and the separation groove; The second step region, the first step structure, and the separation groove are etched simultaneously, wherein the separation groove is completely etched, the height of the first step structure is reduced to form a first step, and the remaining structure of the second step region forms a second step.
5. The method for manufacturing an ultra-thin gasket according to claim 4, characterized in that: The first mask and the second mask are photoresist masks, and the third mask is a hard mask.
6. The method for manufacturing an ultra-thin gasket according to claim 5, characterized in that: The method for forming the third mask on the original pad comprises: removing the second mask after the second etching; Depositing a hard mask material layer on the original gasket, the hard mask material layer covers the non-step region, the second step region, the first step structure, and the separation groove of the original gasket; The hard mask material layer is etched to retain a portion of the hard mask material layer above the non-step region to form a third mask.
7. The method for manufacturing an ultra-thin gasket according to claim 6, characterized in that: The separation groove region, the first step region, the second step region, and the non-step region are adjacent to each other in sequence.
8. An ultra-thin gasket, characterized in that: The ultra-thin gasket is manufactured according to the manufacturing method according to any one of claims 1 to 7.
9. A chip interconnection method, characterized in that: The chip interconnection method comprises: Disposing a plurality of ultra-thin gaskets at intervals in the non-interconnected area of the first chip, wherein the ultra-thin gaskets are manufactured by the manufacturing method according to any one of claims 1 to 7; Flipping and bonding a second chip above the interconnection region of the first chip, with the edge of the second chip receiving the first step of the ultra-thin gasket, and then thinning the second chip to retain the device structure layer; A third chip is placed above the second chip with an interval, and an edge of the third chip is supported and fixed on the second step of the ultra-thin gasket.
10. The chip interconnection method according to claim 9, characterized in that: The chip interconnection method further comprises: A portion of the non-step area of the ultra-thin gasket is cut away.