Two-dimensional addressable laser emission array and laser device

By designing a metal interconnect layer with reduced line resistance in the two-dimensional addressable laser emission array, the problem of optical power inhomogeneity caused by voltage difference between VCSEL luminous points is solved, and better luminous uniformity is achieved.

CN119864719APending Publication Date: 2025-04-22ZHEJIANG EAGLE SEMICON TECH CO LTD +1
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Patent Information

Application Number
CN202510045245.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-09
Publication Date
2025-04-22

AI Technical Summary

Technical Problem

In a two-dimensional addressable laser emission array, the voltage difference between the VCSEL luminous points leads to uneven optical power, affecting the luminous uniformity of the array.

Method used

A two-dimensional addressable laser emission array is designed, and the line resistance of the metal interconnect layer is reduced in sequence in the direction away from the pad. By adjusting the cross-sectional area and shape of the metal interconnect layer, the voltage difference between the VCSEL luminous points is ensured to decrease.

Benefits of technology

By reducing the linear resistance of the metal interconnect layer, the voltage difference between the VCSEL luminous points is reduced, the consistency of optical power is improved, and the luminous uniformity of the VCSEL array is enhanced.

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Abstract

The invention discloses a two-dimensional addressable laser emission array and a laser device, and relates to the technical field of semiconductor lasers, the two-dimensional addressable laser emission array comprises a plurality of VCSEL luminous points, a plurality of metal interconnection layers and a plurality of bonding pads; part of the metal interconnection layers are arranged at intervals in the first direction, the other metal interconnection layers are arranged at intervals in the second direction, and the first direction is perpendicular to the second direction; the metal interconnection layer comprises a first metal interconnection part located above the VCSEL light-emitting points and a second metal interconnection part located between the adjacent VCSEL light-emitting points or between the VCSEL light-emitting points and the bonding pad; in at least part of the metal interconnection layers, the first metal interconnection part and the second metal interconnection part of the same metal interconnection layer are designed to meet the condition that the line resistance of the second metal interconnection part is sequentially reduced in the direction away from the bonding pad; and the line resistance of the first metal interconnection part is not changed or is sequentially reduced. Therefore, the consistency of the optical power generated by the VCSEL luminous point can be improved.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor laser technology, and in particular to a two-dimensional addressable laser emission array and a laser device. Background Art

[0002] Vertical Cavity Surface Emitting Laser (VCSEL) is a laser whose light emission direction is perpendicular to the surface of the resonant cavity. It has the advantages of low threshold current, small operating current, small divergence angle, high optical fiber coupling efficiency, low mass production cost and easy integration into a two-dimensional array. It is currently widely used in medical treatment, lighting, optical pumping, optical communication, optical storage and other fields.

[0003] In a two-dimensional addressable laser emission array, because the metal interconnect layer that electrically connects each VCSEL light-emitting point has line resistance, this line resistance will cause voltage drop. The farther the VCSEL light-emitting point is from the driving end, the lower its voltage is. Because the current and light power are proportional to the applied voltage, the voltage difference between each VCSEL light-emitting point in the VCSEL array will cause the light power generated by the VCSEL light-emitting points to be different from each other, affecting the uniformity of the light emission of the VCSEL array. Summary of the invention

[0004] The present application provides a two-dimensional addressable laser emission array and a laser device, which can solve the problem of low uniformity of light emission of a VSCEL array.

[0005] According to one aspect of the present application, in one embodiment, a two-dimensional addressable laser emission array is provided, comprising a plurality of VCSEL light emitting points, a plurality of metal interconnection layers and a plurality of pads; Some metal interconnection layers are arranged at intervals along a first direction, and the remaining metal interconnection layers are arranged at intervals along a second direction, wherein the first direction is perpendicular to the second direction; one end of each metal interconnection layer is respectively connected to a pad, and the other end is correspondingly connected to the positive electrode or the negative electrode of a row or a column of VCSEL light-emitting points, and the metal interconnection layer includes a first metal interconnection portion located above the VCSEL light-emitting points, and a second metal interconnection portion located between adjacent VCSEL light-emitting points or between a VCSEL light-emitting point and the pad; In at least part of the metal interconnection layer, the first metal interconnection part and the second metal interconnection part of the same metal interconnection layer are designed to satisfy: the line resistance of the second metal interconnection part decreases successively in the direction away from the pad; the line resistance of the first metal interconnection part remains unchanged or decreases successively.

[0006] In one embodiment, each of the designed metal interconnection layers is respectively connected to the positive electrodes of a row or a column of the VCSEL light-emitting points.

[0007] In one embodiment, for each of the designed metal interconnection layers, along the direction away from the pad, the line resistance of the second metal interconnection portion of the same metal interconnection layer is smaller than the line resistance of the previous first metal interconnection portion adjacent to it; and / or, the cross-sectional area of ​​the first metal interconnection portion of the same metal interconnection layer increases successively along the direction away from the pad; and / or, the cross-sectional area of ​​the second metal interconnection portion of the same metal interconnection layer increases successively along the direction away from the pad; the cross-sectional area is the cross-sectional area perpendicular to the extension direction of the metal interconnection layer.

[0008] In one embodiment, in each of the designed metal interconnection layers, the width of the same metal interconnection layer gradually increases in a direction away from the pad.

[0009] In one embodiment, in each of the designed metal interconnection layers, the cross-sectional areas of the first metal interconnection parts of the same metal interconnection layer are equal; the cross-sectional area of ​​the second metal interconnection part of the same metal interconnection layer is larger than the cross-sectional area of ​​the first metal interconnection part, and / or the cross-sectional area of ​​the second metal interconnection part of the same metal interconnection layer increases successively in a direction away from the pad.

[0010] In one embodiment, in each of the designed metal interconnection layers, the width of the second metal interconnection portion of the same metal interconnection layer increases sequentially in a direction away from the pad; and / or, the thickness of the second metal interconnection portion of the same metal interconnection layer increases sequentially in a direction away from the pad; And / or, the length of the second metal interconnection portion of the same metal interconnection layer increases sequentially in a direction away from the pad.

[0011] In one embodiment, in each of the designed metal interconnection layers, the longitudinal cross-section of the second metal interconnection portion is trapezoidal, and the small end of the trapezoid is close to the pad; and / or the longitudinal cross-section of the second metal interconnection portion is rectangular; the longitudinal cross-section is a cross-section parallel to the extension direction of the metal interconnection layer and parallel to the width direction of the metal interconnection layer.

[0012] In one embodiment, in each of the designed metal interconnection layers, the longitudinal cross-section of the second metal interconnection portion is trapezoidal, and in the same metal interconnection layer, along the direction away from the pad, the width of the small end of the latter second metal interconnection portion is greater than or equal to the width of the large end of the former second metal interconnection portion.

[0013] In one embodiment, in each of the designed metal interconnection layers, the width of the first metal interconnection part of the same metal interconnection layer is equal, the first metal interconnection part is provided with an optical channel for laser to pass through, and there is a distance between two opposite sides of the first metal interconnection part and the optical channel.

[0014] According to another aspect of the present application, an embodiment provides a laser device, including a driver chip, and the two-dimensional addressable laser emission array as described above, wherein the driver chip is electrically connected to a plurality of the pads.

[0015] According to the two-dimensional addressable laser emitting array and laser device of the above-mentioned embodiments, the line resistance of the first metal interconnection part of the same metal interconnection layer remains unchanged or decreases successively in the direction away from the pad, and the line resistance of the second metal interconnection part decreases successively in the direction away from the pad. The smaller the line resistance, the smaller the corresponding voltage drop. This can reduce the voltage difference between each VCSEL light-emitting point, improve the consistency of the optical power generated by each VCSEL light-emitting point, and improve the uniformity of the light emission of the VCSEL array. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of the structure of a two-dimensional addressable laser emission array according to an embodiment; Figure 2 Another schematic diagram of the structure of a two-dimensional addressable laser emission array according to an embodiment; Figure 3 It is another structural schematic diagram of a two-dimensional addressable laser emission array of an embodiment; Figure 4 It is another structural schematic diagram of a two-dimensional addressable laser emission array of an embodiment; Figure 5 For an embodiment Figure 4 A partial structural diagram of the AA section in FIG. Description of reference numerals: 1-metal interconnection layer, 101-first metal interconnection part, 102-second metal interconnection part; 2-pad; 3-VCSEL light emitting point, 301-positive electrode, 302-negative electrode, 303-N-type reflective layer, 304-active layer, 305-P-type reflective layer; 4-substrate; 5-optical channel. DETAILED DESCRIPTION

[0017] The present application is further described in detail below by specific embodiments in conjunction with the accompanying drawings. Wherein similar elements in different embodiments adopt associated similar element numbers. In the following embodiments, many detailed descriptions are intended to enable the present application to be better understood. However, those skilled in the art can easily recognize that some of the features can be omitted in different situations, or can be replaced by other elements, materials, and methods. In some cases, some operations related to the present application are not shown or described in the specification, in order to avoid the core part of the present application being overwhelmed by too much description, and for those skilled in the art, it is not necessary to describe these related operations in detail, and they can fully understand the related operations based on the description in the specification and the general technical knowledge in the art.

[0018] In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner to form various implementations. The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "connection" mentioned in this application, unless otherwise specified, include direct and indirect connections (connections).

[0019] See also Figures 1 to 5 The embodiment of the present application provides a two-dimensional addressable laser emission array, including a plurality of VCSEL light-emitting points 3, a plurality of metal interconnection layers 1, a plurality of pads 2, and other functional components that exist as needed, which are described in detail below.

[0020] like Figure 5As shown, the VCSEL light emitting point 3 in this embodiment is used to emit laser light, and may include an N-type reflective layer 303, an active layer 304, and a P-type reflective layer 305. The active layer 304 is located between the N-type reflective layer 303 and the P-type reflective layer 305. The N-type reflective layer 303 is provided with a negative electrode 302, and the P-type reflective layer 305 is provided with an anode 301. In one embodiment, the VCSEL light emitting point 3 is a vertical cavity surface emitting laser (VCSEL), the N-type reflective layer 303 may be an N-type reflector, specifically an N-type Bragg reflector (N-DBR), the active layer 304 includes a stacked quantum well composite structure, which is used to convert electrical energy into light energy; the P-type reflective layer 305 may be a P-type reflector, specifically a P-type Bragg reflector (P-DBR). The N-type reflective layer 303 and the P-type reflective layer 305 are used to enhance the reflection of the light generated by the active layer 304, and then emit it from the surface of the P-type reflective layer 305. In some embodiments, the N-type reflective layer 303, the active layer 304 and the P-type reflective layer 305 can be formed by, but not limited to, chemical vapor deposition. The cathode 302 and the anode 301 in this embodiment are conductive metal materials. In some embodiments, the VCSEL light-emitting point 3 may also include other layer structures, such as a protective layer, a photoelectric limiting layer, an ohmic contact layer, etc. In this embodiment, the material of the protective layer is an insulating material. In this embodiment, there are a plurality of VCSEL light-emitting points 3, that is, two or more, and a plurality of VCSEL light-emitting points 3 form a VSCEL array. In one embodiment, the laser emitting array also includes a substrate 4, a VCSEL light-emitting point 3 is disposed on the substrate 4, a cathode 302 and an anode 301 are located on a side of the VCSEL light-emitting point 3 away from the substrate 4, and the substrate 4 in this embodiment can be any material suitable for forming a vertical cavity surface emitting laser, such as a gallium arsenide (GaAs) substrate.

[0021] like Figure 1-Figure 4As shown, in this embodiment, some metal interconnection layers 1 are arranged at intervals along a first direction, and the remaining metal interconnection layers 1 are arranged at intervals along a second direction, and the first direction is perpendicular to the second direction; one end of each metal interconnection layer 1 is respectively connected to a pad 2, and the other end is correspondingly connected to the positive electrode 301 or the negative electrode 302 of a row or a column of VCSEL light-emitting points 3, and the metal interconnection layer 1 includes a first metal interconnection portion 101 located above the VCSEL light-emitting point 3, and a second metal interconnection portion 102 located between adjacent VCSEL light-emitting points 3 or between the VCSEL light-emitting point 3 and the pad 2; in at least some of the metal interconnection layers 1, the first metal interconnection portion 101 and the second metal interconnection portion 102 of the same metal interconnection layer 1 are designed to meet the following requirements: along the direction away from the pad 2, the line resistance of the second metal interconnection portion 102 decreases successively; the line resistance of the first metal interconnection portion 101 remains unchanged or decreases successively. Furthermore, in Figure 1 In the embodiment of FIG. 1 , along the direction away from the pad 2, the line resistance of the second metal interconnection portion 102 and the line resistance of the first metal interconnection portion 101 gradually decrease. Figure 2-Figure 3 In the illustrated embodiment, the magnitude relationship between the line resistance of the adjacent second metal interconnection portion 102 and the line resistance of the first metal interconnection portion 101 can be designed to be greater than or less than, and the present application does not impose any limitation on this.

[0022] It can be understood that the metal interconnect layer 1 in this embodiment is a conductive metal material, which can be formed by, but not limited to, evaporation, sputtering or electroplating. After the metal interconnect layer 1 is connected to the positive electrode 301 and the negative electrode 302 of the VCSEL light-emitting point 3, each VCSEL light-emitting point 3 can be driven to emit light through the metal interconnect layer 1. The first direction in this embodiment can be any one of the row direction and the column direction of the array, and the second direction is the other direction of the row direction and the column direction of the array. In one embodiment, the VCSEL light-emitting points 3 can be distributed in a rectangular array, the first direction can be the row direction of the rectangular array, and the second direction can be the column direction of the rectangular array. In a two-dimensional addressable laser emission array, two or more metal interconnect layers 1 arranged at intervals along the first direction and metal interconnect layers 1 arranged at intervals along the second direction can be provided. The intersection of the metal interconnection layer 1 arranged in the first direction and the metal interconnection layer 1 arranged in the second direction each has a corresponding VCSEL light-emitting point 3. By selecting the metal interconnection layer 1 in the specified first direction and the metal interconnection layer 1 in the second direction, the VCSEL light-emitting point 3 corresponding to the intersection of the metal interconnection layer 1 in the specified first direction and the metal interconnection layer 1 in the second direction can be supplied with current and lit, thereby realizing the individual driving of each VCSEL light-emitting point 3. Each pad 2 in this embodiment is used to be electrically connected to the driving chip, and the light emission control of the VSCEL array can be realized through the driving chip.

[0023] The line resistance in this embodiment is the resistance of the wire, and the size of the line resistance is directly related to the transmission efficiency of the current. The larger the line resistance, the greater the resistance encountered by the current during the transmission process, resulting in increased energy loss, that is, increased voltage drop in the circuit. The line resistance of the first metal interconnection part 101 of the same metal interconnection layer 1 remains unchanged or decreases in a direction away from the pad 2, and the line resistance of the second metal interconnection part 102 decreases in a direction away from the pad 2. For example, when the line resistance of the first metal interconnection part 101 of the same metal interconnection layer 1 decreases in a direction away from the pad 2, the line resistance of each first metal interconnection part 101 can decrease in an arithmetic progression or a geometric progression in the direction away from the pad 2; when the line resistance of the second metal interconnection part 102 decreases in a direction away from the pad 2, the line resistance of each second metal interconnection part 102 can decrease in an arithmetic progression or a geometric progression in the direction away from the pad 2. It can be understood that the smaller the line resistance, the smaller the corresponding voltage drop, thereby reducing the voltage difference between each VCSEL light-emitting point 3, improving the consistency of the optical power generated by each VCSEL light-emitting point 3, and improving the uniformity of the light emission of the VSCEL array. Further, the method of achieving equal or proportional reduction of the line resistance of each first metal interconnection 101 includes but is not limited to improving the width, thickness, and shape of each first metal interconnection 101; similarly, the method of achieving equal or proportional reduction of the line resistance of each second metal interconnection 102 includes but is not limited to improving the width, thickness, and shape of each second metal interconnection 102.

[0024] In this embodiment, one end of each metal interconnection layer 1 is connected to a pad 2, and the other end is correspondingly connected to the positive electrode 301 or the negative electrode 302 of a row or a column of VCSEL light-emitting points 3. In this embodiment, there is no specific restriction on the length of one end and the other end of the metal interconnection layer 1. The more VCSEL light-emitting points 3 connected to the metal interconnection layer 1, the longer the length of the other end of the metal interconnection layer 1 is. The second metal interconnection 102 in this embodiment is located between adjacent VCSEL light-emitting points 3 or between the VCSEL light-emitting point 3 and the pad 2. This embodiment does not impose any specific restrictions on the length of each second metal interconnection 102. When the length of the second metal interconnection 102 is equal to the length between two adjacent first metal interconnections 101, the first metal interconnection 101 and the second metal interconnection 102 in the same metal interconnection layer 1 are in an end-to-end structure; when the length of the second metal interconnection 102 is less than the length between two adjacent first metal interconnections 101, there are other metal interconnections between the first metal interconnection 101 and the second metal interconnection 102 in the same metal interconnection layer 1. In some application scenarios, the line resistance of the other metal interconnection may remain unchanged, for example, the width and thickness may be the same. In this case, the width and thickness of the other metal interconnection may also be the same as the width and thickness of the first metal interconnection 101; or the line resistance of the other metal interconnection in the same metal interconnection layer 1 may also decrease in sequence in the direction away from the pad 2. In some embodiments, in at least a portion of the metal interconnection layer 1, along the direction away from the pad 2, the line resistance of the second metal interconnection portion 102 of the same metal interconnection layer 1 is smaller than the line resistance of the previous first metal interconnection portion 101 adjacent thereto. For example, the cross-sectional area of ​​the second metal interconnection portion 102 of the same metal interconnection layer 1 may be larger than the cross-sectional area of ​​the previous first metal interconnection portion 101 adjacent thereto.

[0025] In one embodiment, each designed metal interconnect layer 1 corresponds to the positive electrode 301 of a row or a column of VCSEL light-emitting points 3. At this time, the pad 2 corresponding to each designed metal interconnect layer 1 is the positive electrode pad 2. The current flows to the positive electrode 301 of the VCSEL light-emitting point 3 through the positive electrode pad 2. Because the line resistance of the second metal interconnect portion 102 decreases in the direction away from the pad 2, the voltage drop in the circuit can be reduced, the energy loss is small, and the uniformity of the light emission of the VSCEL array is improved. In some application scenarios, each designed metal interconnect layer 1 can correspond to the negative electrode 302 of a row or a column of VCSEL light-emitting points 3. At this time, the pad 2 corresponding to each designed metal interconnect layer 1 is the negative electrode pad 2. In some embodiments, all metal interconnect layers 1 can also be designed so that the first metal interconnect portion 101 and the second metal interconnect portion 102 of the same metal interconnect layer 1 are designed to meet: along the direction away from the pad 2, the line resistance of the second metal interconnect portion 102 decreases in sequence; the line resistance of the first metal interconnect portion 101 remains unchanged or decreases in sequence. That is, some of the designed metal interconnection layers 1 are respectively connected to the positive electrodes 301 of a row or a column of VCSEL light-emitting points 3, and the other part of the designed metal interconnection layers 1 are respectively connected to the negative electrodes 302 of a row or a column of VCSEL light-emitting points 3.

[0026] In one embodiment, Figure 1 As shown, in the designed metal interconnection layers 1, along the direction away from the pad 2, the line resistance of the second metal interconnection part 102 of the same metal interconnection layer 1 is smaller than the line resistance of the previous first metal interconnection part 101 adjacent thereto; and / or, the cross-sectional area of ​​the first metal interconnection part 101 of the same metal interconnection layer 1 increases in sequence in the direction away from the pad 2; and / or, the cross-sectional area of ​​the second metal interconnection part 102 of the same metal interconnection layer 1 increases in sequence in the direction away from the pad 2, and the cross-sectional area is the cross-sectional area perpendicular to the extension direction of the metal interconnection layer 1. In this embodiment, the sequential order is in accordance with the arrangement order of the first metal interconnection parts 101 or the second metal interconnection parts 102 in the metal interconnection layer 1 in the direction away from the pad 2. The sequential increase in cross-sectional area can realize that the first metal interconnection part 101 and the second metal interconnection part 102 of the same metal interconnection layer 1 are designed to meet the following requirements: along the direction away from the pad 2, the line resistance of the second metal interconnection part 102 decreases in sequence; and the line resistance of the first metal interconnection part 101 decreases in sequence. The manufacturing of the gradually increasing cross-sectional area is simple, and the larger the cross-sectional area, the smaller the line resistance, thereby reducing the voltage difference of each VCSEL light-emitting point 3 and improving the consistency of the optical power generated by the VCSEL light-emitting point 3.

[0027] In one embodiment, the width of the same metal interconnection layer 1 in each designed metal interconnection layer 1 gradually increases in the direction away from the pad 2. The larger the width, the larger the cross-sectional area, and the smaller the line resistance. Alternatively, in one embodiment, the thickness of the metal interconnection layer 1 gradually increases in the direction away from the pad 2, and the larger the thickness, the larger the cross-sectional area, and the smaller the line resistance.

[0028] In one embodiment, Figure 2-Figure 4 As shown, in each designed metal interconnection layer 1, the cross-sectional area of ​​the first metal interconnection part 101 of the same metal interconnection layer 1 is equal; the cross-sectional area of ​​the second metal interconnection part 102 of the same metal interconnection layer 1 is greater than the cross-sectional area of ​​the first metal interconnection part 101, and / or the cross-sectional area of ​​the second metal interconnection part 102 of the same metal interconnection layer 1 increases in sequence in the direction away from the pad 2. At this time, the first metal interconnection part 101 and the second metal interconnection part 102 of the same metal interconnection layer 1 can be designed to meet the following requirements: the line resistance of the second metal interconnection part 102 decreases in sequence in the direction away from the pad 2; the line resistance of the first metal interconnection part 101 remains unchanged. The cross-sectional areas of the first metal interconnection parts 101 are equal, and the cross-sectional areas of the second metal interconnection parts 102 increase in sequence, which can also make the line resistance of the metal interconnection layer 1 decrease in the direction away from the driving end, so that the voltage drop at the VCSEL light-emitting point 3 farther away from the driving end is smaller, thereby forming a difference compensation, reducing the voltage difference between the VCSEL light-emitting points 3, and improving the consistency of the optical power generated by the VCSEL light-emitting point 3.

[0029] In one embodiment, when the cross-sectional areas of the first metal interconnection parts 101 of the same metal interconnection layer 1 are equal in the designed metal interconnection layers 1, the width of the second metal interconnection parts 102 of the same metal interconnection layer 1 may be increased in sequence in the direction away from the pad 2. In one embodiment, the thickness of the second metal interconnection parts 102 of the same metal interconnection layer 1 may be increased in sequence in the direction away from the pad 2. In another embodiment, the length of the second metal interconnection parts 102 of the same metal interconnection layer 1 may be increased in sequence in the direction away from the pad 2. Alternatively, the width, thickness and length of the second metal interconnection parts 102 of the same metal interconnection layer 1 may be increased in sequence in the direction away from the pad 2. The above examples may all realize that the cross-sectional area of ​​the second metal interconnection parts 102 of the same metal interconnection layer 1 increases in sequence in the direction away from the pad 2. The larger the width or the thicker the thickness, the larger the cross-sectional area. Therefore, the line resistance of the second metal interconnection parts 102 with a wider width and / or a thicker thickness is smaller, thereby reducing the voltage drop; and the longer the length, the more the corresponding line resistance is reduced, thereby further reducing the voltage drop.

[0030] In one embodiment, in each metal interconnection layer 1, the longitudinal section of the second metal interconnection portion 102 is trapezoidal, and the small end of the trapezoid is close to the pad 2; and / or the longitudinal section of the second metal interconnection portion 102 is rectangular; the longitudinal section is a section parallel to the extension direction of the metal interconnection layer 1 and parallel to the width direction of the metal interconnection layer 1. When the longitudinal section of the second metal interconnection portion 102 is trapezoidal, Figure 2 , Figure 4 As shown, when the longitudinal section of the second metal interconnection portion 102 is rectangular, Figure 3 As shown. The second metal interconnection part 102 is simple to manufacture when the longitudinal section is trapezoidal or rectangular. During manufacture, a groove for manufacturing the metal interconnection layer 1 is processed on the insulating protection layer, and metal is manufactured in the groove to form the metal interconnection layer 1. When the longitudinal section is trapezoidal, the line resistance in the second metal interconnection part 102 can be gradually reduced along the direction of the current, so that the line resistance changes more uniformly, which can further improve the uniformity of light emission.

[0031] In one embodiment, Figure 4 As shown, in order to further improve the uniformity of light emission, the longitudinal section of the second metal interconnection part 102 in each metal interconnection layer 1 is designed to be trapezoidal, and in the same metal interconnection layer 1, along the direction away from the pad 2, the width of the small end of the next second metal interconnection part 102 is greater than or equal to the width of the large end of the previous second metal interconnection part 102. In this case, the line resistance of the second metal interconnection part 102 can also be reduced more uniformly. In some application scenarios, such as Figure 2 Alternatively, in each metal interconnection layer 1, the width of the small end of each second metal interconnection part 102 is the same as the width of the first metal interconnection part 101, so that the width of the large end of the subsequent second metal interconnection part 102 is greater than the width of the large end of the previous second metal interconnection part 102.

[0032] In one embodiment, in each designed metal interconnection layer 1, the width of the first metal interconnection part 101 of the same metal interconnection layer 1 is equal, the first metal interconnection part 101 is provided with an optical channel for the laser to pass through, and there is a spacing between the two opposite sides of the first metal interconnection part 101 and the optical channel. The equal width of the first metal interconnection part 101 facilitates the setting of the spacing between the two opposite sides of the first metal interconnection part 101 and the optical channel 5, ensuring sufficient metal contact area during electrical connection, and also ensuring the current injection efficiency around the optical channel 5, because the width of the first metal interconnection part 101 is equal, the injection efficiency can be almost consistent. In some application scenarios, the optical channel 5 in this embodiment can be composed of a plurality of circular holes, but is not limited to this, and the optical channel 5 in this embodiment can also be other structures.

[0033] In the two-dimensional addressable laser emission array provided by the above embodiment, the line resistance of the first metal interconnection part 101 of the same metal interconnection layer 1 remains unchanged or decreases successively in the direction away from the pad 2, and the line resistance of the second metal interconnection part 102 decreases successively in the direction away from the pad 2. The smaller the line resistance, the smaller the corresponding voltage drop. Therefore, the voltage difference between each VCSEL light-emitting point 3 can be reduced, the consistency of the optical power generated by each VCSEL light-emitting point 3 is improved, and the uniformity of the light emission of the VCSEL array is better.

[0034] The embodiment of the present application further provides a laser device, including a driver chip and the two-dimensional addressable laser emission array as described above, wherein the driver chip is electrically connected to a plurality of pads 2 .

[0035] The structure of the two-dimensional addressable laser emitting array in this embodiment is the same as that in the above embodiment, and will not be repeated here. The two-dimensional addressable laser emitting array can provide a stable light source for the laser device. The laser device in this embodiment can be a laser emitting device for laser radar, data communication and consumer electronics products (such as mobile phones). This embodiment does not specifically limit the driver chip, and any drive control that can realize the light emission of the VSCEL array is acceptable. The laser device in this embodiment may also include other functional components, which can be set as needed.

[0036] The laser device provided in this embodiment includes a two-dimensional addressable laser emission array, wherein the line resistance of the first metal interconnection part 101 of the same metal interconnection layer 1 remains unchanged or decreases successively in the direction away from the pad 2, and the line resistance of the second metal interconnection part 102 decreases successively in the direction away from the pad 2. The smaller the line resistance, the smaller the corresponding voltage drop. Therefore, the voltage difference between each VCSEL light-emitting point 3 can be reduced, the consistency of the optical power generated by each VCSEL light-emitting point 3 is improved, and the uniformity of the light emission of the VCSEL array is better.

[0037] The above specific examples are used to illustrate the present application, which is only used to help understand the present application and is not intended to limit the present application. For technicians in the technical field to which the present application belongs, they can also make some simple deductions, deformations or substitutions based on the ideas of the present application.

Claims

1. A two-dimensional addressable laser emission array, characterized in that: It includes a plurality of VCSEL light-emitting points, a plurality of metal interconnection layers and a plurality of pads; Some metal interconnection layers are arranged at intervals along a first direction, and the remaining metal interconnection layers are arranged at intervals along a second direction, wherein the first direction is perpendicular to the second direction; one end of each metal interconnection layer is respectively connected to a pad, and the other end is correspondingly connected to the positive electrode or the negative electrode of a row or a column of VCSEL light-emitting points, and the metal interconnection layer includes a first metal interconnection portion located above the VCSEL light-emitting points, and a second metal interconnection portion located between adjacent VCSEL light-emitting points or between a VCSEL light-emitting point and the pad; In at least part of the metal interconnection layer, the first metal interconnection part and the second metal interconnection part of the same metal interconnection layer are designed to satisfy: the line resistance of the second metal interconnection part decreases successively in the direction away from the pad; the line resistance of the first metal interconnection part remains unchanged or decreases successively.

2. The two-dimensional addressable laser emission array according to claim 1, characterized in that: Each of the designed metal interconnection layers is respectively connected to the positive electrodes of a row or a column of the VCSEL light-emitting points.

3. The two-dimensional addressable laser emission array according to claim 1 or 2, characterized in that: For each of the designed metal interconnection layers, along the direction away from the pad, the line resistance of the second metal interconnection part of the same metal interconnection layer is smaller than the line resistance of the previous first metal interconnection part adjacent to it; and / or, the cross-sectional area of ​​the first metal interconnection part of the same metal interconnection layer increases successively along the direction away from the pad; and / or, the cross-sectional area of ​​the second metal interconnection part of the same metal interconnection layer increases successively along the direction away from the pad, and the cross-sectional area is the cross-sectional area perpendicular to the extension direction of the metal interconnection layer.

4. The two-dimensional addressable laser emission array as claimed in claim 3, characterized in that: In the designed metal interconnection layers, the width of the same metal interconnection layer gradually increases in a direction away from the pad.

5. The two-dimensional addressable laser emission array according to claim 1 or 2, characterized in that: In each of the designed metal interconnection layers, the cross-sectional areas of the first metal interconnection parts of the same metal interconnection layer are equal; the cross-sectional area of ​​the second metal interconnection part of the same metal interconnection layer is larger than the cross-sectional area of ​​the first metal interconnection part, and / or the cross-sectional area of ​​the second metal interconnection part of the same metal interconnection layer increases successively in the direction away from the pad.

6. The two-dimensional addressable laser emission array according to claim 5, characterized in that: In each of the designed metal interconnection layers, the width of the second metal interconnection portion of the same metal interconnection layer increases sequentially in a direction away from the pad; and / or, the thickness of the second metal interconnection portion of the same metal interconnection layer increases sequentially in a direction away from the pad; And / or, the length of the second metal interconnection portion of the same metal interconnection layer increases sequentially in a direction away from the pad.

7. The two-dimensional addressable laser emission array according to claim 5, characterized in that: In each of the designed metal interconnection layers, the longitudinal section of the second metal interconnection part is trapezoidal, and the small end of the trapezoid is close to the pad; and / or the longitudinal section of the second metal interconnection part is rectangular; the longitudinal section is a section parallel to the extension direction of the metal interconnection layer and parallel to the width direction of the metal interconnection layer.

8. The two-dimensional addressable laser emission array according to claim 7, characterized in that: In each of the designed metal interconnection layers, the longitudinal cross-section of the second metal interconnection part is trapezoidal, and in the same metal interconnection layer, along the direction away from the pad, the width of the small end of the latter second metal interconnection part is greater than or equal to the width of the large end of the former second metal interconnection part.

9. The two-dimensional addressable laser emission array according to claim 5, characterized in that: In each of the designed metal interconnection layers, the width of the first metal interconnection part of the same metal interconnection layer is equal, the first metal interconnection part is provided with an optical channel for laser to pass through, and there is a distance between two opposite sides of the first metal interconnection part and the optical channel.

10. A laser device, characterized in that: It comprises a driving chip and a two-dimensional addressable laser emission array as described in any one of claims 1 to 9, wherein the driving chip is electrically connected to a plurality of the pads.