Transistor assembly, preparation method of transistor assembly and display panel
By connecting the diffusion memristor in series with the thin film transistor, providing resistance to reduce leakage current, the problem of deterioration in the performance of the thin film transistor at the reverse voltage is solved, achieving low power consumption and long service life.
Patent Information
- Application Number
- CN202411999955.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-04-22
AI Technical Summary
The thin film transistor device is in a negative bias temperature stress state for a long time after the reverse voltage is applied, resulting in deterioration in performance and additional power consumption.
The diffusion memristor is connected in series with the thin film transistor. The diffusion memristor includes a positive terminal, an insulating dielectric layer and a negative terminal that are stacked in sequence to provide resistance to the thin film transistor in the off-state and reduce leakage current.
Without applying a reverse voltage, thin film transistors can maintain a low leakage current, avoid performance deterioration, reduce power consumption, and improve service life.
Smart Images
Figure CN119866017A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor devices, and in particular to a transistor component, a method for preparing a transistor component, and a display panel. Background Art
[0002] In the field of semiconductor devices, thin film transistors (TFTs) are an important electronic device that is widely used in the field of display technology. Although thin film transistor devices have a low leakage current, this characteristic needs to be achieved by applying a reverse voltage to the thin film transistor device. However, the application of this reverse voltage will cause the device to be in a negative bias temperature stress (NBTS) state for a long time, which will gradually deteriorate the performance of the thin film transistor device. In addition, applying a reverse voltage to a thin film transistor device will also generate additional power consumption. Summary of the invention
[0003] The present application provides a transistor component capable of maintaining the low leakage characteristics of a thin film transistor, a method for preparing the transistor component, and a display panel.
[0004] In a first aspect, the present application provides a transistor assembly, including a thin film transistor and a diffused memristor, wherein the diffused memristor includes a positive terminal, an insulating dielectric layer, and a negative terminal stacked in sequence. The diffused memristor is connected in series with the thin film transistor. The diffused memristor is used to provide resistance for the thin film transistor in an off state to reduce the leakage current of the thin film transistor.
[0005] In a feasible implementation, the negative terminal has a conductive medium, and the thin film transistor ionizes the conductive medium in an on state to generate a conductor connected to the positive terminal.
[0006] In a feasible implementation, the thin film transistor includes a substrate, a gate, a gate dielectric layer, a semiconductor layer, a doping layer, a passivation layer, a source terminal and a drain terminal. The gate is arranged on the supporting surface of the substrate, and the gate dielectric layer is arranged on the supporting surface of the substrate and covers the gate. The semiconductor layer is arranged on the side of the gate dielectric layer away from the gate, the doping layer is arranged on the side of the semiconductor layer away from the gate, and the passivation layer is at least partially arranged on the side of the drain terminal facing away from the gate dielectric layer; the source terminal is arranged on the side of the gate dielectric layer away from the substrate and connected to the doping layer, the drain terminal is arranged on the side of the gate dielectric layer away from the substrate and connected to the doping layer, and the source terminal and the drain terminal are spaced apart. The negative terminal of the diffusion-type memristor is electrically connected to the drain terminal of the thin film transistor.
[0007] In a feasible implementation, a via hole penetrating the passivation layer is provided on the transistor component, and the diffused memristor is at least partially provided in the via hole.
[0008] In a feasible implementation, the cathode terminal of the diffused memristor is stacked on the drain terminal of the thin film transistor.
[0009] In a feasible implementation, the positive terminal of the diffused memristor is electrically connected to an external circuit through a first wire.
[0010] In a second aspect, the present application provides a method for preparing a transistor component, providing a thin film transistor. A diffused memristor is arranged in the thin film transistor, and the diffused memristor includes a positive terminal, an insulating dielectric layer, and a negative terminal stacked in sequence. The diffused memristor is connected in series with the thin film transistor. The diffused memristor is used to provide resistance for the thin film transistor in an off state to reduce the leakage current of the thin film transistor.
[0011] In a feasible implementation, before the diffused memristor is disposed on the thin film transistor, a via hole is provided in the transistor component so that the diffused memristor is at least partially disposed in the via hole.
[0012] In a feasible implementation, the thin film transistor includes a substrate, a gate, a gate dielectric layer, a semiconductor layer, a doping layer, a passivation layer, a source terminal and a drain terminal. When a via hole is opened in the transistor component, the via hole penetrates the passivation layer so that the negative terminal of the diffused memristor contacts the drain terminal of the thin film transistor.
[0013] In a third aspect, the present application provides a display panel, wherein the display panel includes the above transistor components.
[0014] In this solution, a via is opened in the transistor component to place a diffused memristor so that the diffused memristor is connected in series with the thin film transistor. When the thin film transistor is in the off state, the diffused memristor is in a high-resistance state, and its internal leakage current is lower than the leakage current of the thin film transistor in the off state. This ensures that the thin film transistor in the off state can maintain a low leakage current even when no reverse voltage is applied, thereby avoiding the deterioration of the performance of the thin film transistor, reducing power consumption, and also increasing the service life of the thin film transistor. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background technology, the drawings required for use in the embodiments of the present application or the background technology will be described below.
[0016] Figure 1 A schematic diagram of the structure of a thin film transistor and a diffused memristor involved in this application;
[0017] Figure 2 A circuit diagram of a thin film transistor and a diffused memristor involved in this application;
[0018] Figure 3 This is a flow chart of the transistor component preparation method involved in this application.
[0019] Figure annotation:
[0020] 1-thin film transistor, 2-external circuit, 3-diffused memristor;
[0021] 10-doping layer, 11-gate, 12-drain terminal, 13-source terminal, 15-substrate, 16-gate dielectric layer, 17-semiconductor layer, 18-passivation layer;
[0022] 31- positive terminal, 32- negative terminal, 33- insulating medium layer. DETAILED DESCRIPTION
[0023] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings.
[0024] See also Figure 1 and Figure 2 The present application provides a transistor component, which includes a thin film transistor 1 and a diffused memristor 3, and the diffused memristor 3 includes a positive terminal 31, an insulating dielectric layer 33 and a negative terminal 32 stacked in sequence. The diffused memristor 3 is connected in series with the thin film transistor 1, and the on and off states of the thin film transistor 1 are controlled by controlling the voltage applied to its gate 11. When a positive voltage is applied to the gate 11, the thin film transistor 1 is turned on. When the positive voltage signal of the gate 11 disappears, the thin film transistor 1 is turned off. The diffused memristor 3 is used to provide resistance for the thin film transistor 1 in the off state to reduce the leakage current of the thin film transistor 1. Although the existing thin film transistor 1 has a lower leakage current in the off state, this characteristic needs to be achieved by applying a reverse voltage to the thin film transistor 1 device. However, the application of this reverse voltage will cause the device to be in a negative bias temperature stress state for a long time, which will gradually deteriorate the performance of the thin film transistor 1 device. In addition, applying a reverse voltage to the thin film transistor 1 device will also generate additional power consumption. Since the diffusion type memristor 3 has a low threshold voltage, a low leakage current, and is in a high resistance state in the off state, for example, the diffusion type memristor can provide the thin film transistor 1 with a resistance of about 10 -13 A of negative leakage current. The leakage current generated by the thin film transistor 1 itself is about 10 -9 A, the leakage current generated after applying negative voltage is about 10 -13 A, then by connecting the diffused memristor in series with the thin film transistor, it can be kept for 10 -13Therefore, the present solution proposes to connect the diffused memristor 3 in series with the thin film transistor 1, so that the diffused memristor 3 can provide high resistance and low negative leakage current for the thin film transistor 1 in the off state to reduce the leakage current of the thin film transistor 1, so that the thin film transistor 1 can maintain the same level of leakage current even without applying a negative voltage, thereby reducing the power consumption of the device and increasing the service life of the thin film transistor 1.
[0025] The negative terminal 32 of the diffused memristor 3 has a conductive medium. When the thin film transistor 1 is in the on state, an electric field is generated to ionize the conductive medium and generate a conductor connected to the positive terminal 31. Taking the hafnium oxide-based diffused memristor 3 as an example, the positive terminal 31 of the hafnium oxide-based diffused memristor 3 is indium tin oxide (I nd ium Tin Oxide, I TO), the insulating dielectric layer 33 of the hafnium oxide-based diffused memristor 3 is hafnium oxide (HfO2), and the negative terminal 32 of the hafnium oxide-based diffused memristor 3 is silver (Ag). When the thin film transistor 1 is in the on state, the silver at the negative terminal 32 of the hafnium oxide-based diffused memristor 3 undergoes an oxidation reaction under the action of the electric field to generate silver ions, and diffuses into the insulating dielectric layer 33 of the hafnium oxide-based diffused memristor 3 under the action of the electric field. At this time, the silver ions inside the insulating dielectric layer 33 of the hafnium oxide-based diffused memristor 3 will undergo a reduction reaction with the electrons at the positive terminal 31 of the hafnium oxide-based diffused memristor 3 to generate silver element. When the generated silver element connects the positive terminal 31 and the negative terminal 32 of the hafnium oxide-based diffused memristor 3, the hafnium oxide-based diffused memristor 3 is turned on and becomes a low resistance state. At this time, the hafnium oxide-based diffused memristor 3 is equivalent to a wire in the circuit, allowing current to pass through without affecting the operation of the thin film transistor 1. When the voltage across the hafnium oxide-based diffused memristor 3 is less than a certain threshold value, the metal conductive filament generated at this time is unstable due to its nanometer level. After power is cut off, under the action of surface energy minimization and Gibbs free energy, the generated conductive filament will spontaneously dissolve and break, and the resistance will become a high resistance state, providing high resistance for the thin film transistor 1 in the off state to reduce the leakage current of the thin film transistor 1.
[0026] See also Figure 2The thin film transistor 1 includes a substrate 15, a gate 11, a gate dielectric layer 16, a semiconductor layer 17, a doping layer 10, a passivation layer 18, a source terminal 13, a drain terminal 12 and a channel 14. The gate 11 is arranged on the supporting surface of the substrate 15, the gate dielectric layer 16 is arranged on the supporting surface of the substrate 15 and covers the gate 11, the semiconductor layer is arranged on the side of the gate dielectric layer 16 away from the gate 11, the doping layer 10 is arranged on the side of the semiconductor layer 17 away from the gate 11, and the passivation layer 18 is at least partially arranged on the side of the drain terminal 12 facing away from the gate dielectric layer 16; the source terminal 13 is arranged on the side of the gate dielectric layer 16 away from the substrate 15 and connected to the doping layer 10, the drain terminal 12 is arranged on the side of the gate dielectric layer 16 away from the substrate 15 and connected to the doping layer 10, and the source terminal 13 and the drain terminal 12 are spaced apart. The negative terminal 32 of the diffused memristor 3 is electrically connected to the drain terminal 12 of the thin film transistor 1. The substrate 15 of the thin film transistor 1 is glass or flexible plastic, which provides support for the thin film transistor 1. The gate electrode is located above the substrate 15 and is used to control the opening and closing of the transistor. The gate dielectric layer 16 is located between the gate 11 and the semiconductor layer 17 and is used to isolate the gate 11 from the semiconductor layer 17. The doping layer 10 is located between the source terminal 13 and the drain terminal 12 and is used to form an ohmic contact, thereby reducing the contact resistance between the source terminal 13 and the drain terminal 12 and the semiconductor layer 17, reducing the power consumption of the thin film transistor, and improving the service life of the thin film transistor. For example, when the semiconductor layer 17 is amorphous silicon, an N-type dopant is added to the doping layer 10, and the dopant atoms replace the silicon atom position in the semiconductor lattice, thereby generating free electrons or holes, so that the source terminal 13 and the drain terminal 12 have a low-resistance contact with the semiconductor layer 17. The source terminal 13 and the drain terminal 12 are located above the doping layer 10, and are made of a conductive material for connecting to an external circuit 2. The passivation layer 18 is arranged on the side of the source terminal 13 and the drain terminal 12 facing away from the gate, and is used to protect the thin film transistor 1 from the influence of the external environment. The positive terminal 31, insulating dielectric layer 33 and negative terminal 32 of the diffused memristor 3 are sequentially stacked on the thin film transistor 1. The diffused memristor 3 has good switching characteristics, which can ensure that it can be turned on and become a low resistance state when a positive voltage is applied to the diffused memristor 3, and can spontaneously return to a high resistance state when the voltage is reduced, and it is not conductive in the negative direction. Therefore, after the diffused memristor 3 is connected in series with the thin film transistor 1, the resistance state of the diffused memristor 3 can be changed by changing the voltage applied to the gate 11 of the thin film transistor 1. When a positive voltage is applied to the gate 11, the diffused memristor 3 is in a low resistance state. When the positive voltage signal applied to the gate 11 disappears, the diffused memristor 3 is in a high resistance state, thereby providing a high resistance for the thin film transistor 1 in the off state to maintain a low leakage state of the thin film transistor 1.
[0027] The transistor assembly is provided with a via hole penetrating the passivation layer 18, and the diffused memristor 3 is at least partially provided in the via hole. Taking the hafnium oxide-based diffused memristor 3 as an example, after a via hole is opened on the thin film transistor 1, silver and hafnium oxide are deposited in sequence, and then hafnium oxide is deposited and etched, so that the drain terminal 12 of the thin film transistor 1 and the diffused memristor 3 are connected in series. When the thin film transistor 1 and the diffused memristor 3 are working, a mask is required to protect the positions of the thin film transistor 1 and the diffused memristor 3 that do not need to be exposed. After a via hole is opened on the transistor assembly to place the diffused memristor 3, only one mask is needed, and no additional mask is needed, which reduces the consumption of materials.
[0028] The negative terminal 32 of the diffused memristor 3 is stacked on the drain terminal 12 of the thin film transistor 1. Since the negative terminal 32 of the diffused memristor 3 and the drain terminal 12 of the thin film transistor 1 are both conductive materials, after a via is opened on the thin film transistor 1, the negative terminal 32 of the diffused memristor 3 is stacked on the drain terminal 12 of the thin film transistor 1. When the thin film transistor 1 is in the on state, the current flows in from the source terminal 13 of the thin film transistor 1, passes through the semiconductor layer 17, and then flows out from the drain terminal 12 through the diffused memristor 3 to the external circuit 2. When the thin film transistor 1 is in the off state, the diffused memristor 3 is in a high resistance state, and the low leakage current generated inside flows from the negative terminal 32 of the diffused memristor 3 through the drain terminal 12 of the thin film transistor 1 into the thin film transistor 1, reducing its own leakage current, so that the thin film transistor 1 maintains a low leakage current state,
[0029] The positive terminal 31 of the diffused memristor 3 is electrically connected to the external circuit 2 through a first wire. The negative terminal 32 of the diffused memristor 3 is connected to the drain terminal 12 of the thin film transistor 1 . The positive terminal 31 of the diffused memristor 3 is connected to the external circuit 2 . Taking the hafnium oxide-based diffused memristor 3 as an example, when the thin film transistor 1 is in the on state, the silver at the negative terminal 32 of the hafnium oxide-based diffused memristor 3 undergoes an oxidation reaction under the action of the electric field to generate silver ions, and diffuses into the insulating dielectric layer 33 of the hafnium oxide-based diffused memristor 3 under the action of the electric field. At this time, the silver ions inside the insulating dielectric layer 33 will undergo a reduction reaction with the electrons at the positive terminal 31 of the hafnium oxide-based diffused memristor 3 to generate silver element. When the generated silver element connects the positive terminal 31 and the negative terminal 32 of the hafnium oxide-based diffused memristor 3, the hafnium oxide-based diffused memristor 3 is turned on and becomes a low resistance state. At this time, the hafnium oxide-based diffused memristor 3 is equivalent to a wire in the circuit, allowing current to pass through without affecting the operation of the thin film transistor 1.
[0030] See also Figure 3 , is a method for preparing a transistor component provided in the present application, and the steps of the preparation method are as follows:
[0031] S101 , providing a thin film transistor 1 .
[0032] The transistor component provided in the present application is connected in series with a diffused memristor 3 on the basis of a thin film transistor 1. The diffused memristor 3 is turned on when a positive voltage is applied and changes to a low resistance state. It returns to a high resistance state when the voltage is reduced and is not turned on in the negative direction. It can provide resistance for the thin film transistor 1 in the off state to reduce the leakage current of the thin film transistor 1.
[0033] S102 , a diffused memristor 3 is provided on the thin film transistor 1 , wherein the diffused memristor 3 includes a positive terminal 31 , an insulating dielectric layer 33 , and a negative terminal 32 which are stacked in sequence.
[0034] The negative terminal 32 of the diffused memristor 3 has a conductive medium. When the thin film transistor 1 is in the on state, an electric field is generated to ionize the conductive medium and generate a conductor connected to the positive terminal 31. Taking the hafnium oxide-based diffused memristor 3 as an example, the positive terminal 31 of the hafnium oxide-based diffused memristor 3 is indium tin oxide, the insulating dielectric layer 33 of the hafnium oxide-based diffused memristor 3 is hafnium oxide, and the negative terminal 32 of the hafnium oxide-based diffused memristor 3 is silver. When the thin film transistor 1 is in the on state, the silver at the negative terminal 32 of the hafnium oxide-based diffused memristor 3 undergoes an oxidation reaction under the action of the electric field to generate silver ions, and diffuses into the insulating dielectric layer 33 of the hafnium oxide-based diffused memristor 3 under the action of the electric field. At this time, the silver ions inside the insulating dielectric layer 33 will undergo a reduction reaction with the electrons at the positive terminal 31 of the hafnium oxide-based diffused memristor 3 to generate silver element. When the generated silver element connects the positive terminal 31 and the negative terminal 32 of the hafnium oxide-based diffused memristor 3, the hafnium oxide-based diffused memristor 3 is turned on and becomes a low resistance state. At this time, the hafnium oxide-based diffused memristor 3 is equivalent to a wire in the circuit, allowing current to pass through without affecting the operation of the thin film transistor 1. When the voltage across the hafnium oxide-based diffused memristor 3 is less than a certain threshold value, the metal conductive filament generated at this time is unstable due to its nanometer level. After power is cut off, under the action of surface energy minimization and Gibbs free energy, the generated conductive filament will spontaneously dissolve and break, and the resistance will become a high resistance state, providing high resistance for the thin film transistor 1 in the off state to reduce the leakage current of the thin film transistor 1.
[0035] S103 , connecting the diffused memristor 3 in series with the thin film transistor 1 , wherein the diffused memristor 3 is used to provide resistance for the thin film transistor 1 in an off state to reduce leakage current of the thin film transistor 1 .
[0036] Taking the hafnium oxide-based diffused memristor 3 as an example, when the voltage across the hafnium oxide-based diffused memristor 3 is less than a certain threshold, the metal conductive filament generated at this time is unstable due to its nanometer level. After power is cut off, under the action of surface energy minimization and Gibbs free energy, the generated conductive filament will spontaneously dissolve and break, and the resistance will become a high resistance state, providing high resistance for the thin film transistor 1 in the off state. When the thin film transistor 1 is in the off state, the diffused memristor 3 is in a high resistance state, and the low leakage current generated inside flows from the negative terminal 32 of the diffused memristor 3 through the drain terminal 12 of the thin film transistor 1 into the thin film transistor 1 to reduce the leakage current of the thin film transistor 1.
[0037] It is worth noting that before the diffused memristor 3 is arranged on the thin film transistor 1, a via hole is first opened in the transistor component so that the diffused memristor 3 is at least partially arranged in the via hole. After the via hole is opened on the transistor component, silver and hafnium oxide are deposited in sequence, and then hafnium oxide is deposited and etched, so that the drain terminal 12 of the thin film transistor 1 and the diffused memristor 3 are connected in series. When the thin film transistor 1 and the diffused memristor 3 are working, a mask is required to protect the positions of the thin film transistor 1 and the diffused memristor 3 that do not need to be exposed. After the via hole is opened on the transistor component to place the diffused memristor 3, only one mask is needed, and no additional mask is needed, which reduces the consumption of materials.
[0038] The thin film transistor 1 includes a substrate 15, a gate 11, a gate dielectric layer 16, a semiconductor layer 17, a doping layer 10, a passivation layer 18, a source terminal 13 and a drain terminal 12. When a via is opened in the transistor component, the via is made to penetrate the passivation layer 18, so that the negative terminal 32 of the diffused memristor 3 is in contact with the drain terminal 12 of the thin film transistor 1. When a via is opened in the transistor component, the via is made to penetrate the passivation layer 18, so that the negative terminal 32 of the diffused memristor 3 can be in contact with the drain terminal of the thin film transistor 1, so that the diffused memristor 3 is connected in series with the thin film transistor 1, thereby providing a high resistance and a lower negative leakage current for the thin film transistor 1 in the off state to reduce the leakage current of the thin film transistor 1. The device power consumption is reduced and the service life of the thin film transistor 1 is increased.
[0039] The present application also provides a display panel, comprising the above-mentioned transistor assembly. In the display panel, the thin film transistor 1 is used in series with the diffused memristor 3. The diffused memristor 3 has a low subthreshold slope, less than 1 millivolt per ten times current change, and the response time and relaxation time of the device are both in the nanosecond level, which has little effect on the on and off state of the thin film transistor 1. Connecting in series with the thin film transistor 1 can reduce the subthreshold slope of the thin film transistor 1, and the diffused memristor 3 is less affected by light and temperature, which can make the thin film transistor 1 still maintain a low leakage current level in a poor working environment, reduce the power consumption of the device, and thus reduce the overall energy consumption of the display panel. In addition, the diffused memristor 3 can also be blocked at a small voltage and turned on at a large voltage, which can avoid the high leakage problem of the thin film transistor 1 device in the off state.
[0040] It should be noted that all directional indications in the embodiments of the present application (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0041] In addition, the descriptions of "first", "second", etc. in this application are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0042] In this application, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0043] In addition, the technical solutions between the various embodiments of the present application can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.
[0044] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. A transistor component, characterized in that: It includes a thin film transistor and a diffused memristor, wherein the diffused memristor includes a positive terminal, an insulating dielectric layer and a negative terminal stacked in sequence; The diffused memristor is connected in series with the thin film transistor; The diffused memristor is used to provide resistance for the thin film transistor in an off state to reduce leakage current of the thin film transistor.
2. The transistor assembly according to claim 1, characterized in that The negative terminal has a conductive medium, and the thin film transistor ionizes the conductive medium in an on state and generates a conductor connected to the positive terminal.
3. The transistor assembly according to claim 1, characterized in that The thin film transistor comprises a substrate, a gate, a gate dielectric layer, a semiconductor layer, a doping layer, a passivation layer, a source terminal and a drain terminal; The gate is arranged on the supporting surface of the substrate, the gate dielectric layer is arranged on the supporting surface of the substrate and covers the gate; the semiconductor layer is arranged on the side of the gate dielectric layer away from the gate, the doping layer is arranged on the side of the semiconductor layer away from the gate, and the passivation layer is at least partially arranged on the side of the drain terminal facing away from the gate dielectric layer; the source terminal is arranged on the side of the gate dielectric layer away from the substrate and connected to the doping layer, the drain terminal is arranged on the side of the gate dielectric layer away from the substrate and connected to the doping layer, and the source terminal and the drain terminal are spaced apart; The negative terminal of the diffused memristor is electrically connected to the drain terminal of the thin film transistor.
4. The transistor assembly according to claim 1, characterized in that The transistor component is provided with a via hole penetrating the passivation layer, and the diffused memristor is at least partially arranged in the via hole.
5. The transistor assembly according to claim 4, characterized in that The cathode terminal of the diffusion-type memristor is stacked on the drain terminal of the thin film transistor.
6. The transistor assembly according to claim 4, characterized in that The positive terminal of the diffusion-type memristor is electrically connected to an external circuit through a first wire.
7. A method for preparing a transistor component, characterized in that: Providing thin film transistors; A diffusion-type memristor is arranged on the thin film transistor, wherein the diffusion-type memristor comprises a positive terminal, an insulating dielectric layer and a negative terminal stacked in sequence; The diffused memristor is connected in series with the thin film transistor, and the diffused memristor is used to provide resistance for the thin film transistor in a closed state to reduce leakage current of the thin film transistor.
8. The preparation method according to claim 7, characterized in that: Before the thin film transistor is provided with the diffused memristor, the transistor component is provided with a via hole so that the diffused memristor is at least partially provided in the via hole.
9. The preparation method according to claim 7, characterized in that: The thin film transistor includes a substrate, a gate, a gate dielectric layer, a semiconductor layer, a doping layer, a passivation layer, a source terminal and a drain terminal; When a via hole is opened in the transistor component, the via hole is made to penetrate the passivation layer, so that the negative terminal of the diffusion-type memristor is in contact with the drain terminal of the thin film transistor.
10. A display panel, characterized in that: The display panel comprises the transistor assembly according to claims 1-6.