Method for forming metal silicate film and semiconductor device structure

Abstract

Methods of forming a metal silicate film on a substrate in a reaction chamber by a cyclic deposition process are provided. The method may include: adjusting a temperature of a hydrogen peroxide precursor to a temperature below 70 DEG C prior to introduction into the reaction chamber; and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclic deposition process. Semiconductor device structures including metal silicate films deposited by the methods of the present disclosure are also provided.

Description

[0001] This application is a divisional application of Chinese invention patent application No. 201911107002.X (application date: November 13, 2019, applicant: ASM IP Private Holding Co., Ltd., invention name: Method for forming metal silicate film and semiconductor device structure). Technical Field

[0002] The present disclosure generally relates to a method of forming a metal silicate film on a substrate in a reaction chamber by a cyclic deposition process, and more particularly to a method of forming a metal silicate film using a hydrogen peroxide precursor as an oxidant precursor. The present disclosure also generally relates to a semiconductor device structure including a metal silicate film deposited by a cyclic deposition process. Background Art

[0003] Metal silicate films, such as hafnium silicate films (Hf x Si y O z ), yttrium silicate film (Y x Si y O z ), zirconium silicate film (Zr x Si y O z ) or aluminum silicate film (Al x Si y O z ), can be used in various applications in the field of semiconductor device technology. For example, in some applications, such as complementary metal oxide semiconductor (CMOS) applications, metal silicate films can be used to replace silicon oxide because metal silicate films can provide excellent thermal stability and device performance in semiconductor device structures.

[0004] Cyclic deposition processes, such as atomic layer deposition (ALD) and cyclic chemical vapor deposition (CCVD), introduce two or more precursors (reactants) sequentially into a reaction chamber, where the precursors react with the surface of the substrate one at a time in a sequential manner. Cyclic deposition processes have been shown to produce metal silicate films with excellent conformality and atomic-level thickness control.

[0005] Cyclic deposition processes for depositing metal silicate films typically utilize water (H 2 O) as an oxidant precursor. However, due to the 2 O), alternative oxidant precursors are desirable. Therefore, there is a need for methods for forming metal silicate films and related semiconductor device structures including metal silicate films that are different from conventional water (H2O) based methods. 2 O) using an oxidant precursor with enhanced reactivity when compared to a cyclic deposition process. Summary of the invention

[0006] This summary is provided to introduce a series of concepts in a simplified form. These concepts are described in more detail below in the detailed description of the example embodiments of the present disclosure. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0007] In some embodiments, a method for forming a metal silicate film on a substrate in a reaction chamber by a cyclic deposition process is provided. The method may include: adjusting the temperature of a hydrogen peroxide precursor to a temperature below 70° C. before introduction into the reaction chamber; and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of the cyclic deposition process, wherein the unit deposition cycle includes: contacting the substrate with a metal vapor precursor, contacting the substrate with a silicon vapor precursor; and contacting the substrate with a hydrogen peroxide precursor.

[0008] In some embodiments, a semiconductor device structure is also provided. The semiconductor device structure may include: silicon germanium (Si 1-x Ge x ) channel region; an interface layer comprising a silicon germanium (Si 1-x Ge x ) channel region; and a high-k dielectric material disposed directly on the interface layer; wherein for the mid-gap state, in the silicon germanium (Si 1-x Ge x ) The interface trap density at the interface between the channel region and the interface layer is less than about 7e 11 cm -2 eV -1 .

[0009] For the purpose of summarizing the present invention and the advantages achieved over the prior art, certain objects and advantages of the present invention are described above. Of course, it should be understood that not all of these objects or advantages may be achieved according to any particular embodiment of the present invention. Thus, for example, those skilled in the art will recognize that the present invention may be implemented or carried out in a manner that achieves or optimizes one advantage or a group of advantages as taught or suggested herein but does not necessarily achieve other objects or advantages as may be taught or suggested herein.

[0010] All of these embodiments are intended to fall within the scope of the invention disclosed herein. These and other embodiments will become apparent to those skilled in the art from the following detailed description of certain embodiments with reference to the accompanying drawings, the invention not being limited to any particular embodiment disclosed. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] While the specification concludes with claims that particularly point out and distinctly claim what are regarded as embodiments of the present invention, advantages of the embodiments of the present disclosure may be more readily ascertained from the description of certain examples of the embodiments of the present disclosure when read in conjunction with the accompanying drawings, in which:

[0012] Figure 1 A non-limiting exemplary process flow for forming a metal silicate film according to an embodiment of the present disclosure is shown;

[0013] Figure 2 Non-limiting exemplary semiconductor device structures including metal silicate films formed according to embodiments of the present disclosure are shown; and

[0014] Figure 3 Non-limiting exemplary semiconductor processing equipment that may be used to form metal silicate films according to embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0015] Although certain embodiments and examples are disclosed below, it will be appreciated by those skilled in the art that the present invention extends beyond the embodiments and / or uses specifically disclosed herein and obvious modifications and equivalents thereof. Therefore, it is intended that the scope disclosed herein should not be limited to the specific disclosed embodiments described below.

[0016] The illustrations presented herein are not intended to be actual views of any particular material, structure, or device but are merely idealized illustrations used to describe embodiments of the present disclosure.

[0017] As used herein, the term "cyclic deposition" may refer to the sequential introduction of precursors (reactants) into a reaction chamber to deposit a film over a substrate and includes deposition techniques such as atomic layer deposition and cyclic chemical vapor deposition.

[0018] As used herein, the term "cyclic chemical vapor deposition" may refer to any process that exposes a substrate sequentially to two or more volatile precursors that react and / or decompose on the substrate to produce the desired deposition.

[0019] As used herein, the term "substrate" may refer to any underlying material or materials that may be used or upon which a device, circuit, or film may be formed.

[0020] As used herein, the term "atomic layer deposition" (ALD) may refer to a vapor deposition process in which a deposition cycle, preferably a plurality of consecutive deposition cycles, is performed in a reaction chamber. Typically, during each cycle, a precursor is chemically adsorbed to a deposition surface (e.g., a substrate surface or a previously deposited underlying surface, such as material from a previous ALD cycle), thereby forming a monolayer or sub-monolayer that is not susceptible to reaction with additional precursors (i.e., a self-limiting reaction). Thereafter, if desired, a reactant (e.g., another precursor or a reactive gas) may be subsequently introduced into the processing chamber for use in converting the chemically adsorbed precursor to the desired material on the deposition surface. Typically, this reactant is capable of further reacting with the precursor. In addition, during each cycle, a purge step may also be utilized to remove excess precursor from the processing chamber after converting the chemically adsorbed precursor and / or to remove excess reactant and / or reaction byproducts from the processing chamber. In addition, the term "atomic layer deposition" as used herein is also intended to include processes designated by related terms such as chemical vapor atomic layer deposition, atomic layer epitaxy (ALE), molecular beam epitaxy (MBE), gas source MBE or organometallic MBE and chemical beam epitaxy when performed using alternating pulses of a precursor composition, a reactive gas, and a purge (e.g., an inert carrier) gas.

[0021] As used herein, the term "film" may refer to any continuous or discontinuous structure, material, or multiple materials deposited by the methods disclosed herein. For example, a "film" may include 2D materials, nanorods, nanotubes, nanolaminates, or nanoparticles, or even partial or complete molecular layers or partial or complete atomic layers or clusters of atoms and / or molecules. A "film" may contain one or more materials or layers with pinholes, but still be at least partially continuous.

[0022] As used herein, the term "metal silicate film" may refer to any film including a metal component, a silicon component, and an oxygen component, and may have the general formula M: x Si y O z , where M is a metal component, Si is a silicon component, O is an oxygen component, and x, y, and z represent the composition of the metal silicate film.

[0023] As used herein, the term "incubation period" may refer to the number of cyclic deposition cycles in the initial stage of cyclic deposition, wherein no discernible deposition is observed.

[0024] Although a number of example materials are given throughout the various embodiments of the present disclosure, it should be noted that the chemical formula given for each of these example materials should not be construed as limiting, and the non-limiting example materials given should not be limited by the example stoichiometries given.

[0025] The present disclosure includes methods that can be used to form high-quality, conformal metal silicate films. The methods of the present disclosure can employ a cyclic deposition process that utilizes a hydrogen peroxide precursor as an oxidant precursor for depositing the metal silicate film. Additionally, the temperature of the hydrogen peroxide precursor can be carefully adjusted prior to entering the reaction chamber to prevent premature decomposition of the hydrogen peroxide precursor.

[0026] Common cyclic deposition processes for forming metal silicate films usually use water (H 2 O) as an oxygen precursor. However, even water (H 2 Water (O) is the most studied oxygen precursor used in metal silicate deposition, but the use of water as an oxygen precursor in metal silicate deposition also has many disadvantages. For example, water has limited reactivity and may not be suitable for depositing high purity metal silicate films. For example, aluminum silicate films deposited using water can have a residual hydrogen content of up to 15 atomic percent because water is used because the oxygen precursor can introduce -H and -OH species into the metal silicate film. In addition, water can be easily absorbed on the inner surface of the reaction chamber, and the absorbed water may be difficult to remove from the reaction chamber, thereby limiting the semiconductor deposition equipment that can be used when water is used as the oxygen precursor, especially for, for example, showerhead reactors.

[0027] As water (H 2 O), hydrogen peroxide (H 2 O 2 ) precursor can be used as an oxygen precursor for metal silicate deposition. 2 O 2 ) precursors may have many benefits as an oxygen source for metal silicate deposition. For example, hydrogen peroxide (H 2 O 2 ) is more reactive than water and contains di-OH groups that can produce purer metal silicate films. In addition, hydrogen peroxide (H 2 O 2 ) precursors can potentially reduce the chlorine content in metal silicate films deposited using metal chloride precursors at reduced deposition temperatures. In addition, hydrogen peroxide (H 2 O 2 ) precursors may be less aggressive than ozone (O 3 ) or oxygen radicals, and have a low diffusion rate into the underlying film, thereby substantially limiting the oxidation of the underlying film during deposition.

[0028] Embodiments of the present disclosure not only utilize hydrogen peroxide as an oxidant precursor, but also regulate the temperature of the hydrogen peroxide precursor prior to entering the reaction chamber. For example, the temperature of the hydrogen peroxide precursor may be regulated to a temperature below 70° C. prior to entering the reaction chamber, thereby preventing premature decomposition of the hydrogen peroxide precursor, which may result in undesirable water formation in the reaction chamber, and the related issues previously discussed with cyclic deposition processes utilizing water as an oxygen precursor.

[0029] Thus, embodiments of the present disclosure may include a method of forming a metal silicate film on a substrate in a reaction chamber by a cyclic deposition process, the method comprising: prior to introduction into the reaction chamber, introducing hydrogen peroxide (H 2 O 2 ) precursor to a temperature below 70° C.; and depositing a metal silicate film on a substrate by performing at least one unit deposition cycle of a cyclic deposition process, wherein the unit deposition cycle comprises: contacting the substrate with a metal vapor precursor; contacting the substrate with a silicon vapor precursor; and contacting the substrate with a hydrogen peroxide precursor.

[0030] Non-limiting example embodiments of cyclic deposition processes may include atomic layer deposition (ALD), wherein ALD is generally based on self-limiting reactions, whereby sequential and alternating pulses of reactants are used to deposit approximately one atomic (or molecular) monolayer of a material in each deposition cycle. Deposition conditions and precursors are generally selected to provide a self-saturating reaction, such that an adsorbed layer of one reactant leaves a surface termination that is unreactive with gas phase reactants of the same reactant. Subsequently, the substrate is contacted with a different precursor, which reacts with the previous termination to effect continued deposition. Thus, each cycle of alternating pulses generally leaves no more than approximately one monolayer of the desired material. However, as mentioned above, a skilled artisan will recognize that, despite the alternating nature of the process, more than one monolayer of material may be deposited in one or more ALD cycles if, for example, some gas phase reactions occur.

[0031] In some embodiments of the present disclosure, a cyclic deposition method can be used to deposit a metal silicate film, wherein each unit deposition cycle comprises at least three deposition steps or phases and utilizes at least three different precursors or reactants. Although referred to as "first," "second," and "third" precursors, these names do not mean that the precursors must be introduced in this order. Therefore, in some embodiments, the cyclic deposition method can start with the second precursor or the third precursor. Similarly, although referred to as the first, second, and third stages, they are not necessarily performed in this order. In addition, each stage can be repeated before a subsequent stage. Additional stages can also be incorporated into the entire cyclic deposition cycle.

[0032] The cyclic deposition process for depositing the metal silicate film may comprise an ALD-type process, and a unit deposition cycle may comprise exposing the substrate to a first precursor, removing any unreacted first precursor and reaction byproducts from the reaction chamber, exposing the substrate to a second precursor followed by a second removal step, and exposing the substrate to a third precursor followed by a third removal step. In some embodiments, the first precursor may comprise a metal vapor precursor ("metal precursor"), the second precursor may comprise a silicon vapor precursor ("silicon precursor"), and the third precursor may comprise a hydrogen peroxide precursor ("oxygen precursor").

[0033] The argon (Ar) or nitrogen (N 2 ) and other inert gases to separate the precursors, to prevent the gas phase reaction between the precursors and to achieve self-saturated surface reaction. However, in some embodiments, the substrate can be moved to contact the first precursor, the second precursor and the third precursor respectively. Because the reaction is self-saturated, it may not be necessary to carry out strict temperature control on the substrate and to carry out accurate dosage control on the precursor. However, the substrate temperature is preferably such that the incidental gas species neither condenses into a monolayer nor decomposes on the surface. Before the substrate is contacted with the next reaction chemical, such as by flushing the reaction space or by moving the substrate, the remaining chemicals and reaction byproducts (if any) are removed from the substrate surface. Undesirable gaseous molecules can be effectively discharged from the reaction space by means of an inert flushing gas. A vacuum pump can be used to assist flushing.

[0034] Reactors capable of depositing metal silicate films can be used for the deposition processes described herein. Such reactors include ALD reactors configured to provide precursors and CVD reactors. According to some embodiments, a showerhead reactor may be used. According to some embodiments, a cross-flow, batch, mini-batch, or spatial ALD reactor may be used.

[0035] In some embodiments of the present disclosure, a batch reactor may be used. In some embodiments, a vertical batch reactor may be used. In other embodiments, the batch reactor comprises a small batch reactor configured to accommodate 10 or less wafers, 8 or less wafers, 6 or less wafers, 4 or less wafers, or 2 or less wafers. In some embodiments in which a batch reactor is used, the non-uniformity between wafers is less than 3% (1 sigma), less than 2%, less than 1%, or even less than 0.5%.

[0036] The deposition processes described herein may optionally be performed in a reactor or reaction chamber connected to a cluster tool. In a cluster tool, because each reaction chamber is dedicated to one process type, the temperature of the reaction chamber in each module can be kept constant, which will increase throughput compared to reactors in which the substrates are heated to the process temperature before each run. In addition, the time to change the reaction chamber pressure to the required process pressure level between substrates can be shortened in a cluster tool. In some embodiments of the present disclosure, the deposition process can be performed in a cluster tool comprising multiple reaction chambers, wherein each individual reaction chamber can be used to expose the substrate to a separate precursor gas, and the substrate can be transferred between different reaction chambers to be exposed to multiple precursor gases, and the transfer of the substrate is performed in a controlled environment to prevent oxidation / contamination of the substrate.

[0037] As a non-limiting example, a first reaction chamber can be used to passivate the surface of a substrate by contacting the substrate with a vapor phase sulfur precursor. The passivated substrate can then be transferred to a second reaction chamber under controlled conditions (e.g., temperature, pressure, and gas environment) and subsequently subjected to multiple deposition cycles to deposit a metal silicate film on the passivated substrate surface, the cyclic deposition process being performed in the second reaction chamber.

[0038] The stand-alone reactor may be equipped with a load lock. In this case, it is not necessary to cool the reaction chamber between each run. In some embodiments, the deposition process for depositing the metal silicate film may comprise multiple deposition cycles, i.e., multiple unit cycles, for example, multiple ALD cycles or multiple cyclic CVD cycles.

[0039] In some embodiments, the metal silicate film of the present disclosure may be deposited on a substrate using one or more cyclic deposition processes, and the cyclic deposition process may include one or more ALD-type processes. In some embodiments, the cyclic deposition process may include one or more hybrid ALD / CVD processes or one or more cyclic CVD processes. For example, in some embodiments, the growth rate of the ALD process may be lower than that of the CVD process. One method of increasing the growth rate may be to operate at a substrate temperature higher than that typically used in the ALD process, resulting in at least a portion of the deposition being provided by a chemical vapor deposition type method, but still utilizing the sequential introduction of precursors, which process may be referred to as cyclic CVD. In some embodiments, the cyclic CVD process may include introducing two or more precursors into a reaction chamber, wherein there may be an overlapping time period between the two or more precursors in the reaction chamber, resulting in an ALD deposition component and a CVD deposition component. For example, a cyclic CVD process may include a continuous flow of a first precursor and periodic pulses of a second precursor and / or a third precursor entering the reaction chamber.

[0040] As a non-limiting example, the metal silicate film of the present disclosure may be deposited by a cyclic deposition process (such as the exemplary ALD process 100 and its component process blocks), as described with reference to Figure 1 The exemplary ALD process 100 may begin with process block 110, which includes providing a substrate into a reaction chamber and heating the substrate to a deposition temperature.

[0041] In some embodiments of the present disclosure, the substrate may include a planar substrate or a patterned substrate, wherein the patterned substrate includes high aspect ratio features, such as trench structures and / or fin structures. The substrate may include one or more materials, including but not limited to silicon (Si), germanium (Ge), germanium tin (GeSn), silicon germanium (SiGe), silicon germanium tin (SiGeSn), silicon carbide (SiC) or III-V semiconductor materials, such as gallium arsenide (GaAs), gallium phosphide (GaP) or gallium nitride (GaN). In some embodiments of the present disclosure, the substrate may include an engineered substrate, wherein a surface semiconductor layer is disposed above a body support with an intervening buried oxide (BOX) disposed therebetween.

[0042] The patterned substrate may include a substrate that may include a semiconductor device structure formed in or on a substrate surface, for example, the patterned substrate may include a partially fabricated semiconductor device structure, such as a transistor and / or a memory element. In some embodiments, the substrate may contain a single crystal surface and / or one or more sub-surfaces, and the sub-surfaces may include a non-single crystal surface, such as a polycrystalline surface and / or an amorphous surface. The single crystal surface may include, for example, one or more of silicon (Si), silicon germanium (SiGe), silicon carbide (SiC), germanium tin (GeSn), germanium (Ge), or a III-V semiconductor. A polycrystalline or amorphous surface may include a dielectric material, such as an oxide, an oxynitride, or a nitride, such as silicon oxide and silicon nitride.

[0043] The substrate may be disposed within a suitable reaction chamber, such as the ALD reaction chamber and the CVD reaction chamber described previously, and the exemplary ALD process 100 may continue by heating the substrate to a desired deposition temperature prior to film deposition. For example, the substrate may be heated to a substrate temperature of less than about 500° C., or less than about 400° C., or less than about 300° C., or less than about 200° C., or even less than about 100° C. In some embodiments of the present disclosure, the substrate temperature during the deposition process may be between 100° C. and 500° C., or between 200° C. and 300° C.

[0044] In addition to achieving a desired deposition temperature, i.e., a desired substrate temperature, the exemplary ALD process 100 may also adjust the pressure within the reaction chamber to obtain desired properties of the metal silicate film. For example, in some embodiments of the present disclosure, the exemplary ALD process 100 may be performed in a reaction chamber having a reaction chamber pressure adjusted to less than 100 Torr, or less than 10 Torr, or even less than 1 Torr. For example, the exemplary ALD process 100 may be performed in a reaction chamber having a reaction chamber pressure adjusted to between about 1 Torr and about 4 Torr.

[0045] After heating the substrate to the desired deposition temperature and adjusting the reaction chamber pressure to the desired set point, the exemplary ALD process 100 can continue to cycle through the deposition phase 105 through process box 120, which includes contacting the substrate with a first gas phase reactant, and particularly in some embodiments, contacting the substrate with a metal gas phase precursor, i.e., a metal precursor ("metal phase").

[0046] In some embodiments of the present disclosure, the metal vapor precursor may include at least one of a hafnium precursor, a yttrium precursor, a zirconium precursor, an aluminum precursor, a scandium precursor, a cerium precursor, an erbium precursor, or a strontium precursor.

[0047] In some embodiments, the metal vapor precursor may include a metal halide, such as a metal chloride, a metal iodide, or a metal bromide.

[0048] In some embodiments, the metal vapor precursor may include a metal organic precursor including, but not limited to, an alkylamide-based metal precursor, a cyclopentadienyl-based metal precursor, an amidine-based metal precursor, a diketone-based metal precursor, or an amide-based metal precursor.

[0049] In some embodiments, the hafnium precursor may include hafnium tetrachloride (HfCl 4 ) or tetraethylmethylamino hafnium (TEMAHf). In some embodiments, the yttrium precursor may include Y(EtCp) 3 、Tris(methylcyclopentadienyl)yttrium(Y(MeCp) 3 )、Tris(N,N'-diisopropylacetamido)yttrium(TDIPAY),(Y(THD) 3 ), tris(2,2,6,6-tetramethyl-3,5-octanedionato)yttrium(Y(tmod) 3 ) or at least one of tris[N,N-bis(trimethylsilyl)amino]yttrium. In some embodiments, the zirconium precursor may include zirconium tetrachloride (ZrCl 4) or tetraethylmethylamino zirconium (TEMAZr). In some embodiments, the scandium precursor may include at least one of tri(cyclopentadienyl)scandium or tri(methylcyclopentadienyl)scandium. In some embodiments, the erbium precursor may include at least one of tri(cyclopentadienyl)erbium or tri(methylcyclopentadienyl)erbium. In some embodiments, the cerium precursor may include tri(cyclopentadienyl)cerium. In some embodiments, the strontium precursor may include bis(triisopropylcyclopentadienyl)strontium.

[0050] In some embodiments of the present disclosure, the metal vapor precursor may include an aluminum precursor selected from the group consisting of trimethylaluminum (TMA), triethylaluminum (TEA), dimethylaluminum hydride (DMAH), tri-tert-butylaluminum (TTBA), aluminum trichloride (AlCl 3 ) or dimethylaluminum isopropoxide (DMAI).

[0051] In some embodiments of the present disclosure, contacting the substrate with the metal vapor precursor may include contacting the substrate for a period of about 0.01 seconds to about 60 seconds, about 0.05 seconds to about 10 seconds, or about 0.1 seconds to about 5.0 seconds. In addition, during the contact of the substrate with the metal vapor precursor, the flow rate of the first gas phase reactant may be less than 2000 sccm, or less than 500 sccm, or even less than 100 sccm. In addition, during the contact of the substrate with the metal vapor precursor, the flow rate of the metal vapor reactant may be in the range of about 1 to 2000 sccm, about 5 to 1000 sccm, or about 10 to about 500 sccm.

[0052] Figure 1 The exemplary ALD process 100 can be continued by purging the reaction chamber. For example, excess metal vapor precursor and reaction byproducts (if any) can be removed from the substrate surface, for example, by pumping with an inert gas. In some embodiments of the present disclosure, the purge process can include a purge cycle in which the substrate surface is purged for less than about 5.0 seconds, or less than about 3.0 seconds, or even less than about 2.0 seconds. Excess metal vapor precursor and any possible reaction byproducts can be removed with the aid of a vacuum, which is generated by a pumping system in fluid communication with the reaction chamber.

[0053] After purging the reaction chamber with the purge cycle, the exemplary ALD process 100 may proceed to a second phase of the cyclic deposition stage 105 via process block 130 , which includes contacting the substrate with a second vapor precursor, and in particular, contacting the substrate with a silicon vapor precursor (“silicon phase”).

[0054] In some embodiments of the present disclosure, the silicon vapor precursor may be selected from the group consisting of: N,N,N',N-tetraethylsilanediamine (C 8 H 22 N2 Si), BTBAS (bis(tert-butylamino)silane), BDEAS (bis(diethylamino)silane), TDMAS (tris(dimethylamino)silane), hexa(ethylamino)disilane (Si 2 (NHC 2 H 5 ) 6 ), hexachlorodisilane (HCDS) or pentachlorodisilane (PCDS).

[0055] In some embodiments, the silicon vapor precursor may include silane, such as silane (SiH 4 ), disilane (Si 2 H 6 ), trisilane (Si 3 H 8 ), butadienesilane (Si 4 H 10 ) or with the general empirical formula Si x H (2x+2) of higher silanes.

[0056] In some embodiments, the silicon vapor precursor may include a silicon halide compound, such as a silicon halide having the general formula given below: x W y H z , where "W" is a halide selected from the group consisting of fluorine (F), chlorine (Cl), bromine (Br), and iodine (I), "x" and "y" are integers greater than zero, and "z" is an integer greater than or equal to zero. In some embodiments, the silicon halide precursor can be selected from the group consisting of silicon fluoride (e.g., SiF 4 ), silicon chloride (such as SiCl 4 ), silicon bromide (e.g. SiBr 4 ) and silicon iodide (such as SiI 4 In some embodiments, the silicon vapor precursor may include silicon tetrachloride (SiCl 4 ).

[0057] In some embodiments, the silicon vapor phase precursor may include an aminosilane, such as bisethylaminosilane.

[0058] In some embodiments of the present disclosure, contacting the substrate with the silicon vapor precursor may include contacting the silicon precursor with the substrate for a period of about 0.01 seconds to about 60 seconds, about 0.05 seconds to about 10 seconds, or about 0.1 seconds to about 5.0 seconds. In addition, during the period when the substrate is in contact with the silicon precursor, the flow rate of the silicon precursor may be less than 2000 sccm, or less than 500 sccm, or even less than 100 sccm. In addition, during the period when the substrate is in contact with the silicon precursor, the flow rate of the silicon precursor may be in the range of about 1 to 2000 sccm, about 5 to 1000 sccm, or about 10 to about 500 sccm.

[0059] After contacting the substrate with the silicon vapor precursor, the exemplary ALD process 100 can be performed by purging the reaction chamber. For example, excess silicon precursor and reaction byproducts (if any) can be removed from the substrate surface, for example, by pumping while an inert gas flows. In some embodiments of the present disclosure, the purging process can include purging the substrate surface for a period of about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 3 seconds, or even about 1 second to 2 seconds.

[0060] After purging the reaction chamber with the purge cycle, the exemplary ALD process 100 may proceed to the third stage of the cyclic deposition phase 105 via process block 140, which includes contacting the substrate with a third gas-phase reactant, and in particular, contacting the substrate with hydrogen peroxide (H 2 O 2 ) contact (“oxygen stage”).

[0061] In some embodiments, the temperature of the hydrogen peroxide precursor may be carefully adjusted before entering the reaction chamber to prevent premature decomposition of the hydrogen peroxide precursor. In some embodiments of the present disclosure, the reaction chamber may include a showerhead reactor utilizing a showerhead gas distribution mechanism to introduce the precursor, particularly the hydrogen peroxide precursor, into the reaction chamber. In some embodiments, the method of the present disclosure may include adjusting the temperature of the showerhead distribution mechanism to a temperature below 70°C, or below 60°C, or even below 50°C. In some embodiments, the temperature of the showerhead distribution mechanism may be adjusted to a temperature of about 50°C to about 120°C.

[0062] In some embodiments, in addition to adjusting the temperature of the showerhead gas distribution mechanism, the wall temperature of the reaction chamber wall may also be adjusted to prevent premature decomposition of the hydrogen peroxide precursor. For example, in some embodiments, the reaction chamber may comprise a "cold wall" reaction chamber, wherein the temperature of the chamber wall is maintained below the deposition temperature of the substrate. Therefore, in some embodiments, the method of the present disclosure may further comprise adjusting the temperature of at least one chamber wall of the reaction chamber to a temperature below 70°C, or below 60°C, or even below 50°C, at least at those portions of at least one chamber wall that are exposed to the precursor, particularly the hydrogen peroxide precursor. In some embodiments, the temperature of at least one chamber wall of the reaction chamber may be adjusted at a temperature of about 50°C to about 120°C.

[0063] For more detailed information on temperature regulation of the showerhead gas distribution mechanism and the temperature regulation of the chamber wall of the reaction chamber, see U.S. application No. 15 / 636,307, filed on June 28, 2017, entitled “METHODS FOR DEPOSITING ATRANSITION METAL NITRIDE FILM ON ASUBSTRATE BY ATOMICLAYER DEPOSITION AND RELATED DEPOSITION APPARATUS,” which is incorporated herein by reference in its entirety.

[0064] Careful regulation of the temperature of the showerhead gas distribution mechanism and the chamber walls of the reaction chamber can substantially prevent premature decomposition of the hydrogen peroxide precursor prior to interaction with the heated substrate. Thus, in some embodiments, the hydrogen peroxide precursor can be decomposed close to the substrate.

[0065] In some embodiments of the present disclosure, contacting the substrate with the hydrogen peroxide precursor may include contacting the substrate with the hydrogen peroxide precursor for a period of about 0.01 seconds to about 60 seconds, about 0.05 seconds to about 10 seconds, or about 0.1 seconds to about 5.0 seconds. In addition, during the contacting of the substrate with the hydrogen peroxide precursor, the flow rate of the hydrogen peroxide precursor may be less than 2000 sccm, or less than 500 sccm, or even less than 100 sccm. In addition, during the contacting of the substrate with the hydrogen peroxide precursor, the flow rate of the hydrogen peroxide precursor may be in the range of about 1 to 2000 sccm, about 5 to 1000 sccm, or about 10 to about 500 sccm.

[0066] After contacting the substrate with the hydrogen peroxide precursor, the exemplary ALD process 100 can be performed by purging the reaction chamber. For example, excess hydrogen peroxide precursor and reaction byproducts (if any) can be removed from the substrate surface, for example, by pumping while an inert gas flows. In some embodiments of the present disclosure, the purging process can include purging the substrate surface for a period of about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 3 seconds, or even about 1 second to 2 seconds.

[0067] After the purge of the third gas phase reactant, i.e., the hydrogen peroxide precursor (and any reaction byproducts) from the reaction chamber is completed, the cyclic deposition phase 105 can be continued through a decision gate 150, wherein the decision gate 150 depends on the thickness of the deposited metal silicate film. For example, if the deposited thickness of the metal silicate film is not sufficient for the desired application, the cyclic deposition phase 105 can be repeated by returning to process block 120 and continuing with another deposition cycle, wherein the unit deposition cycle can include contacting the substrate with the metal precursor (process block 120), purging the reaction chamber, contacting the substrate with the silicon precursor (process block 130), purging the reaction chamber, contacting the substrate with the hydrogen peroxide precursor (process block 140), and rinsing the reaction chamber again. The unit deposition cycle of the cyclic deposition phase 105 can be repeated one or more times until a metal silicate film of a desired thickness is deposited on the substrate. Once the metal silicate film has been deposited to a desired thickness, the exemplary ALD process 100 may exit via process block 160 and the substrate having the metal silicate film thereon may be further processed to form a semiconductor device structure.

[0068] It should be understood that in some embodiments of the present disclosure, the order in which the substrate is contacted with the metal precursor, the silicon precursor, and the hydrogen peroxide precursor can be such that the order in which the substrate is contacted with the different precursors can be performed in any order within a unit deposition cycle. As a non-limiting example, the substrate can be first contacted with the hydrogen peroxide precursor, then contacted with the metal precursor, and then contacted with the silicon precursor. In addition, in some embodiments, the cyclic deposition phase 105 of the exemplary ALD process 110 can include contacting the substrate with each individual precursor one or more times before proceeding to the next phase of the deposition cycle. For example, a unit deposition cycle can incorporate multiple pulses of a metal precursor and / or a silicon precursor and / or a hydrogen peroxide precursor.

[0069] In some embodiments of the present disclosure, the growth rate of the metal silicate film can be about 0.005 angstroms / cycle to about 5 angstroms / cycle, or about 0.01 angstroms / cycle to about 2.0 angstroms / cycle, or about 0.1 angstroms / cycle to about 1.5 angstroms / cycle. In some embodiments of the present disclosure, the growth rate of the metal silicate film is about 1.0 angstroms / cycle.

[0070] In some embodiments of the present disclosure, a metal silicate film can be deposited on the surface of a substrate with substantially no or no incubation period. In more detail, existing cyclic deposition processes for depositing metal silicate films typically require multiple deposition cycles prior to any discernible deposition on the substrate surface. In contrast, embodiments of the present disclosure utilize a hydrogen peroxide precursor as an oxidant and subject the hydrogen peroxide precursor to strict temperature control prior to interaction with the heated substrate, resulting in the metal silicate film being deposited immediately on the substrate surface from the initial deposition cycle, thereby eliminating any incubation period. For example, deposition of a metal silicate film on a substrate can be achieved using less than 10 deposition cycles, or less than 5 deposition cycles, or less than 2 deposition cycles, or even 1 deposition cycle.

[0071] The metal silicate film deposited by the cyclic deposition process disclosed herein can be a continuous film. In some embodiments, the metal silicate film can be continuous at a thickness of less than about 100 nanometers, or less than about 60 nanometers, or less than about 50 nanometers, or less than about 40 nanometers, or less than about 30 nanometers, or less than about 20 nanometers, or less than about 10 nanometers, or less than about 5 nanometers, or less than about 2 nanometers, or less than about 1 nanometer, or even less than about 0.5 nanometers. The continuity mentioned herein can be physical continuity or electrical continuity. In some embodiments of the present disclosure, the thickness at which the metal silicate film can be physically continuous can be different from the thickness at which the metal silicate film is electrically continuous, and vice versa.

[0072] In some embodiments of the present disclosure, the thickness of the metal silicate film deposited according to the cyclic deposition process described herein can be from about 20 nanometers to about 100 nanometers, or from about 20 nanometers to about 60 nanometers. In some embodiments, the thickness of the metal silicate film deposited according to some embodiments described herein can be greater than about 20 nanometers, or greater than about 30 nanometers, or greater than about 40 nanometers, or greater than about 50 nanometers, or greater than about 60 nanometers, or greater than about 100 nanometers, or greater than about 250 nanometers, or greater than about 500 nanometers or greater. In some embodiments, the thickness of the metal silicate film deposited according to some embodiments described herein can be less than about 50 nanometers, or less than about 30 nanometers, or less than about 20 nanometers, or less than about 15 nanometers, or less than about 10 nanometers, or less than about 5 nanometers, or less than about 3 nanometers, or less than about 2 nanometers, or even less than about 1 nanometer.

[0073] A cyclic deposition process, such as the exemplary ALD process described herein, can be used to deposit metal silicate films having a higher purity than metal silicate films formed by existing deposition methods. As a non-limiting example, the metal silicate films of the present disclosure may contain less than about 1 atomic % carbon, or less than 0.5 atomic % carbon, or less than 0.2 atomic % carbon. As another non-limiting example, the metal silicate films of the present disclosure may contain less than about 5 atomic % hydrogen, or less than 4 atomic % hydrogen, or even less than 3 atomic % hydrogen. In the embodiments outlined herein, the atomic concentration of the elements can be determined using Rutherford backscattering (RBS).

[0074] In some embodiments of the present disclosure, a halide precursor such as silicon tetrachloride (SiCl 4 ) as a silicon precursor to deposit the metal silicate film of the present disclosure, and the deposition method of the present disclosure can enable the deposition of a metal silicate film with reduced residual halide content. For example, the metal silicate film of the present disclosure can contain less than about 0.2 atomic % of halide, or less than about 0.1 atomic % of halide, or less than 0.05 atomic % of halide, wherein the halide can contain at least one of fluorine (F), chlorine (Cl), bromine (Br), or iodine (I). As a non-limiting example, a chlorinated silicon precursor (e.g., SiCl 4 ) to deposit the metal silicate film of the present disclosure, and the metal silicate film may contain less than 0.2 atomic % chlorine, or less than about 0.1 atomic % chlorine, or even less than about 0.05 atomic % chlorine.

[0075] Embodiments of the present disclosure may be used to form high quality metal silicate films, particularly certain metal silicate films from the group consisting of: hafnium silicate films (Hf x Si y O z ), yttrium silicate film (Y x Si y O z ), zirconium silicate film (Zr x Si y O z ), aluminum silicate film (Al x Si y O z ), Scandium silicate film (Sc x Si y O z ), cerium silicate film (Ce x Si y O z ), Erbium silicate film (Er x Si y O z) or strontium silicate film (Sr x Si y O z ).

[0076] In some embodiments of the present disclosure, the metal silicate film of the present disclosure may include a silicon content greater than about 10 atomic %, or greater than about 20 atomic %, or greater than about 30 atomic %, or greater than about 40 atomic %, or greater than about 50 atomic %, or even greater than about 60 atomic %. In some embodiments, the metal silicate film of the present disclosure may have a silicon content of about 10 atomic % to about 60 atomic %, or about 10 atomic % to about 30 atomic %. In some embodiments, the metal silicate film of the present disclosure may have a silicon content of less than 10 atomic %.

[0077] As a non-limiting example, the metal silicate film of the present disclosure may include an aluminum silicate film (AlSiC) having a silicon atomic percentage between about 10 atomic % and about 60 atomic %. x Si y O z As another non-limiting example, the metal silicate film of the present disclosure may include an aluminum silicate film (AlSiC) having a silicon atomic percentage between about 10 atomic % and about 30 atomic % or a silicon atomic percentage less than 10 atomic %. x Si y O z ).

[0078] In some embodiments of the present disclosure, the metal silicate film can be deposited on a three-dimensional structure, for example, a non-planar substrate containing high aspect ratio features. In some embodiments, in a structure having an aspect ratio (height / width) greater than about 2, or greater than about 5, or greater than about 10, or greater than about 25, or greater than about 50, or even greater than about 100, the step coverage of the metal silicate film can be equal to or greater than about 50%, or greater than about 60%, or greater than 70%, or greater than 80%, or greater than about 90%, or greater than about 95%, or greater than about 98%, or greater than about 99%, or greater.

[0079] As previously described, the substrate on which the metal silicate film is deposited may include a patterned substrate, which may include semiconductor device structures formed in or on the substrate surface, for example, the patterned substrate may include partially fabricated semiconductor device structures, such as transistors and / or memory elements.

[0080] In some embodiments of the present disclosure, the substrate may include multiple channel regions, and the metal silicate film may be directly deposited on the multiple channel regions, where the term "channel region" may refer to a region of a semiconductor device structure where carriers can be controlled, for example, by biasing a gate electrode.

[0081] As a non-limiting example, Figure 2 A semiconductor device structure 200 is shown, which may include a planar NMOS FET device. The semiconductor device structure 200 may include a substrate 202, which may include a p-type dopant. Source / drain regions 214 are disposed in or on the substrate, and the source / drain regions 214 include a phosphorus-doped silicon film 218. A channel region 212 may be disposed between the source / drain regions 214. Although Figure 2 A single channel region 212 is shown in FIG. 1 , but it should be understood that the substrate on which the metal silicate deposition is performed may include multiple channel regions. In some embodiments, the multiple channel regions may include silicon germanium (Si 1-x Ge x ), where x can be between about 0 and about 0.25, or between about 0 and about 0.50, or between about 0.01 and about 0.50, or even between 0.05 and 0.25.

[0082] In some embodiments of the present disclosure, the interface layer 209 comprising metal silicate can be directly disposed on the channel region 212, and the metal silicate interface layer 209 can be directly deposited on the channel region using the cyclic deposition process described herein. For example, the metal silicate interface layer 209 can include aluminum silicate (Al2O3) with a silicon atomic percentage between about 10 atomic % and about 60 atomic %, or between about 10 atomic % and about 30 atomic %, or less than about 10 atomic %. x Si y O z ).

[0083] In some embodiments of the present disclosure, the exposed surfaces of the plurality of channel regions may be passivated before depositing the metal silicate film directly on the plurality of channel regions. In more detail, the interface between the interface layer 209 and the channel region 212 generally includes a large interface trap density (D it ). High D it The values ​​are believed to be caused by vacancies and dangling bonds at the surface of the channel region comprising silicon germanium material, and may deleteriously affect the performance of semiconductor devices formed using multiple silicon germanium channel regions.

[0084] Therefore, embodiments of the present disclosure further include passivating the surfaces of the plurality of channel regions prior to depositing the metal silicate film, wherein passivating the surfaces of the plurality of channel regions includes exposing the exposed surfaces of the plurality of channel regions to a vapor-phase sulfur precursor. In some embodiments, the vapor-phase sulfur precursor may include (NH 4 ) 2 S.H. 2 S. NH 4At least one of HS or an organic sulfur compound. More information on passivation of a semiconductor channel region using a vapor-phase sulfur precursor can be found in U.S. Publication No. 2014 / 0027884, filed on July 12, 2013, entitled “Systems and Methods for Vapor-Phase Sulfur Passivation of Semiconductor Surfaces,” which is incorporated herein by reference in its entirety.

[0085] In some embodiments, for the mid-gap state, the interface trap density at the interface between the plurality of channel regions (eg, channel region 212) and the metal silicate film (ie, interface layer 209) is less than 7e 12 cm -2 eV -1 , or less than 1e 12 cm -2 eV -1 , or even less than 7e 11 cm -2 eV -1 In addition, in some embodiments, the metal silicate film, ie, the interface layer 209, may have a thickness less than 5e 10 cm -2 , or less than 3e 10 cm -2 , or even less than 2e 10 cm -2 The effective oxide charge density is

[0086] In some embodiments, the method of the present disclosure may further include depositing a high-k dielectric material on the metal silicate film such that the metal silicate film forms an interface layer directly disposed between the plurality of channel regions and the high-k dielectric material. For example, the semiconductor device structure 200 may include a high-k dielectric material 207 disposed directly on the metal silicate interface layer 209. In some embodiments, the high-k dielectric material 207 may include a metal oxide having a dielectric constant greater than about 7. In some embodiments, the high-k metal oxide may include hafnium oxide (HfO 2 ), Tantalum Oxide (Ta 2 O 5 ), zirconium oxide (ZrO 2 ), titanium oxide (TiO 2 ), Hafnium Silicate (HfSiO x ), aluminum oxide (Al 2 O 3 ) or lanthanum oxide (La 2 O 3 ), or mixtures / laminates thereof.

[0087] The gate electrode may be deposited directly on the high-k dielectric material, for example, the gate electrode 208 is disposed directly on the high-k dielectric material 207. In some embodiments, the gate electrode may include one or more of a metal, a metal nitride, or a metal carbide film, such as titanium aluminum carbide (TiAlC). In addition, a gate spacer 210 may be disposed above the substrate 202.

[0088] Embodiments of the present disclosure may also provide semiconductor device structures, such as Figure 2 The semiconductor device structure 200 may include silicon germanium (Si 1-x Ge x ) channel region 212; an interface layer 209, which comprises a silicon germanium (Si 1-x Ge x ) aluminum silicate film on the channel region 212; and a high-k dielectric material 207 disposed directly on the interface layer, wherein for the mid-gap state, in silicon germanium (Si 1-x Ge x ) The interface trap density at the interface between the channel region 212 and the interface layer 209 is less than about 7e 11 cm -2 eV -1 .

[0089] In some embodiments of the present disclosure, silicon germanium (Si 1-x Ge x ) channel region 212 has a germanium content, where x is between about 0 and about 0.50, or between about 0 and about 0.25, or between about 0.01 and about 0.50, or between about 0.05 and about 0.25. In addition, the aluminum silicate film 209 can have a silicon atomic percentage between about 10 atomic % and about 60 atomic %, or between about 10 atomic % and about 30 atomic %, or even less than 10 atomic %. In some embodiments, the aluminum silicate film 209 can have a silicon atomic percentage of less than 5e 10 cm -2 In addition, the interfacial layer comprising the aluminum silicate film 209 may have a thickness of less than 1 nanometer, or less than 0.5 nanometer, or even less than 0.25 nanometer.

[0090] In some embodiments, the high-k dielectric material 207 may include a metal oxide having a dielectric constant greater than about 7. Additionally, a gate electrode 208 may be disposed over the high-k dielectric material 207 , and a gate spacer 210 may be disposed over the substrate 202 .

[0091] Embodiments of the present disclosure may also provide semiconductor processing equipment configured to perform the cyclic deposition method described herein. In more detail, Figure 3An exemplary semiconductor processing apparatus 300 is shown, which includes a reaction chamber 302 and a precursor delivery system 312. The precursor delivery system 312 can be configured to supply precursors and purge gases to the reaction chamber 302. It should be noted that the semiconductor processing apparatus 300 is a simplified schematic version of an exemplary semiconductor processing apparatus and does not contain every element, i.e., for example, every valve, gas line, heating element, reactor component, etc. Figure 3 The semiconductor processing device 300 provides key features of the device in order to provide sufficient disclosure to ordinary technicians in the field.

[0092] The exemplary semiconductor processing apparatus 300 may include a reaction chamber 302 constructed and arranged to hold at least one substrate 304. In some embodiments, the reaction chamber 302 may be configured for one or more of a deposition process, an etching process, or a cleaning process. For example, the reaction chamber 302 may be configured for a cyclic deposition process, such as an atomic layer deposition (ALD) process or a cyclic chemical vapor deposition (CCVD) process. In some embodiments, the reaction chamber may include one or more temperature-controlled chamber walls, wherein the chamber walls may be regulated at a temperature below about 70° C., such regulation of the chamber walls may prevent premature decomposition of the hydrogen peroxide precursor utilized in the cyclic deposition process of the present disclosure, and more details on the temperature control of the reaction chamber walls may be found in U.S. Application No. 15 / 636,307, filed on June 28, 2017, entitled “Method for Depositing a Transition Metal Nitride Film on a Substrate by Atomic Layer Deposition and Related Deposition Apparatus,” which is incorporated herein by reference in its entirety.

[0093] In some embodiments, substrate 304 may be disposed in reaction chamber 302 and held in place by susceptor 308 configured to hold at least one substrate thereon. The susceptor may include a heater 310 configured to heat substrate 304 to a suitable processing temperature.

[0094] Precursor delivery system 312 may include one or more precursor sources 314A, 314B, and 314C that are constructed and arranged to provide a vapor-phase precursor to reaction chamber 302. For example, precursor sources 314A, 314B, and 314C may include solid precursors, liquid precursors, gaseous precursors, or mixtures thereof. In some embodiments, precursor source 314A may include a metal vapor-phase precursor, such as an aluminum precursor (e.g., trimethylaluminum (TMA)). In some embodiments, precursor source 314B may include a silicon vapor-phase precursor, such as a silicon halide (e.g., silicon tetrachloride (SiCl 4 In some embodiments, the precursor source 314C may include hydrogen peroxide (H 2 O 2 ) precursor.

[0095] The precursor delivery system 312 may further include a source container 316 configured to store and distribute a purge gas, such as nitrogen, helium, or argon, to the reaction chamber 302. The precursor delivery system 312 may further include a source container 318 configured to store and distribute a gaseous sulfur precursor to the reaction chamber 302 to passivate the surface of the substrate 304 disposed in the reaction chamber 302, such as hydrogen sulfide (e.g., H 2 S).

[0096] Precursor delivery system 312 may also include valves 322A, 322B, 322C, 322D, and 322E, such as shutoff valves, which may be associated with precursor sources 314A, 314B, and 314C, as well as source container 316 containing a purge gas and source container 318 containing a vapor-phase sulfur precursor. Valves 322A, 322B, 322C, 322D, and 322E may be used to isolate the precursor source, the purge gas source, and the vapor-phase sulfur precursor source from reaction chamber 302, i.e., when one of the plurality of valves is in a closed position, vapors generated by the sources may be prevented from flowing into reaction chamber 302.

[0097] Precursor delivery system 312 may further include flow controllers 320A, 320B, 320C, 320D, and 320E configured to monitor and regulate the mass flow of precursor and purge gases entering reaction chamber 302. For example, flow controllers 320A, 320B, 320C, 320D, and 320E may include mass flow controllers (MFCs).

[0098] One or more gas lines, such as gas lines 324, 326, 329, 330, and 331, can be in fluid communication with the precursor / purge source and the reaction chamber 302 to enable the supply of vapor to the reaction chamber 302. In certain embodiments, the precursor delivery system 312 can be in fluid communication with a gas distributor 332 configured to distribute the precursor vapor and purge gas into the reaction chamber 302 and above the substrate 304. As a non-limiting example, the gas distributor 332 can include a showerhead gas distribution mechanism, such as Figure 3. It should be noted that, although shown in block form, the showerhead gas distribution mechanism can be a relatively complex structure and can be configured to mix vapors from multiple sources, or maintain separation between multiple vapors introduced into the showerhead gas distribution mechanism. In addition, in an exemplary embodiment, the gas distributor may include a showerhead gas distribution mechanism, which is configured to introduce a precursor into the reaction chamber, wherein the temperature of the showerhead gas distribution mechanism is adjusted to a temperature below 70°C. More details about the temperature regulation of the showerhead gas distribution mechanism can be found in U.S. application No. 15 / 636,307, entitled "Method for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition equipment", filed on June 28, 2017, which is incorporated herein by reference in its entirety.

[0099] The exemplary semiconductor processing apparatus 300 may also include a gas removal system constructed and arranged to remove gas from the reaction chamber 302. For example, the removal system may include an exhaust port 334 disposed in a wall of the reaction chamber 302, an exhaust line 336 in fluid communication with the exhaust port 334, and a vacuum pump in fluid communication with the exhaust line 336 and configured to evacuate gas from within the reaction chamber 302. Once the gas is exhausted from the reaction chamber 302 using the vacuum pump 338, the gas may be transported along an additional exhaust line 340 and out of the apparatus 300 for other abatement processes.

[0100] The exemplary semiconductor processing equipment 300 may further include a sequence controller 342, which is operably connected to the precursor delivery system 312, the reaction chamber 302, and the removal system by means of exemplary control lines 344A, 344B, and 344C. The sequence controller 342 may include electronic circuits that selectively operate valves, heaters, flow controllers, manifolds, pumps, and other devices associated with the semiconductor processing equipment 300. Such circuits and components are used to introduce precursor gases and purge gases from sources 314A, 314B, 314C, 316, and 318. The sequence controller 342 may also control the timing of the precursor pulse sequence, the temperature of the substrate and the reaction chamber, and the pressure of the reaction chamber and various other operations required to provide the proper operation of the semiconductor processing equipment 300. The sequence controller 342 may also include a memory 344, which has a program that executes the semiconductor process when it is run on the sequence controller 342. For example, the sequence controller 342 may include a module, such as a software or hardware component (e.g., an FPGA or ASIC), that performs a specific semiconductor process, such as an etching process, a cleaning process, and / or a particularly cyclic deposition process. The module may be configured to be located on an addressable storage medium of the sequence controller 342 and may be configured to perform one or semiconductor processes.

[0101] The exemplary embodiments of the present disclosure described above do not limit the scope of the present invention, because these embodiments are merely examples of embodiments of the present invention, and the present invention is limited by the attached claims and their legal equivalents. Any equivalent embodiments are intended to be within the scope of the present invention. In fact, those skilled in the art can understand various modifications to the present disclosure beyond what is shown and described herein, such as alternative useful combinations of the described elements, based on the description. Such modifications and embodiments are also intended to be within the scope of the attached claims.

Claims

1. A semiconductor device structure, comprising: SiGe channel region; an interfacial layer comprising a metal silicate film disposed on the silicon germanium channel region, wherein the metal silicate film comprises a halide level less than about 0.2 atomic %; and The high-k dielectric material is disposed on the interface layer.

2. The semiconductor device structure of claim 1, wherein the metal silicate film comprises one or more of: hafnium silicate, yttrium silicate, zirconium silicate, aluminum silicate, scandium silicate, cerium silicate, erbium silicate, or strontium silicate.

3. The semiconductor device structure of claim 1, wherein the metal silicate film has a silicon atomic percentage ranging from about 10 atomic % to about 60 atomic %.

4. The semiconductor device structure of claim 1, wherein the metal silicate film has a silicon atomic percentage ranging from about 10 atomic % to about 30 atomic %.

5. The semiconductor device structure of claim 1, wherein the metal silicate film has a silicon atomic percentage of less than 10 atomic %. 6 . The semiconductor device structure of claim 1 , wherein the high-k dielectric material comprises a metal oxide having a dielectric constant greater than about 7.

7. The semiconductor device structure of claim 1, wherein the effective oxide charge density of the metal silicate film is less than 5×10 10 cm -2 .

8. The semiconductor device structure of claim 1, wherein the interface trap density at the interface between the silicon germanium channel region and the interface layer is less than about 7×10 12 cm -2 eV -1 .

9. A semiconductor device structure, comprising: SiGe channel region; an interface layer comprising a metal silicate film disposed on the silicon germanium channel region, wherein the silicon atomic percentage of the metal silicate film is between about 10 atomic % and about 60 atomic %; and The high-k dielectric material is disposed on the interface layer.

10. The semiconductor device structure of claim 9, wherein the effective oxide charge density of the metal silicate film is less than 5e 10 cm -2 .

11. The semiconductor device structure of claim 9, wherein the metal silicate film comprises one or more of: hafnium silicate, yttrium silicate, zirconium silicate, aluminum silicate, scandium silicate, cerium silicate, erbium silicate, or strontium silicate.

12. The semiconductor device structure according to claim 9, wherein the silicon germanium in the silicon germanium channel region is represented by Si 1-x Ge x , wherein x is between about 0 and about 0.

50.

13. The semiconductor device structure of claim 9, further comprising at least two source regions, wherein the silicon germanium channel region is disposed between the at least two source regions.

14. The semiconductor device structure of claim 13, wherein the at least two source regions comprise phosphorus-doped silicon thin films. 15 . The semiconductor device structure of claim 14 , further comprising a gate electrode disposed on the high-k dielectric material, wherein the gate electrode comprises one or more of: a metal, a metal nitride, or a metal carbide.

16. A semiconductor device structure, comprising: SiGe channel region; an interface layer comprising a metal silicate film, wherein the metal silicate film is disposed on the silicon germanium channel region, wherein the carbon impurity content of the metal silicate film is less than 1 atomic %; and The high-k dielectric material is disposed on the interface layer.

17. The semiconductor device structure of claim 16, wherein the metal silicate film has a hydrogen impurity content of less than 5 atomic %.

18. The semiconductor device structure of claim 16, wherein the metal silicate film has a silicon atomic percentage ranging from about 10 atomic % to about 60 atomic %.

19. The semiconductor device structure of claim 18, wherein the metal silicate film comprises aluminum silicate.

20. The semiconductor device structure of claim 16, wherein the halide content of the metal silicate film is less than about 0.2 atomic %.

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