Electrode extraction method of tellurium-cadmium-mercury infrared detector chip
By using a hard mask instead of the photoresist layer in the electrode extraction method of the mercury cadmium tellurium infrared detector chip, the problem of poor ohmic contact effect of the electrode is solved, and better adhesion between the electrode and the injection region and device performance are achieved.
Patent Information
- Application Number
- CN202510085948.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-20
- Publication Date
- 2025-04-22
AI Technical Summary
In the prior art, the electrode ohmic contact effect of the mercury cadmium tellurium infrared detector chip is poor, resulting in poor adhesion between the electrode and the material and the generation of parasitic resistance, affecting device performance.
By growing a passivation layer on the surface of the mercury cadmium tellurium matrix, ion implantation is performed, hard mask is provided, and the passivation layer and mercury tellurium matrix are etched through the contact morphological holes to obtain electrode contact holes, electrode deposition is performed therein, and electrode extraction is completed.
The use of hard mask instead of the photoresist layer avoids the in-hole plugging problem caused by photoresist residue, greatly improving the ohmic contact quality between the electrode and the injection region, and improving device performance.
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Figure CN119866101A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of detector chip preparation, and in particular to an electrode lead-out method for a mercury cadmium telluride infrared detector chip. Background Art
[0002] Mercury cadmium telluride materials are widely used in military and civilian fields such as early warning detection, infrared reconnaissance, and imaging guidance due to their advantages such as high photoelectric detection efficiency. In the infrared detector chip preparation process, the etching of contact holes and the growth and preparation of electrodes are necessary processes for bringing out the PN junction. Contact hole etching is a process of transferring the pattern to the substrate material by photolithography, and after etching the passivation layer using a dry etching process, a groove is formed on the N-type area of the mercury cadmium telluride material. Then, on the basis of completing the contact hole etching, an electrode is grown to achieve ohmic contact, bring out the PN junction, and complete the interconnection with the circuit. In the existing dry etching and electrode preparation process, a base metal layer needs to be grown in the contact hole after dry etching to protect the mercury cadmium telluride material in the hole before completing the preparation of the electrode. Before the electrode preparation process is carried out, metal stripping is required. Due to the small diameter of the contact hole, part of the product will sputter to the edge of the contact hole when the product is discharged outward. After being heated and soaked in acetone, the photoresist is not easy to break and is easy to fall into the hole and cause photoresist residue at the edge of the contact hole, which may lead to poor adhesion between the electrode and the material in the hole, and a parasitic resistance may be generated at the interface between the metal and the mercury cadmium telluride material, affecting the ohmic contact effect of the electrode. In the existing process, ion beam etching is required after the electrode is grown. The existence of the etching process will cause certain device damage, thereby affecting the device performance.
[0003] In the existing contact hole etching process, photoresist is used as a mask layer for dry etching of contact holes. After the contact holes are etched, a base metal layer is grown, and a stripping process is used to strip off the metal around the contact holes. Since the products generated in the dry etching process are not easily discharged from the hole to the outside and are not easily discharged during sputtering, and the temperature is too high during the etching process, the photoresist is denatured, so that the photoresist is not easy to break during stripping. Two situations occur: one is that the hole is blocked with glue, and the other is that the photoresist remains around the contact hole. Both situations will lead to poor adhesion of the electrode material in the subsequent electrode growth process, thereby affecting the ohmic contact.
[0004] Therefore, how to improve the ohmic contact effect of the electrodes of the mercury cadmium telluride infrared detector chip is a problem that needs to be solved urgently by those skilled in the art. Summary of the invention
[0005] The object of the present invention is to provide a method for leading out electrodes of a mercury cadmium telluride infrared detector chip, so as to solve the problem of poor ohmic contact effect of electrodes of the mercury cadmium telluride infrared detector chip in the prior art.
[0006] In order to solve the above technical problems, the present invention provides an electrode lead-out method for a mercury cadmium telluride infrared detector chip, comprising:
[0007] growing a passivation layer on the surface of the mercury cadmium telluride substrate;
[0008] Performing ion implantation on the mercury cadmium telluride substrate through the passivation layer to obtain a patterned implantation region on the surface of the mercury cadmium telluride substrate;
[0009] Disposing a hard mask on the surface of the passivation layer after ion implantation;
[0010] Performing photolithography etching on the hard mask to obtain a contact morphology hole penetrating the hard mask;
[0011] The passivation layer and the mercury cadmium telluride substrate are etched through the contact morphology hole to obtain an electrode contact hole; the bottom surface of the electrode contact hole exposes the injection area;
[0012] Electrode deposition is performed in the electrode contact hole to complete electrode extraction.
[0013] Optionally, in the electrode lead-out method of the mercury cadmium telluride infrared detector chip, photolithography is performed on the hard mask to obtain a contact morphology hole penetrating the hard mask, which includes:
[0014] Disposing a photoresist layer on the surface of the hard mask;
[0015] Expose the photoresist layer once to obtain film morphology holes;
[0016] Using the photoresist layer that has been exposed once as a mask, the hard mask is etched to obtain contact morphology holes that penetrate the hard mask at positions corresponding to the photoresist morphology holes;
[0017] Accordingly, before obtaining the electrode contact hole, the method further includes:
[0018] Performing secondary exposure on the photoresist layer to obtain film expansion holes corresponding to the film morphology holes; the film expansion holes have an area larger than the film morphology holes and completely cover the corresponding film morphology holes;
[0019] Accordingly, electrode deposition is performed in the electrode contact hole to complete electrode extraction, including:
[0020] Performing electrode deposition on the entire surface of the mercury cadmium telluride substrate provided with the electrode contact hole to obtain a lead-out precursor;
[0021] The lead-out precursor is subjected to electrode stripping to remove the photoresist layer, thereby completing the electrode lead-out.
[0022] Optionally, in the electrode extraction method of the mercury cadmium telluride infrared detector chip, performing electrode stripping on the extraction precursor to remove the photoresist layer includes:
[0023] The lead-out front end is immersed in acetone to remove the photoresist layer, and the electrode is stripped.
[0024] Optionally, in the electrode lead-out method of the mercury cadmium telluride infrared detector chip, the hard mask is a silicon dioxide layer.
[0025] Optionally, in the electrode lead-out method for a mercury cadmium telluride infrared detector chip, the etching of the hard mask is reactive ion beam etching.
[0026] Optionally, in the electrode extraction method of the mercury cadmium telluride infrared detector chip, the etching gas of the reactive ion beam etching is a mixed gas of carbon tetrafluoride and argon; the mixing ratio of the carbon tetrafluoride and the argon is 1:1.
[0027] Optionally, in the electrode extraction method of the mercury cadmium telluride infrared detector chip, etching the passivation layer and the mercury cadmium telluride substrate through the contact morphology hole to obtain the electrode contact hole comprises:
[0028] Performing inductively coupled plasma etching on the passivation layer and the mercury cadmium telluride substrate through the contact morphology hole to obtain an electrode contact hole;
[0029] The etching gas for the inductively coupled plasma etching is a mixed gas of methane, hydrogen, argon and nitrogen; the etching bias voltage ranges from 50 volts to 150 volts, including the endpoint values; the working pressure ranges from 3 millitorr to 8 millitorr, including the endpoint values; the working power ranges from 100 watts to 200 watts, including the endpoint values.
[0030] Optionally, in the electrode lead-out method of the mercury cadmium telluride infrared detector chip, growing a passivation layer on the surface of the mercury cadmium telluride substrate includes:
[0031] A composite passivation layer is grown on the surface of a mercury cadmium telluride substrate by double-cavity magnetron sputtering; the composite passivation layer comprises a zinc sulfide layer and a cadmium telluride layer which are stacked.
[0032] Optionally, in the electrode lead-out method of the mercury cadmium telluride infrared detector chip, the thickness of the zinc sulfide layer ranges from 100 nanometers to 300 nanometers, including end points;
[0033] The cadmium telluride layer has a thickness in a range from 100 nanometers to 300 nanometers, inclusive.
[0034] A mercury cadmium telluride infrared detector chip is a chip obtained by any of the above-mentioned methods for extracting electrodes of a mercury cadmium telluride infrared detector chip.
[0035] The electrode lead-out method of the mercury cadmium telluride infrared detector chip provided by the present invention is as follows: a passivation layer is grown on the surface of a mercury cadmium telluride substrate; ions are implanted into the mercury cadmium telluride substrate through the passivation layer to obtain a patterned implantation area on the surface of the mercury cadmium telluride substrate; a hard mask is provided on the surface of the passivation layer after ion implantation; the hard mask is photoetched to obtain a contact morphology hole penetrating the hard mask; the passivation layer and the mercury cadmium telluride substrate are etched through the contact morphology hole to obtain an electrode contact hole; the bottom surface of the electrode contact hole exposes the implantation area; and an electrode is deposited in the electrode contact hole to complete the electrode lead-out. The present invention uses a hard mask to replace the photoresist layer in the related art as the mask material in the etching process, thereby avoiding the problem of glue plugging in the hole caused by photoresist residue, and greatly improving the ohmic contact quality between the electrode and the implantation area. The present invention also provides a mercury cadmium telluride infrared detector chip having the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0037] Figure 1 A schematic flow chart of a specific implementation of the method for leading out electrodes of a mercury cadmium telluride infrared detector chip provided by the present invention;
[0038] Figures 2 to 7 A schematic diagram of the process structure of a specific implementation of the electrode lead-out method for a mercury cadmium telluride infrared detector chip provided by the present invention;
[0039] Figure 8 A schematic flow chart of another specific implementation of the method for leading out electrodes of a mercury cadmium telluride infrared detector chip provided by the present invention;
[0040] Figures 9 to 12 A schematic diagram of the process structure of a specific implementation of the electrode lead-out method for a mercury cadmium telluride infrared detector chip provided by the present invention.
[0041] In the figure, 01-mercury cadmium telluride substrate, 01a-injection region, 01b-electrode contact hole, 02-passivation layer, 03-first photoresist film, 04-hard mask, 04a-contact morphology hole, 05-photoresist layer, 05a-film morphology hole, 05b-film expansion hole, 06-electrode DETAILED DESCRIPTION
[0042] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0043] The core of the present invention is to provide a method for extracting the electrode 06 of a mercury cadmium telluride infrared detector chip, and a flow chart of a specific implementation method thereof is shown as follows: Figure 1 As shown, it is called specific implementation mode 1, including:
[0044] S101: growing a passivation layer on the surface of the mercury cadmium telluride substrate.
[0045] The schematic diagram of the structure of the mercury cadmium telluride substrate 01 after the passivation layer 02 is grown is as follows: Figure 2 As a preferred embodiment, the passivation layer 02 in this step is a composite passivation layer 02, and this step may include:
[0046] A composite passivation layer 02 is grown on the surface of a mercury cadmium telluride substrate 01 by dual-cavity magnetron sputtering; the composite passivation layer 02 comprises a zinc sulfide layer and a cadmium telluride layer which are stacked.
[0047] The use of dual-cavity magnetron sputtering can greatly increase the growth rate of the composite passivation layer 02 and improve production efficiency. At the same time, setting the passivation layer 02 as a composite passivation layer 02 in which the zinc sulfide layer and the cadmium telluride layer are stacked can also greatly improve the passivation effect.
[0048] Further, the thickness of the zinc sulfide layer ranges from 100 nanometers to 300 nanometers, including endpoint values, such as at least one of 100.0 nanometers, 204.6 nanometers, or 300.0 nanometers; the thickness of the cadmium telluride layer ranges from 100 nanometers to 300 nanometers, including endpoint values, such as at least one of 100.0 nanometers, 258.6 nanometers, or 300.0 nanometers. The above ranges are the preferred parameter ranges after a large number of theoretical calculations and actual tests. Of course, the ranges of the above parameters can also be adjusted according to actual conditions, and the present invention is not limited here.
[0049] S102: performing ion implantation into the HgCdTe substrate through the passivation layer to obtain a patterned implantation region on the surface of the HgCdTe substrate.
[0050] In this step, specifically, a patterned photoresist (referred to as a first photoresist film 03) is provided on the surface of the passivation layer 02. The patterned first photoresist film 03 exposes the area where ion implantation is required and covers the area where ion implantation is not required. Then, ion implantation is performed under the shielding of the first photoresist film 03 (refer to Figure 3 ), the injection region 01a is generated at a position below the passivation layer 02 and not covered by the first photoresist film 03, and then the patterned first photoresist film 03 is removed to obtain the patterned injection region 01a, which can be referred to Figure 4 .
[0051] S103: a hard mask is provided on the surface of the passivation layer after ion implantation.
[0052] Preferably, the hard mask 04 is a silicon dioxide layer, which is dense and has a stable structure and properties. Of course, other hard masks 04 may also be used, and the present invention is not limited thereto. Preferably, the thickness of the hard mask 04 is 500 nanometers, which can be referred to Figure 5 .
[0053] S104: performing photolithography etching on the hard mask to obtain contact morphology holes penetrating the hard mask.
[0054] This step includes two steps of processing the hard mask 04. The first step is to perform photolithography on the hard mask 04, that is, to set a patterned photoresist on the surface of the hard mask 04. Figure 6 As shown, the through hole position on the photoresist is the position where the contact morphology hole 04a will be opened; then the hard mask 04 is etched under the protection of the photoresist to obtain the contact morphology hole 04a. The schematic diagram of the structure after etching is shown in FIG. Figure 7 shown.
[0055] Furthermore, the etching of the hard mask 04 is reactive ion beam etching, which has strong anisotropy and high resolution, and while obtaining a contact morphology hole 04a with a large depth-to-width ratio, it will not cause the photoresist to break and fall into the contact morphology hole 04a, and a clean contact morphology hole 04a can be obtained. Of course, the photoresist on the surface of the hard mask 04 can also be removed before etching.
[0056] Furthermore, the etching gas of the reactive ion beam etching is a mixed gas of carbon tetrafluoride and argon; the mixing ratio of the carbon tetrafluoride and the argon is 1:1. In this preferred embodiment, the etching gas composition and ratio of the reactive ion beam etching are given, and the above gas composition and ratio are the optimal values after a large number of theoretical calculations and actual tests. Of course, they can also be adjusted accordingly according to actual conditions, and the present invention is not limited here.
[0057] S105: etching the passivation layer and the HgCdTe substrate through the contact morphology hole to obtain an electrode contact hole; the bottom surface of the electrode contact hole exposes the injection region.
[0058] As a specific implementation, this step includes:
[0059] The passivation layer 02 and the mercury cadmium telluride substrate 01 are subjected to inductively coupled plasma etching (ICP) through the contact morphology hole 04a to obtain an electrode contact hole 01b; the etching gas for the inductively coupled plasma etching is a mixed gas of methane, hydrogen, argon and nitrogen; the etching bias voltage ranges from 50 volts to 150 volts, including endpoint values, such as any one of 50.0 volts, 103.1 volts and 150.0 volts; the operating pressure ranges from 3 mTorr to 8 mTorr, including endpoint values, such as any one of 3.0 mTorr, 5.4 mTorr and 8.0 mTorr; the operating power ranges from 100 watts to 200 watts, including endpoint values, such as any one of 100.0 mTorr, 144.4 mTorr and 200.0 mTorr. Inductively coupled plasma etching has a high etching rate, high selectivity and low damage rate, and can etch to the implanted region 01a with little damage to the sidewall. At the same time, the inductively coupled plasma etching process can produce minimal etching damage for the etching of the composite passivation layer 02 and mercury cadmium telluride, thereby achieving the best device performance. In addition, through ICP etching, the process steps are reduced, the material loss rate is reduced, and the limitation of the above-mentioned etching gas and parameter range can further improve the etching effect and etching efficiency. Of course, it can also be adjusted according to actual conditions, and the present invention is not limited here.
[0060] S106: Depositing an electrode in the electrode contact hole to complete electrode extraction.
[0061] After this step, the electrode 06 forms a good ohmic contact with the injection region 01a in the prime click contact hole.
[0062] The method for leading out the electrode 06 of the mercury cadmium telluride infrared detector chip provided by the present invention comprises the following steps: growing a passivation layer 02 on the surface of a mercury cadmium telluride substrate 01; performing ion implantation on the mercury cadmium telluride substrate 01 through the passivation layer 02 to obtain a patterned implantation region 01a on the surface of the mercury cadmium telluride substrate 01; arranging a hard mask 04 on the surface of the ion-implanted passivation layer 02; performing photolithography etching on the hard mask 04 to obtain a contact morphology hole 04a penetrating the hard mask 04; etching the passivation layer 02 and the mercury cadmium telluride substrate 01 through the contact morphology hole 04a to obtain an electrode contact hole 01b; exposing the implantation region 01a at the bottom surface of the electrode contact hole 01b; and performing electrode deposition in the electrode contact hole 01b to complete the leading out of the electrode 06. The present invention uses a hard mask 04 instead of the photoresist layer 05 in the related art as a mask material in the etching process, avoiding the problem of photoresist residue causing glue plugging in the hole, and greatly improving the ohmic contact quality between the electrode 06 and the injection region 01a.
[0063] On the basis of the first specific implementation mode, the preparation method of the contact morphology hole 04a is further improved to obtain the second specific implementation mode, and the corresponding flow chart is as follows: Figure 8 As shown, including:
[0064] S201: growing a passivation layer on the surface of the mercury cadmium telluride substrate.
[0065] S202: performing ion implantation into the HgCdTe substrate through the passivation layer to obtain a patterned implantation region on the surface of the HgCdTe substrate.
[0066] S203: Disposing a hard mask on the surface of the passivation layer after ion implantation.
[0067] S204: Disposing a photoresist layer on the surface of the hard mask.
[0068] S205: Expose the photoresist layer once to obtain film morphology holes.
[0069] Please refer to the process structure diagram corresponding to this step Figure 6 .
[0070] S206: using the photoresist layer that has been exposed once as a mask, etching the hard mask to obtain contact morphology holes that penetrate the hard mask at positions corresponding to the photoresist morphology holes.
[0071] Please refer to the process structure diagram corresponding to this step Figure 7 .
[0072] S207: performing secondary exposure on the photoresist layer to obtain film expansion holes corresponding to the film morphology holes; the film expansion holes have an area larger than the film morphology holes and completely cover the corresponding film morphology holes.
[0073] Please refer to Fig. 9 In fact, this step is equivalent to enlarging the original film morphology hole 05a. The enlarged hole is called the film expansion hole 05b. The expanded film expansion hole 05b exposes the hard mask 04 at the edge of the contact morphology hole 04a to form a step-like structure.
[0074] S208: etching the passivation layer and the HgCdTe substrate through the contact morphology hole to obtain an electrode contact hole; the bottom surface of the electrode contact hole exposes the injection area.
[0075] Of course, in the process of etching the electrode contact hole 01b in this step, the photoresist layer 05 on the surface of the hard mask 04 is inevitably damaged, forming a trapezoidal morphology. The corresponding structural schematic diagram is shown in FIG. Fig.10 shown.
[0076] S209: performing electrode deposition on the entire surface of the mercury cadmium telluride substrate provided with the electrode contact hole to obtain a lead-out precursor.
[0077] The structural schematic diagram of the lead-out pre-processor is as follows Fig.11 shown.
[0078] S210: performing electrode stripping on the lead-out precursor, removing the photoresist layer, and completing electrode lead-out.
[0079] Of course, in the process of removing the photoresist layer 05 in this step, the electrode 06 material deposited on the photoresist layer 05 is also removed at the same time. The schematic diagram of the structure after the electrode 06 is peeled off is as shown in FIG. Fig.12 shown.
[0080] Preferably, stripping the electrode 06 of the lead-out precursor and removing the photoresist layer 05 comprises:
[0081] The lead-out precursor is immersed in acetone to remove the photoresist layer 05 , and the electrode 06 is stripped.
[0082] By soaking the photoresist layer 05 in acetone, the photoresist layer 05 can be removed without damaging the electrode 06. More specifically, the photoresist layer 05 is soaked in acetone and heated at 60 degrees Celsius for one hour to achieve electrode 06 peeling.
[0083] The difference between this specific embodiment and the above specific embodiment is that this specific embodiment provides a method for setting and stripping electrodes 06 to achieve insulation setting between different electrodes 06, and the remaining steps are the same as the above specific embodiment, and the present invention will not be repeated here.
[0084] In this specific embodiment, after the patterned photoresist layer 05 is used as a mask to etch the contact morphology hole 04a, the photoresist is not directly removed, but the photoresist film morphology hole 05a is slightly enlarged and used as a stripping layer in the subsequent electrode deposition to expose the area on the surface of the hard mask 04 where the electrode 06 needs to be grown, thereby achieving isolation of the electrode 06 without undergoing new photolithography and etching. While simplifying the process flow and improving production efficiency, it avoids device damage caused by etching of the electrode 06 and improves device performance.
[0085] The present invention also provides a mercury cadmium telluride infrared detector chip, which is a chip obtained by any of the above methods for leading out the electrode 06 of the mercury cadmium telluride infrared detector chip. The method for leading out the electrode 06 of the mercury cadmium telluride infrared detector chip provided by the present invention comprises the following steps: growing a passivation layer 02 on the surface of a mercury cadmium telluride substrate 01; performing ion implantation on the mercury cadmium telluride substrate 01 through the passivation layer 02 to obtain a patterned implantation region 01a on the surface of the mercury cadmium telluride substrate 01; arranging a hard mask 04 on the surface of the ion-implanted passivation layer 02; performing photolithography etching on the hard mask 04 to obtain a contact morphology hole 04a penetrating the hard mask 04; etching the passivation layer 02 and the mercury cadmium telluride substrate 01 through the contact morphology hole 04a to obtain an electrode contact hole 01b; exposing the implantation region 01a at the bottom surface of the electrode contact hole 01b; and performing electrode deposition in the electrode contact hole 01b to complete the leading out of the electrode 06. The present invention uses a hard mask 04 instead of the photoresist layer 05 in the related art as a mask material in the etching process, avoiding the problem of photoresist residue causing glue plugging in the hole, and greatly improving the ohmic contact quality between the electrode 06 and the injection region 01a.
[0086] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.
[0087] It should be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.
[0088] The above is a detailed introduction to the electrode 06 lead-out method of the mercury cadmium telluride infrared detector chip provided by the present invention. This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.
Claims
1. A method for extracting electrodes of a mercury cadmium telluride infrared detector chip, characterized in that: include: growing a passivation layer on the surface of the mercury cadmium telluride substrate; Performing ion implantation on the mercury cadmium telluride substrate through the passivation layer to obtain a patterned implantation region on the surface of the mercury cadmium telluride substrate; Disposing a hard mask on the surface of the passivation layer after ion implantation; Performing photolithography etching on the hard mask to obtain a contact morphology hole penetrating the hard mask; Etching the passivation layer and the mercury cadmium telluride substrate through the contact morphology hole to obtain an electrode contact hole; The bottom surface of the electrode contact hole exposes the injection region; Electrode deposition is performed in the electrode contact hole to complete electrode extraction.
2. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to claim 1, characterized in that: The hard mask is photoetched to obtain a contact morphology hole penetrating the hard mask, comprising: Disposing a photoresist layer on the surface of the hard mask; Expose the photoresist layer once to obtain film morphology holes; Using the photoresist layer that has been exposed once as a mask, the hard mask is etched to obtain contact morphology holes that penetrate the hard mask at positions corresponding to the photoresist morphology holes; Accordingly, before obtaining the electrode contact hole, the method further includes: Performing secondary exposure on the photoresist layer to obtain film expansion holes corresponding to the film morphology holes; the film expansion holes have an area larger than the film morphology holes and completely cover the corresponding film morphology holes; Accordingly, electrode deposition is performed in the electrode contact hole to complete electrode extraction, including: Performing electrode deposition on the entire surface of the mercury cadmium telluride substrate provided with the electrode contact hole to obtain a lead-out precursor; The lead-out precursor is subjected to electrode stripping to remove the photoresist layer, thereby completing the electrode lead-out.
3. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to claim 2, characterized in that: The electrode stripping of the lead-out precursor to remove the photoresist layer comprises: The lead-out front end is immersed in acetone to remove the photoresist layer, and the electrode is stripped.
4. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to claim 1, characterized in that: The hard mask is a silicon dioxide layer.
5. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to claim 1, characterized in that: The etching of the hard mask is reactive ion beam etching.
6. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to claim 5, characterized in that: The etching gas for reactive ion beam etching is a mixed gas of carbon tetrafluoride and argon; the mixing ratio of the carbon tetrafluoride and the argon is 1:
1.
7. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to claim 1, characterized in that: The passivation layer and the mercury cadmium telluride substrate are etched through the contact morphology hole to obtain the electrode contact hole, comprising: Performing inductively coupled plasma etching on the passivation layer and the mercury cadmium telluride substrate through the contact morphology hole to obtain an electrode contact hole; The etching gas for the inductively coupled plasma etching is a mixed gas of methane, hydrogen, argon and nitrogen; the etching bias voltage ranges from 50 volts to 150 volts, including the endpoint values; the working pressure ranges from 3 millitorr to 8 millitorr, including the endpoint values; the working power ranges from 100 watts to 200 watts, including the endpoint values.
8. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to any one of claims 1 to 7, characterized in that: The passivation layer grown on the surface of the HgCdTe substrate includes: A composite passivation layer is grown on the surface of a mercury cadmium telluride substrate by double-cavity magnetron sputtering; the composite passivation layer comprises a zinc sulfide layer and a cadmium telluride layer which are stacked.
9. The electrode lead-out method of the mercury cadmium telluride infrared detector chip according to claim 8, characterized in that: The zinc sulfide layer has a thickness ranging from 100 nanometers to 300 nanometers, including end points; The cadmium telluride layer has a thickness in a range from 100 nanometers to 300 nanometers, inclusive.
10. A mercury cadmium telluride infrared detector chip, characterized in that: The mercury cadmium telluride infrared detector chip is a chip obtained by the electrode lead-out method for a mercury cadmium telluride infrared detector chip as described in any one of claims 1 to 9.