Radio frequency signal processing system and method based on FPGA

Abstract

The invention relates to the technical field of radio frequency, and provides a radio frequency signal processing system and method based on an FPGA, the radio frequency signal processing system is integrated in a field programmable gate array, and comprises a frequency extraction module, a digital down-conversion module and an amplitude phase calculation module; the frequency extraction module is used for extracting frequency information from the target radio frequency signal and synchronously sending the target radio frequency signal and the frequency information to the digital down-conversion module; the digital down-conversion module is used for converting the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than that of the target radio frequency signal; and the amplitude phase calculation module is used for performing amplitude phase calculation according to the baseband signal to obtain the amplitude and phase information of the target radio frequency signal. According to the invention, real-time frequency detection of broadband radio frequency signals can be realized.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency technology, and in particular to a radio frequency signal processing system and method based on FPGA. Background Art

[0002] At present, in the RF plasma system, the RF power supply provides energy to the reaction chamber to excite the plasma. In order to load all the power of the RF power supply into the reaction chamber, it is necessary to ensure that the output impedance of the RF power supply matches the input impedance of the reaction chamber. Usually, a matcher is added between the RF power supply and the reaction chamber to achieve the impedance matching function. The matcher includes a sensor, an operation unit and an execution unit. The sensor monitors the amplitude, phase angle and frequency value of the voltage and current on the transmission line in real time, and transmits the monitoring information to the operation unit. The operation unit calculates the impedance admittance, forward power and reflected power, and transmits the calculation information to the execution unit. Subsequently, the execution unit controls the variable capacitor according to the calculation information to achieve impedance matching.

[0003] As the requirements for RF plasma systems increase in different process scenarios, RF power supplies need to support multiple frequency sources (such as 400kHz, 800kHz, 2MHz, 13.56MHz, 27.12MHz, etc.). Therefore, how to achieve wide-band real-time frequency detection has become a key technical problem that needs to be solved urgently. Summary of the invention

[0004] The present invention provides a radio frequency signal processing system and method based on FPGA, which can realize real-time frequency detection of wide-band radio frequency signals.

[0005] The present invention provides a radio frequency signal processing system based on FPGA. The radio frequency signal processing system is integrated in a field programmable gate array and comprises a frequency extraction module, a digital down-conversion module and an amplitude and phase calculation module; the frequency extraction module is used to extract frequency information from a target radio frequency signal, and synchronously send the target radio frequency signal and the frequency information to the digital down-conversion module; the digital down-conversion module is used to convert the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; the amplitude and phase calculation module is used to perform amplitude and phase calculation according to the baseband signal to obtain the amplitude and phase information of the target radio frequency signal.

[0006] According to an FPGA-based radio frequency signal processing system provided by the present invention, the frequency extraction module includes a Fourier transform module and a cache module; the Fourier transform module is used to extract the spectrum of the target radio frequency signal in real time, determine the frequency peak by scanning the spectrum, use the frequency control word determined according to the frequency peak as the frequency information, and send the frequency control word to the digital down-conversion module; the cache module is used to synchronously cache the target radio frequency signal, and send the target radio frequency signal to the digital down-conversion module.

[0007] According to a FPGA-based RF signal processing system provided by the present invention, the Fourier transform module is specifically used to configure the number of sampling points according to the required frequency resolution; perform FFT operation on the sampling data of the target RF signal according to the sampling points to obtain the frequency spectrum of the target RF signal; and the sampling data is data obtained after sampling the target RF signal through an analog-to-digital converter.

[0008] According to a FPGA-based radio frequency signal processing system provided by the present invention, the digital down-conversion module includes a digital frequency synthesizer, a multiplier and a finite impulse response filter; the digital frequency synthesizer is used to generate a sine signal and a cosine signal respectively according to the frequency control word; the frequency of the sine signal and the frequency of the cosine signal are both consistent with the frequency of the target radio frequency signal; the multiplier is used to multiply the target radio frequency signal with the sine signal and the cosine signal respectively to obtain an I signal and a Q signal; the finite impulse response filter is used to filter out the double frequency components in the I signal and the Q signal, retain the zero frequency component, and obtain the baseband signal.

[0009] According to an FPGA-based RF signal processing system provided by the present invention, the amplitude and phase calculation module is specifically used to use the CORDIC algorithm to perform arithmetic square root operation and inverse tangent operation on the I signal and the Q signal, respectively, to obtain the amplitude value and phase value of the target RF signal.

[0010] The present invention also provides a FPGA-based radio frequency signal processing method, comprising: acquiring a target radio frequency signal and extracting frequency information from the target radio frequency signal; converting the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; performing amplitude and phase calculation according to the baseband signal to obtain the amplitude and phase information of the target radio frequency signal.

[0011] The present invention also provides a matcher, comprising the above-mentioned FPGA-based radio frequency signal processing system.

[0012] The present invention also provides a radio frequency plasma system, comprising the above-mentioned matcher, a radio frequency power supply and a reaction chamber.

[0013] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and running on the processor, wherein when the processor executes the computer program, the FPGA-based radio frequency signal processing method described above is implemented.

[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the FPGA-based radio frequency signal processing method described above is implemented.

[0015] The present invention provides a FPGA-based radio frequency signal processing system and method, the radio frequency signal processing system is integrated in a field programmable gate array, and includes a frequency extraction module, a digital down-conversion module, and an amplitude and phase calculation module; the frequency extraction module is used to extract frequency information from a target radio frequency signal, and synchronously send the target radio frequency signal and the frequency information to the digital down-conversion module; the digital down-conversion module is used to convert the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; the amplitude and phase calculation module is used to perform amplitude and phase calculation according to the baseband signal to obtain the amplitude and phase information of the target radio frequency signal. The present invention can realize real-time frequency detection of broadband radio frequency signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the present invention or the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 It is a structural schematic diagram of a radio frequency signal processing system based on FPGA provided by the present invention.

[0018] Figure 2 It is a structural schematic diagram of the frequency extraction module provided by the present invention.

[0019] Figure 3 It is a structural schematic diagram of the digital down-conversion module provided by the present invention.

[0020] Figure 4 It is a flow chart of a radio frequency signal processing method based on FPGA provided by the present invention.

[0021] Figure 5 It is a structural schematic diagram of the electronic device provided by the present invention.

[0022] Reference numerals: 1: frequency extraction module; 2: digital down-conversion module; 3: amplitude and phase calculation module; 11: Fourier transform module; 12: cache module; 21: digital frequency synthesizer; 22: multiplier; 23: finite impulse response filter. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] As the requirements for RF systems in different process scenarios increase, RF power supplies need to support multiple frequency sources (such as 400kHz, 800kHz, 2MHz, 13.56MHz, 27.12MHz, etc.), which puts forward wide-band, high-precision and low-latency detection requirements for sensors and computing units.

[0025] Please refer to Figure 1 , Figure 1 A schematic diagram of the structure of a radio frequency signal processing system based on FPGA provided by the present invention.

[0026] The present invention provides a radio frequency signal processing system based on FPGA, which is integrated in a field programmable gate array and comprises a frequency extraction module 1, a digital down-conversion module 2 and an amplitude and phase calculation module 3; the frequency extraction module 1 is used for extracting frequency information from a target radio frequency signal, and synchronously sending the target radio frequency signal and the frequency information to the digital down-conversion module 2; the digital down-conversion module 2 is used for converting the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; the amplitude and phase calculation module 3 is used for performing amplitude and phase calculation according to the baseband signal to obtain the amplitude and phase information of the target radio frequency signal.

[0027] This embodiment describes in detail a radio frequency signal processing system based on FPGA (Field-Programmable Gate Array), which is integrated in the field programmable gate array and can realize frequency extraction, digital down-conversion and amplitude and phase calculation of the target radio frequency signal. The system mainly includes a frequency extraction module 1, a digital down-conversion module 2 and an amplitude and phase calculation module 3. By utilizing the parallel processing capability and programmability of FPGA, efficient and flexible signal processing is achieved. The system supports the processing of multiple frequency sources, can adapt to frequency changes in real time, and meet the application requirements of wide bandwidth, high precision and low latency. In addition, the reconfigurability of FPGA enables the system to quickly adjust the design according to different process scenarios, and has extremely high adaptability and scalability. The main function of the frequency extraction module 1 is to extract frequency information from the target radio frequency signal and send the information to the digital down-conversion module 2 synchronously with the original signal. The frequency extraction module 1 realizes frequency extraction through the fast Fourier transform (FFT) algorithm. The digital down-conversion module 2 receives the target radio frequency signal and frequency information output by the frequency extraction module 1, and converts the target radio frequency signal into a baseband signal according to the frequency information. The amplitude and phase calculation module 3 receives the baseband signal and calculates the amplitude and phase information of the target RF signal to provide accurate signal characteristics for the RF plasma system.

[0028] Please refer to Figure 2 , Figure 2 This is a structural schematic diagram of the frequency extraction module provided by the present invention.

[0029] As a preferred embodiment, the frequency extraction module 1 includes a Fourier transform module 11 and a cache module 12; the Fourier transform module 11 is used to extract the spectrum of the target RF signal in real time, determine the frequency peak by scanning the spectrum, use the frequency control word determined according to the frequency peak as the frequency information, and send the frequency control word to the digital down-conversion module 2; the cache module 12 is used to synchronously cache the target RF signal and send the target RF signal to the digital down-conversion module 2.

[0030] As a preferred embodiment, the Fourier transform module 11 is specifically used to configure the number of sampling points according to the required frequency resolution; perform FFT operation on the sampling data of the target RF signal according to the number of sampling points to obtain the spectrum of the target RF signal; the sampling data is data obtained after sampling the target RF signal through an analog-to-digital converter.

[0031] In this embodiment, an analog-to-digital converter (ADC) samples the target radio frequency signal to generate a digital signal and inputs the digital signal into the FPGA system for processing.

[0032] In the FPGA system, the clock of each module is provided by a phase-locked loop (PLL), and the input end receives the digital signal quantized by analog-to-digital conversion.

[0033] The target RF signal is . Where A is the signal amplitude, fn is the signal frequency at the nth sampling moment, is the signal phase angle.

[0034] The frequency extraction module 1 includes a Fourier transform module 11 and a buffer module 12 (FIFO, First-In, First-Out).

[0035] The target RF signal input to the frequency extraction module 1 is divided into two paths, one path enters the Fourier transform module 11, and the other path enters the cache module 12. The Fourier transform module 11 is based on the required frequency resolution ( ) Configure the number of sampling points N.

[0036] The frequency resolution is Among them, F s is the system sampling frequency.

[0037] For example, the system sampling frequency F s is 100 MHz and the required frequency resolution is 10 kHz, so the FFT point number N is configured to 10000.

[0038] The Fourier transform module 11 performs Fourier transform operation on the sampled data of the target RF signal according to the number of sampling points. The FFT algorithm converts the time domain signal into a frequency domain signal, thereby extracting the spectrum information of the target RF signal. Then the spectrum is scanned by the maximum value search algorithm to determine the frequency peak. The frequency peak corresponds to the main frequency component of the signal. At the same time, the frequency is converted into a frequency control word PINC (Phase Increment) and provided to the digital down-conversion (DDC, Direct Digital Frequency Synthesizer) module.

[0039] The frequency control word is PINC=2 Bit / F clk ×F out Among them, Bit is the number of bits of the frequency control word, F clk is the system clock frequency, F out is the frequency value.

[0040] The FIFO buffer module 12 synchronously buffers the target radio frequency signal to ensure that the target radio frequency signal is synchronized with the frequency information after the FFT calculates the frequency.

[0041] Finally, the buffer module 12 can output the buffered target RF signal to the digital down-conversion module 2 .

[0042] Of course, the Fourier transform module 11 can also cache the frequency control word in the cache module 12, and finally the cache module 12 sends the target RF signal together with the frequency information to the digital down-conversion module 2, and the present invention does not make any special restrictions here. This synchronization mechanism ensures the alignment of the frequency information with the original signal in time, and provides an accurate frequency reference and synchronization signal for the subsequent digital down-conversion module 2.

[0043] The capacity of the FIFO buffer module 12 is configured according to the processing time of the Fourier transform module 11 and the signal sampling rate, ensuring that the signal data will not be lost or changed before the FFT calculation is completed.

[0044] The high-point configuration and fast computing capability of the Fourier transform module 11 enable the system to adapt to the real-time processing requirements of wide-band signals, significantly improving the performance of the radio frequency signal processing system.

[0045] Please refer to Figure 3 , Figure 3 This is a structural schematic diagram of the digital down-conversion module provided by the present invention.

[0046] As a preferred embodiment, the digital down-conversion module 2 includes a digital frequency synthesizer 21, a multiplier 22 and a finite impulse response filter 23; the digital frequency synthesizer 21 is used to generate a sine signal and a cosine signal respectively according to a frequency control word; the frequency of the sine signal and the frequency of the cosine signal are consistent with the frequency of the target RF signal; the multiplier 22 is used to multiply the target RF signal with the sine signal and the cosine signal respectively to obtain an I signal and a Q signal; the finite impulse response filter 23 is used to filter out the double frequency components in the I signal and the Q signal, retain the zero frequency component, and obtain a baseband signal.

[0047] In this embodiment, the digital down-conversion module 2 includes a digital frequency synthesizer 21, a multiplier 22 and a finite impulse response filter 23 (FIR). The digital frequency synthesizer 21 generates a sine signal and a cosine signal consistent with the target signal frequency according to the frequency control word. The multiplier 22 multiplies the target RF signal with the sine signal and the cosine signal respectively to obtain an I signal and a Q signal.

[0048] The I signal is , the Q signal is .

[0049] The finite impulse response filter 23 filters out the double frequency components in the I and Q signals, retains the zero frequency components, and obtains the baseband signal.

[0050] As a preferred embodiment, the amplitude and phase calculation module 3 is specifically configured to use the CORDIC algorithm to perform arithmetic square root operations and arctan operations on the I signal and the Q signal respectively, to obtain the amplitude value and phase value of the target RF signal.

[0051] In this embodiment, the amplitude and phase calculation module 3 uses a CORDIC (Coordinate Rotation Digital Computer) algorithm to calculate the amplitude and phase of the target RF signal: The amplitude is Mag=(I 2 +Q 2 ) 1 / 2 , the phase is Phase=arctan(Q / I).

[0052] The FPGA-based radio frequency signal processing system of the present invention realizes wide-band, high-precision real-time processing of radio frequency signals by designing a frequency extraction module 1, a digital down-conversion module 2, and an amplitude and phase calculation module 3. The frequency extraction module 1 integrates FFT, signal caching, and spectrum retrieval functions, and can extract frequencies in real time and accurately down-convert to zero frequency. The high-point FFT design improves the frequency resolution, can meet the detection requirements of various frequency signals, and has a fast system response speed and low latency.

[0053] The FPGA-based radio frequency signal processing method provided by the present invention is described below. The FPGA-based radio frequency signal processing method described below and the FPGA-based radio frequency signal processing system described above can refer to each other.

[0054] Please refer to Figure 4 , Figure 4 A schematic flow chart of a radio frequency signal processing method based on FPGA provided by the present invention.

[0055] The present invention also provides a radio frequency signal processing method based on FPGA, comprising: 401: Acquire a target radio frequency signal and extract frequency information from the target radio frequency signal; 402: Convert the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; 403: Perform amplitude and phase calculation according to the baseband signal to obtain amplitude and phase information of the target radio frequency signal.

[0056] As a preferred embodiment, frequency information is extracted from the target radio frequency signal, including: extracting the spectrum of the target radio frequency signal in real time, determining the frequency peak by scanning the spectrum, and using the frequency control word determined according to the frequency peak as the frequency information.

[0057] As a preferred embodiment, the spectrum of the target RF signal is extracted in real time, including: configuring the number of sampling points according to the required frequency resolution; performing FFT operation on the sampling data of the target RF signal according to the number of sampling points to obtain the spectrum of the target RF signal; the sampling data is data obtained after sampling the target RF signal through an analog-to-digital converter.

[0058] As a preferred embodiment, the target radio frequency signal is converted into a baseband signal according to the frequency information, including: generating a sine signal and a cosine signal respectively according to a frequency control word; the frequency of the sine signal and the frequency of the cosine signal are consistent with the frequency of the target radio frequency signal; multiplying the target radio frequency signal with the sine signal and the cosine signal respectively to obtain an I signal and a Q signal; filtering out the double frequency components in the I signal and the Q signal, retaining the zero frequency component, and obtaining the baseband signal.

[0059] As a preferred embodiment, amplitude and phase calculation is performed according to the baseband signal to obtain amplitude and phase information of the target RF signal, including: using the CORDIC algorithm to perform arithmetic square root operation and arctan operation on the I signal and the Q signal respectively to obtain the amplitude value and phase value of the target RF signal.

[0060] The matcher provided by the present invention is described below. The matcher described below and the FPGA-based radio frequency signal processing system described above can be referenced to each other.

[0061] The present invention also provides a matcher, comprising the above-mentioned FPGA-based radio frequency signal processing system.

[0062] The present invention also provides a matching device, which integrates a radio frequency signal processing system based on FPGA, and uses its efficient and flexible signal processing capabilities to achieve impedance matching between the radio frequency power supply and the load. The overall architecture of the matching device includes a radio frequency signal processing system, an impedance monitoring unit, a matching network and a control unit.

[0063] The RF signal processing system is integrated into the FPGA, including a frequency extraction module 1, a digital down-conversion module 2, and an amplitude and phase calculation module 3. The impedance monitoring unit is used to monitor the impedance change between the RF power supply and the load in real time. The matching network is used to dynamically adjust the parameters of the matching network according to the output of the RF signal processing system to achieve impedance matching. The control unit is used to control the adjustment of the matching network according to the feedback of the impedance monitoring unit.

[0064] The matcher integrates an FPGA-based RF signal processing system and has the following technical advantages: High precision and real-time performance: The parallel processing capability of FPGA enables the RF signal processing system to process signals in real time, respond quickly to impedance changes, and achieve high-precision impedance matching.

[0065] Wideband support: The RF signal processing system can process any frequency signal within the frequency band and support wideband impedance matching requirements.

[0066] Flexibility and scalability: The programmability of FPGA enables the matcher to flexibly adapt to different process requirements and support dynamic frequency switching and multi-frequency signal processing.

[0067] Low latency: Through optimized signal processing, the matcher can significantly reduce processing latency and improve system response speed.

[0068] The radio frequency plasma system provided by the present invention is described below. The radio frequency plasma system described below and the radio frequency signal processing system based on FPGA described above can be referred to each other.

[0069] The present invention also provides a radio frequency plasma system, comprising the above-mentioned matcher, a radio frequency power supply and a reaction chamber.

[0070] The present invention also provides a radio frequency plasma system, the main function of which is to provide energy to the reaction chamber through a radio frequency power supply, and to excite plasma to complete specific process requirements (such as material deposition, etching, etc.). The core components of the system include a radio frequency power supply, a reaction chamber, and a matcher.

[0071] The RF power supply is used to provide high-frequency energy to drive the generation of plasma. The reaction chamber is a container for accommodating plasma reactions, and its impedance will change due to process conditions (such as gas composition, pressure, etc.). The matcher integrates an FPGA-based RF signal processing system to monitor and adjust the impedance matching between the RF power supply and the reaction chamber in real time.

[0072] The RF plasma system achieves efficient operation through the following steps: First, the RF power supply is started: the RF power supply starts working and provides high-frequency energy to the reaction chamber. Then, the matcher monitors the impedance changes on the transmission line in real time and calculates the required matching parameters through the RF signal processing system. The matcher dynamically adjusts the matching network based on the calculation results to ensure impedance matching. Finally, under the optimization of the matcher, the RF power is efficiently transmitted to the reaction chamber, stimulating the plasma and completing the process requirements.

[0073] Figure 5 An example of a structural diagram of an electronic device is shown in FIG. Figure 5As shown, the electronic device may include: a processor 501, a communications interface 502, a memory 503 and a communication bus 504, wherein the processor 501, the communications interface 502 and the memory 503 communicate with each other through the communication bus 504. The processor 501 may call the logic instructions in the memory 503 to execute the FPGA-based radio frequency signal processing method, the method comprising: acquiring a target radio frequency signal and extracting frequency information from the target radio frequency signal; converting the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; performing amplitude and phase calculation according to the baseband signal to obtain the amplitude and phase information of the target radio frequency signal.

[0074] In addition, the logic instructions in the above-mentioned memory 503 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0075] On the other hand, the present invention also provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the FPGA-based RF signal processing method provided by the above methods, and the method includes: acquiring a target RF signal and extracting frequency information from the target RF signal; converting the target RF signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target RF signal; and performing amplitude and phase calculation according to the baseband signal to obtain the amplitude and phase information of the target RF signal.

[0076] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it is implemented to execute the FPGA-based RF signal processing method provided by the above methods, the method comprising: acquiring a target RF signal and extracting frequency information from the target RF signal; converting the target RF signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target RF signal; performing amplitude and phase calculation according to the baseband signal to obtain the amplitude and phase information of the target RF signal.

[0077] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0078] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0079] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A radio frequency signal processing system based on FPGA, characterized in that: The radio frequency signal processing system is integrated into a field programmable gate array, and includes a frequency extraction module, a digital down-conversion module, and an amplitude and phase calculation module; The frequency extraction module is used to extract frequency information from the target radio frequency signal, and synchronously send the target radio frequency signal and the frequency information to the digital down-conversion module; The digital down-conversion module is used to convert the target radio frequency signal into a baseband signal according to the frequency information; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; The amplitude and phase calculation module is used to perform amplitude and phase calculation according to the baseband signal to obtain amplitude and phase information of the target radio frequency signal.

2. The FPGA-based radio frequency signal processing system according to claim 1, characterized in that: The frequency extraction module includes a Fourier transform module and a cache module; The Fourier transform module is used to extract the spectrum of the target radio frequency signal in real time, determine the frequency peak by scanning the spectrum, use the frequency control word determined according to the frequency peak as the frequency information, and send the frequency control word to the digital down-conversion module; The buffer module is used to synchronously buffer the target radio frequency signal and send the target radio frequency signal to the digital down-conversion module.

3. The FPGA-based radio frequency signal processing system according to claim 2, characterized in that: The Fourier transform module is specifically used to configure the number of sampling points according to the required frequency resolution; perform FFT operation on the sampling data of the target RF signal according to the sampling points to obtain the frequency spectrum of the target RF signal; and the sampling data is data obtained after sampling the target RF signal through an analog-to-digital converter.

4. The FPGA-based radio frequency signal processing system according to claim 2 or 3, characterized in that: The digital down-conversion module includes a digital frequency synthesizer, a multiplier and a finite impulse response filter; The digital frequency synthesizer is used to generate a sine signal and a cosine signal respectively according to the frequency control word; the frequency of the sine signal and the frequency of the cosine signal are consistent with the frequency of the target radio frequency signal; The multiplier is used to multiply the target radio frequency signal with the sine signal and the cosine signal respectively to obtain an I signal and a Q signal; The finite impulse response filter is used to filter out the double frequency components in the I signal and the Q signal, retain the zero frequency component, and obtain the baseband signal.

5. The FPGA-based radio frequency signal processing system according to claim 4, characterized in that: The amplitude and phase calculation module is specifically used to use the CORDIC algorithm to perform arithmetic square root operation and arc tangent operation on the I signal and the Q signal respectively, so as to obtain the amplitude value and phase value of the target radio frequency signal.

6. A radio frequency signal processing method based on FPGA, characterized in that: include: Acquire a target radio frequency signal and extract frequency information from the target radio frequency signal; According to the frequency information, converting the target radio frequency signal into a baseband signal; the frequency of the baseband signal is lower than the frequency of the target radio frequency signal; An amplitude and phase calculation is performed according to the baseband signal to obtain amplitude and phase information of the target radio frequency signal.

7. A matcher, characterized in that: A radio frequency signal processing system based on FPGA comprising any one of claims 1 to 5.

8. A radio frequency plasma system, characterized in that: It comprises the matcher, radio frequency power supply and reaction chamber as described in claim 7.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that: When the processor executes the computer program, the FPGA-based radio frequency signal processing method according to claim 6 is implemented.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, the FPGA-based radio frequency signal processing method as claimed in claim 6 is implemented.

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