Novel process angle sensor

Abstract

The invention aims to provide a novel process angle sensor. A circuit comprises a core module; the core module comprises an odd number of CMOS (Complementary Metal Oxide Semiconductor) inverter units; the CMOS inverter units are connected in series to form an annular oscillator and output a measured clock signal. According to the invention, a Delay cell module is omitted, the circuit is composed of an odd number of CMOS inverter units, the core of the module is that a delay capacitor is connected to the output end of each inverter, and the capacitor is composed of a tested MOS tube. The structure has the advantages that the design difficulty is reduced, the repeatability is high, the size of the MOS tube to be detected does not need to be strictly designed, and a full-swing CLK signal is very easy to output; and during layout design, the phase inverter and the delay capacitor can be separately opened, so that layout matching can be well realized.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and particularly relates to a novel process corner sensor. Background Art

[0002] At present, the core module of the existing process corner sensor is the process corner sensitive module, which is composed of a Delay cell and a buffer. The Delay cell contains the CMOS device to be measured. This module is easily affected by the production process and will generate CLK with different frequencies. When the production process deviates at the three process corners of SS / TT / FF, the frequencies of the generated CLK are different, with SS < TT < FF. At this time, the deviation direction of the MOS device process can be distinguished by counting with a counter. The principle of the counter counting is as follows: The reference clock and the measured clock of the core module are counted simultaneously, and a fixed number of counting times of the reference clock is set, such as N times; when the output of the reference clock counter Dout_ref = N, the output Dout value of the counter of the measured clock is read, and the process corner deviation direction of the MOS device to be measured can be distinguished.

[0003] The Delay cell module of the core of this method is composed of the MOS device to be measured. In this structure, whether it is an NMOS type or a PMOS type inverter, since the load transistor is diode-connected and always in the on state, a voltage swing will be generated, and the output voltage Vout cannot reach the full swing output. Therefore, if the ring oscillator is only constructed using this kind of inverter in the Delay cell, the output of the ring oscillator will gradually stop oscillating and converge to a certain specific voltage value, which is determined by the ratio of the pull-up and pull-down driving strengths of the Delay cell inverter. Therefore, the size of the Delay cell needs to be reasonably designed, and a CMOS buffer needs to be added at the output end of the Delay cell inverter as a buffer to achieve full swing output.

[0004] The prior art realizes the process corner sensitive module by reasonably designing the size of the MOS device to be measured in the Delay cell, and each Delay cell module needs to be connected to a buffer stage. This core process corner sensitive module not only poses requirements on the difficulty of circuit design, but also requires an additional buffer module, increasing power consumption. Usually, when designing the core module, the number of transistors in the Delay cell is much more than the number of buffers, and there is only one type of transistor in the Delay cell. This will cause difficulties in perfectly splicing the layouts of the Delay cell and the buffer on the signal path during the layout design, bringing certain challenges to the matching requirements. Summary of the Invention

[0005] The purpose of the present invention is to provide a new process angle sensor, which omits the Delay cell module and is composed of an odd number of CMOS inverter units. The core of the module is to connect a delay capacitor to the output end of each inverter, and the capacitor is composed of the MOS tube to be tested. The advantages of this structure are that the design difficulty is reduced, the repeatability is high, the size of the MOS tube to be tested does not need to be strictly designed, and it is easy to output a full-swing CLK signal; and when designing the layout, the inverter and the delay capacitor can be separated, so that the layout matching can be done well.

[0006] A novel process angle sensor, comprising: a core module; The core module includes: an odd number of CMOS inverter units; The CMOS inverter units are connected in series to form a ring oscillator, which outputs a clock signal to be measured.

[0007] Preferably, the CMOS inverter unit includes at least one MOS tube to be tested and an inverter.

[0008] Also includes: a first AND gate and a first counting module; The first input end of the first AND gate is connected to the enable signal, the second input end is connected to the CMOS inverter unit, and the output end is connected to the first counting module; The first counting module is used to determine the deviation of the process angle of the MOS device according to the output of the AND gate.

[0009] Preferably, it also includes: a reference module; The reference module includes a second AND gate and a second counting module; The first input terminal of the second AND gate is connected to the enable signal, the second input terminal is connected to the reference clock, and the output terminal is connected to the second counting module; The second counting module is used to control the switching off of the first counting module.

[0010] Preferably, the first counting module comprises: a control module, a regulating module, a switch module, a counter, a latch module and a display module; The control module is respectively connected to the latch module, the counter and the switch module; The output end of the regulating module is connected to the input end of the switch module; The output end of the switch module is connected to the input end of the counter; The output end of the counter is connected to the input end of the latch module; The output end of the latch module is connected to the input end of the display module; After being adjusted by the adjustment module, the measured signal becomes a counting pulse signal as the input signal of the switch module, and the enable signal is used as the gate signal of the switch module. When the enable signal is at a high level, the switch module is turned on, and the measured signal enters the counter to start counting; When the enable signal is at a low level, the switch module is closed, the counter stops counting and transmits the data to the latch module, and the latch module displays the data through the display module.

[0011] A novel process angle sensor control method is applied to a novel process angle sensor, comprising: Adjust the enable signal to a high level, and the core module starts to oscillate; When the count of the reference module reaches a preset value, obtaining the output of the first counting module; The process angle deviation of the MOS device is determined according to the output of the first counting module.

[0012] Preferably, the step of adjusting the enable signal to a high potential so that the core module starts to oscillate includes: When the enable signal is set to high level, the core module starts to oscillate and generates CLK of a certain frequency; The frequency of CLK is determined by the process angle of the MOS tube to be tested.

[0013] Preferably, when the count of the reference module reaches a preset value, obtaining the output of the first counting module includes: The CLK clock signal under test and the reference clock signal are simultaneously sent to the first counting module and the second counting module for counting; When the second counting module Dout_ref of the reference clock counts to N, the output value Dout of the first counting module of the measured signal is read.

[0014] Preferably, judging the deviation of the process angle of the MOS device according to the output of the first counting module comprises: The enable signal is set to 0, the counter enable signal is set to 0, and the reset signal is set to 1, so that the initial state of the counter output code word Dout_ref / Dout is set to zero 4'b0000; After the initial state is set to zero and stabilized for a period of time, the enable signal is set to 1, the reset signal is set to 0, the counter enable signal is set from 0 to 1, and the counter starts working; When the counter code word Dout_ref<3:0> of the 100MHz reference clock signal counts a full cycle, that is, the output is 4'b1111, the counter code word Dout<3:0> output code word of the measured signal is read; The measured signal frequencies generated by the core module under the ss / tt / ff process corners are 30MHz / 38MHz / 47MHz respectively. The Dout<3:0> output codewords generated by the three process corners are 4'b0010, 4'b0101, and 4'b0111 respectively. The output codewords are used to determine where the final process corner deviation falls in ss / tt / ff.

[0015] An electronic device comprises: a chip, a processor and a memory, wherein the memory is used to store computer program codes, the computer program codes include computer instructions, and when the chip executes the computer instructions, the electronic device executes a novel process angle sensor control method.

[0016] The beneficial effects of the present invention are: 1. The core module of the present invention follows the ring oscillator structure, but improves the existing technology by omitting the Delay cell module and is composed of an odd number of CMOS inverter units. The core of the module is to connect a delay capacitor to the output end of each inverter. The capacitor is composed of the MOS tube to be tested, and the topological structure is simple, the design difficulty is reduced, and the repeatability is high. 2. The present invention can realize the judgment of the process angle deviation of MOS devices of different types and different processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0019] Figure 1 It is a schematic diagram of the structure of a novel process angle sensor of the present invention; Figure 2 It is a schematic diagram of the counting module structure of the present invention; Figure 3 It is a schematic diagram of the structure of the regulating module of the present invention; Figure 4 It is a schematic diagram of the control module structure of the present invention; Figure 5 A schematic diagram of the working timing of a novel process angle sensor of the present invention; Figure 6 The figure is a schematic diagram of the hardware structure of an electronic device of the present invention. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0022] In addition, the descriptions of "first", "second", etc. in the present invention are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0023] The existing technology realizes the process corner sensitive module by reasonably designing the size of the MOS device to be tested in the Delay cell, and each Delay cell module needs to be connected to a buffer buffering level. This core process corner sensitive module not only requires the difficulty of circuit design, but also requires the addition of an additional buffer module, which increases power consumption. Usually, when designing the core module, the number of tubes in the Delay cell will be much larger than the number of buffers, and there is only one type of tube in the Delay cell. This will result in the layout design, in the signal path, the layout of the Delay cell and the buffer cannot be perfectly put together, which brings a certain degree of difficulty to the matching requirements.

[0024] The core module of the patented invention uses a ring oscillator structure, but it has been improved on the existing technology by eliminating the Delay cell module. It consists of an odd number of CMOS inverter units. The core of this module is to connect a delay capacitor to the output of each inverter, and this capacitor is composed of the MOS transistors to be measured. The advantage of this structure is that the design difficulty is reduced, the repeatability is high, there is no need to strictly design the size of the MOS transistors to be measured, and it is very easy to output a full-swing CLK signal. Moreover, when designing the layout, the inverter and the delay capacitor can be placed separately, so that the layout matching can be done very well.

[0025] Embodiment 1 A novel process corner sensor, comprising: a core module; The core module includes: an odd number of CMOS inverter units; The CMOS inverter units are connected in series to form a ring oscillator, and the clock signal to be measured is output.

[0026] The semiconductor technology has developed for many years and has been continuously iterated and advanced to the nanoscale geometric size. The device parameters of MOSFETs (metal-oxide-semiconductor field-effect transistors), such as threshold voltage, channel length, oxide layer thickness, and mobility, etc., will be affected by the process variations generated during the manufacturing process. As the process technology size continues to shrink, the impact of these variations on MOSFET device parameters is also increasing. Therefore, the impact of process variations may lead to performance degradation or even chip failure. Therefore, when considering improving the yield or circuit performance in circuit design, the impact of device process variations must be considered. The variations in device processes mainly affect the speed of MOS transistors, which is mainly reflected in the problem of static timing. Therefore, the current process corner sensors for analog circuit design mainly analyze the delay of the transistors to be measured and convert the results into digital signals, and send them to the modules sensitive to the process for compensation to ensure that the circuit can work properly at all process corners.

[0027] In the embodiment of the present invention, when the enable signal is set to a high potential, the core module will start to oscillate and generate a CLK with a certain frequency. The frequency of the CLK is mainly determined by the process corner of the MOS transistors to be measured, and the frequency magnitude is SS<TT<FF. At this time, the measured CLK clock signal and the reference clock signal are sent to the counter for counting at the same time. When the counter Dout_ref of the reference clock counts to N, the output value Dout of the counter of the measured signal is read, and the deviation of the process corner of the MOS device is judged through the Dout value.

[0028] Preferably, the CMOS inverter unit includes at least one MOS transistor to be measured and an inverter.

[0029] In the embodiment of the present invention, a delay capacitor is connected to the output end of each inverter, and the capacitor is composed of the MOS tube to be tested. The advantages of this structure are that the design difficulty is reduced, the repeatability is high, and there is no need to strictly design the size of the MOS tube to be tested. It is easy to output a full-swing CLK signal, and during layout design, the inverter and the delay capacitor can be separated, so that the layout matching can be done well.

[0030] Also includes: a first AND gate and a first counting module; The first input terminal of the first AND gate is connected to the enable signal, the second input terminal is connected to the CMOS inverter unit, and the output terminal is connected to the first counting module; The first counting module is used to determine the deviation of the process angle of the MOS device according to the output of the AND gate.

[0031] like Figure 1 In the above, the first AND gate and the first counting module are connected to the output end of the measured signal. By obtaining the frequency of the clock signal, the process angle of the MOS device can be easily determined according to the frequency of the clock signal. The MOS process angle refers to the change in device performance caused by process deviation during chip manufacturing. The process angle is to consider these deviations in the design to ensure the reliability and stability of the circuit under different process conditions. The process angle refers to the inconsistency of the performance of different parts of the same batch or the same chip due to deviations in factors such as doping concentration, diffusion depth, and etching degree in the actual manufacturing process. In order to reduce the difficulty of design and ensure the performance of the device within a specific range, process engineers define the so-called "process angle". These angles represent the performance range of the device under different process conditions, usually including three situations: fast NFET and fast PFET, slow NFET and slow PFET, typical NFET and typical PFET. Specifically expressed as: FF (Fast-Fast): fast NMOS and fast PMOS transistors. SS (Slow-Slow): slow NMOS and slow PMOS transistors. FF (Fast- Fast): fast NMOS and fast PMOS transistors. TT (Typical-Typical): Typical NMOS and typical PMOS transistors. In practical applications, process corners have an important impact on circuit design. Designers need to simulate circuits under various process corners and extreme temperature conditions to ensure the performance of the circuit under different conditions. By adjusting the process injection, the change of device speed can be simulated to set different levels of FF and SS. Under normal circumstances, most of them are TT corners.

[0032] Preferably, it also includes: a reference module; The reference module includes a second AND gate and a second counting module; The first input terminal of the second AND gate is connected to the enable signal, the second input terminal is connected to the reference clock, and the output terminal is connected to the second counting module; The second counting module is used to control the shut down of the first counting module.

[0033] exist Figure 1 In the figure, the reference module is the second AND gate and the second counting module located in the upper right corner. The function of the reference module in the present invention is to set a standard count. Under a certain count condition, the output value of the measured signal counter can correctly reflect the process angle of the MOS device. According to the rule of the output codeword of the measured signal, it can be intuitively and easily determined which specific process angle of the MOS device is.

[0034] Preferably, the first counting module includes: a control module, a regulating module, a switch module, a counter, a latch module and a display module; The control module is respectively connected with the latch module, the counter and the switch module; The control module is used to manage and control key components such as the latch module, counter, and switch module. It can receive an input enable signal, process and calculate, and then output the output logically according to a predetermined rule to achieve control and regulation of multiple modules of the entire system. In an embodiment of the present invention, the control module mainly controls the three modules of the latch module, the counter, and the switch module. The control principle is to control the opening and closing of the switch module according to the input enable signal. If the enable signal is at a high level, the switch module is controlled to open, receive the measured signal from the adjustment module, and send the measured signal from the adjustment module to the counter module. If the enable signal is at a low level, the switch module is controlled to close, and the latch module is controlled to store and transcode the data output by the counter, and then the transcoded data is displayed through the display module.

[0035] The output end of the regulating module is connected to the input end of the switch module; The main functions of the adjustment module include signal amplification, front-end circuit protection, isolation transmission, and improving measurement accuracy and anti-interference ability. The adjustment module can amplify weak signals and protect the front-end circuit from damage. In the embodiment of the present invention, the measured signal is adjusted by the adjustment module to a signal that can be directly processed by the counter.

[0036] The output end of the switch module is connected to the input end of the counter; The switch module intercepts the measured signal by controlling the conduction and cutoff of the switch element.

[0037] The output end of the counter is connected to the input end of the latch module; The function of the counter is to count the number of input pulses, that is, the number of signals to be measured. In the embodiment of the present invention, the process corner of the MOS device can be determined by the content counted by the counter.

[0038] The output end of the latch module is connected to the input end of the display module; The latch module temporarily stores data for subsequent processing. The latch module is a digital circuit element with a storage function that can maintain its output state until a new input signal is received to change it. The working principle of the latch is based on feedback logic. Once it enters a certain state, it will maintain this state until another valid input signal is received to change the state. It is composed of a group of logic gates (such as AND gates, OR gates, and NOT gates). Common types include SR latches, D latches, and JK latches. In an embodiment of the present invention, the latch module latches and transcodes the output results from the counter and sends them to the display module for chip researchers to intuitively judge the process corner of the MOS device.

[0039] After being adjusted by the adjustment module, the measured signal becomes a counting pulse signal as the input signal of the switch module, and the enable signal is used as the gate signal of the switch module. When the enable signal is at a high level, the switch module is turned on, and the measured signal enters the counter to start counting; When the enable signal is at a low level, the switch module is closed, the counter stops counting and transmits the data to the latch module, and the latch module displays the data through the display module.

[0040] Figure 3 FIG. 1 is a schematic diagram of the circuit structure of the regulating module of the present invention, as shown in FIG. Figure 3 As shown, the regulating module includes: a resistor (R1), a resistor (R2), a resistor (R3), a resistor (R4), a resistor (R5), a resistor (R6), a capacitor (C1), a capacitor (C2), a diode (D1), a NAND gate (N1), a NAND gate (N2), a NAND gate (N3) and a transistor (T1); The first plate of the capacitor (C1) is connected to the measured signal, and the second plate is connected to the resistor (R6), the base of the transistor (T1) and the resistor (R2); Resistor (R2) is connected to resistor (R1); The resistor (R1) is connected to the resistor (R3) and the collector of the transistor (T1); The resistor (R6) is connected to the resistor (R5) and the capacitor (C2); A capacitor (C2) and a resistor (R5) are connected in parallel; The resistor (R4) is connected to the transmitter of the transistor (T1); The first input terminal of the NAND gate (N1) is connected to the diode (D1), the second input terminal is connected to the resistor (R3), and the output terminal is connected to the first input terminal of the NAND gate (N2); The second input terminal of the NAND gate (N2) is connected to the output terminal of the NAND gate (N3), and the output terminal is connected to the first input terminal of the NAND gate (N3); The second input terminal of the NAND gate (N3) is connected to the diode (D1), and the output terminal is connected to the output terminal of the NAND gate (N2).

[0041] There are many types of input signals in actual measurement, which may be sine waves, triangle waves, square waves or other forms of waveforms, which cannot meet the requirements of the subsequent circuits. Therefore, when measuring, the measured signal needs to be passed through a waveform adjustment module to change it into a pulse signal that meets the requirements of the subsequent circuits. And before adjustment, since the strength of the measured signal is not clear, the signal amplification and attenuation processing must also be considered.

[0042] In the embodiment of the present invention, when the voltage amplitude of the input signal is large, the voltage amplitude is reduced by the input attenuation circuit. When the voltage amplitude of the input signal is small, the gain of the input amplifier is adjusted to amplify the measured signal. To ensure the measurement accuracy, a preamplifier is added to the input end of the adjustment circuit, and the measured signal with a low amplitude is amplified and then sent to the adjustment circuit for waveform adjustment.

[0043] Figure 4 FIG. 1 is a schematic diagram of the circuit structure of the control module of the present invention, as shown in FIG. Figure 4 As shown, the control module includes: a resistor (R8), a resistor (R7), a capacitor (C3), a capacitor (C4), a NOT gate (N4), a NOT gate (N5), an AND gate (A1), an AND gate (A2), a trigger (Q1) and a trigger (Q2); The input terminal of the NOT gate (N4) is connected to the enable signal, and the output terminal is connected to the input terminal of the AND gate (A1); The output of the AND gate (A1) is connected to the flip-flop (Q1); The input terminal of the NOT gate (N5) is connected to the Q terminal of the trigger (Q1), and the output terminal is connected to the input terminal of the AND gate (A1); The output of the AND gate (A2) is connected to the flip-flop (Q2); The resistor (R8) is connected to the first resistor port; The capacitor (C4) is connected to the first capacitor port; The resistor (R7) is connected to the second resistor port; The capacitor (C3) is connected to the second capacitor port.

[0044] In the embodiment of the present invention, the enable signal is input from the A1 port, and the closing and opening of the switch module are controlled by two monostable triggers. When the control module outputs a high level, the switch module is turned on, and the measured signal enters the counter through the switch module. When the control module outputs a low level, the switch module is turned off, and the counter stops working.

[0045] Embodiment 2 A new type of process angle sensor control method, which is applied to a new type of process angle sensor, includes: S100, set the enable signal to a high potential, and the core module starts to oscillate; When the enable signal is set to a high potential, the core module starts to oscillate, generating a CLK with a certain frequency. The frequency of CLK is mainly determined by the process angle of the MOS transistor to be measured. The frequency magnitude is SS < TT < FF. At this time, the measured CLK clock signal and the reference clock signal are simultaneously sent to the counter for counting.

[0046] S200, when the count of the reference module reaches the preset value, obtain the output of the first counting module; S300, judge the deviation of the process angle of the MOS device according to the output of the first counting module.

[0047] When the counter Dout_ref of the reference clock counts to N, read the output value Dout of the counter of the measured signal, and judge the deviation of the process angle of the MOS device through the Dout value.

[0048] Preferably, S100, set the enable signal to a high potential, and the core module starts to oscillate includes: When the enable signal is set to a high potential, the core module starts to oscillate, generating a CLK with a certain frequency; The frequency of CLK is determined by the process angle of the MOS transistor to be measured.

[0049] Preferably, S200, when the count of the reference module reaches the preset value, obtain the output of the first counting module includes: The measured CLK clock signal and the reference clock signal are simultaneously sent to the first counting module and the second counting module for counting; When the second counting module Dout_ref of the reference clock counts to N, read the output value Dout of the first counting module of the measured signal.

[0050] Preferably, S300, judge the deviation of the process angle of the MOS device according to the output of the first counting module includes: Set the enable signal to 0, the counter enable signal to 0, the reset signal to 1, and set the initial state of the counter output codeword Dout_ref / Dout to zero 4'b0000; After the initial state is set to zero and stabilized for a period of time, set the enable signal to 1, the reset signal to 0, the counter enable signal is set from 0 to 1, and the counter starts to work; When the counter code word Dout_ref<3:0> of the 100MHz reference clock signal counts a full cycle, that is, the output is 4'b1111, the counter code word Dout<3:0> output code word of the measured signal is read; The measured signal frequencies generated by the core module under the ss / tt / ff process corners are 30MHz / 38MHz / 47MHz respectively. The Dout<3:0> output codewords generated by the three process corners are 4'b0010, 4'b0101, and 4'b0111 respectively. The output codewords are used to determine where the final process corner deviation falls in ss / tt / ff.

[0051] Built with a certain finfet process Figure 1 The architecture implementation case detects the final process angle deviation. The delay capacitor is a capacitor composed of multiple ulvtnfet tubes. The reference clock selects the external 100MHz standard clock. The specific working principle is as follows Figure 5 As shown, the enable signal is Figure 1 The enable signal in the AND gate controls whether the AND gate has an output signal to the counter. It works when it is high and stops when it is low. The reference signal is an external 100MHz clock signal. The measured signal is the measured clock signal generated by the core module (determined by the difference in process angles). The reset signal sets the output codeword of the counter to zero. It sets to zero when it is high and maintains when it is low. The counter enable signal is the control signal of whether the counter works. It works when it is high and stops when it is low. Dout_ref / Dout are the 4-bit 2-bit output codewords output by the reference signal and the measured signal counter respectively.

[0052] The working sequence is as follows: In the initial stage, the enable signal is set to 0, the counter enable signal is set to 0, and the reset signal is set to 1, so that the initial state of the counter output code word Dout_ref / Dout is set to zero 4'b0000; After the initial state is set to zero and stabilizes for a period of time, the enable signal is set to 1, the reset signal is set to 0, and the counter enable signal is set from 0 to 1 to start the counter. At this time, the counters of the reference signal and the measured signal will work at the same time. When the counter code word Dout_ref<3:0> of the 100MHz reference clock signal counts a full cycle, that is, the output is 4'b1111, the counter code word Dout<3:0> of the measured signal is read at this time. Since the measured signal frequency generated by the core module under the ss / tt / ff process angles is 30MHz / 38MHz / 47MHz respectively, the Dout<3:0> output code words generated by the three process angles are 4'b0010, 4'b0101, and 4'b0111 respectively. This output code word can be used to determine which process angle the final deviation falls on: ss / tt / ff. After the code word is output, the reset signal is reset to 1, and the output code word is reset to zero, waiting for the next recount, and so on.

[0053] Example 3 An electronic device includes: a chip, a processor and a memory, the memory is used to store computer program codes, the computer program codes include computer instructions, and when the chip executes the computer instructions, the electronic device executes a new process angle sensor control method.

[0054] refer to Figure 6 , the electronic device 2 includes a processor 21, a memory 22, an input device 23, and an output device 24. The processor 21, the memory 22, the input device 23, and the output device 24 are coupled via a connector, and the connector includes various interfaces, transmission lines, or buses, etc., which are not limited in the embodiments of the present invention. It should be understood that in various embodiments of the present invention, coupling refers to mutual connection in a specific manner, including direct connection or indirect connection through other devices, for example, through various interfaces, transmission lines, buses, etc.

[0055] The processor 21 may be one or more graphics processing units (GPUs). When the processor 21 is a GPU, the GPU may be a single-core GPU or a multi-core GPU. Optionally, the processor 21 may be a processor group consisting of multiple GPUs, and the multiple processors are coupled to each other via one or more buses. Optionally, the processor may also be other types of processors, etc., which are not limited in the embodiments of the present invention.

[0056] The memory 22 can be used to store computer program instructions and various computer program codes including program codes for executing the scheme of the present invention. Optionally, the memory includes but is not limited to random access memory (RAM), read-only memory (ROM), erasable programmable read only memory (EPROM), or portable read only memory (CD-ROM), which is used for related instructions and data.

[0057] The input device 23 is used to input data and / or signals, and the output device 24 is used to output data and / or signals. The output device 24 and the input device 23 may be independent devices or an integrated device.

[0058] The core module of the present invention follows the ring oscillator structure, but improves the existing technology by omitting the Delay cell module and is composed of an odd number of CMOS inverter units. The core of the module is to connect a delay capacitor to the output end of each inverter, and the capacitor is composed of the MOS tube to be tested. The topological structure is simple, the design difficulty is reduced, and the repeatability is high. The present invention can judge the process angle deviation of MOS devices of different types and different processes.

[0059] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A new process angle sensor, characterized in that: include: Core modules; The core module includes: an odd number of CMOS inverter units; The CMOS inverter units are connected in series to form a ring oscillator, which outputs a clock signal to be measured.

2. A novel process angle sensor according to claim 1, characterized in that: The CMOS inverter unit includes at least one MOS tube to be tested and an inverter.

3. A novel process angle sensor according to claim 1, characterized in that: Also includes: A first AND gate and a first counting module; The first input end of the first AND gate is connected to the enable signal, the second input end is connected to the CMOS inverter unit, and the output end is connected to the first counting module; The first counting module is used to determine the deviation of the process angle of the MOS device according to the output of the AND gate.

4. A novel process angle sensor according to claim 1, characterized in that: Also includes: Reference module; The reference module includes a second AND gate and a second counting module; The first input terminal of the second AND gate is connected to the enable signal, the second input terminal is connected to the reference clock, and the output terminal is connected to the second counting module; The second counting module is used to control the switching off of the first counting module.

5. A novel process angle sensor according to claim 3, characterized in that: The first counting module includes: a control module, an adjustment module, a switch module, a counter, a latch module and a display module; The control module is respectively connected to the latch module, the counter and the switch module; The output end of the regulating module is connected to the input end of the switch module; The output end of the switch module is connected to the input end of the counter; The output end of the counter is connected to the input end of the latch module; The output end of the latch module is connected to the input end of the display module; After being adjusted by the adjustment module, the measured signal becomes a counting pulse signal as the input signal of the switch module, and the enable signal is used as the gate signal of the switch module. When the enable signal is at a high level, the switch module is turned on, and the measured signal enters the counter to start counting; When the enable signal is at a low level, the switch module is closed, the counter stops counting and transmits the data to the latch module, and the latch module displays the data through the display module.

6. A novel process angle sensor control method, applied to a novel process angle sensor according to any one of claims 1 to 5, characterized in that: include: Adjust the enable signal to a high level, and the core module starts to oscillate; When the count of the reference module reaches a preset value, obtaining the output of the first counting module; The process angle deviation of the MOS device is determined according to the output of the first counting module.

7. A novel process angle sensor control method according to claim 6, characterized in that: The enabling signal is adjusted to a high potential so that the core module starts to oscillate, including: When the enable signal is set to high level, the core module starts to oscillate and generates CLK of a certain frequency; The frequency of CLK is determined by the process angle of the MOS tube to be tested.

8. A novel process angle sensor control method according to claim 6, characterized in that: When the count of the reference module reaches a preset value, obtaining the output of the first counting module includes: The CLK clock signal under test and the reference clock signal are simultaneously sent to the first counting module and the second counting module for counting; When the second counting module Dout_ref of the reference clock counts to N, the output value Dout of the first counting module of the measured signal is read.

9. A novel process angle sensor control method according to claim 6, characterized in that: The step of determining the deviation of the process angle of the MOS device according to the output of the first counting module comprises: The enable signal is set to 0, the counter enable signal is set to 0, and the reset signal is set to 1, so that the initial state of the counter output code word Dout_ref / Dout is set to zero 4'b0000; After the initial state is set to zero and stabilized for a period of time, the enable signal is set to 1, the reset signal is set to 0, the counter enable signal is set from 0 to 1, and the counter starts working; When the counter code word Dout_ref<3:0> of the 100MHz reference clock signal counts a full cycle, that is, the output is 4'b1111, the counter code word Dout<3:0> output code word of the measured signal is read; The measured signal frequencies generated by the core module under the ss / tt / ff process corners are 30MHz / 38MHz / 47MHz respectively. The Dout<3:0> output codewords generated by the three process corners are 4'b0010, 4'b0101, and 4'b0111 respectively. The output codewords are used to determine where the final process corner deviation falls in ss / tt / ff.

10. An electronic device, characterized in that: include: A chip, a processor and a memory, wherein the memory is used to store computer program code, wherein the computer program code includes computer instructions. When the chip executes the computer instructions, the electronic device executes a new process angle sensor control method as described in any one of claims 6 to 9.

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