Voltage reference structure and application thereof

Abstract

The invention provides a voltage reference structure based on III-V compounds and application of the voltage reference structure. In one embodiment, the voltage reference structure comprises a GaN HEMT (High Electron Mobility Transistor) and a source series resistor; the source electrode of the HEMT and the resistor are connected in series on a conducting circuit and are used for being connected with the negative electrode of a power supply or being grounded, the conducting circuit is provided with a reference voltage output point, and the reference voltage output point is arranged between the source electrode of the HEMT and the resistor; the grid electrode of the HEMT is used for being connected with the negative electrode of a power supply or grounded, and the drain electrode of the HEMT is used for being connected with the positive electrode of the power supply; reference voltage output by the voltage reference structure and working parameters of the HEMT and the resistor meet a set relation. The voltage reference structure is simple in structure, an enhanced device does not need to be used, the voltage reference with good performance can be generated, and particularly, output of multiple voltages can be formed by adopting a multi-resistor series connection mode, so that the use requirements of various application scenes including a unipolar power supply circuit are well met.

Description

Technical Field

[0001] The present application specifically relates to a voltage reference structure based on GaN or similar semiconductor compounds and its application in electronic devices. Background Art

[0002] A reference voltage source is a circuit or device that can provide a stable, accurate and reliable reference voltage. In electronic systems, reference voltage plays a vital role. It is used as a reference voltage in various applications such as comparison, calibration, and measurement.

[0003] Traditional reference voltage sources usually use silicon (Si) MOSFET or silicon carbide (SiC) MOSFET. These solutions are usually based on traditional bandgap reference voltage sources or linear regulators, but their material properties lead to some limitations. For example, materials such as Si have low efficiency at high frequencies and high powers, which may cause large heat losses in the device. Moreover, as the power of the device increases, its thermal management becomes more difficult, which will seriously affect the stability and reliability of the device.

[0004] GaN materials are increasingly attracting the attention of researchers due to their excellent electrical properties such as low on-resistance, high switching speed and wide bandgap characteristics. In recent years, some researchers have used GaN-based high electron mobility transistors (HEMTs), Schottky barrier diodes (SBDs) and other devices to make voltage reference generators, which can achieve high-temperature operation up to 250°C, but this type of voltage reference generator requires the introduction of a negative power supply voltage to generate a negative reference voltage, which limits its application in unipolar power supply circuits. Other researchers have proposed using a depletion-mode (D-mode) GaN HEMT combined with an enhancement-mode (E-mode) GaN HEMT to form a 2T structure to generate a predictable reference voltage while maintaining high stability over a wide range of power supply voltages and temperatures. However, this method requires the use of enhancement-mode devices, which usually have large threshold voltage fluctuations, so it is more difficult to achieve in terms of process implementation. Summary of the invention

[0005] The main purpose of the present application is to provide a voltage reference structure and its application to overcome the defects of the prior art.

[0006] In order to achieve the above-mentioned invention object, the technical solution adopted in this application includes:

[0007] The first aspect of the present application provides a voltage reference structure, which includes a high electron mobility field effect transistor based on III-V compounds and a source series resistor; the source of the transistor and the source series resistor are connected in series on a conductive circuit and are used to connect the negative electrode of a power supply or ground, and a reference voltage output point is provided on the conductive circuit, and the reference voltage output point is arranged between the source of the transistor and the source series resistor; the gate of the transistor is used to connect the negative electrode of the power supply or ground, and the drain of the transistor is used to connect the positive electrode of the power supply; the relationship between the reference voltage output by the voltage reference structure and the working parameters of the transistor and the source series resistor satisfies a set relationship.

[0008] A second aspect of the present application provides application of the voltage reference structure in an electronic system.

[0009] Compared with the prior art, the voltage reference structure provided in the present application is mainly formed by connecting a depletion-type HMET with a source series resistor, has a simple structure, and does not require the use of an enhanced device, and the process control is relatively simple, and can produce a voltage reference with good performance, thereby meeting the use requirements of various application scenarios including unipolar power supply circuits. In particular, the source series resistor can adopt a 2DEG resistor, etc., which can be integrated with a depletion-type HMET monolithic chip and make the chip have a smaller area. In addition, the source series resistor can be in the form of multiple source series resistors connected in series, so that the output of multiple reference voltages can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0011] Figure 1 is a schematic diagram of a voltage reference structure in the first embodiment of the present application;

[0012] Figure 2 is a circuit schematic diagram of a voltage reference structure in the first embodiment of the present application;

[0013] Figure 3 is an equivalent circuit diagram for calculating the output impedance of the voltage reference structure in the first embodiment of the present application;

[0014] Figure 4 is an equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure in the first embodiment of the present application;

[0015] Figure 5 is a schematic diagram of a voltage reference structure in the second embodiment of the present application;

[0016] Figure 6 is an equivalent circuit diagram for calculating the output impedance of the voltage reference structure in the second embodiment of the present application;

[0017] Figure 7 is an equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure in the second implementation mode of the present application;

[0018] Figure 8 is a cross-sectional view of a sample 1A to which the first embodiment of the present application is applied;

[0019] Fig. 9 is a cross-sectional view of a sample 2A to which the second embodiment of the present application is applied;

[0020] Fig.10 is a schematic diagram of a voltage reference structure in the third embodiment of the present application;

[0021] Fig.11 is a cross-sectional view of a sample 1B to which the third embodiment of the present application is applied;

[0022] Fig.12 is a schematic diagram of a voltage reference structure in a fourth embodiment of the present application;

[0023] Fig.13 is a cross-sectional view of a sample 2B to which the fourth embodiment of the present application is applied;

[0024] Fig.14 is a graph showing the transfer characteristics of the GaN HEMT in sample ① in Example 1 as a function of temperature;

[0025] Fig.15 is a curve diagram showing the change of the current flowing through the 2DEG resistor in sample ① in Example 1 with the temperature;

[0026] Fig.16 It is a test curve diagram of the power supply rejection ratio of sample ① in Example 1;

[0027] Fig.17 It is a curve diagram of the relationship between the output voltage of sample ① and the power supply voltage VDD;

[0028] Fig.18 This is the relationship curve between the output voltage and temperature of sample ①;

[0029] Fig.19 This is the output impedance test curve of sample ①;

[0030] Fig. 20is a curve diagram showing the change of the current flowing through the GaN HEMT with the temperature in Example 2;

[0031] Fig.21 is a curve diagram showing the change of current flowing through the series 2DEG resistor with temperature in Example 2;

[0032] Fig. 22 is a graph showing the variation of the reference voltage output by the GaN voltage reference structure in Example 2 with temperature;

[0033] Fig.23 is a graph showing the relationship between the total length of the series 2DEG resistors and the temperature coefficient in Example 2;

[0034] Fig.24 is a curve diagram showing the relationship between the reference voltage output by the GaN voltage reference structure and the temperature when the series connection of the 2DEG resistor in Example 2 is the optimal solution;

[0035] Fig.25 is a curve diagram showing the change of the current flowing through the GaN HEMT with the temperature in Example 3;

[0036] Fig.26 is a graph showing the change in temperature of the current flowing through the series 2DEG resistor in Example 3;

[0037] Fig. 27 is a graph showing the variation of the reference voltage output by the GaN voltage reference structure in Example 3 with temperature;

[0038] Fig.28 is a graph showing the relationship between the total length of the series 2DEG resistors and the temperature coefficient in Example 3;

[0039] Fig.29 This is a curve diagram showing the relationship between the reference voltage output by the GaN voltage reference structure and the temperature when the series connection of the 2DEG resistor in Example 3 is the optimal solution. DETAILED DESCRIPTION

[0040] In order to fully understand the purpose, technical content and characteristics of this application, the invention scheme and implementation process are described in detail below in combination with specific implementation methods and drawings.

[0041] Some embodiments of the present application provide a voltage reference structure including a high electron mobility field effect transistor (HEMT) based on III-V compounds and a source series resistor, wherein the source of the transistor is connected in series with the source series resistor on a conductive circuit and is used to connect to the negative electrode of a power supply or to ground, and a reference voltage output point is provided on the conductive circuit, and the reference voltage output point is arranged between the source of the transistor and the source series resistor; the gate of the transistor is used to connect to the negative electrode of a power supply or to ground, and the drain of the transistor is used to connect to the positive electrode of a power supply; wherein a reference voltage output by the voltage reference structure has a set relationship with the operating parameters of the transistor and the source series resistor.

[0042] Specifically, see Figure 1 As shown, in a voltage reference structure (named as voltage reference structure ①) provided in the first embodiment of the present application, the source and gate of the transistor 1 are electrically connected to each other (it can also be considered that the two are short-circuited) and then connected in series with a source series resistor 2, and then grounded, so that a constant voltage output is achieved at the source of the transistor, and the reference voltage output point 3 is arranged between the electrical connection point between the gate and the source of the transistor and the source of the transistor, and the relationship between the reference voltage Vref output by the reference voltage output point 3 and the operating parameters of the transistor 1 and the source series resistor 2 satisfies the following formula, which is defined as Formula I:

[0043]

[0044] Wherein, R is the resistance value of the source series resistor, I DS (sat) is the saturation current of the transistor, L ES is the length of the source series resistor, W ES is the width of the source series resistor, n RES is the carrier density, q is the charge, A, B, C, D, α, β, γ and δ are fitting coefficients, T is the ambient temperature of the voltage reference structure, R C(REs) is the contact resistivity between the ohmic metal and the resistor material in the source series resistor, ε * , ε o are the relative dielectric constant and the vacuum dielectric constant, d is the thickness of the barrier layer of the transistor, W is the width of the gate, L is the length of the gate, R C is the contact resistivity of the electrode metal ohmic contact of the source and drain, V GS is the voltage difference between the gate and the source, L GS is the gate-source distance of the transistor, and n is the surface density of the two-dimensional electron gas in the channel of the transistor.

[0045] The transistor used in this embodiment is a depletion-mode GaN HEMT. The circuit principle of the voltage reference structure is as follows: the output current of the GaN HEMT gradually decreases as the temperature rises, and the resistance value of the source series resistor gradually increases as the temperature rises. In theory, a voltage reference with a low temperature coefficient will be output at the source of the GaN HEMT.

[0046] When GaN HEMT operates in the saturation region, the current expression is:

[0047]

[0048] Among them, I DS (sat) is the saturation current, μ n is the electron mobility under the gate, μ sh is the channel mobility, ε * , ε o are the relative dielectric constant and vacuum dielectric constant, W is the gate width, L is the gate length, V GS is the voltage difference between the gate and the source, V TH is the threshold voltage. GS is the gate-source distance, R Sh is the square resistance of the channel region, R C is the contact resistivity of the ohmic contact, n is the surface density of the two-dimensional electron gas in the channel, and q is the charge.

[0049] The solution to this quadratic equation is:

[0050]

[0051] When the temperature rises, the lattice vibration intensifies, resulting in a decrease in electron mobility (including gate electron mobility and channel mobility). In addition, due to the substrate material, the threshold voltage of GaN HEMT may also drift.

[0052] The relationship between the above-mentioned gate electron mobility and temperature is as follows:

[0053] μ n =A*T -α

[0054] Where A and α are fitting coefficients, and T is temperature.

[0055] The relationship between the above channel electron mobility and temperature is as follows:

[0056] μ sh =B*T -β

[0057] Where B and β are fitting coefficients, and T is temperature.

[0058] The relationship between the above threshold voltage and temperature is as follows:

[0059] V TH =C+γ*T

[0060] Where C and γ are fitting coefficients, and T is temperature.

[0061] In this regard, the direct relationship between the saturation region current and temperature is given, namely:

[0062]

[0063] The expression for the resistance value of the above source series resistor is:

[0064]

[0065] Among them, L ES is the source series resistance length, W ES The width of the source series resistor, R sh(RES) is the square resistance of the source series resistor, R C(RES) is the contact resistivity between the ohmic metal and the resistor material. RES is the carrier density, q is the charge.

[0066] The size of R is also related to temperature. As the temperature rises, its size will change accordingly. Specifically, the square resistance of the source series resistor will change with temperature.

[0067] The relationship between the square resistance of the source series resistor and temperature is as follows:

[0068] μ RES =D*T -δ

[0069] Where D and δ are fitting coefficients, and T is temperature.

[0070] The expression for the resistance value of the above source series resistor is:

[0071]

[0072] The expression of the output reference voltage mentioned above can be obtained.

[0073] It is difficult to find the relationship between saturation current and resistance from the original expression of output reference voltage. The first-order differential of the expression is discussed below.

[0074] Saturation current I of GaN HEMT DS The first derivative of (sat) with respect to temperature is:

[0075]

[0076] Arranged:

[0077]

[0078] from From the expression, we can see that the first and third terms are negative numbers, and the positive or negative of the second term is related to the positive or negative of γ, that is, it is related to the choice of substrate. If the temperature rises and the threshold voltage drifts positively, then γ is positive, and if the threshold voltage drifts negatively, then γ is negative. Take the threshold voltage drifting positively, that is, γ is positive, as an example. Then A negative number.

[0079] The first-order derivative of the above resistance with respect to temperature is:

[0080]

[0081] Is a positive number.

[0082] The expression of the first-order derivative of the above output reference voltage with respect to temperature is:

[0083]

[0084] in is a positive number, I DS (sat) is a positive number, R is a positive number, Is a negative number.

[0085] Based on the above description, it can be seen that by selecting the appropriate size of the GaN HEMT and the source series resistor, a voltage reference with a low temperature coefficient can be obtained.

[0086] For further information, see Figure 2 , which shows the specific circuit structure of the voltage reference structure of this embodiment, wherein R S and R D The resistor is not intentionally added. This is because the gate of GaN HEMT is not self-aligned, so the source and drain parasitic resistances of the device are always generated at the source and drain, and their resistance values ​​are R S and R D .

[0087] Please see again Figure 3 , which is an equivalent circuit diagram for calculating the circuit output impedance of the voltage reference structure of this embodiment. The calculation process of the output impedance is as follows:

[0088]

[0089] Among them, g mis the transconductance of the device, r O is the output impedance of the GaN HEMT, R D , R S is defined as above.

[0090] Please see again Figure 4 , which is an equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure of this embodiment. The calculation process of the power supply rejection ratio is as follows:

[0091]

[0092] In the above formula, V in 、V out is the transition variable, r O is the output impedance of the transistor, and R is the resistance value of the source series resistor.

[0093] For further information, see Figure 5 As shown, in a voltage reference structure (named as voltage reference structure ②) provided in the second embodiment of the present application, the source of the transistor 1 is connected in series with the source series resistor 2 and then electrically connected to the gate, that is, they are grounded together, and a constant voltage output is achieved at the source of the transistor. The relationship between the reference voltage Vref outputted by the reference voltage output point 3 and the operating parameters of the transistor 1 and the source series resistor 2 satisfies the following formula, which is defined as Formula II:

[0094]

[0095] In this embodiment, if the transistor used is a depletion-type GaN HEMT, the circuit principle of the voltage reference structure is: the output current of the GaN HEMT gradually decreases as the temperature rises, and the resistance value of the source series resistor gradually increases as the temperature rises. According to the circuit principle, the voltage value at the intersection of the IV of the source series resistor and the transfer characteristic of the transistor is the output voltage value.

[0096] When the GaN HEMT operates in the saturation region, the current expression is:

[0097]

[0098] Among them, I DS (sat) is the saturation current, μ n is the electron mobility under the gate, μ sh is the channel mobility, ε * , ε o are the relative dielectric constant and vacuum dielectric constant, W is the gate width, L is the gate length, V Gs is the voltage difference between the gate and the source, V TH is the threshold voltage. GSis the gate-source distance, R Sh is the square resistance of the channel region, R C is the contact resistivity of the ohmic contact, n is the surface density of the two-dimensional electron gas in the channel, and q is the charge.

[0099] The expression for the resistance value of the source series resistor is:

[0100]

[0101] Among them, L ES is the length of the source series resistor, W ES is the width of the source series resistor, R sh(RES) is the square resistance of the source series resistor, R C(RES) is the contact resistivity between the ohmic metal and the resistor material. RES is the carrier density, q is the charge. When the temperature changes, the expression of the output reference voltage is the above formula II.

[0102] See also Figure 6 FIG. 4 shows an equivalent circuit diagram for calculating the output impedance of the voltage reference structure in this embodiment. The derivation process for calculating the output impedance is as follows:

[0103]

[0104] Simplified:

[0105]

[0106] Among them, g m is the transconductance of the device, r O is the output impedance of the device.

[0107] See also Figure 7 The equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure in this embodiment is shown, and the derivation process for calculating the power supply rejection ratio is as follows:

[0108]

[0109] In the present application, the source series resistor may include but is not limited to a heterojunction 2DEG resistor, an n-GaN resistor, a p-GaN resistor, a silicon resistor, a metal film resistor, a metal compound film resistor, and a source series resistor formed by other materials. The metal film resistor may be Ni, Al, Cr, Ti, W, Au, Ag, Pd, etc. or a multilayer composite structure of these metals. The material of the metal compound film resistor may be TiN, TaN, ITO, IGZO, etc., but is not limited thereto.

[0110] In the present application, the voltage reference structure includes a semiconductor layer, the semiconductor layer includes a channel layer and a barrier layer arranged on the channel layer, the source, drain and gate are arranged on a specified area of ​​the semiconductor layer, and are electrically combined with the channel layer and the barrier layer in the specified area to form the transistor.

[0111] In the present application, the source series resistor can be integrated with the transistor in a chip, the chip includes the semiconductor layer, the semiconductor layer has a first region and a second region, the first region and the second region are distributed in a direction parallel to the surface of the semiconductor layer, the first region is the designated region, at least part of the semiconductor material in the second region is electrically combined with the first electrode and the second electrode to form the source series resistor, or the source series resistor includes a resistance material layer arranged on the second region, and the resistance material layer is electrically connected to the source of the transistor and the negative pole of the power supply respectively.

[0112] In the present application, the source series resistor may include a two-dimensional electron gas distributed in the second region, or the source series resistor includes a semiconductor resistance layer formed by transforming at least a portion of the barrier layer and / or the channel layer in the second region, and the resistance value of the semiconductor resistance layer is greater than the resistance value of the barrier layer and / or the channel layer; and, within the semiconductor layer, the transistor and the source series resistor are electrically isolated from each other.

[0113] In the present application, the resistance material layer includes a metal film and / or a metal compound film coated on the second region.

[0114] In the present application, the material of the channel layer includes but is not limited to GaN, AlGaN, InGaN or AlInGaN, etc., and is not limited thereto.

[0115] In the present application, the material of the barrier layer includes but is not limited to AlGaN, AlInN, AlN, AlScN or AlInGaN, etc., and is not limited thereto.

[0116] In the present application, the transistor includes a GaN-based HEMT.

[0117] In the present application, the transistor is a depletion-mode HEMT.

[0118] In the present application, the transistor may have a Schottky gate contact structure or a MIS gate structure.

[0119] In the present application, the transistor may be a structure without a field plate, or the transistor may have one or more field plates, for example, it may have one or more of a gate field plate, a source field plate and a drain field plate.

[0120] In the present application, an electrical isolation structure may also be provided in the semiconductor layer, and the electrical isolation structure includes an ion implantation isolation structure or a mesa etching isolation structure, which may be formed by performing ion implantation, dry etching or wet etching on the semiconductor layer.

[0121] In the present application, the semiconductor layer may be disposed on a substrate, and the substrate may be a homogeneous substrate or a heterogeneous substrate of the semiconductor layer, for example, may be selected from but not limited to Si, SiC, sapphire, GaN, AlN, diamond substrate, etc. or a composite substrate thereof.

[0122] In the present application, the semiconductor layer may also include conventional structural layers such as a buffer layer, a space layer, and a cap layer.

[0123] In the present application, conventional structural layers such as an insulating dielectric layer and a passivation layer may also be disposed on the semiconductor layer. The material of the insulating dielectric layer may be selected from one or more combinations of insulating materials such as silicon nitride, silicon oxide, aluminum oxide, high dielectric constant materials, organic polymers, ceramic materials, oxide semiconductors, etc.

[0124] Figure 8A cross-sectional view of a GaN voltage reference structure (named as sample 1A) using the first embodiment of the present application is shown. In the voltage reference structure 30, a GaN HMET 31 and a source series resistor 32 are integrated in a chip. The chip includes a semiconductor layer, and the semiconductor layer includes a channel layer 302 and a barrier layer 303 sequentially grown on a substrate 301. The channel layer 302 and the barrier layer 303 form a heterojunction, and a two-dimensional electron gas 304 (2DEG) is distributed in the heterojunction. At the same time, the semiconductor layer has a first region and a second region along a direction parallel to its surface. The source 305, the gate 306 and the drain 307 of the HEMT are respectively arranged on the surface of the first region to cooperate with the heterojunction in the first region to form the HMET. The first electrode 308 and the second electrode 309 of the source series resistor are respectively arranged on the surface of the second region (the first electrode and the second electrode can be a positive electrode and a negative electrode, respectively) to cooperate with the two-dimensional electron gas in the second region to form a source series resistor, that is, the source series resistor is a heterojunction 2DEG resistor. The source 305, the drain 307, the first electrode 308 and the second electrode 309 can form ohmic contacts with the semiconductor layer respectively. An electrical isolation region 310 is distributed between the first region and the second region, which is used to electrically isolate the source series resistor from the HEMT. The electrical isolation region can extend from the surface of the barrier layer to the inside of the channel layer, or from the surface of the barrier layer to the surface of the substrate. The electrical isolation region can be a high resistance region formed by ion implantation of the semiconductor layer, or a groove formed by etching the semiconductor layer. The resistance value of the source series resistor mainly depends on the two-dimensional electron gas in the second region. The gate 306 can be electrically connected to the source 305 and the second electrode 309 of the source series resistor through a lead, and the first electrode 308 of the source series resistor is grounded. At the same time, in some cases, a thickened electrode and a source field plate can be arranged above the gate. The drain 307 can be electrically connected to the positive electrode of the chip. One or more insulating dielectric layers 311 can also be arranged on the surface of the semiconductor layer in the chip to isolate the aforementioned electrodes from each other and passivate the surface of the semiconductor layer. The one or more insulating dielectric layers may be continuous layers, and the material thereof may be silicon oxide, aluminum oxide, silicon nitride, etc., but is not limited thereto. The aforementioned electrodes may be exposed from corresponding windows opened on these continuous insulating dielectric layers. In addition, a gate field plate structure that cooperates with the gate may also be provided in the chip.

[0125] Fig. 9 A cross-sectional view of a GaN voltage reference structure (named as sample 2A) applying the second embodiment of the present application is shown. The GaN voltage reference structure is basically the same as sample 1A, wherein the gate 306 is connected to the first electrode 308 via a lead and grounded, and the source is connected to the second electrode 308 and connected to the reference voltage output point.

[0126] In the aforementioned voltage reference structure ① and voltage reference structure ②, taking the source series resistors as 2DEG resistors as an example, referring to the above description, it can be seen that in terms of the application principle, the voltage reference structure ① applies the properties of the two-dimensional electron gas. The square resistance of the two-dimensional electron gas gradually increases with the increase of temperature, and the saturation current of the GaN HEMT gradually decreases with the increase of temperature. Therefore, the two can reach a balance under a certain size and output a reference voltage that is insensitive to temperature. The voltage reference structure ② applies the circuit principle. The square resistance of the two-dimensional electron gas gradually increases with the increase of temperature, and the saturation current of the GaN HEMT gradually decreases with the increase of temperature. The load line is manifested as a downward shift of the intersection point, thereby outputting a reference voltage.

[0127] At the same time, in terms of the range of the output reference voltage, the voltage reference structure ① has a larger range of the output reference voltage, which is generally greater than the threshold voltage of the GaN HEMT, because the GaN HEMT is connected in series with the source series resistor. However, the range of the reference voltage output by the voltage reference structure ② is smaller than the threshold voltage of the GaN HEMT.

[0128] However, in terms of power consumption, under the constraints of process conditions, the voltage reference structure ② is more likely to achieve low saturation current, thereby achieving lower power consumption.

[0129] In terms of output impedance, the output impedance of the voltage reference structure ① is R out =≈R, the output impedance of the voltage reference structure ② is Therefore, the output impedance of the voltage reference structure ② is smaller than that of the voltage reference structure ①, and has better load carrying capacity.

[0130] In terms of power supply rejection, the power supply rejection of the voltage reference structure ① is The power supply rejection of voltage reference structure ② is Therefore, the power supply rejection capability of the voltage reference structure ② is better.

[0131] In addition, in terms of transient response, at the same GaN HEMT size, the output current of the voltage reference structure ① is greater than that of the voltage reference structure ②, so it has a faster transient response.

[0132] In some cases, the source series resistors in the voltage reference structure of the present application may be n in number and are sequentially connected in series on the conductive line, wherein the reference voltage output point is provided between the first source series resistor and the source of the transistor, and one reference voltage output point is provided between at least two adjacent source series resistors from the first source series resistor to the nth source series resistor, and n≥2. In this case, R in the above formula I and formula II is the sum of the resistance values ​​of the n source series resistors, and L ESis the sum of the lengths of the n source series resistors, and the widths of the n source series resistors are all W ES .

[0133] For example, see Fig.10 In a voltage reference structure (named as voltage reference structure ③) provided in the third embodiment of the present application, there are n source series resistors 21, 22, ..., 2n, whose resistance values ​​are R1, R2, ..., R n , and are sequentially connected in series with the source of the transistor. If the transistor in the voltage reference structure ③ also adopts a depletion-type GaN HEMT, and it is assumed that the aforementioned multiple source series resistors are formed by dividing a source series resistor in the voltage reference structure ① along the length direction, then its working principle is basically the same as that of the voltage reference structure ①, but it can realize multiple reference voltages Vref1, Vref2, ..., Vref n Output of Vref1 = I DS (sat)*(R1+R2+···+R n ), Vref2=I DS (sat)*(R2+···+R n ), ···, Vref n-1 =I DS (sat)*(R n-1 +R n ), Vref n =I DS (sat)*R n .

[0134] Fig.11 A cross-sectional view of a GaN voltage reference structure (named as sample 1B) using the third embodiment of the present application is shown. The GaN voltage reference structure is substantially the same as sample 1A, except that a plurality of 2DEG resistors connected in series are formed by providing a plurality of electrical isolation regions in the semiconductor layer. The drain of the GaN HEMT is connected to VDD, and the gate-source is short-circuited and connected in series with the plurality of source series resistors and then to ground.

[0135] For example, see Fig.12 In a voltage reference structure (named as voltage reference structure ④) provided in the fourth embodiment of the present application, there are n source series resistors 31, 32, ..., 3n, whose resistance values ​​are R1, R2, ..., R n, and are sequentially connected in series with the source of the transistor. If the transistor in the voltage reference structure ④ also adopts a depletion-type GaN HEMT, and it is assumed that the aforementioned multiple source series resistors are formed by dividing a source series resistor in the voltage reference structure ② along the length direction, then its working principle is basically the same as that of the voltage reference structure ②, but it can realize multiple reference voltages Vref1, Vref2, ..., Vref n Output of Vref1 = I DS (sat)*(R1+R2+···+R n ), Vref2=I DS (sat)*(R2+···+R n ), ···, Vref n-1 =I DS (sat)*(R n-1 +R n ), Vref n =I DS (sat)*R n .

[0136] Fig.13 A cross-sectional view of a GaN voltage reference structure (named as sample 2B) using the fourth embodiment of the present application is shown. The GaN voltage reference structure is substantially the same as sample 2A, except that a plurality of 2DEG resistors connected in series are formed by providing a plurality of electrical isolation regions in the semiconductor layer. The drain of the GaN HEMT is connected to VDD, the gate is grounded, and the source is connected in series with the plurality of source series resistors and then grounded.

[0137] In the above embodiments of the present application, the material of the substrate may be SiC, Si, sapphire, GaN, AlN or diamond, etc., the material of the channel layer may be GaN, InGaN, AlGaN or AlInGaN, etc., and the material of the barrier layer may be AlGaN, InAlN, AlN, AlScN or AlInGaN, etc. The HEMT may be a depletion-type device, whose gate may form a Schottky contact with the semiconductor layer, or a gate dielectric layer may be provided between the gate and the semiconductor layer, i.e., forming a Schottky gate contact or a MIS gate structure. In addition, the HEMT may also adopt a groove gate structure or a p-type gate structure, etc.

[0138] In the above typical implementation scheme, in order to cope with different working scenarios, the structure of the transistor can be changed accordingly, for example: there can be only conventional source, drain, and gate without adding a field plate; only a gate field plate can be added; two field plates can be added, such as a gate field plate and a source field plate; three or even more field plates can be added.

[0139] Some embodiments of the present application also provide a circuit structure, which includes the voltage reference structure.

[0140] Some embodiments of the present application also provide a reference voltage output control method, which includes: connecting the voltage reference structure and the power supply to a working circuit, so that the voltage reference structure outputs a reference voltage; the power supply is a DC unit.

[0141] Exemplarily, the drain of the high electron mobility field effect transistor in the voltage reference structure can be connected to the positive electrode of the DC power supply, the gate can be directly connected to the negative electrode of the DC power supply or ground, and the source can be directly connected to the negative electrode of the DC power supply or ground after being connected in series with the source series resistor. Alternatively, the drain of the high electron mobility field effect transistor in the voltage reference structure can be connected to the positive electrode of the DC power supply, and the gate can be directly connected to the source, and the source can be connected to the negative electrode of the DC power supply or ground after being connected in series with the source series resistor.

[0142] In some cases, the reference voltage output control method may further include: adjusting the reference voltage by adjusting the operating parameters of the transistor and / or source series resistor in the voltage reference structure. The load module may be a light emitting module or other electrical function module.

[0143] The present application can form a voltage reference structure by combining a depletion-type GaN HEMT and various forms of source series resistors. The structure is simple, and the operating parameters such as the size of the GaN HEMT and the source series resistor can be adjusted to improve the size and temperature coefficient of the reference voltage output by the voltage reference structure, thereby generating a voltage reference with good performance.

[0144] The technical solution of the present application will be further described in detail below in conjunction with several embodiments. However, the implementation of the present application is not limited to these specific details, and can also be implemented in other ways different from those described herein. Therefore, the specific embodiments presented in the present application are only examples and not limitations.

[0145] Embodiment 1 A GaN voltage reference structure provided in this embodiment can be referred to Figure 8 , and its preparation method comprises the following steps:

[0146] S1. A Fe-GaN buffer layer with a thickness of about 220 nm, an unintentionally doped GaN layer with a thickness of about 280 nm, a GaN channel layer with a thickness of about 90 nm, an AlN space layer with a thickness of about 1 nm, an AlGaN barrier layer with a thickness of about 30 nm, and a GaN cap layer with a thickness of about 2 nm are sequentially grown on a silicon carbide substrate by an MOCVD process to form a semiconductor epitaxial layer.

[0147] S2. Isolate the active area of ​​the semiconductor epitaxial layer by ICP etching process, etc., with an etching depth of about 100 nm.

[0148] S3. Ohmic metal Ti / Al / Ni / Au (thickness of about 20 / 140 / 55 / 60 nm) is evaporated in the ohmic area through a photolithography process, and then annealed at about 870°C / 35s to make the source, drain, and positive and negative electrodes of the source series resistor of the transistor form ohmic contacts with the semiconductor epitaxial layer.

[0149] S4. Using PECVD process as a passivation layer, which may be a silicon nitride layer with a thickness of 100nm-300nm.

[0150] S5. Remove the dielectrics in the ohmic region and the gate region through a photolithography process and an AOE dry etching process.

[0151] S6. Then, the gate field plate metal Ti / Au (thickness is about 30 / 250nm) is evaporated to complete the gate production, electrode thickening, and wire interconnection.

[0152] This embodiment finally produced a GaN voltage reference structure sample (referred to as sample ①).

[0153] The size parameters of the GaN HEMT in sample ① are: L g =10um, Lgs=40um, Lgd=3um, W=6um, electrical parameters: V GS =0V, V TH =-3.38V, physical parameters: μ n =1300,ε * =9.15,ε o =8.85E-14, d=2.45E-6, Rsh=325, Rc=1. Dimension parameters of source series resistor: L ES =40um, W ES =6um.

[0154] The GaN HEMT in sample ① was tested using the B1505A power device analyzer. The static bias was set to ground the source, connect the drain to 10V, apply a voltage of -6V-1V to the gate, and the test interval was 0.01V. The device was scanned to test the relationship between the source-drain current and the gate-source voltage. The test system stage has a heating function. When heating, the test is performed after the system reaches the set temperature and stabilizes for 5 minutes.

[0155] Fig.14 The figure shows how the transfer characteristics of the GaN HEMT in sample ① change as the temperature rises, with the Vds applied voltage being 10V.

[0156] Fig.15 The graph shows how the current flowing through the source series resistor changes as the temperature changes when the voltage applied across the source series resistor in sample ① remains unchanged.

[0157] Fig.16 The test results of the power supply rejection ratio of sample ① are shown. The test method is to apply a 10V static bias to VDD and superimpose a 2V AC signal at the same time. The frequency of the AC signal is 10Hz-10MHz. An oscilloscope is connected to the output end to characterize the power supply rejection of the voltage source. At low frequency, the power supply rejection ratio of sample ① reaches nearly 100dB, indicating that it has a good ability to suppress power supply ripple.

[0158] Fig.17 The relationship between the output voltage of sample ① and the power supply voltage VDD is shown. As the power supply voltage increases, the output voltage first increases and then reaches saturation. The corresponding power supply voltage at saturation is 7V.

[0159] Fig.18 The relationship between the output voltage and temperature of sample ① is shown, and the structure has good temperature characteristics.

[0160] Next, we test the output impedance of sample ① by connecting a current source to the output port for shunting and testing the output voltage. The parameters of the external current source are as follows: Fig.19 As shown by the red line in the middle, the current increases evenly from 0 to 50uA during the 0-5s period. The voltage change obtained by testing the output port is: Fig.19 As shown by the blue line in the middle, the output impedance of this sample is calculated to be 4.5kΩ.

[0161] Embodiment 2 This embodiment provides a GaN voltage reference structure, the basic structure of which can be referred to as Fig.11 The preparation method is basically the same as that of Example 1, except that:

[0162] In step S2, active area isolation is performed on multiple regions of the semiconductor epitaxial layer by ICP etching process etc. according to the structure of the GaN HEMT to be formed and the number of 2DEG resistors, and the etching depth is about 100 nm.

[0163] In this embodiment, the total length of the 2DEG resistor (L ES ) as a variable, a series of samples were produced, in which the total length of the 2DEG resistor was 10-100μm. Fig. 20 The relationship between the current flowing through the GaN HEMT and the temperature in this series of samples is shown. It can be seen that the magnitude of the current has nothing to do with the resistance length, but is only related to the GaN HEMT.

[0164] Under different temperature conditions (0-250℃), the GaN HEMTs in the series of samples were isolated from the test circuit, and only the 2DEG resistors in series were placed in the test circuit. A voltage of 1V was applied to test the relationship between the current through these series resistors and the temperature. The results are shown in Figure 2. Fig.21 As shown. It can be seen that the current decreases with temperature, L ES The larger it is, the smaller the current that passes through it, which means the greater the resistance.

[0165] Under different temperature conditions (0-250℃), the relationship between the reference voltage output by this series of samples and the temperature is tested. The results are as follows: Fig. 22 As shown, different curves in this figure represent different L ES , big L ES For a large reference voltage, the temperature coefficient of the reference voltage cannot be directly seen here. The following outputs different L ES The temperature coefficient is as follows. Fig.23 As shown, the formulas for calculating these temperature coefficients are:

[0166]

[0167] Among them, V max 、V min are the maximum and minimum voltages in the temperature range, V nominal is the average voltage within the temperature range, T max 、T min are the maximum and minimum values ​​of temperature.

[0168] from Fig.23 From the results shown, it can be seen that the temperature coefficient of the reference voltage is not monotonic with the size of the series resistance, but there is an optimal solution.

[0169] Fig.24 YesL ES The relationship between the reference voltage and temperature when the optimal solution is obtained. It can be seen that within the range of interest, the output reference voltage can maintain a good temperature coefficient. Under the premise of meeting the process requirements, the GaN voltage reference structure of this embodiment can output a reference voltage of 1.47V at 20℃-250℃ and a temperature coefficient of 93ppm / ℃, so it can well meet the application in GaN analog circuits.

[0170] Embodiment 3 The basic structure of a GaN voltage reference structure provided in this embodiment can be referred to Fig.13 The preparation method is basically the same as that of Example 2, the only difference being that the position of the reference voltage output point is different.

[0171] In this embodiment, the total length of the 2DEG resistor (L ES) was used as a variable, and a series of samples were produced, in which the total length of the DEG resistor was 20-200 μm. Fig.25 The relationship between the current flowing through the GaN HEMT and the temperature in this series of samples is shown. It can be seen that the magnitude of the current is related to the total length of the 2DEG resistor. This is because the series 2DEG resistor can be regarded as a source feedback resistor, which will directly affect the saturation current of the GaN HEMT.

[0172] Under different temperature conditions (20-250℃), the GaN HEMTs in the series of samples were isolated from the test circuit, and only the 2DEG resistors in series were placed in the test circuit. A voltage of 1V was applied to test the relationship between the current through these series resistors and the temperature. The results are shown in Figure 2. Fig.26 As shown. It can be seen that the current decreases with temperature, L ES The larger it is, the smaller the current that passes through it, which means the greater the resistance.

[0173] Under different temperature conditions (20-250℃), the relationship between the reference voltage output by this series of samples and the temperature was tested. The results are as follows: Fig. 27 As shown, different curves in this figure represent different L ES , big L ES For a large reference voltage, the temperature coefficient of the reference voltage cannot be directly seen here. The following outputs different L ES The temperature coefficient under Fig.28 ). Obviously, the temperature coefficient of the reference voltage is not monotonous with the size of the series resistance, but there is an optimal solution.

[0174] Fig.29 YesL ES The relationship between the reference voltage and temperature when the optimal solution is obtained. It can be seen that within the range of interest, the output reference voltage can maintain a good temperature coefficient. Under the premise of meeting the process requirements, the GaN voltage reference structure of this embodiment can output a reference voltage of 1.87V at 20℃-250℃ and a temperature coefficient of 55ppm / ℃.

[0175] The above embodiments are only intended to illustrate the technical concept and efficacy of the present application, and the purpose is to enable persons familiar with the technical field to understand the content of the present application and implement it accordingly. However, these embodiments do not constitute a limitation on the scope of protection of the present application. Any equivalent transformation or modification made on the premise of the spirit and technical idea of ​​the present application should be covered by the claims of the present application.

Claims

1. A voltage reference structure, characterized in that: The invention comprises a high electron mobility field effect transistor (1) based on a III-V compound and a source series resistor (2); the source of the transistor (1) and the source series resistor (2) are connected in series on a conductive circuit and are used to connect to the negative electrode of a power source or to ground, and a reference voltage output point (3) is provided on the conductive circuit; the gate of the transistor is used to connect to the negative electrode of a power source or to ground, and the drain of the transistor is used to connect to the positive electrode of a power source; The source and gate of the transistor (1) are electrically connected to each other and then connected in series with the source series resistor (2); the reference voltage output point (3) is arranged between the electrical connection point between the gate and source of the transistor and the source of the transistor; the relationship between the reference voltage Vref output by the reference voltage output point (3) and the operating parameters of the transistor (1) and the source series resistor (2) satisfies Formula I: Alternatively, the source of the transistor (1) is connected in series with the source series resistor (2) and then electrically connected to the gate, the reference voltage output point (3) is arranged between the source of the transistor (1) and the source series resistor (2), and the relationship between the reference voltage Vref output by the reference voltage output point (3) and the operating parameters of the transistor (1) and the source series resistor (2) satisfies Formula II: The formula I is: The formula II is: Wherein, R is the resistance value of the source series resistor, I DS (sat) is the saturation current of the transistor, L ES is the length of the source series resistor, W ES is the width of the source series resistor, n RES is the carrier density, q is the charge, A, B, C, D, α, β, γ and δ are fitting coefficients, T is the ambient temperature of the voltage reference structure, R C(RES) is the contact resistivity between the ohmic metal and the resistor material in the source series resistor, ε * , ε o are the relative dielectric constant and the vacuum dielectric constant, d is the thickness of the barrier layer of the transistor, W is the width of the gate, L is the length of the gate, R C is the contact resistivity of the electrode metal ohmic contact of the source and drain, V GS is the voltage difference between the gate and the source, L GS is the gate-source distance of the transistor, and n is the surface density of the two-dimensional electron gas in the channel of the transistor.

2. The voltage reference structure according to claim 1, characterized in that: The source series resistors (2) are n in number and are sequentially connected in series on the conductive line, wherein the reference voltage output point (3) is provided between the first source series resistor and the source of the transistor, and a reference voltage output point (3) is also provided between at least two adjacent source series resistors from the first source series resistor to the nth source series resistor, and n≥2; In addition, in Formula I and Formula II, R is the sum of the resistance values ​​of n source series resistors, and L ES is the sum of the lengths of the n source series resistors, and the widths of the n source series resistors are all W ES .

3. The voltage reference structure according to claim 1, wherein: The voltage reference structure includes a semiconductor layer, which includes a channel layer and a barrier layer arranged on the channel layer. The source, drain and gate are arranged on a specified area of ​​the semiconductor layer and are electrically combined with the channel layer and the barrier layer in the specified area to form the transistor.

4. The voltage reference structure according to claim 3, characterized in that: The source series resistor is integrated with the transistor in a chip, the chip includes the semiconductor layer, the semiconductor layer has a first region and a second region, the first region and the second region are distributed in a direction parallel to the surface of the semiconductor layer, the first region is the designated region, at least part of the semiconductor material in the second region is electrically combined with the first electrode and the second electrode to form the source series resistor, or the source series resistor includes a resistance material layer arranged on the second region, and the resistance material layer is electrically connected to the source of the transistor and the negative electrode of the power supply respectively.

5. The voltage reference structure according to claim 4, characterized in that: The source series resistor includes a two-dimensional electron gas distributed in the second region, or the source series resistor includes a semiconductor resistance layer formed by converting at least part of the barrier layer and / or the channel layer in the second region, and the resistance value of the semiconductor resistance layer is greater than the resistance value of the barrier layer and / or the channel layer; and, in the semiconductor layer, the transistor and the source series resistor are electrically isolated from each other; Alternatively, the resistance material layer includes a metal film and / or a metal compound film coated on the second region.

6. The voltage reference structure according to claim 3, characterized in that: The material of the channel layer includes GaN, AlGaN, InGaN or AlInGaN; and / or, the material of the barrier layer includes AlGaN, AlInN, AlN, AlScN or AlInGaN; and / or, the semiconductor layer is arranged on a substrate, and the material of the substrate includes one or more combinations of SiC, Si, sapphire, GaN, AlN, diamond; and / or, an electrical isolation structure is arranged in the semiconductor layer, and the electrical isolation structure includes an ion implantation isolation structure or a mesa etching isolation structure; and / or, an insulating dielectric layer is also arranged on the semiconductor layer.

7. The voltage reference structure according to claim 1, wherein: The transistor includes a GaN-based HEMT; and / or the transistor is a depletion-mode HEMT; and / or the transistor has a Schottky gate contact structure or a MIS gate structure; and / or the transistor is a field plate-free structure, or the transistor has one or more field plates; and / or the source series resistor includes a combination of one or more of a heterojunction 2DEG resistor, an n-GaN resistor, a p-GaN resistor, a silicon resistor, a metal thin film resistor, and a metal compound thin film resistor.

8. A circuit structure, characterized in that: The invention comprises the voltage reference structure according to any one of claims 1 to 7.

9. A reference voltage output control method, characterized in that: include: Connecting the voltage reference structure and power supply of any one of claims 1 to 7 to a working circuit, so that the voltage reference structure outputs a reference voltage; The power supply is a direct current power supply.

10. The reference voltage output control method according to claim 9, characterized in that: Also includes: The reference voltage is adjusted by adjusting the operating parameters of the transistor and / or the source series resistor in the voltage reference structure.

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