Voltage reference structure and applications thereof

Abstract

The application provides a voltage reference structure based on III-V compound and application thereof. In one embodiment, the voltage reference structure comprises a GaN HEMT and a source series resistance; the source of the HEMT is connected in series with the resistance on a conductive line, and is used for connecting a negative pole of a power supply or ground; a reference voltage output point is arranged on the conductive line, and is arranged between the source of the HEMT and the resistance; the gate of the HEMT is used for connecting the negative pole of the power supply or ground; the drain of the HEMT is used for connecting a positive pole of the power supply; and the reference voltage output by the voltage reference structure satisfies a set relationship with working parameters of the HEMT and the resistance. The voltage reference structure of the application has a simple structure, does not need to use an enhancement device, and can generate a voltage reference with good performance. In particular, by adopting a multi-resistance series connection form, a multi-voltage output can be formed, thereby well meeting the use requirements of various application scenarios including unipolar power supply circuits.

Description

Technical Field

[0001] The present application specifically relates to a voltage reference structure based on GaN or similar semiconductor compounds and its application in electronic devices. Background Art

[0002] A voltage reference is a circuit or device that provides a stable, accurate, and reliable reference voltage. In electronic systems, voltage references play a vital role, serving as a reference voltage for various applications, such as comparison, calibration, and measurement.

[0003] Traditional reference voltage sources typically use silicon (Si) MOSFETs or silicon carbide (SiC) MOSFETs. These solutions are typically based on traditional bandgap reference voltage sources or linear regulators, but their material properties lead to certain limitations. For example, materials like Si have low efficiency at high frequencies and high powers, which can lead to significant heat losses in the device. Furthermore, as device power increases, thermal management becomes increasingly difficult, seriously affecting device stability and reliability.

[0004] GaN materials are increasingly attracting the attention of researchers due to their excellent electrical properties, including low on-resistance, high switching speed, and wide bandgap. In recent years, some researchers have used GaN-based high electron mobility transistors (HEMTs) and Schottky barrier diodes (SBDs) to create voltage reference generators, which can operate at high temperatures up to 250°C. However, this type of voltage reference generator requires the introduction of a negative power supply voltage to generate a negative reference voltage, which limits its application in unipolar power supply circuits. Other researchers have proposed combining a depletion-mode (D-mode) GaN HEMT with an enhancement-mode (E-mode) GaN HEMT to form a 2T structure to generate a predictable reference voltage while maintaining high stability over a wide range of power supply voltages and temperatures. However, this approach requires the use of enhancement-mode devices, which typically have large threshold voltage fluctuations and are therefore more difficult to implement in the process. Summary of the Invention

[0005] The main purpose of this application is to provide a voltage reference structure and its application to overcome the defects of the prior art.

[0006] To achieve the above-mentioned invention objectives, the technical solutions adopted in this application include:

[0007] The first aspect of the present application provides a voltage reference structure, which includes a high electron mobility field effect transistor based on III-V compounds and a source series resistor; the source of the transistor and the source series resistor are connected in series on a conductive circuit and are used to connect to the negative pole of a power supply or ground, and a reference voltage output point is provided on the conductive circuit, and the reference voltage output point is arranged between the source of the transistor and the source series resistor; the gate of the transistor is used to connect to the negative pole of the power supply or ground, and the drain of the transistor is used to connect to the positive pole of the power supply; the relationship between the reference voltage output by the voltage reference structure and the operating parameters of the transistor and the source series resistor satisfies a set relationship.

[0008] A second aspect of the present application provides application of the voltage reference structure in an electronic system.

[0009] Compared to the prior art, the voltage reference structure provided in this application is mainly formed by connecting a depletion-type HMET with a source series resistor. It has a simple structure, and no enhancement-type device is required. The process control is relatively simple, and it can produce a voltage reference with good performance, thereby meeting the use requirements of various application scenarios including unipolar power supply circuits. In particular, the source series resistor can adopt a 2DEG resistor, etc., which can be integrated with the depletion-type HMET monolithic chip and make the chip have a smaller area. In addition, the source series resistor can be in the form of multiple source series resistors connected in series, so that the output of multiple reference voltages can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in this application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0011] Figure 1 is a schematic diagram of a voltage reference structure in the first embodiment of the present application;

[0012] Figure 2 This is a circuit schematic diagram of a voltage reference structure in the first embodiment of the present application;

[0013] Figure 3 is an equivalent circuit diagram for calculating the output impedance of the voltage reference structure in the first embodiment of the present application;

[0014] Figure 4 is an equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure in the first embodiment of the present application;

[0015] Figure 5 is a schematic diagram of a voltage reference structure in the second embodiment of the present application;

[0016] Figure 6 is an equivalent circuit diagram for calculating the output impedance of the voltage reference structure in the second embodiment of the present application;

[0017] Figure 7 is an equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure in the second embodiment of the present application;

[0018] Figure 8 is a cross-sectional view of a sample 1A to which the first embodiment of the present application is applied;

[0019] Figure 9 is a cross-sectional view of a sample 2A to which the second embodiment of the present application is applied;

[0020] Figure 10 is a schematic diagram of a voltage reference structure in the third embodiment of the present application;

[0021] Figure 11 is a cross-sectional view of a sample 1B to which the third embodiment of the present application is applied;

[0022] Figure 12 is a schematic diagram of a voltage reference structure in a fourth embodiment of the present application;

[0023] Figure 13 is a cross-sectional view of a sample 2B according to the fourth embodiment of the present application;

[0024] Figure 14 is a graph showing the transfer characteristics of the GaN HEMT in sample ① in Example 1 as a function of temperature;

[0025] Figure 15 is a graph showing the change in current flowing through the 2DEG resistor in sample ① in Example 1 as a function of temperature;

[0026] Figure 16 1 is a test curve diagram of the power supply rejection ratio of sample ① in Example 1;

[0027] Figure 17 This is a graph showing the relationship between the output voltage of sample ① and the power supply voltage VDD;

[0028] Figure 18 This is the relationship between the output voltage and temperature of sample ①;

[0029] Figure 19 This is the output impedance test curve of sample ①;

[0030] Figure 20is a graph showing the change in current flowing through the GaN HEMT as a function of temperature in Example 2;

[0031] Figure 21 is a graph showing the change in current flowing through the series 2DEG resistor as a function of temperature in Example 2;

[0032] Figure 22 is a graph showing how the reference voltage output by the GaN voltage reference structure in Example 2 varies with temperature;

[0033] Figure 23 is a graph showing the relationship between the total length of the series-connected 2DEG resistors and the temperature coefficient in Example 2;

[0034] Figure 24 is a graph showing the relationship between the reference voltage output by the GaN voltage reference structure and the temperature when the series connection of the 2DEG resistor is the optimal solution in Example 2;

[0035] Figure 25 is a graph showing the change in current flowing through the GaN HEMT as a function of temperature in Example 3;

[0036] Figure 26 is a graph showing the change in current flowing through the series 2DEG resistor as a function of temperature in Example 3;

[0037] Figure 27 is a graph showing how the reference voltage output by the GaN voltage reference structure in Example 3 changes with temperature;

[0038] Figure 28 is a graph showing the relationship between the total length of the series-connected 2DEG resistors and the temperature coefficient in Example 3;

[0039] Figure 29 This is a graph showing the relationship between the reference voltage output by the GaN voltage reference structure and the temperature when the series connection of the 2DEG resistor in Example 3 is the optimal solution. DETAILED DESCRIPTION

[0040] In order to fully understand the purpose, technical content and features of this application, the invention scheme and implementation process are described in detail below in combination with specific implementation methods and drawings.

[0041] Some embodiments of the present application provide a voltage reference structure comprising a high electron mobility field effect transistor (HEMT) based on III-V compound and a source series resistance, the source of the transistor and the source series resistance are connected in series on a conductive line and used to connect the negative pole or ground of a power supply, and a reference voltage output point is provided on the conductive line, the reference voltage output point is arranged between the source of the transistor and the source series resistance; the gate of the transistor is used to connect the negative pole or ground of the power supply, and the drain of the transistor is used to connect the positive pole of the power supply; wherein the reference voltage output by the voltage reference structure has a set relationship with the working parameters of the transistor and the source series resistance.

[0042] Specifically, referring to Figure 1 In a voltage reference structure (named as voltage reference structure ①) provided by the first embodiment of the present application, the source and the gate of the transistor 1 are electrically connected (which can also be considered as short-circuited) to each other and then connected in series with a source series resistance 2, and then grounded, so that a constant voltage is output at the source of the transistor, the reference voltage output point 3 is arranged between the connection point of the gate and the source of the transistor and the source of the transistor, and the reference voltage Vref output by the reference voltage output point 3 satisfies the following formula with the working parameters of the transistor 1 and the source series resistance 2, which is defined as formula I:

[0043]

[0044] Wherein, R is the resistance value of the source series resistance, I DS (sat) is the saturation region current of the transistor, L ES is the length of the source series resistance, W ES is the width of the source series resistance, n RES is the carrier density, q is the charge amount, A, B, C, D, α, β, γ and δ are fitting coefficients, T is the ambient temperature of the voltage reference structure, R C(REs) is the contact resistivity of the ohmic metal and the resistance material in the source series resistance, ε * , ε o are the relative dielectric constant and the vacuum dielectric constant respectively, d is the thickness of the barrier layer of the transistor, W is the width of the gate, L is the length of the gate, R C is the contact resistivity of the ohmic contact of the electrode metal of the source and the drain, V GS is the voltage difference between the gate and the source, L GS is the gate-source distance of the transistor, and n is the areal density of the two-dimensional electron gas of the channel of the transistor.

[0045] The transistor used in this embodiment is a depletion-mode GaN HEMT. The circuit principle of the voltage reference structure is that the output current of the GaN HEMT gradually decreases with increasing temperature, and the resistance of the source series resistor gradually increases with increasing temperature. In theory, a low temperature coefficient voltage reference is output at the source of the GaN HEMT.

[0046] When the GaN HEMT operates in the saturation region, the current expression is:

[0047]

[0048] Among them, I DS (sat) is the saturation current, μ n is the electron mobility under the gate, μ sh is the channel mobility, ε * , ε o are the relative dielectric constant and vacuum dielectric constant, W is the gate width, L is the gate length, V GS is the voltage difference between the gate and the source, V TH is the threshold voltage. GS is the gate-source distance, R Sh is the square resistance of the channel region, R C is the contact resistivity of the ohmic contact, n is the surface density of the two-dimensional electron gas in the channel, and q is the charge.

[0049] The solution to this quadratic equation is:

[0050]

[0051] When the temperature rises, the lattice vibration intensifies, resulting in a decrease in electron mobility (including gate electron mobility and channel mobility). In addition, due to the substrate material, the threshold voltage of the GaN HEMT may also drift.

[0052] The relationship between the above-mentioned electron mobility under the gate and temperature is as follows:

[0053] μ n =A*T -α

[0054] Where A and α are fitting coefficients, and T is temperature.

[0055] The relationship between the above channel electron mobility and temperature is as follows:

[0056] μ sh =B*T -β

[0057] Where B and β are fitting coefficients, and T is temperature.

[0058] The relationship between the above threshold voltage and temperature is as follows:

[0059] V TH =C+γ*T

[0060] Where C and γ are fitting coefficients, and T is temperature.

[0061] In this regard, the direct relationship between the saturation region current and temperature is given, namely:

[0062]

[0063] The resistance value of the source series resistor is expressed as:

[0064]

[0065] Among them, L ES is the source series resistance length, W ES The width of the source series resistor, R sh(RES) is the square resistance of the source series resistor, R C(RES) is the contact resistivity between the ohmic metal and the resistor material. RES is the carrier density, q is the charge.

[0066] The size of R is also temperature-dependent, and changes accordingly with rising temperature. This is reflected in the fact that the square resistance of the source series resistor changes with temperature.

[0067] The relationship between the square resistance of the source series resistor and temperature is as follows:

[0068] μ RES =D*T -δ

[0069] Where D and δ are fitting coefficients, and T is temperature.

[0070] The resistance value of the source series resistor is expressed as:

[0071]

[0072] The expression of the output reference voltage mentioned above can be obtained.

[0073] It is difficult to find the relationship between saturation current and resistance from the original expression of output reference voltage. The first-order differential of the expression is discussed below.

[0074] The saturation current I of GaN HEMT DS The first derivative of (sat) with respect to temperature is:

[0075]

[0076] Arranged:

[0077]

[0078] from From the expression, we can see that the first and third terms are negative, and the sign of the second term is related to the sign of γ, that is, it is related to the choice of substrate. If the temperature rises and the threshold voltage drifts positively, then γ is positive, and if the threshold voltage drifts negatively, then γ is negative. For example, if the threshold voltage drifts positively, that is, γ is positive. Then A negative number.

[0079] The first-order derivative of the above resistance with respect to temperature is:

[0080]

[0081] Is a positive number.

[0082] The expression of the first-order derivative of the above output reference voltage with respect to temperature is:

[0083]

[0084] in is a positive number, I DS (sat) is a positive number, R is a positive number, is a negative number.

[0085] Based on the above description, it can be seen that by selecting the appropriate size of the GaN HEMT and the source series resistor, a voltage reference with a low temperature coefficient can be obtained.

[0086] For further information, see Figure 2 , which shows the specific circuit structure of the voltage reference structure of this embodiment, wherein R S and R D The resistors are not intentionally added. This is because the gates of GaN HEMTs are not self-aligned, so there will always be source parasitic resistance and drain parasitic resistance of the device at the source and drain, with resistance values ​​of R S and R D .

[0087] See also Figure 3 , which is an equivalent circuit diagram for calculating the circuit output impedance of the voltage reference structure of this embodiment. The calculation process of the output impedance is as follows:

[0088]

[0089] Among them, g m is the transconductance of the device, r O is the output impedance of the GaN HEMT, RD 、R S is defined as above.

[0090] See also Figure 4 , which is an equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure of this embodiment. The calculation process of the power supply rejection ratio is as follows:

[0091]

[0092] In the above formula, V in 、V out is the transition variable, r O is the output impedance of the transistor, and R is the resistance value of the source series resistor.

[0093] For further information, see Figure 5 As shown, in a voltage reference structure (named as voltage reference structure ②) provided in the second embodiment of the present application, the source of the transistor 1 is connected in series with the source series resistor 2 and then electrically connected to the gate, that is, they are commonly grounded, and a constant voltage output is achieved at the source of the transistor. The relationship between the reference voltage Vref output by the reference voltage output point 3 and the operating parameters of the transistor 1 and the source series resistor 2 satisfies the following formula, which is defined as Formula II:

[0094]

[0095] In this embodiment, if the transistor used is a depletion-mode GaN HEMT, the circuit principle of the voltage reference structure is as follows: the output current of the GaN HEMT gradually decreases with increasing temperature, and the resistance value of the source series resistor gradually increases with increasing temperature. According to the circuit principle, the voltage value at the intersection of the IV of the source series resistor and the transfer characteristic of the transistor is the output voltage value.

[0096] When the GaN HEMT operates in the saturation region, the current expression is:

[0097]

[0098] Among them, I DS (sat) is the saturation current, μ n is the electron mobility under the gate, μ sh is the channel mobility, ε * , ε o are the relative dielectric constant and vacuum dielectric constant, W is the gate width, L is the gate length, V Gs is the voltage difference between the gate and the source, V TH is the threshold voltage. GS is the gate-source distance, R Sh is the square resistance of the channel region, R Cis the contact resistivity of the ohmic contact, n is the surface density of the two-dimensional electron gas in the channel, and q is the charge.

[0099] The resistance value of the source series resistor is expressed as:

[0100]

[0101] Among them, L ES is the length of the source series resistor, W ES is the width of the source series resistor, R sh(RES) is the square resistance of the source series resistor, R C(RES) is the contact resistivity between the ohmic metal and the resistor material. RES is the carrier density, and q is the charge. When the temperature changes, the output reference voltage is expressed as Equation II above.

[0102] See also Figure 6 FIG. 4 shows an equivalent circuit diagram for calculating the output impedance of the voltage reference structure in this embodiment. The derivation process for calculating the output impedance is as follows:

[0103]

[0104] Simplified:

[0105]

[0106] Among them, g m is the transconductance of the device, r O is the output impedance of the device.

[0107] See also Figure 7 FIG. 4 shows an equivalent circuit diagram for calculating the power supply rejection ratio of the voltage reference structure in this embodiment. The derivation process for calculating the power supply rejection ratio is as follows:

[0108]

[0109] In the present application, the source series resistor may include, but is not limited to, a heterojunction 2DEG resistor, an n-GaN resistor, a p-GaN resistor, a silicon resistor, a metal thin film resistor, a metal compound thin film resistor, or a source series resistor formed of other materials. The metal thin film resistor may be Ni, Al, Cr, Ti, W, Au, Ag, Pd, or a multilayer composite structure of these metals. The material of the metal compound thin film resistor may be TiN, TaN, ITO, IGZO, etc., but is not limited thereto.

[0110] In the present application, the voltage reference structure comprises a semiconductor layer, the semiconductor layer comprises a channel layer and a barrier layer arranged on the channel layer, and the source, the drain and the gate are arranged on a designated region of the semiconductor layer and electrically connected with the channel layer and the barrier layer in the designated region to form the transistor.

[0111] In the present application, the source series resistance can be integrated with the transistor in a chip, the chip comprises the semiconductor layer, the semiconductor layer has a first region and a second region, the first region and the second region are distributed along a direction parallel to the surface of the semiconductor layer, the first region is the designated region, and at least part of the semiconductor material in the second region is electrically connected with the first electrode and the second electrode to form the source series resistance, or the source series resistance comprises a resistance material layer arranged on the second region, and the resistance material layer is electrically connected with the source of the transistor and the negative electrode of the power supply, respectively.

[0112] In the present application, the source series resistance can comprise a two-dimensional electron gas distributed in the second region, or the source series resistance comprises a semiconductor resistance layer formed by at least part of the barrier layer and / or the channel layer in the second region, and the resistance value of the semiconductor resistance layer is greater than the resistance value of the barrier layer and / or the channel layer; and in the semiconductor layer, the transistor and the source series resistance are electrically isolated from each other.

[0113] In the present application, the resistance material layer comprises a metal film and / or a metal compound film arranged on the second region.

[0114] In the present application, the material of the channel layer comprises but is not limited to GaN, AlGaN, InGaN or AlInGaN, and the like, and is not limited thereto.

[0115] In the present application, the material of the barrier layer comprises but is not limited to AlGaN, AlInN, AlN, AlScN or AlInGaN, and the like, and is not limited thereto.

[0116] In the present application, the transistor comprises a GaN-based HEMT.

[0117] In the present application, the transistor is a depletion-mode HEMT.

[0118] In the present application, the transistor can have a Schottky gate contact structure or a MIS gate structure.

[0119] In the present application, the transistor can be a field plate-free structure, or the transistor can have one or more field plates, for example, it can have one or more of a gate field plate, a source field plate and a drain field plate.

[0120] In the present application, the semiconductor layer can further be provided with an electrical isolation structure, which includes an ion implantation isolation structure or a mesa etching isolation structure, which can be formed by ion implantation, dry etching or wet etching of the semiconductor layer.

[0121] In the present application, the semiconductor layer can be provided on a substrate, which can be a homogeneous substrate or a heterogeneous substrate of the semiconductor layer, for example, can be selected from, but not limited to, Si, SiC, sapphire, GaN, AlN, diamond substrate, etc. or a composite substrate thereof.

[0122] In the present application, the semiconductor layer can further include a buffer layer, a spacer layer, a cap layer and other conventional structure layers.

[0123] In the present application, the semiconductor layer can further be provided with an insulating medium layer, a passivation layer and other conventional structure layers. The material of the insulating medium layer can be selected from one or a combination of more than one of silicon nitride, silicon oxide, aluminum oxide, high dielectric constant material, organic polymer, ceramic material, oxide semiconductor and other insulating materials.

[0124] Figure 8A cross-sectional view of a GaN voltage reference structure (designated Sample 1A) employing the first embodiment of the present application is shown. Within this voltage reference structure 30, a GaN high-molecular-electrode transistor (HMET) 31 and a source series resistor 32 are integrated into a single chip. The chip comprises a semiconductor layer comprising a channel layer 302 and a barrier layer 303 sequentially grown on a substrate 301. The channel layer 302 and the barrier layer 303 form a heterojunction within which a two-dimensional electron gas (2DEG) 304 is distributed. Furthermore, the semiconductor layer has a first region and a second region parallel to its surface. The source 305, gate 306, and drain 307 of the HEMT are disposed on the surface of the first region, respectively, to form the HMET in conjunction with the heterojunction in the first region. A first electrode 308 and a second electrode 309 of the source series resistor (the first and second electrodes can be positive and negative, respectively) are disposed on the surface of the second region, to form the source series resistor in conjunction with the two-dimensional electron gas in the second region. In other words, the source series resistor is a heterojunction 2DEG resistor. The source 305, drain 307, first electrode 308, and second electrode 309 can each form ohmic contacts with the semiconductor layer. An electrical isolation region 310 is located between the first and second regions to electrically isolate the source series resistor from the HEMT. This electrical isolation region can extend from the surface of the barrier layer into the channel layer, or from the surface of the barrier layer to the substrate surface. This electrical isolation region can be a high-resistance region formed by ion implantation into the semiconductor layer, or a recess formed by etching the semiconductor layer. The resistance of the source series resistor primarily depends on the two-dimensional electron gas (2DEG) in the second region. The gate 306 can be electrically connected to the source 305 and the second electrode 309 of the source series resistor via wires, while the first electrode 308 of the source series resistor is grounded. In some cases, a thickened electrode and source field plate can be provided above the gate. The drain 307 can be electrically connected to the positive terminal of the chip. One or more insulating dielectric layers 311 can also be provided on the surface of the semiconductor layer to isolate the aforementioned electrodes from each other and passivate the semiconductor layer surface. The one or more insulating dielectric layers can be continuous layers, and their materials can be, but are not limited to, silicon oxide, aluminum oxide, silicon nitride, etc. The aforementioned electrodes can be exposed through corresponding windows defined in these continuous insulating dielectric layers. Furthermore, the chip can also include a gate field plate structure that cooperates with the gate.

[0125] Figure 9 A cross-sectional view of a GaN voltage reference structure (named sample 2A) applying the second embodiment of the present application is shown. The GaN voltage reference structure is basically the same as sample 1A, wherein the gate 306 is connected to the first electrode 308 via a lead and grounded, and the source is connected to the second electrode 308 and connected to the reference voltage output point.

[0126] In the aforementioned voltage reference structures ① and ②, taking the example of 2DEG resistors as the source series resistors, as referenced above, we can see that, in terms of the principle of application, voltage reference structure ① utilizes the properties of a two-dimensional electron gas (2DEG). The 2DEG sheet resistance gradually increases with temperature, while the saturation current of the GaN HEMT gradually decreases with temperature. Therefore, the two can achieve a balance within a certain size, outputting a temperature-insensitive reference voltage. Voltage reference structure ② utilizes a circuit principle. The 2DEG sheet resistance gradually increases with temperature, while the saturation current of the GaN HEMT gradually decreases with temperature, resulting in a downward shift of the intersection point on the load line, thereby outputting a reference voltage.

[0127] Furthermore, regarding the output reference voltage range, voltage reference structure ①, due to the series connection of a GaN HEMT with a source series resistor, has a wider output reference voltage range, generally exceeding the GaN HEMT's threshold voltage. However, voltage reference structure ② outputs a reference voltage range smaller than the GaN HEMT's threshold voltage.

[0128] However, in terms of power consumption, under the constraints of process conditions, the voltage reference structure ② is more likely to achieve low saturation current, thereby achieving lower power consumption.

[0129] In terms of output impedance, the output impedance of the voltage reference structure ① is R out =≈R, the output impedance of voltage reference structure ② is Therefore, the output impedance of the voltage reference structure ② is smaller than that of the voltage reference structure ①, and has better load capacity.

[0130] In terms of power supply rejection, the power supply rejection of the voltage reference structure ① is The power supply rejection of voltage reference structure ② is Therefore, the voltage reference structure ② has better power supply rejection capability.

[0131] In addition, in terms of transient response, at the same GaN HEMT size, the output current of voltage reference structure ① is greater than that of voltage reference structure ②, resulting in faster transient response.

[0132] In some cases, the source series resistors in the voltage reference structure described in this application can be n and are sequentially connected in series on the conductive circuit, wherein the reference voltage output point is provided between the first source series resistor and the source of the transistor, and a reference voltage output point is provided between at least two adjacent source series resistors from the first source series resistor to the nth source series resistor, where n ≥ 2. In this case, R in the above formulas I and II is the sum of the resistance values ​​of the n source series resistors, and L ESThe sum of the lengths of the n source series resistors, and the widths of the n source series resistors are all W ES .

[0133] For example, see Figure 10 In a voltage reference structure (named as voltage reference structure ③) provided in the third embodiment of the present application, there are n source series resistors 21, 22, ..., 2n, whose resistance values ​​are R1, R2, ..., R n , and are sequentially connected in series with the source of the transistor. If the transistor in the voltage reference structure ③ also adopts a depletion-type GaN HEMT, and assuming that the aforementioned multiple source series resistors are formed by dividing a source series resistor in the voltage reference structure ① along the length direction, then its working principle is basically the same as that of the voltage reference structure ①, but it can realize multiple reference voltages Vref1, Vref2, ..., Vref n Output of Vref1 = I DS (sat)*(R1+R2+···+R n ), Vref2=I DS (sat)*(R2+···+R n ), ···, Vref n-1 =I DS (sat)*(R n-1 +R n ), Vref n =I DS (sat)*R n .

[0134] Figure 11 A cross-sectional view of a GaN voltage reference structure (designated Sample 1B) employing the third embodiment of the present application is shown. This GaN voltage reference structure is essentially the same as Sample 1A, differing in that multiple electrically isolated regions are provided in the semiconductor layer to form multiple 2DEG resistors connected in series. The drain of the GaN HEMT is connected to VDD, and the gate-source is shorted, connected in series with the multiple source series resistors, and then to ground.

[0135] For example, see Figure 12 In a voltage reference structure (named as voltage reference structure ④) provided in the fourth embodiment of the present application, there are n source series resistors 31, 32, ..., 3n, whose resistance values ​​are R1, R2, ..., R n, and are sequentially connected in series with the source of the transistor. If the transistor in the voltage reference structure ④ also uses a depletion-type GaN HEMT, and assuming that the aforementioned multiple source series resistors are formed by dividing a source series resistor in the voltage reference structure ② along the length direction, then its working principle is basically the same as that of the voltage reference structure ②, but it can realize multiple reference voltages Vref1, Vref2, ..., Vref n Output of Vref1 = I DS (sat)*(R1+R2+···+R n ), Vref2=I DS (sat)*(R2+···+R n ), ···, Vref n-1 =I DS (sat)*(R n-1 +R n ), Vref n =I DS (sat)*R n .

[0136] Figure 13 A cross-sectional view of a GaN voltage reference structure (designated Sample 2B) employing the fourth embodiment of the present application is shown. This GaN voltage reference structure is essentially the same as Sample 2A, except that multiple electrically isolated regions are provided in the semiconductor layer to form multiple 2DEG resistors connected in series. The drain of the GaN HEMT is connected to VDD, the gate is grounded, and the source is connected in series with the multiple source series resistors and then to ground.

[0137] In the above-described embodiments of the present application, the substrate can be made of SiC, Si, sapphire, GaN, AlN, or diamond, the channel layer can be made of GaN, InGaN, AlGaN, or AlInGaN, and the barrier layer can be made of AlGaN, InAlN, AlN, AlScN, or AlInGaN. The HEMT can be a depletion-mode device, with its gate forming a Schottky contact with the semiconductor layer, or a gate dielectric layer can be provided between the gate and the semiconductor layer, forming a Schottky gate contact or an MIS gate structure. Furthermore, the HEMT can also employ a recessed gate structure or a p-type gate structure.

[0138] In the above typical implementation scheme, in order to cope with different working scenarios, the structure of the transistor can be changed accordingly, for example: there can be only conventional source, drain, and gate without adding a field plate; only a gate field plate can be added; two field plates can be added, such as a gate field plate and a source field plate; three or even more field plates can be added.

[0139] Some embodiments of the present application also provide a circuit structure, which includes the voltage reference structure.

[0140] Some embodiments of the present application also provide a reference voltage output control method, which includes: connecting the voltage reference structure and a power supply to a working circuit, so that the voltage reference structure outputs a reference voltage; the power supply is a DC unit.

[0141] For example, the drain of the high electron mobility field effect transistor in the voltage reference structure can be connected to the positive electrode of a DC power supply, the gate can be directly connected to the negative electrode of the DC power supply or ground, and the source can be directly connected to the negative electrode of the DC power supply or ground after being connected in series with a source series resistor. Alternatively, the drain of the high electron mobility field effect transistor in the voltage reference structure can be connected to the positive electrode of a DC power supply, the gate can be directly connected to the source, and the source can be directly connected to the negative electrode of the DC power supply or ground after being connected in series with a source series resistor.

[0142] In some cases, the reference voltage output control method may further include: adjusting the reference voltage by adjusting the operating parameters of the transistor and / or source series resistor in the voltage reference structure. The load module may be a light emitting module or other electrical function module.

[0143] The present application can form a voltage reference structure by combining a depletion-mode GaN HEMT and various forms of source series resistors. The structure is simple, and operating parameters such as the size of the GaN HEMT and the source series resistor can be adjusted to improve the magnitude and temperature coefficient of the reference voltage output by the voltage reference structure, thereby producing a voltage reference with good performance.

[0144] The technical solution of the present application will be further described below in conjunction with several embodiments. However, the implementation of the present application is not limited to these specific details and can also be implemented in other ways different from those described herein. Therefore, the specific embodiments presented in the present application are only for illustration and not for limitation.

[0145] Example 1 This embodiment provides a GaN voltage reference structure that can be referenced to Figure 8 , and its preparation method comprises the following steps:

[0146] S1. A Fe-GaN buffer layer with a thickness of approximately 220 nm, an unintentionally doped GaN layer with a thickness of approximately 280 nm, a GaN channel layer with a thickness of approximately 90 nm, an AlN space layer with a thickness of approximately 1 nm, an AlGaN barrier layer with a thickness of approximately 30 nm, and a GaN cap layer with a thickness of approximately 2 nm are sequentially grown on a silicon carbide substrate through an MOCVD process to form a semiconductor epitaxial layer.

[0147] S2. Isolate the active area of ​​the semiconductor epitaxial layer by an ICP etching process, etc., with an etching depth of about 100 nm.

[0148] S3. Ohmic metal Ti / Al / Ni / Au (thickness of about 20 / 140 / 55 / 60 nm) is evaporated in the ohmic area through a photolithography process, and then annealed at about 870°C / 35s to form ohmic contacts between the source, drain, and positive and negative electrodes of the source series resistor of the transistor and the semiconductor epitaxial layer.

[0149] S4. A PECVD process is used as a passivation layer, which can be a silicon nitride layer with a thickness of 100 nm to 300 nm.

[0150] S5. Remove the dielectrics in the ohmic region and the gate region through a photolithography process and an AOE dry etching process.

[0151] S6. Then, Ti / Au (thickness of about 30 / 250 nm) is evaporated to form the gate field plate to complete the gate production, electrode thickening, and wire interconnection.

[0152] This embodiment ultimately produced a GaN voltage reference structure sample (abbreviated as sample ①).

[0153] The size parameters of the GaN HEMT in sample ① are: L g =10um, Lgs=40um, Lgd=3um, W=6um, electrical parameters: V GS =0V, V TH =-3.38V, physical parameters: μ n =1300,ε * =9.15,ε o =8.85E-14, d=2.45E-6, Rsh=325, Rc=1. Dimension parameters of source series resistor: L ES =40um, W ES =6um.

[0154] The GaN HEMT in sample ① was tested using a B1505A power device analyzer. The static bias was set to ground the source, connect the drain to 10V, and apply a gate voltage ranging from -6V to 1V with a test interval of 0.01V. The device was scanned to measure the relationship between source-drain current and gate-source voltage. The test system stage has a heating function. Once the system reaches the set temperature, wait for 5 minutes for the system to stabilize before testing.

[0155] Figure 14 The figure shows how the transfer characteristics of the GaN HEMT in sample ① change with increasing temperature, with a Vds applied voltage of 10V.

[0156] Figure 15 The figure shows how the current flowing through the source series resistor in sample ① changes with temperature when the voltage applied across the source series resistor remains unchanged.

[0157] Figure 16 The following figure shows the power supply rejection ratio (PSR) test results for sample 1. The test method applies a 10V static bias to VDD while superimposing a 2V AC signal with a frequency of 10Hz-10MHz. An oscilloscope is connected to the output to characterize the voltage source's power supply rejection. At low frequencies, sample 1 achieves a PSRR of nearly 100dB, demonstrating excellent power supply ripple suppression.

[0158] Figure 17 The figure shows the relationship between the output voltage of sample ① and the power supply voltage VDD. As the power supply voltage increases, the output voltage first increases and then reaches saturation. The corresponding power supply voltage at saturation is 7V.

[0159] Figure 18 The relationship between the output voltage and temperature of sample ① is shown, and the structure has good temperature characteristics.

[0160] The output impedance of sample ① is tested by connecting an external current source to the output port for shunting and testing the output voltage. The parameters of the external current source are as follows: Figure 19 As shown by the red line in the middle, the current increases evenly from 0 to 50uA during the time period of 0-5s. The voltage change obtained by testing at the output port is Figure 19 As shown by the blue line in the middle, the output impedance of this sample is calculated to be 4.5kΩ.

[0161] Example 2 This example provides a GaN voltage reference structure, the basic structure of which can be referred to Figure 11 The preparation method is basically the same as that of Example 1, except that:

[0162] In step S2, active area isolation is performed on multiple regions of the semiconductor epitaxial layer by an ICP etching process according to the structure of the GaN HEMT to be formed and the number of 2DEG resistors, with an etching depth of about 100 nm.

[0163] In this embodiment, the total length of the 2DEG resistor (L ES ) as a variable, a series of samples were produced, in which the total length of the 2DEG resistor was 10-100μm. Figure 20 The relationship between the current flowing through the GaN HEMT and the temperature in this series of samples is shown. It can be seen that the magnitude of the current has no relationship with the resistance length, but is only related to the GaN HEMT.

[0164] Under different temperature conditions (0-250℃), the GaN HEMTs in this series of samples were isolated from the test circuit, and only the series 2DEG resistors were placed in the test circuit. A voltage of 1V was applied to test the relationship between the current through these series resistors and temperature. The results are shown in Figure 2. Figure 21 As shown. It can be seen that the current decreases with temperature, L ES The larger it is, the smaller the current that passes through it, which means the greater the resistance.

[0165] Under different temperature conditions (0-250℃), the relationship between the reference voltage output by this series of samples and temperature was tested. The results are as follows: Figure 22 As shown, different curves in the figure represent different L ES , big L ES For a large reference voltage, the temperature coefficient of the reference voltage cannot be seen directly here. The following outputs different L ES The temperature coefficient is as follows. Figure 23 As shown, the calculation formulas for these temperature coefficients are:

[0166]

[0167] Among them, V max 、V min are the maximum and minimum voltages in the temperature range, V nominal is the average value of the voltage within the temperature range, T max 、T min are the maximum and minimum values ​​of temperature.

[0168] from Figure 23 From the results shown, it can be seen that the temperature coefficient of the reference voltage is not monotonically related to the size of the series resistor, but there is an optimal solution.

[0169] Figure 24 It's L ES The relationship between reference voltage and temperature when achieving the optimal solution. It can be seen that within the range of interest, the output reference voltage can maintain a good temperature coefficient. While meeting process requirements, the GaN voltage reference structure of this embodiment can output a reference voltage of 1.47V at 20°C-250°C with a temperature coefficient of 93ppm / °C, thus well suited for applications in GaN analog circuits.

[0170] Example 3 The basic structure of a GaN voltage reference structure provided in this embodiment can be referred to Figure 13 The preparation method is basically the same as that of Example 2, with the only difference being that the position of the reference voltage output point is different.

[0171] In this embodiment, the total length of the 2DEG resistor (L ES) as a variable, a series of samples were produced, in which the total length of the DEG resistor was 20-200 μm. Figure 25 The relationship between the current flowing through the GaN HEMT and temperature in this series of samples is shown. It can be seen that the magnitude of the current is related to the total length of the 2DEG resistor. This is because the series 2DEG resistor can be regarded as a source feedback resistor, which directly affects the saturation current of the GaN HEMT.

[0172] Under different temperature conditions (20-250℃), the GaN HEMTs in this series of samples were isolated from the test circuit, and only the series 2DEG resistors were placed in the test circuit. A voltage of 1V was applied to test the relationship between the current through these series resistors and temperature. The results are shown in Figure 2. Figure 26 As shown. It can be seen that the current decreases with temperature, L ES The larger it is, the smaller the current that passes through it, which means the greater the resistance.

[0173] Under different temperature conditions (20-250℃), the relationship between the reference voltage output by this series of samples and temperature was tested. The results are as follows: Figure 27 As shown, different curves in the figure represent different L ES , big L ES For a large reference voltage, the temperature coefficient of the reference voltage cannot be seen directly here. The following outputs different L ES Temperature coefficient under Figure 28 ). Obviously, the temperature coefficient of the reference voltage is not monotonically related to the size of the series resistor, but rather there is an optimal solution.

[0174] Figure 29 It's L ES The relationship between reference voltage and temperature when achieving the optimal solution. It can be seen that within the range of interest, the output reference voltage can maintain a good temperature coefficient. While meeting process requirements, the GaN voltage reference structure of this embodiment can output a reference voltage of 1.87V at 20°C-250°C with a temperature coefficient of 55ppm / °C.

[0175] The above embodiments are intended only to illustrate the technical concepts and effects of this application, with the goal of enabling those familiar with this technical field to understand the content of this application and implement it accordingly. However, these embodiments do not constitute a limitation on the scope of protection of this application. Any equivalent transformations or modifications made based on the spirit and technical ideas of this application should be covered by the claims of this application.

Claims

1. A voltage reference structure, characterized in that: The invention comprises a high electron mobility field effect transistor (1) based on a III-V compound and a source series resistor (2); the source of the transistor (1) and the source series resistor (2) are connected in series on a conductive circuit and used to connect to the negative electrode of a power supply or to ground, and a reference voltage output point (3) is provided on the conductive circuit; the gate of the transistor is used to connect to the negative electrode of the power supply or to ground, and the drain of the transistor is used to connect to the positive electrode of the power supply; The source and gate of the transistor (1) are electrically connected to each other and then connected in series with the source series resistor (2); the reference voltage output point (3) is arranged between the electrical connection point between the gate and source of the transistor and the source of the transistor; and the relationship between the reference voltage Vref output by the reference voltage output point (3) and the operating parameters of the transistor (1) and the source series resistor (2) satisfies Formula I: Alternatively, the source of the transistor (1) is connected in series with the source series resistor (2) and then electrically connected to the gate, the reference voltage output point (3) is arranged between the source of the transistor (1) and the source series resistor (2), and the relationship between the reference voltage Vref output by the reference voltage output point (3) and the operating parameters of the transistor (1) and the source series resistor (2) satisfies Formula II: The formula I is: The formula II is: Wherein, R is the resistance value of the source series resistor, I DS (sat) is the saturation current of the transistor, L ES is the length of the source series resistor, W ES is the width of the source series resistor, n RES is the carrier density, q is the charge, A, B, C, D, α, β, γ and δ are fitting coefficients, T is the ambient temperature of the voltage reference structure, R C(RES) is the contact resistivity between the ohmic metal and the resistor material in the source series resistor, ε * , ε o are the relative dielectric constant and the vacuum dielectric constant, d is the thickness of the barrier layer of the transistor, W is the width of the gate, L is the length of the gate, R C is the contact resistivity of the source and drain electrode metal ohmic contacts, V GS is the voltage difference between the gate and the source, L GS is the gate-source distance of the transistor, and n is the surface density of the two-dimensional electron gas in the channel of the transistor.

2. The voltage reference structure according to claim 1, wherein: There are n source series resistors (2) which are sequentially connected in series on the conductive circuit, wherein the reference voltage output point (3) is provided between the first source series resistor and the source of the transistor, and a reference voltage output point (3) is also provided between at least two adjacent source series resistors from the first source series resistor to the nth source series resistor, and n≥2; Moreover, in Formula I and Formula II, R is the sum of the resistance values ​​of n source series resistors, L ES is the sum of the lengths of the n source series resistors, and the widths of the n source series resistors are all W ES .

3. The voltage reference structure according to claim 1, wherein: The voltage reference structure includes a semiconductor layer, which includes a channel layer and a barrier layer arranged on the channel layer. The source, drain and gate are arranged on a specified area of ​​the semiconductor layer and are electrically combined with the channel layer and barrier layer in the specified area to form the transistor.

4. The voltage reference structure according to claim 3, wherein: The source series resistor is integrated with the transistor in a chip, and the chip includes the semiconductor layer, the semiconductor layer has a first region and a second region, the first region and the second region are distributed in a direction parallel to the surface of the semiconductor layer, the first region is the designated region, at least part of the semiconductor material in the second region is electrically combined with the first electrode and the second electrode to form the source series resistor, or the source series resistor includes a resistance material layer arranged on the second region, and the resistance material layer is electrically connected to the source of the transistor and the negative pole of the power supply respectively.

5. The voltage reference structure according to claim 4, wherein: The source series resistor comprises a two-dimensional electron gas distributed in the second region, or the source series resistor comprises a semiconductor resistance layer formed by converting at least a portion of the barrier layer and / or the channel layer in the second region, wherein the resistance of the semiconductor resistance layer is greater than the resistance of the barrier layer and / or the channel layer; and within the semiconductor layer, the transistor and the source series resistor are electrically isolated from each other; Alternatively, the resistance material layer includes a metal film and / or a metal compound film covering the second region.

6. The voltage reference structure according to claim 3, wherein: The material of the channel layer includes GaN, AlGaN, InGaN or AlInGaN; and / or, the material of the barrier layer includes AlGaN, AlInN, AlN, AlScN or AlInGaN; and / or, the semiconductor layer is arranged on a substrate, and the material of the substrate includes one or more combinations of SiC, Si, sapphire, GaN, AlN, diamond; and / or, an electrical isolation structure is arranged in the semiconductor layer, and the electrical isolation structure includes an ion implantation isolation structure or a mesa etching isolation structure; and / or, an insulating dielectric layer is also arranged on the semiconductor layer.

7. The voltage reference structure according to claim 1, wherein: The transistor includes a GaN-based HEMT; and / or the transistor is a depletion-mode HEMT; and / or the transistor has a Schottky gate contact structure or an MIS gate structure; and / or the transistor has a field plate-free structure, or the transistor has one or more field plates; and / or the source series resistor includes a combination of one or more of a heterojunction 2DEG resistor, an n-GaN resistor, a p-GaN resistor, a silicon resistor, a metal thin film resistor, and a metal compound thin film resistor.

8. A circuit structure, characterized in that: The invention comprises the voltage reference structure according to any one of claims 1 to 7.

9. A reference voltage output control method, characterized in that: include: Connecting the voltage reference structure and power supply according to any one of claims 1 to 7 to a working circuit, so that the voltage reference structure outputs a reference voltage; The power supply is a direct current power supply.

10. The reference voltage output control method according to claim 9, wherein: Also includes: The reference voltage is adjusted by adjusting the operating parameters of the transistor and / or the source series resistor in the voltage reference structure.

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