PWM signal output method, electronic equipment and computer readable storage medium

Abstract

The invention discloses a PWM signal output method, electronic equipment and a computer readable storage medium, and relates to the technical field of industrial control, and the PWM signal output method comprises the steps: obtaining an initial comparison value corresponding to a PWM signal timer; obtaining a pre-compensation amount, and compensating the initial comparison value through the pre-compensation amount to obtain a compensation comparison value; according to the PWM period, the period value of the PWM signal timer, the minimum pulse width value and the dead time, updating the compensation comparison value to obtain a target comparison value; outputting a PWM signal through the PWM signal timer according to the target comparison value; and updating the pre-compensation amount according to the target comparison value and the initial comparison value. The technical problem that the precision of the PWM signal is reduced due to a traditional narrow pulse suppression scheme in the prior art is solved.

Description

Technical Field

[0001] The present application relates to the field of industrial control technology, and in particular to a PWM signal output method, an electronic device, and a computer-readable storage medium. Background Art

[0002] Pulse width modulation (PWM) technology is a common technology in the field of industrial control technology. PWM signals can be used as drive signals to control the on and off of power switching devices. However, if the PWM signal contains narrow pulses, the switching device may be turned off immediately before it is fully turned on, or turned on again before it is fully turned off, resulting in increased losses of the power switching device and even affecting the service life of the power switching device. Usually, in order to suppress narrow pulses, the duty cycle of the drive signal is adjusted. This will cause the actual output voltage of the PWM signal to change, resulting in voltage errors or harmonics, resulting in reduced accuracy of the PWM signal. Summary of the invention

[0003] The main purpose of the present application is to provide a PWM signal output method, an electronic device and a computer-readable storage medium, aiming to solve the technical problem that the accuracy of the PWM signal is reduced due to the traditional narrow pulse suppression scheme.

[0004] To achieve the above object, the present application provides a PWM signal output method, the PWM signal output method comprising: Get the initial comparison value corresponding to the pulse width modulation PWM signal timer; Acquire a pre-compensation amount, and compensate the initial comparison value by the pre-compensation amount to obtain a compensated comparison value; According to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time, the compensation comparison value is updated to obtain a target comparison value; Outputting a PWM signal according to the target comparison value by the PWM signal timer; The pre-compensation amount is updated according to the target comparison value and the initial comparison value.

[0005] Optionally, the step of obtaining the pre-compensation amount includes: Determine whether the pre-compensation amount is obtained for the first time; If yes, the pre-compensation amount is set to 0; If not, obtaining the updated pre-compensation amount; When the initial comparison value meets the corresponding fixed value limit requirement, the pre-compensation amount is set to 0.

[0006] Optionally, the step of updating the compensation comparison value according to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time to obtain the target comparison value includes: Calculate a minimum pulse width count value corresponding to the minimum pulse width value according to the PWM period, the period value and the minimum pulse width value; Calculate a dead time count value corresponding to the dead time according to the PWM period, the period value and the dead time; Calculate the average value between the minimum width pulse count value and the dead time count value corresponding to the PWM signal timer; A target comparison value is determined according to a size relationship between the compensation comparison value and the average value, twice the average value, a difference between a period value of the PWM signal timer and twice the average value, and a difference between the period value and the average value, wherein the target comparison value is one of a plurality of preset values.

[0007] Optionally, the updating time of the initial comparison value is when the timer overflows and when the timer underflows, and the preset value includes 0, twice the average value, the average value, the difference between the period value and the average value, and the period value; The step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value comprises: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0008] Optionally, the update time of the initial comparison value is when the timer overflows, and the preset value includes 0, twice the average value, the average value, and the period value; The step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value comprises: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0009] Optionally, the updating time of the initial comparison value is when the timer underflows, and the preset value includes 0, twice the average value, the average value, and the period value; The step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value comprises: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0010] Optionally, before the step of obtaining a pre-compensation amount and compensating the initial comparison value by the pre-compensation amount to obtain a compensated comparison value, the method further includes: When the duty cycle of the PWM signal output by the controller is obtained; The product of the PWM signal duty cycle and the period value of the PWM signal timer is calculated to obtain the initial comparison value.

[0011] Optionally, the step of updating the pre-compensation amount according to the target comparison value and the initial comparison value comprises: Calculating the difference between the target comparison value and the initial comparison value to obtain an updated compensation amount; The value of the pre-compensation amount is set to the value of the updated compensation amount to obtain an updated pre-compensation amount.

[0012] The present application also provides a PWM signal output device, the PWM signal output device comprising: An initial acquisition module is used to obtain an initial comparison value corresponding to a pulse width modulation (PWM) signal timer; A comparison value compensation module, used for obtaining a pre-compensation amount, and compensating the initial comparison value by the pre-compensation amount to obtain a compensated comparison value; A comparison value updating module, used for updating the compensation comparison value according to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time to obtain a target comparison value; A signal output module, configured to output a PWM signal according to the target comparison value through the PWM signal timer; A compensation amount updating module is used to update the pre-compensation amount according to the target comparison value and the initial comparison value.

[0013] The present application also provides an electronic device, which is a physical device, and includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the steps of the PWM signal output method as described above.

[0014] The present application also provides a readable storage medium, which is a computer-readable storage medium. A program for implementing the PWM signal output method is stored on the computer-readable storage medium. The program for implementing the PWM signal output method is executed by a processor to implement the steps of the PWM signal output method as described above.

[0015] The present application also provides a computer program product, including a computer program, which implements the steps of the above-mentioned PWM signal output method when executed by a processor.

[0016] The present application provides a PWM signal output method. The present application first obtains an initial comparison value corresponding to a pulse width modulation (PWM) signal timer, then obtains a pre-compensation value, and compensates the initial comparison value through the pre-compensation value to obtain a compensated comparison value. The compensated comparison value is then updated according to a PWM period, a period value of the PWM signal timer, a minimum pulse width value, and a dead time to obtain a target comparison value. The pre-compensation value is then updated according to the target comparison value and the initial comparison value. Finally, a PWM signal is output according to the target comparison value through the PWM signal timer. In the technical solution of the present application, in order to reduce a voltage error generated when adjusting the duty cycle of a PWM signal, compensation is performed before updating and adjusting the timer comparison value. Then, the compensation comparison value is updated and adjusted to avoid narrow pulses in the PWM signal. Then, based on the target comparison value after the compensation update and adjustment, a PWM signal is output through the PWM signal timer. Finally, the pre-compensation value is updated to optimize the value of the pre-compensation value, thereby further reducing the voltage error. In summary, the technical solution of the present application not only suppresses the narrow pulses in the PWM signal, but also reduces the voltage error by compensating the PWM comparison value, improves the accuracy of the output voltage, and solves the technical problem that the traditional narrow pulse suppression scheme causes the accuracy of the PWM signal to decrease. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0019] Figure 1 This is a schematic diagram of the PWM signal generation principle in the PWM signal output method of the present application; Figure 2 A schematic diagram of the generation of upper and lower bridge arm PWM signals and dead zones in the PWM signal output method of the present application; Figure 3 This is a schematic diagram of narrow pulse generation in the PWM signal output method of this application; Figure 4 A schematic diagram of a flow chart provided for the first embodiment of the PWM signal output method of the present application; Figure 5 It is a current statistics diagram of the VF control driving induction motor when the voltage error is not compensated during narrow pulse suppression; Figure 6 For Figure 5 The current statistics diagram after the area inside the box is enlarged; Figure 7 A current statistical diagram of a VF controlled induction motor after the PWM signal output method in the embodiment of the present application is adopted; Figure 8 For Figure 7 The current statistics diagram after the area inside the box is enlarged; Fig. 9 This is a schematic diagram of the module structure of the PWM signal output device according to an embodiment of the present application; Fig.10 Schematic diagram of the device structure of the hardware operating environment involved in the PWM signal output method in the embodiment of the present application.

[0020] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0021] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work belong to the scope of protection of the present invention.

[0022] Embodiment 1 In the field of industrial control technology, PWM signals can be used as driving signals to drive power switching devices. Usually, it takes a certain amount of time to turn on and off power switching devices. If the driving signal contains narrow pulses, the switching device may need to be turned off before it is fully turned on, or it may need to be turned on again before it is fully turned off. This situation increases the loss of the switching device and may even affect the life of the switching device. Therefore, in practical applications, it is usually necessary to eliminate the narrow pulses in the driving signal, which can reduce the loss and protect the switching device. When the driving signal contains narrow pulses, the duty cycle of the driving signal is adjusted to make the narrow pulses disappear. This method is called narrow pulse suppression.

[0023] In the traditional narrow pulse suppression scheme, it is necessary to adjust the duty cycle (or width, timer comparison value, etc.) of the driving signal so that the narrow pulses in the output PWM signal disappear, thereby achieving the purpose of narrow pulse suppression. Since the driving signal needs to be adjusted, the actual output voltage will change, thereby introducing voltage errors or harmonics, resulting in a decrease in the accuracy of the driving signal. The scheme of the embodiment of the present application can effectively reduce the introduced voltage error by compensating before adjusting the PWM comparison value, thereby improving the accuracy of the output voltage.

[0024] Reference Figure 1 The PWM signal generation principle shown in the figure is that when the PWM timer count value is equal to the comparison value Cx (in the three-phase PWM timer, x is a, b or c), the PWM signal high and low levels are flipped, thereby generating the required PWM reference signal, where C T is the PWM timer cycle value (equivalent to the peak value of the count value change), T is the PWM cycle, the interval t-t+T is a complete PWM cycle, and the minimum pulse width output by the PWM timer is T min , the corresponding PWM timer count value C min =T min / T*C T In addition, in order to prevent the upper and lower bridge arms in the PWM signal from passing through, it is usually necessary to insert a dead zone in the upper and lower bridge arm drive signals. The dead zone time is T d , the corresponding PWM timer count value is C d =T d / T*C T After inserting the dead zone, the PWM drive signals of the upper and lower bridge arms can be generated according to the PWM reference signal, such as Figure 2 On the other hand, when the PWM comparison value is close to 0 or the timer period value, narrow pulses may appear in the output PWM signal ( Figure 2 The upper bridge PWM drive in Figure 3 This is a schematic diagram of the situation where a narrow pulse occurs when the PWM comparison value is close to the timer period value.

[0025] In order to suppress the narrow pulses appearing in the PWM signal and reduce the voltage error introduced, the present application proposes a PWM signal output method of the first embodiment, please refer to Figure 4 , the PWM signal output method comprises: Step S10, obtaining an initial comparison value corresponding to a pulse width modulation (PWM) signal timer; In the embodiment of the present application, it is first necessary to obtain the PWM timer comparison value output in the control algorithm corresponding to the controller, that is, the initial comparison value. The initial comparison value in the PWM timer is one of the parameters used to generate the PWM signal, and the value of the comparison value also affects the probability of occurrence of narrow pulses. In the embodiment of the present application, the value of the initial comparison value is compensated and updated, so as to ensure the narrow pulse suppression effect while also reducing the error voltage.

[0026] In a feasible embodiment, the PWM timer is a three-phase PWM timer, and the three-phase PWM timer comparison value output by the control algorithm may include: C a0 , C b0 , C c0 , which are used to represent the initial comparison values ​​of timers of different phases.

[0027] In another feasible embodiment, if the control algorithm does not output the initial comparison value but outputs the duty cycle of the PWM signal, then before the step of obtaining the pre-compensation amount and compensating the initial comparison value by the pre-compensation amount to obtain the compensated comparison value, the method may further include: Step S11, when the duty cycle of the PWM signal output by the controller is obtained; Step S12, calculating the product of the duty cycle of the PWM signal and the period value of the PWM signal timer to obtain the initial comparison value.

[0028] In the embodiment of the present application, when the duty cycle of the PWM signal is obtained, the duty cycle and the PWM timer period value C T Calculate the initial comparison value.

[0029] As an example, when the control algorithm outputs the three-phase duty cycle D a , D b , D c The duty cycle (a duty cycle of 0 represents a low level output in the current PWM cycle, and a duty cycle of 1 represents a high level output in the current PWM cycle) and the PWM timer period value C T The three-phase comparison value is calculated, and the expression for calculating the three-phase initial comparison value is as follows.

[0030] .

[0031] Step S20, obtaining a pre-compensation amount, and compensating the initial comparison value by the pre-compensation amount to obtain a compensated comparison value; It should be noted that steps S10 to S50 in the PWM signal output method are executed cyclically during the generation process of the PWM signal, and the execution frequency can be determined according to the update cycle set by the user. For example, if the PWM comparison value is updated when the PWM timer overflows or underflows, steps S10 to S50 are executed cyclically once every half PWM cycle. If the PWM comparison value is updated only when the timer overflows or underflows, steps S10 to S50 are executed cyclically once every PWM cycle, wherein timer overflow refers to the moment when the count value of the PWM timer is equal to the comparison value during the rising process, and similarly, timer underflow refers to the moment when the count value of the PWM timer is equal to the comparison value during the falling process. In the embodiment of the present application, the comparison value of the PWM timer is continuously compensated and updated cyclically during the generation and output process of the PWM signal, so that no narrow pulses appear in the output PWM signal, and the voltage error introduced is also small, so as to avoid affecting the accuracy of the PWM signal.

[0032] Furthermore, the step of obtaining the pre-compensation amount may also include: Step S21, determining whether the pre-compensation amount is obtained for the first time; Step S22: If yes, the pre-compensation amount is set to 0; Step S23, if not, obtaining the updated pre-compensation amount; Step S24: when the initial comparison value meets the corresponding fixed value limit requirement, the pre-compensation amount is set to 0.

[0033] The pre-compensation amount in the embodiment of the present application is the pre-compensation amount updated in the last cycle. In particular, if this is the first time step S20 is executed, the pre-compensation amount is initialized to 0. In addition, the process of compensating the initial comparison value by the pre-compensation amount is the process of calculating the sum of the initial comparison value and the pre-compensation amount, and the sum obtained is the compensated comparison value after compensation.

[0034] As a feasible embodiment, corresponding to the comparison value of the three-phase PWM timer, the timer comparison value pre-compensation amount includes Δ ap ´, Δ bp ´, Δ cp ´ (If this step is performed for the first time, Δ ap ´, Δ bp ´, Δ cp ´ are all zero), according to Δ ap ´, Δ bp ´, Δ cp Get the comparison value compensation Δ ap , Δ bp , Δ cp Among them, if there is no special restriction on the comparison value, then: .

[0035] If there are special restrictions on the PWM signal during this execution step, for example, in DPWM (Discontinuous Pulse Width Modulation), the comparison value of a phase timer needs to be fixed to the period value C in some cases. T Or 0, assuming that the x phase has special restrictions, x is a, b or c, then the three-phase comparison value compensation Δ ap , Δ bp , Δ cp It can be calculated as follows: ;

[0036] Among them, Δxp´ is the compensation value of the compensation amount. For example, if the comparison value of the x-phase limit is fixed, then Δxp´ and Δ ap ´ are equal, and finally Δ ap If it is 0, there is no need to compensate the comparison value of this phase, and similarly, there is no need to update the comparison value of this phase. The processing method when the comparison values ​​of other phases are fixed is similar.

[0037] Step S30, updating the compensation comparison value according to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time to obtain a target comparison value; In the embodiment of the present application, after the step of compensating the initial comparison value is performed, the error voltage caused by adjusting the comparison value and duty cycle of the PWM can be effectively reduced, and then the step of updating the compensation comparison value is performed. In this step, it is mainly necessary to update the compensation comparison value to a restricted target comparison value according to the range of the compensation comparison value, wherein the target comparison value can be used to output a PWM signal, so that the narrow pulses in the output PWM signal are effectively suppressed.

[0038] Specifically, in the process of updating the compensation comparison value, the target comparison value is determined mainly based on the size relationship between the compensation comparison value and the average value between the minimum width pulse count value and the dead time count value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value, wherein the target comparison value is one of multiple preset values, each of which may include: 0, twice the average value, the average value, the difference between the period value and the average value, and the period value.

[0039] Step S40, outputting a PWM signal according to the target comparison value through the PWM signal timer; In the embodiment of the present application, after the initial comparison value is compensated and updated, a target comparison value is obtained, and the target comparison value can be used for the PWM signal timer to generate a PWM signal with a smaller voltage error after narrow pulse suppression.

[0040] In a feasible embodiment, the PWM signal timer updates its corresponding PWM timer count value according to its own corresponding PWM timer period value and PWM period, and when the PWM timer count value is equal to the target comparison value, the current PWM signal is flipped to generate the required target PWM reference signal.

[0041] Step S50: updating the pre-compensation amount according to the target comparison value and the initial comparison value.

[0042] In the embodiment of the present application, it should be noted that there is no necessary execution order between step S50 and step S40, and step S40 can be executed first and then step S50, or step S50 can be executed first and then step S40. In the technical solution of the embodiment of the present application, after determining the target comparison value, the pre-compensation amount can be updated to optimize the pre-compensation amount in the process of compensating and updating the comparison value in each cycle, further reduce the introduced voltage error, so that the voltage between the PWM signal output according to the target comparison value and the original PWM signal is closer, and the accuracy of the PWM signal is improved.

[0043] As an example, the step of updating the pre-compensation amount according to the target comparison value and the initial comparison value may further include: Step S51, calculating the difference between the target comparison value and the initial comparison value to obtain an updated compensation amount; Step S52: setting the value of the pre-compensation amount to the value of the updated compensation amount to obtain an updated pre-compensation amount.

[0044] In the embodiment of the present application, the optimal updated compensation amount under the current situation is obtained mainly by calculating the difference between the target comparison value and the initial comparison value, and the original pre-compensation amount is replaced according to the obtained updated compensation amount for use when compensating the initial comparison value next time, thereby further improving the accuracy of the next compensation.

[0045] As an example, in a three-phase PWM timer, the PWM timer comparison value pre-compensation amount Δ ap ´, Δ bp ´, Δ cp The expression of the process is as follows: ;

[0046] in, , as well as are the three corresponding target comparison values, and , as well as are the three corresponding initial comparison values ​​respectively.

[0047] The PWM signal output method of the embodiment of the present application has excellent effects on suppressing narrow pulses and voltage errors in practice. Figure 5 , which shows an oscilloscope result display diagram when a conventional narrow pulse suppression method is used when an induction motor is driven by a PWM signal, and the voltage error is not compensated by the technical solution of the embodiment of the present application, wherein the horizontal axis is time in seconds, the vertical axis is current in the standard current value, and the conversion relationship between the standard current value and the current unit A is: 32768 standard values ​​are equal to . Reference Figure 6 right Figure 5 The enlarged view of the box area shows that when the VF control (control that ensures the output voltage is proportional to the frequency) drives the induction motor, the current fluctuation range is large and the current is very unstable (where the driven induction motor is a 5.5kw motor with an operating frequency of 49Hz). Figure 7 , which shows the oscilloscope result display after the voltage error is compensated and the comparison value is updated and limited when the induction motor is driven by the PWM signal, referring to Figure 8 right Figure 7 From the enlarged view of the box area, it can be seen that when VF control (control that ensures the output voltage is proportional to the frequency) drives the induction motor, the current fluctuation range is small, the current is stable, and the control performance is significantly improved.

[0048] In a possible implementation manner, the step of updating the compensation comparison value according to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time to obtain the target comparison value includes: Step S31, calculating a minimum width pulse count value corresponding to the minimum pulse width value according to the PWM period, the period value and the minimum pulse width value; Step S32, calculating a dead time count value corresponding to the dead time according to the PWM period, the period value and the dead time; Step S33, calculating the average value between the minimum width pulse count value and the dead time count value corresponding to the PWM signal timer; Step S34, determining a target comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value, wherein the target comparison value is one of a plurality of preset values.

[0049] In the embodiment of the present application, the minimum width pulse count value and the dead time count value need to be calculated first, wherein the PWM timer count value C corresponding to the minimum width pulse min =T min / T*C T , that is, the minimum width pulse count value is C min ; In addition, the PWM timer count value corresponding to the dead time is C d =T d / T*C T , that is, the dead time count value is C d After determining the small width pulse count value and the dead time count value, further calculate the average value between the minimum width pulse count value and the dead time count value corresponding to the PWM signal timer, wherein the average value is used as a reference value for measuring the value range of the compensation comparison value within the PWM signal cycle, so as to determine which preset value the compensation comparison value needs to be updated to in order to minimize the narrow pulses in the output PWM signal.

[0050] As an example, the mathematical expression for calculating the average is as follows: ,in, It is the average value between the minimum width pulse count value and the dead time count value corresponding to the PWM signal timer.

[0051] In addition, in step S34, the value range of the compensation comparison value is divided into five different ranges at once by four values, namely, the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value. When the compensation comparison value is in different ranges, the corresponding preset values ​​are also different, and the target comparison values ​​are also different, so that no matter which value range the compensation comparison value is in, the updated target comparison value can enable the output PWM signal to have the effect of narrow pulse suppression.

[0052] In a possible implementation manner, the step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value includes: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0053] The embodiment of the present application provides a method for updating the compensation comparison value when the update moment of the initial comparison value is when the timer overflows and when the timer underflows, and the corresponding preset value is determined according to the value range of the compensation comparison value. It should be noted that the preset value includes 0, twice the average value, the average value, the difference between the period value and the average value, and the period value. Moreover, each preset value in the technical solution of the embodiment of the present application is a comparison value that has been verified in practice and can suppress the narrow pulse in the PWM signal to the greatest extent. In addition, the technical solution of the embodiment of the present application also divides the corresponding value range according to the update frequency of the comparison value, and the update frequency includes three frequency options: updating when the timer overflows and updating when the timer underflows, updating when the timer overflows, and updating when the timer underflows. The user can select the appropriate comparison value update frequency according to the operation requirements.

[0054] As an example, the PWM signal timer is a three-phase PWM timer, and when the update time of the initial comparison value is when the timer overflows and when the timer underflows, the preset value selection scheme of the target comparison value is as described in the following expression: ;

[0055] in, is the updated target comparison value, is the compensation comparison value before updating, is the average value, It is the period value of the three-phase timer.

[0056] In a possible implementation manner, the step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value includes: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0057] The embodiment of the present application provides a method for updating the compensation comparison value when the update moment of the initial comparison value is a timer overflow, and the corresponding preset value is determined according to the value range of the compensation comparison value. It should be noted that the preset value includes 0, twice the average value, the average value and the period value. In the technical solution of the embodiment of the present application, compared with the corresponding application embodiment when the update moment of the initial comparison value is a timer overflow and a timer underflow, the embodiment of the present application combines two ranges: twice the average value to the difference between the period value and twice the average value, and the difference between the period value and twice the average value to the difference between the period value and the average value into one range: twice the average value to the difference between the period value and the average value. This is because, if the initial comparison value does not need to be updated when the timer underflows, there is no need to divide the range between twice the average value and the difference between the period value and the average value again, because even if it is divided, the comparison value will not be updated in the range of twice the average value to the difference between the period value and twice the average value, so the latter range is merged with this range to save computing resources.

[0058] As an example, the PWM signal timer is a three-phase PWM timer. When the update time of the initial comparison value is a timer overflow, the preset value selection scheme of the target comparison value is as described in the following expression: ;

[0059] in, is the updated target comparison value, is the compensation comparison value before updating, is the average value, It is the period value of the three-phase timer.

[0060] In a possible implementation manner, the step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value includes: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0061] The embodiment of the present application provides a method for updating the compensation comparison value when the update moment of the initial comparison value is a timer underflow, and the corresponding preset value is determined according to the value range of the compensation comparison value. It should be noted that the preset value includes 0, twice the average value, the average value and the period value. In the technical solution of the embodiment of the present application, compared with the corresponding application embodiment when the update moment of the initial comparison value is a timer overflow and a timer underflow, the embodiment of the present application combines two ranges: the average value to twice the average value, and the difference between the average value and the period value and twice the average value into one range: the difference between the average value and the period value and twice the average value. This is because if the initial comparison value does not need to be updated when the timer overflows, there is no need to divide the range from twice the average value to the difference between the period value and twice the average value again, because even if it is divided, the comparison value will not be updated in the range from twice the average value to the difference between the period value and twice the average value, so the previous range is merged with this range to save computing resources.

[0062] As an example, the PWM signal timer is a three-phase PWM timer. When the update time of the initial comparison value is when the timer underflows, the preset value selection scheme of the target comparison value is as described in the following expression: ;

[0063] in, is the updated target comparison value, is the compensation comparison value before updating, is the average value, It is the period value of the three-phase timer.

[0064] The embodiment of the present application provides a PWM signal output method. The present application first obtains an initial comparison value corresponding to a pulse width modulation (PWM) signal timer, then obtains a pre-compensation value, and compensates the initial comparison value by the pre-compensation value to obtain a compensated comparison value. Then, the compensated comparison value is updated according to a PWM period, a period value of the PWM signal timer, a minimum pulse width value, and a dead time to obtain a target comparison value. Then, the pre-compensation value is updated according to the target comparison value and the initial comparison value. Finally, a PWM signal is output according to the target comparison value by the PWM signal timer. In the technical solution of the embodiment of the present application, in order to reduce the voltage error generated when the duty cycle of the PWM signal is adjusted, compensation is performed before the timer comparison value is updated and adjusted, and then the compensation comparison value is updated and adjusted to avoid narrow pulses in the PWM signal. Then, based on the target comparison value after the compensation update and adjustment, the PWM signal is output through the PWM signal timer. Finally, the pre-compensation value is updated to optimize the value of the pre-compensation value, thereby further reducing the voltage error. To sum up, the technical solution of the embodiment of the present application not only has the effect of suppressing narrow pulses in the PWM signal, but also reduces the voltage error by compensating the PWM comparison value, improves the accuracy of the output voltage, and solves the technical problem that the traditional narrow pulse suppression scheme causes the accuracy of the PWM signal to decrease.

[0065] Embodiment 2 The embodiment of the present invention also provides a PWM signal output device, please refer to Fig. 9 , the PWM signal output device comprises: An initial acquisition module 10 is used to acquire an initial comparison value corresponding to a pulse width modulation (PWM) signal timer; A comparison value compensation module 20, used for obtaining a pre-compensation amount, and compensating the initial comparison value by the pre-compensation amount to obtain a compensated comparison value; A comparison value updating module 30 is used to update the compensation comparison value according to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time to obtain a target comparison value; A signal output module 40, configured to output a PWM signal according to the target comparison value through the PWM signal timer; The compensation amount updating module 50 is used to update the pre-compensation amount according to the target comparison value and the initial comparison value.

[0066] Optionally, the comparison value compensation module 20 is further used for: Determine whether the pre-compensation amount is obtained for the first time; If yes, the pre-compensation amount is set to 0; If not, obtaining the updated pre-compensation amount; When the initial comparison value meets the corresponding fixed value limit requirement, the pre-compensation amount is set to 0.

[0067] Optionally, the comparison value updating module 30 is further used for: Calculate a minimum pulse width count value corresponding to the minimum pulse width value according to the PWM period, the period value and the minimum pulse width value; Calculate a dead time count value corresponding to the dead time according to the PWM period, the period value and the dead time; Calculate the average value between the minimum width pulse count value and the dead time count value corresponding to the PWM signal timer; A target comparison value is determined according to a size relationship between the compensation comparison value and the average value, twice the average value, a difference between a period value of the PWM signal timer and twice the average value, and a difference between the period value and the average value, wherein the target comparison value is one of a plurality of preset values.

[0068] Optionally, the updating time of the initial comparison value is when the timer overflows and when the timer underflows, and the preset value includes 0, twice the average value, the average value, the difference between the period value and the average value, and the period value; The comparison value updating module 30 is also used for: The step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value comprises: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0069] Optionally, the update time of the initial comparison value is when the timer overflows, and the preset value includes 0, twice the average value, the average value, and the period value; The comparison value updating module 30 is also used for: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0070] Optionally, the updating time of the initial comparison value is when the timer underflows, and the preset value includes 0, twice the average value, the average value, and the period value; The comparison value updating module 30 is also used for: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

[0071] Optionally, the initial acquisition module 10 is further used for: When the duty cycle of the PWM signal output by the controller is obtained; The product of the PWM signal duty cycle and the period value of the PWM signal timer is calculated to obtain the initial comparison value.

[0072] Optionally, the compensation amount updating module is further used for: Calculating the difference between the target comparison value and the initial comparison value to obtain an updated compensation amount; The value of the pre-compensation amount is set to the value of the updated compensation amount to obtain an updated pre-compensation amount.

[0073] The PWM signal output device provided by the present invention adopts the PWM signal output method in the above-mentioned embodiment 1 or embodiment 2, which can solve the technical problem that the accuracy of the PWM signal is reduced due to the traditional narrow pulse suppression scheme. Compared with the prior art, the beneficial effects of the PWM signal output device provided by the embodiment of the present invention are the same as the beneficial effects of the PWM signal output method provided by the above-mentioned embodiment, and other technical features in the PWM signal output device are the same as the features disclosed in the above-mentioned embodiment method, which will not be repeated here.

[0074] Embodiment 3 An embodiment of the present invention provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the PWM signal output method in the above-mentioned embodiment 1.

[0075] Reference below Fig.10 , which shows a schematic diagram of the structure of an electronic device suitable for implementing the embodiments of the present disclosure. The electronic devices in the embodiments of the present disclosure may include, but are not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Fig.10 The electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0076] like Fig.10As shown, the electronic device may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM: Read Only Memory) 1002 or a program loaded from a storage device 1003 to a random access memory (RAM: Random Access Memory) 1004. In RAM1004, various programs and data required for the operation of the electronic device are also stored. The processing device 1001, ROM1002, and RAM1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the electronic device to communicate with other devices wirelessly or by wire to exchange data. Although the figure shows an electronic device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems can be implemented or have alternatively.

[0077] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed.

[0078] The electronic device provided by the present invention adopts the PWM signal output method in the above embodiment, which can solve the technical problem that the accuracy of the PWM signal is reduced due to the traditional narrow pulse suppression scheme. Compared with the prior art, the beneficial effects of the electronic device provided by the embodiment of the present invention are the same as the beneficial effects of the PWM signal output method provided by the above embodiment, and other technical features in the electronic device are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0079] It should be understood that the various parts of the present disclosure can be implemented with hardware, software, firmware or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0080] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

[0081] Embodiment 4 An embodiment of the present invention provides a computer-readable storage medium having computer-readable program instructions stored thereon, and the computer-readable program instructions are used to execute the PWM signal output method in the above-mentioned embodiment 1.

[0082] The computer-readable storage medium provided in the embodiment of the present invention may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM: Random Access Memory), a read-only memory (ROM: Read Only Memory), an erasable programmable read-only memory (EPROM: Erasable Programmable Read Only Memory or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM: CD-Read Only Memory), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency: Radio Frequency), etc., or any suitable combination of the above.

[0083] The computer-readable storage medium may be included in the electronic device, or may exist independently without being installed in the electronic device.

[0084] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by an electronic device, the electronic device: obtains an initial comparison value corresponding to a pulse width modulation (PWM) signal timer; obtains a pre-compensation amount, and compensates the initial comparison value by the pre-compensation amount to obtain a compensated comparison value; updates the compensated comparison value according to a PWM period, a period value of the PWM signal timer, a minimum pulse width value, and a dead time to obtain a target comparison value; outputs a PWM signal according to the target comparison value through the PWM signal timer; and updates the pre-compensation amount according to the target comparison value and the initial comparison value.

[0085] Computer program code for performing the operations of the present disclosure may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0086] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present invention. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0087] The modules involved in the embodiments described in the present disclosure may be implemented by software or hardware, wherein the name of the module does not limit the unit itself in some cases.

[0088] The readable storage medium provided by the present invention is a computer-readable storage medium, which stores computer-readable program instructions for executing the above-mentioned PWM signal output method, and can solve the technical problem that the accuracy of the PWM signal is reduced due to the traditional narrow pulse suppression scheme. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the embodiment of the present invention are the same as the beneficial effects of the PWM signal output method provided by the above-mentioned embodiment 1 or embodiment 2, and will not be repeated here.

[0089] Embodiment 5 An embodiment of the present invention further provides a computer program product, including a computer program, wherein when the computer program is executed by a processor, the steps of the PWM signal output method as described above are implemented.

[0090] The computer program product provided by the present application can solve the technical problem that the traditional narrow pulse suppression scheme in the PWM signal output scheme causes the accuracy of the PWM signal to decrease. Compared with the prior art, the beneficial effects of the computer program product provided by the embodiment of the present invention are the same as the beneficial effects of the PWM signal output method provided by the above-mentioned embodiment 1 or embodiment 2, and will not be repeated here.

[0091] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent processing scope of the present application.

Claims

1. A PWM signal output method, characterized in that: The PWM signal output method comprises: Get the initial comparison value corresponding to the pulse width modulation PWM signal timer; Acquire a pre-compensation amount, and compensate the initial comparison value by the pre-compensation amount to obtain a compensated comparison value; According to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time, the compensation comparison value is updated to obtain a target comparison value; Outputting a PWM signal according to the target comparison value by the PWM signal timer; The pre-compensation amount is updated according to the target comparison value and the initial comparison value.

2. The PWM signal output method according to claim 1, characterized in that: The step of obtaining the pre-compensation amount includes: Determine whether the pre-compensation amount is obtained for the first time; If yes, the pre-compensation amount is set to 0; If not, obtaining the updated pre-compensation amount; When the initial comparison value meets the corresponding fixed value limit requirement, the pre-compensation amount is set to 0.

3. The PWM signal output method according to claim 1, characterized in that: The step of updating the compensation comparison value according to the PWM period, the period value of the PWM signal timer, the minimum pulse width value, and the dead time to obtain the target comparison value includes: Calculate a minimum pulse width count value corresponding to the minimum pulse width value according to the PWM period, the period value and the minimum pulse width value; Calculate a dead time count value corresponding to the dead time according to the PWM period, the period value and the dead time; Calculate the average value between the minimum width pulse count value and the dead time count value corresponding to the PWM signal timer; A target comparison value is determined according to a size relationship between the compensation comparison value and the average value, twice the average value, a difference between a period value of the PWM signal timer and twice the average value, and a difference between the period value and the average value, wherein the target comparison value is one of a plurality of preset values.

4. The PWM signal output method according to claim 3, characterized in that: The updating time of the initial comparison value is when the timer overflows and when the timer underflows, and the preset value includes 0, twice the average value, the average value, the difference between the period value and the average value, and the period value; The step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value comprises: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

5. The PWM signal output method according to claim 3, characterized in that: The updating time of the initial comparison value is when the timer overflows, and the preset value includes 0, twice the average value, the average value, and the period value; The step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value comprises: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than twice the average value, the target comparison value is set to twice the average value; If the compensation comparison value is not less than twice the average value and is less than the difference between the period value and the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

6. The PWM signal output method according to claim 3, characterized in that: The updating time of the initial comparison value is when the timer underflows, and the preset value includes 0, twice the average value, the average value, and the period value; The step of determining the target comparison value corresponding to the compensation comparison value according to the size relationship between the compensation comparison value and the average value, twice the average value, the difference between the period value of the PWM signal timer and twice the average value, and the difference between the period value and the average value comprises: If the compensation comparison value is less than the average value, the target comparison value is set to 0; If the compensation comparison value is not less than the average value and is less than the difference between the period value and twice the average value, the target comparison value is set to the compensation comparison value; If the compensation comparison value is not less than the difference between the period value and twice the average value, and is less than the difference between the period value and the average value, the target comparison value is set to the difference between the period value and twice the average value; If the compensation comparison value is greater than the difference between the period value and the average value, the target comparison value is set to the period value.

7. The PWM signal output method according to claim 1, characterized in that: Before the step of obtaining the pre-compensation amount and compensating the initial comparison value by the pre-compensation amount to obtain the compensated comparison value, the method further includes: When the duty cycle of the PWM signal output by the controller is obtained; The product of the PWM signal duty cycle and the period value of the PWM signal timer is calculated to obtain the initial comparison value.

8. The PWM signal output method according to any one of claims 1 to 7, characterized in that: The step of updating the pre-compensation amount according to the target comparison value and the initial comparison value comprises: Calculating the difference between the target comparison value and the initial comparison value to obtain an updated compensation amount; The value of the pre-compensation amount is set to the value of the updated compensation amount to obtain an updated pre-compensation amount.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the steps of the PWM signal output method according to any one of claims 1 to 8.

10. A readable storage medium, characterized in that: The readable storage medium is a computer-readable storage medium, on which is stored a program for implementing the PWM signal output method. The program for implementing the PWM signal output method is executed by a processor to implement the steps of the PWM signal output method as described in any one of claims 1 to 8.

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